High-precision wake-up circuit

Abstract

The embodiment of the invention provides a high-precision wake-up circuit, which comprises a first input end, a second input end, a comparator and a reference voltage source, and further comprises an oscillator used for generating at least two groups of non-overlapped clock signals; the switch unit is connected with the oscillator, and a switch in the switch unit is controlled by the clock signal to be switched on / off; the capacitor unit is respectively connected with the first input end and the second input end through the switch unit; the first input end and the second input end are respectively connected with the comparator and the reference voltage source through the switch unit; the method has the beneficial effects that the input equivalent noise is effectively reduced, so that the accuracy of the wake-up threshold can be improved.

Description

Technical Field

[0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a high-precision wake-up circuit. Background Art

[0002] At present, the battery management circuit in the prior art is as follows Figure 1 As shown, it includes a battery management chip, a charging control switch MN1, a discharging control switch MN2, a current sampling resistor Rs, a battery cell BAT1, a capacitor C1, and a resistor R1. The SCL and SDA pins of the BMS chip are used to communicate with other circuits, and generally sample the general IIC interface protocol. One technical development trend is that Rs uses a smaller resistance value. A smaller resistance value results in less energy consumption on the resistor Rs, but the challenge introduced is that when sampling the current, under the same current conditions, its voltage value is smaller, resulting in a worse threshold accuracy for wake-up detection. The BMS chip usually detects the voltage of Rs, and when its current exceeds a certain threshold, that is, when the voltage value on Rs exceeds a certain threshold, it wakes up the high-power circuits (such as ADC and other modules) in the BMS system. When the current is less than a certain threshold, that is, when the voltage value on Rs is less than a certain threshold, the system enters a low-power state and turns off some high-power circuits to achieve energy saving.

[0003] Figure 2 This is an existing method for realizing the Wakeup function, which includes a reference voltage source VR1 and a comparator com. When the SRN voltage is higher than the SRP voltage plus the reference voltage source VR1 voltage, the comparator output WakeupS changes from a low level to a high level. This signal wakes up high-power circuits (such as ADC, MCU). However, due to the presence of a certain input mismatch voltage and input equivalent noise in the comparator com, the wakeup threshold has a large deviation between different chips. Even for the same chip, in multiple measurements, due to the input equivalent noise (which changes over time, due to the presence of thermal noise and 1 / f noise in the device), the wakeup threshold also changes continuously in multiple measurements. In one example, the typical wakeup threshold is designed to be 0.6mV, and the device mismatch and device noise result in a measurement accuracy of + / -0.2mV. Summary of the invention

[0004] In view of the defects in the prior art, the present invention provides a high-precision wake-up circuit, which can improve the accuracy of the wake-up threshold.

[0005] A high-precision wake-up circuit comprises a first input terminal, a second input terminal, a comparator and a reference voltage source, wherein the wake-up circuit further comprises:

[0006] An oscillator for generating at least two sets of non-overlapping clock signals;

[0007] A switch unit, wherein the switch unit is connected to the oscillator, and a switch in the switch unit is controlled by the clock signal to be turned on / off;

[0008] a capacitor unit, wherein the capacitor unit is connected to the first input terminal and the second input terminal respectively through the switch unit;

[0009] The first input terminal and the second input terminal are also connected to the comparator and the reference voltage source respectively through the switch unit.

[0010] As a specific preferred embodiment of the present application, the switch unit includes at least two groups of switch sub-units, wherein each switch in one group of switch sub-units is controlled by a set of generated clock signals, and each switch in another group of switch sub-units is controlled by another set of clock signals.

[0011] As a specific preferred embodiment of the present application, the voltage value of the reference voltage source is VR*N; wherein VR is a preset reference voltage, and N is the number of capacitors in the capacitor unit.

[0012] As a specific preferred embodiment of the present application, the first input end is an SRN end, and the second input end is an SRP end.

[0013] As a specific preferred embodiment of the present application, the group of switch subunits includes switch S1a, switch S2a and switch S3a, and the other group of switch subunits includes switches S1b and S2b; the clock signal includes clock CK1 and clock CK2.

[0014] As a specific preferred embodiment of the present application, the capacitor unit includes a capacitor C1 and a capacitor C2, and the switch unit is connected between the capacitor C1 and the capacitor C2.

[0015] As a specific preferred embodiment of the present application, the SRN terminal is respectively connected to one end of the switch S1a and the switch S2a, the other end of the switch S1a is respectively connected to one end of the capacitor C1 and the switch S2b, the other end of the switch S2a is respectively connected to one end of the capacitor C2 and the switch S1b, the other end of the switch S1b is connected to the non-inverting input terminal of the comparator, the other end of the capacitor C2 is respectively connected to the other end of the switch S2b and one end of the switch S3a, the other end of the switch S3a is respectively connected to the other end of the capacitor C1 and the SRP terminal, and the SRP terminal is also connected to the inverting input terminal of the comparator through the reference voltage source.

[0016] As a specific preferred embodiment of the present application, the group of switch subunits further includes switches S4a and S5a, the other group of switch subunits further includes switches S2c, and the capacitor unit further includes capacitor C3.

[0017] As a specific preferred embodiment of the present application, the threshold accuracy of the wake-up circuit is: A+error value / N; wherein A is a constant, N is the number of capacitors in the capacitor unit, and the error value is a fixed error value introduced by the comparator.

[0018] It can be seen from the above technical solution that a high-precision wake-up circuit provided by the present invention deploys an oscillator, a switch unit and a capacitor unit between the input end and the comparator, the switch unit is connected to the oscillator, and the switch in the switch unit is controlled by the clock signal to be turned on / off; the capacitor unit is respectively connected to the first input end and the second input end through the switch unit, so that the equivalent noise of the input is effectively reduced, thereby improving the accuracy of the wake-up threshold, and further reducing the frequent false triggering caused by noise, thereby making the system more stable; at the same time, it avoids the increase in power consumption caused by frequent false triggering and wake-up, which is beneficial to system energy saving. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following is a brief introduction to the drawings required for the specific embodiments or the description of the prior art. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn according to the actual scale.

[0020] Figure 1 A circuit diagram of a battery management circuit provided as background technology;

[0021] Figure 2 A schematic diagram of a high-precision wake-up circuit in the prior art;

[0022] Figure 3 A connection diagram of a high-precision wake-up circuit provided by an embodiment of the present invention.

[0023] Figure 4 A connection diagram of another high-precision wake-up circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0024] The embodiments of the technical solution of the present invention will be described in detail below in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and are therefore only used as examples, and the protection scope of the present invention cannot be limited thereto. It should be noted that, unless otherwise specified, the technical terms or scientific terms used in this application should be the common meanings understood by those skilled in the art to which the present invention belongs.

[0025] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0026] It should also be understood that the terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0027] As used in this specification and the appended claims, the term "if" may be interpreted as "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrases "if it is determined" or "if [described condition or event] is detected" may be interpreted as meaning "upon determination" or "in response to determining" or "upon detection of [described condition or event]" or "in response to detecting [described condition or event]," depending on the context.

[0028] It should be noted that, unless otherwise specified, the technical terms in this embodiment have the common meanings understood in the relevant technical field.

[0029] A high-precision wake-up circuit provided by an embodiment of the present invention, see Figure 3 to Figure 4 , comprising a first input terminal, a second input terminal, a comparator and a reference voltage source, the wake-up circuit further comprising:

[0030] An oscillator for generating at least two sets of non-overlapping clock signals;

[0031] A switch unit, wherein the switch unit is connected to the oscillator, and a switch in the switch unit is controlled by the clock signal to be turned on / off;

[0032] a capacitor unit, wherein the capacitor unit is connected to the first input terminal and the second input terminal respectively through the switch unit;

[0033] The first input terminal and the second input terminal are also connected to the comparator and the reference voltage source respectively through the switch unit.

[0034] It should be noted that in this embodiment, only the contribution part of the invention is described in detail, and the existing part is briefly described; the above solution can be applied alone or in a battery management chip, and is not limited here. The battery management chip is attached Figure 1 BMS in; Rs is the sampling resistor; Figure 2In existing applications, when the SRN voltage is higher than the SRP voltage plus the reference voltage source VR1 voltage, the comparator output WakeupS changes from a low level to a high level, and this signal wakes up high-power circuits (such as ADC, MCU).

[0035] In this embodiment, for the convenience of description, the oscillator is represented by OSC and the comparator is represented by com;

[0036] The switch unit comprises at least two groups of switch subunits, wherein each switch in one group of switch subunits is controlled by a group of generated clock signals, and each switch in another group of switch subunits is controlled by another group of clock signals.

[0037] The first input end is an SRN end, and the second input end is an SRP end;

[0038] The voltage value of the reference voltage source is VR*N; wherein VR is a preset reference voltage, and N is the number of capacitors in the capacitor unit; the generally preset reference voltage is 0.6 mV.

[0039] Reference Figure 3 , the group of switch sub-units includes switch S1a, switch S2a and switch S3a, the other group of switch sub-units includes switches S1b and S2b; the clock signal includes clock CK1 and clock CK2; the capacitor unit includes capacitor C1 and capacitor C2, and the switch unit is connected between capacitor C1 and capacitor C2.

[0040] Right now, Figure 3 The circuit includes switches S1a, S2a, S3a, S1b, S2b, a comparator com, capacitors C1, C2, a reference voltage source VR2 and an oscillator OSC. The oscillator generates non-overlapping clocks CK1 and CK2.

[0041] When CK1 is high, CK2 is low, switches S1a, S2a, S3a are turned on, and the voltages of SRN and SRP are stored on capacitors C1 and C2, that is, VC1=VRs=VC2, where VC1 is the voltage on capacitor C1, VC2 is the voltage on capacitor C2, and VRs is the voltage on resistor Rs (Rs is Figure 1 The resistance Rs in the

[0042] When CK2 is high, CK1 is low. At this time, switches S2b and S1b are turned on, and the voltage of the comparator positive input node IP is equal to VSRP+VC1+VC2, where VSRP is the voltage value of the SRP node, VC1 is the voltage on the capacitor C1, and VC2 is the voltage on the capacitor C2.

[0043] The voltage of the negative input terminal IN of the comparator is equal to VSRP+VR2, where VSRP is the voltage value of the SRP node and VR2 is the voltage value of the reference voltage source VR2. The voltage of VC1+VC2 is equivalent to that of VR2. The input signal is doubled by sampling with two capacitors. The voltage value of VR2 is also designed to be the same as the existing technology. Figure 2 If the error introduced by the comparator is still + / -0.2mV, the comparison effect is 0.6mV*2+ / -0.2mV, which is 0.6mV+ / -0.1mV for the input signal relative to the wake-up threshold. Figure 2 In terms of improved accuracy.

[0044] In another embodiment, based on the above solution, the group of switch subunits further includes a switch S4a and a switch S5a, the other group of switch subunits further includes a switch S2c, and the capacitor unit further includes a capacitor C3.

[0045] Right now Figure 4 Another implementation according to the present invention is described, which includes a comparator com, capacitors C1-C3, switches S1a, S2a, S3a, S4a, S5a, S1b, S2b, S2c, a reference voltage source VR3 and an oscillator OSC. The oscillator generates non-overlapping clocks CK1 and CK2. When CK1 is at a high level, CK2 is at a low level, switches S1a, S2a, S3a, S4a, S5a are turned on, and the voltages of SRN and SRP are stored on capacitors C1, C2 and C3, that is, VC1=VRs=VC2=VC3, where VC1 is the voltage on capacitor C1, VC2 is the voltage on capacitor C2, VC3 is the voltage on capacitor C3, and VRs is the voltage on resistor Rs (Rs is Figure 1 The resistance Rs in the

[0046] When CK2 is at a high level, CK1 is at a low level. At this time, switches S2b, S1b and S3b are turned on, and the voltage of the positive input node IP of the comparator is equal to VSRP+VC1+VC2+VC3, where VSRP is the voltage value of the SRP node, VC1 is the voltage on capacitor C1, VC2 is the voltage on capacitor C2, and VC3 is the voltage on capacitor C3. The voltage of the negative input terminal IN of the comparator is equal to VSRP+VR3, where VSRP is the voltage value of the SRP node, and VR3 is the voltage value of the reference voltage source VR3. Equivalently compare the voltages of VC1+VC2+VC3 (=3VRs) and VR3. By sampling with two capacitors, the input signal is doubled, and VR2 is also designed as the prior art during design. Figure 2If the error introduced by the comparator is still + / -0.2mV, the comparison effect is 0.6mV*3+ / -0.2mV, which is 0.6mV+ / -0.067mV relative to the wake-up threshold for the input signal. Figure 2 In terms of improved accuracy.

[0047] It can be seen that the threshold accuracy of the wake-up circuit is: A+error value / N; wherein A is a constant, N is the number of capacitors in the capacitor unit, and the error value is a fixed error value introduced by the comparator; in this technical solution, A is 0.6mV;

[0048] Based on the above principle, 4 or more capacitors may be used for sampling; assuming the number of sampling capacitors is N, the equivalent measurement accuracy may be increased to + / -(0.2mV) / N; wherein N may be a positive integer.

[0049] The above scheme deploys an oscillator, a switch unit and a capacitor unit between the input end and the comparator, the switch unit is connected to the oscillator, and the switch in the switch unit is controlled by the clock signal to be turned on / off; the capacitor unit is respectively connected to the first input end and the second input end through the switch unit, so that the equivalent noise of the input is effectively reduced, thereby improving the accuracy of the wake-up threshold, and further reducing the frequent false triggering caused by noise, thereby making the system more stable; at the same time, it avoids the increase in power consumption caused by frequent false triggering and wake-up, which is beneficial to system energy saving.

[0050] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. These modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention, and they should all be included in the scope of the claims and specification of the present invention.

Claims

1. A high-precision wake-up circuit, comprising a first input terminal, a second input terminal, a comparator and a reference voltage source, characterized in that: The wake-up circuit also includes: An oscillator for generating at least two sets of non-overlapping clock signals; A switch unit, wherein the switch unit is connected to the oscillator, and a switch in the switch unit is controlled by the clock signal to be turned on / off; a capacitor unit, wherein the capacitor unit is connected to the first input terminal and the second input terminal respectively through the switch unit; The first input terminal and the second input terminal are also connected to the comparator and the reference voltage source respectively through the switch unit.

2. A high-precision wake-up circuit according to claim 1, characterized in that: The switch unit comprises at least two groups of switch subunits, wherein each switch in one group of switch subunits is controlled by a group of generated clock signals, and each switch in another group of switch subunits is controlled by another group of clock signals.

3. A high-precision wake-up circuit according to claim 2, characterized in that: The voltage value of the reference voltage source is VR*N, wherein VR is a preset reference voltage, and N is the number of capacitors in the capacitor unit.

4. A high-precision wake-up circuit according to claim 3, characterized in that: The first input terminal is an SRN terminal, and the second input terminal is an SRP terminal.

5. A high-precision wake-up circuit according to claim 4, characterized in that: The group of switch subunits includes switches S1a, S2a and S3a, and the other group of switch subunits includes switches S1b and S2b; the clock signal includes clock CK1 and clock CK2.

6. A high-precision wake-up circuit according to claim 5, characterized in that: The capacitor unit includes a capacitor C1 and a capacitor C2, and the switch unit is connected between the capacitor C1 and the capacitor C2.

7. A high-precision wake-up circuit according to claim 6, characterized in that: The SRN terminal is connected to one end of the switch S1a and the switch S2a respectively, the other end of the switch S1a is connected to one end of the capacitor C1 and the switch S2b respectively, the other end of the switch S2a is connected to one end of the capacitor C2 and the switch S1b respectively, the other end of the switch S1b is connected to the non-inverting input terminal of the comparator, the other end of the capacitor C2 is connected to the other end of the switch S2b and one end of the switch S3a respectively, the other end of the switch S3a is connected to the other end of the capacitor C1 and the SRP terminal respectively, and the SRP terminal is also connected to the inverting input terminal of the comparator through the reference voltage source.

8. A high-precision wake-up circuit according to claim 7, characterized in that: The group of switch subunits further includes a switch S4a and a switch S5a, the other group of switch subunits further includes a switch S2c, and the capacitor unit further includes a capacitor C3.

9. A high-precision wake-up circuit according to claim 8, characterized in that: The threshold accuracy of the wake-up circuit is: A+error value / N; wherein A is a constant, N is the number of capacitors in the capacitor unit, and the error value is a fixed error value introduced by the comparator.

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