Ring oscillator frequency multiplier circuit based on current summation mode

Abstract

The invention relates to the technical field of integrated circuits, and discloses a ring oscillator frequency multiplier circuit based on a current summation mode, which comprises a ring oscillator, a switch control module and a current summation module, the ring oscillator comprises n cascaded oscillator units, the output of the ith-stage oscillator unit and the output of the (i + 1) th-stage oscillator unit are jointly used as the input of the (i + 2) th-stage oscillator unit, and the output of the (n-1) th-stage oscillator unit and the output of the nth-stage oscillator unit are jointly used as the input of the first-stage oscillator unit; the switch control module is used for controlling each stage of oscillator unit to be connected to a power supply, and the current summation module superposes the current of the oscillator unit connected to the power supply in a time domain so as to realize multiplication of an output frequency signal of the ring oscillator. According to the invention, double, quadruple and eight frequency multiplication functions of oscillation signals can be realized, the area of a redundant frequency multiplication circuit is effectively saved, and meanwhile, signals which keep a stable multiple relationship with the frequency of output signals of the ring oscillator are generated.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a ring oscillator frequency multiplication circuit based on a current summing mode. Background Art

[0002] With the rapid development of millimeter wave and terahertz technologies, they have shown broad application prospects in the fields of communications, electronic countermeasures, radar electromagnetic weapons, astronomy, medical imaging, non-destructive testing, environmental monitoring, and safety inspection. Generating millimeter wave frequencies is challenging, especially when the oscillator needs to be stabilized by a phase-locked loop to improve the phase noise performance. The current methods for achieving high-frequency signal multiplication include locking the frequency with a phase-locked loop circuit (PLL), using injection locking to lock the harmonic frequency of a high-frequency oscillator to a low-frequency oscillator, and using harmonic mixing for frequency multiplication.

[0003] However, the existing technology still faces some challenges in the application process, such as the design complexity and high power consumption of all-digital PLL, the locking range limitation of injection locking, and the dependence of subharmonic mixing on harmonic generation and mixing efficiency. In order to further improve the frequency generation efficiency, reduce system power consumption and achieve higher integration, it has become a key research direction. These needs have driven the continuous exploration of new oscillator structures and innovative frequency synthesis methods. Ring oscillators, as a common oscillation circuit structure, have the advantages of simple structure and fast start-up speed. They are widely used in local oscillation signal sources for low-power designs. Traditional frequency multiplication circuits require the introduction of corresponding functional modules, and the frequency multiplication accuracy is affected by the process, supply voltage, and temperature (PVT). Therefore, designing a low-power simple ring oscillation signal frequency multiplication circuit plays an important role in the area, power consumption and frequency accuracy of the overall circuit. Summary of the invention

[0004] The purpose of the present invention is to provide a ring oscillator frequency multiplication circuit based on a current summing mode, the method has the ability to generate an oscillation signal of a ring oscillator, and can realize the functions of doubling, quadrupling and octupling the frequency of the oscillation signal. By realizing a ring oscillator based on the current summing mode, the area of ​​the redundant frequency multiplication circuit can be effectively saved, and a signal that maintains a stable multiple relationship with the frequency of the ring oscillator output signal is generated.

[0005] In order to achieve the above-mentioned object of the invention, the embodiment of the present invention provides the following technical solutions:

[0006] A ring oscillator frequency multiplication circuit based on a current summing mode comprises a ring oscillator, a switch control module and a current summing module;

[0007] The ring oscillator comprises n cascaded oscillator units, where n is an even number, i=1, 2, ..., n, the output of the i-th oscillator unit and the output of the i+1-th oscillator unit serve together as the input of the i+2-th oscillator unit, and the output of the n-1-th oscillator unit and the output of the n-th oscillator unit serve together as the input of the 1-th oscillator unit;

[0008] The switch control module is used to control each stage of the oscillator unit to access the power supply, and the current summing module superimposes the current of the oscillator unit connected to the power supply in the time domain to achieve the doubling of the output frequency signal of the ring oscillator.

[0009] Furthermore, it also includes an output amplification unit for amplifying the frequency signal output by the ring oscillator.

[0010] Furthermore, each oscillator unit includes a first inverter, a second inverter, a third inverter, and a fourth inverter;

[0011] The output of the first inverter in the i-th oscillator unit is respectively connected to the input of the first inverter in the i+1-th oscillator unit and the input of the third inverter in the i+1-th oscillator unit, the output of the second inverter in the i-th oscillator unit is respectively connected to the input of the second inverter in the i+1-th oscillator unit and the input of the fourth inverter in the i+1-th oscillator unit, the output of the third inverter in the i-th oscillator unit is respectively connected to the input of the second inverter in the i+2-th oscillator unit and the input of the fourth inverter in the i+2-th oscillator unit, and the output of the fourth inverter in the i-th oscillator unit is respectively connected to the input of the first inverter in the i+2-th oscillator unit and the input of the third inverter in the i+2-th oscillator unit;

[0012] The output of the first inverter in the n-th level oscillator unit is connected to the input of the first inverter in the first-level oscillator unit and the input of the third inverter in the first-level oscillator unit, respectively; the output of the second inverter in the n-th level oscillator unit is connected to the input of the second inverter in the first-level oscillator unit and the input of the fourth inverter in the second-level oscillator unit, respectively; the output of the third inverter in the n-th level oscillator unit is connected to the input of the second inverter in the second-level oscillator unit and the input of the fourth inverter in the second-level oscillator unit, respectively; and the output of the fourth inverter in the n-th level oscillator unit is connected to the input of the first inverter in the second-level oscillator unit and the input of the third inverter in the second-level oscillator unit, respectively.

[0013] Furthermore, when the step signal input to any inverter is from 0 to 1, the inverter generates a discharge current; when the step signal input to any inverter is from 1 to 0, the inverter generates a charge current.

[0014] Furthermore, the period of the first inverter in the i+1th oscillator unit is delayed by 1 τ compared to the first inverter in the i-th oscillator unit, where τ represents the delay time; the period of the first inverter in the n-th oscillator unit is delayed by 1 τ compared to the second inverter in the 1st oscillator unit; the period of the second inverter in the i+1th oscillator unit is delayed by 1 τ compared to the second inverter in the i-th oscillator unit; and the period of the second inverter in the i-th oscillator unit is delayed by n τ compared to the first inverter in the i-th oscillator.

[0015] Furthermore, the switch control module includes 2n switches, each switch is connected to the first inverter and the second inverter in each level of oscillator unit in a one-to-one correspondence, and is used to control the connected inverter to be connected to or not connected to the power supply; and the first inverter and the second inverter in the same oscillator unit need to be connected to the power supply at the same time or not connected to the power supply at the same time.

[0016] Furthermore, the current summing module is used to superimpose the output currents of the inverters connected to the power supply in the time domain.

[0017] Compared with the prior art, the present invention has the following beneficial effects: the present invention has the ability to generate an oscillation signal of a ring oscillator, and can realize the functions of doubling, quadrupling and octupling the frequency of the oscillation signal. By realizing the ring oscillator based on the current summing mode, the area of ​​the redundant frequency multiplication circuit can be effectively saved, and a signal that maintains a stable multiple relationship with the frequency of the ring oscillator output signal can be generated. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0019] Figure 1 It is a structural block diagram of a ring oscillator frequency multiplication circuit based on a current summing mode of the present invention;

[0020] Figure 2 This is a schematic diagram of a differential ring oscillator circuit of the present invention;

[0021] Figure 3 is a schematic diagram of an inverter circuit in a unit of a ring oscillator of the present invention;

[0022] Figure 4 The overall principle diagram of the ring oscillator of the present invention and the schematic diagram of the inter-stage connection;

[0023] Figure 5 This is a discharge schematic diagram of the inverter of the present invention;

[0024] Figure 6 This is a schematic diagram of charging the inverter of the present invention;

[0025] Figure 7 This is a timing diagram of a frequency doubling signal based on current summation according to the present invention;

[0026] Figure 8 The schematic diagram of the ring oscillator frequency multiplication circuit for realizing the current summing mode based on the switch control module of the present invention;

[0027] FIG9( a ) is a schematic diagram of a ring oscillator circuit for realizing frequency doubling based on a switch control module according to the present invention;

[0028] FIG9( b ) is a schematic diagram of a ring oscillator circuit for realizing frequency quadrupling based on a switch control module according to the present invention;

[0029] FIG9( c ) is a schematic diagram of a ring oscillator circuit for realizing eight-fold frequency multiplication based on a switch control module according to the present invention;

[0030] Fig.10 This is a schematic diagram of the transimpedance amplifier circuit of the present invention;

[0031] Fig.11 Schematic diagram of the ring oscillator and the frequency-multiplied signal output waveform of the present invention, wherein: Fig.11 (a) is the original oscillation signal output waveform. Fig.11 (b) is the output waveform of the double frequency oscillation signal. Fig.11 (c) in the figure is the output waveform of the quadruple frequency oscillation signal. Fig.11 (d) in the figure is the output waveform of the eight-fold frequency oscillation signal. DETAILED DESCRIPTION

[0032] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. The components of the embodiments of the present invention generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents the selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present invention.

[0033] It should be noted that similar numbers and letters represent similar items in the following figures, so once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. At the same time, in the description of the present invention, the terms "first", "second", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance, or implying any such actual relationship or order between these entities or operations. In addition, the terms "connected", "connected", etc. can be directly connected between elements, or indirectly connected via other elements.

[0034] Embodiment 1:

[0035] The present invention is achieved through the following technical solutions: Figure 1 As shown, a ring oscillator frequency multiplication circuit based on a current summing mode includes a ring oscillator, a switch control module, a current summing module and an output amplification module.

[0036] A ring oscillator is a circuit that uses multiple inverters in cascade to form a closed loop to achieve oscillation. This solution prefers a differential ring oscillator. The circuit structure is as follows: Figure 2 As shown, the number of units in the differential ring oscillator cascade can be an even number, and the oscillation frequency f of the ring oscillator of n stages (n is an even number) is osc for:

[0037]

[0038] Among them, τ represents the delay time between two adjacent stages, which is related to the equivalent resistance and parasitic capacitance of each stage output node. By changing the number of cascaded ring oscillators and the delay time τ, the oscillation frequency f of the ring oscillator can be adjusted. osc The ring oscillator generates a complete signal cycle change in the loop by utilizing the delayed and inverted characteristics of the input signal and output signal at each stage to form the final oscillation signal.

[0039] For ease of explanation, the ring oscillator of this scheme uses 8 units in cascade (n=8), and the internal specific circuit structure of each level unit is as follows: Figure 3 As shown, it includes inverter Inv1 (first inverter), inverter Inv2 (second inverter), inverter Inv3 (third inverter) and inverter Inv4 (fourth inverter). Inverter Inv1 and inverter Inv2 constitute the basic structure of each unit of the ring oscillator, responsible for inverting the differential signal and transmitting it to the next unit; inverter Inv3 and inverter Inv4 are used as auxiliary to enhance the oscillation signal, thereby reducing the start-up time.

[0040] The principle diagram of the ring oscillator used in the present invention and the connection method between stages are as follows: Figure 4As shown, i = 1, 2, ..., n, the output of the i-th stage passes through the inverter Inv1 of this stage i After that, they serve as the i+1th stage inverter Inv1 i+1 、Inverter Inv3 i+1 The output of the i-th stage passes through the inverter Inv2 of this stage. i After that, they serve as inverter Inv2 i+1 、Inverter Inv4 i+1 Input of the i-th stage inverter Inv3 i The output of is connected to the i+1th stage inverter Inv2 i+1 The output of inverter Inv4 i The output of the inverter is connected to Inv1 i+1 The output of the i-th inverter Inv3 i The output of the i+1th stage inverter Inv2 i+1 The output of the i+2nd stage inverter Inv2 i+2 and inverter Inv4 i+2 The input of the i-th inverter Inv4 i The output of the i+1th stage inverter Inv1 i+1 The output of the i+2nd stage inverter Inv1 i+2 and inverter Inv3 i+2 Input.

[0041] As an example, see Figure 4 , the output of the 3rd-level inverter Inv13 is respectively used as the input of the 4th-level inverter Inv14 and the inverter Inv34, and the output of the 3rd-level inverter Inv23 is respectively used as the input of the 4th-level inverter Inv24 and the inverter Inv44; the output of the 3rd-level inverter Inv33 and the output of the 4th-level inverter Inv24 are jointly used as the input of the 5th-level inverter Inv25 and the inverter Inv45, and the output of the 3rd-level inverter Inv43 and the output of the 4th-level inverter Inv14 are jointly used as the input of the 5th-level inverter Inv15 and the inverter Inv35.

[0042] The oscillation signal output of each inverter in the ring oscillator is mainly reflected in the charge and discharge conditions of its output end. Figure 5 As shown in the figure, when a step signal from 0 to 1 is input, the N1 tube is turned on, and a discharge current I is generated between the output terminal and the ground. D , the output voltage drops; the charging principle of the inverter is as follows Figure 6 As shown, when a step signal from 1 to 0 is input, the P1 tube is turned on, and a charging current I is generated between the power supply and the output terminal. C , the output voltage rises.

[0043] Since the oscillation signal has a periodic characteristic, the charging and discharging current of each inverter is also periodic. The current change period of the inverter is the oscillation period. Since the inter-stage delays of the ring oscillator are the same, which is τ, there is a timing delay in the charging and discharging current of each stage, that is, the phase difference. The new frequency component can be obtained by adding the currents of different phases through the current summing module.

[0044] It should be noted that, taking an 8-unit cascaded ring oscillator as an example, if the period of the inverter Inv1 in the first unit is 16τ, the period of the inverter Inv1 in the second unit will be delayed by 1τ compared to the inverter Inv1 in the first unit; and so on, the period of the inverter Inv1 in the eighth unit will be delayed by 7τ compared to the inverter Inv1 in the first unit; going back again, the period of the inverter Inv2 in the first unit will be delayed by 8τ compared to the inverter Inv1 in the first unit.

[0045] Take the double frequency circuit of 8 cascaded units as an example, the timing is as follows Figure 7 As shown, I1 is the charging current of the inverter Inv1 in the first unit (the input is a step signal from 1 to 0, i.e., I C =I1), with a period of 16τ; I9 is ​​the charging current of the inverter Inv2 in the first unit (the input is a step signal from 1 to 0), which is delayed by 8τ compared to I1. By superimposing the two currents in the time domain, a current frequency signal with a period of 8τ can be obtained, which is twice the frequency of the original 16τ period oscillation signal. Similarly, since the delay of the inverters of the adjacent units is 1τ, the period of the inverter Inv1 in the fifth unit is delayed by 4τ compared to the inverter Inv1 in the first unit, and the period of the inverter Inv2 in the fifth unit is delayed by 8τ compared to the inverter Inv1 in the fifth unit, then I1, I5, I9, I 13 The current of I1, I3, I5, I7, I9, I 11 ,I 13 ,I 15 By superimposing the current in the time domain, eight times the frequency can be achieved.

[0046] The switch control module is used to realize the above-mentioned current summation, and different frequency multiplication outputs are realized by connecting the corresponding switches, such as Figure 8 As shown, the specific implementation method is to supply power to the inverter Inv1 and the inverter Inv2 in the ring oscillator separately, and connect the inverters that need to sum the current to the power supply through the corresponding switches to complete the parallel summation of the current. For example, the output voltage signal of the ring oscillator is as follows Fig.11As shown in (a), the oscillation signal frequency is 2.5GHz. To output the double frequency oscillation signal, the switches SW1 and SW9 need to be closed. The circuit connection relationship is shown in FIG9(a). The output oscillation signal frequency is 5GHz, which is twice the original oscillation signal frequency. The output waveform simulation diagram is shown in FIG9(a). Fig.11 The output of the quadruple frequency oscillation signal requires the closing of switches SW1, SW5, SW9, and SW13, as shown in Figure 9(b). The output oscillation signal frequency is 10 GHz, which is 4 times the original oscillation signal frequency. The output waveform simulation diagram is shown in Fig.11 As shown in (c) in the figure. The eight-fold frequency oscillation signal output requires the switches SW1, SW3, SW5, SW7, SW9, SW11, SW13, and SW15 to be closed, as shown in Figure 9(c). The output oscillation signal frequency is 20 GHz, which is 8 times the original oscillation signal frequency. The output waveform simulation diagram is shown in Fig.11 As shown in (d) in .

[0047] The summed current generated by the switching mode has an integer multiple relationship with the ring oscillator in frequency component. The final signal output needs to convert the current signal into a voltage signal. The present invention uses a transimpedance amplifier (TIA) to realize current-to-voltage signal conversion and amplification.

[0048] The schematic diagram of the transimpedance amplifier is as follows Fig.10 As shown, the transimpedance amplifier adopts the current parallel negative feedback connection mode, which realizes the inverting amplification function from input current to output voltage as a whole. The bias voltage V bias It is used to determine the input common-mode level of the transimpedance amplifier. The feedback resistor R provides the amplification gain. The relationship between the output voltage and the input current is:

[0049] V out =-I in ×R;

[0050] Among them, I in is the current output by the entire ring oscillator, V out is the voltage at the output of the transimpedance amplifier.

[0051] In summary, the present invention has the ability to generate an oscillation signal of a ring oscillator, and can realize the function of doubling, quadrupling and octuling the frequency of the oscillation signal. By realizing a ring oscillation circuit based on a current summing mode, the area of ​​redundant frequency multiplication circuits can be effectively saved, and a signal that maintains a stable multiple relationship with the frequency of the ring oscillator output signal can be generated.

[0052] It should be noted that this embodiment is introduced by taking n=8 as an example. In actual use, n can be any even number according to actual conditions. The circuit principle is the same as that of this embodiment, so it will not be described in detail.

[0053] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A ring oscillator frequency multiplication circuit based on current summing mode, characterized in that: It includes a ring oscillator, a switch control module and a current summing module; The ring oscillator comprises n cascaded oscillator units, where n is an even number, i=1, 2, ..., n, the output of the i-th oscillator unit and the output of the i+1-th oscillator unit serve together as the input of the i+2-th oscillator unit, and the output of the n-1-th oscillator unit and the output of the n-th oscillator unit serve together as the input of the 1-th oscillator unit; The switch control module is used to control each stage of the oscillator unit to access the power supply, and the current summing module superimposes the current of the oscillator unit connected to the power supply in the time domain to achieve the doubling of the output frequency signal of the ring oscillator.

2. The ring oscillator frequency multiplication circuit based on current summing mode according to claim 1, characterized in that: It also includes an output amplifying unit, which is used to amplify the frequency signal output by the ring oscillator.

3. The ring oscillator frequency multiplication circuit based on current summing mode according to claim 1, characterized in that: Each oscillator unit includes a first inverter, a second inverter, a third inverter, and a fourth inverter; The output of the first inverter in the i-th oscillator unit is respectively connected to the input of the first inverter in the i+1-th oscillator unit and the input of the third inverter in the i+1-th oscillator unit, the output of the second inverter in the i-th oscillator unit is respectively connected to the input of the second inverter in the i+1-th oscillator unit and the input of the fourth inverter in the i+1-th oscillator unit, the output of the third inverter in the i-th oscillator unit is respectively connected to the input of the second inverter in the i+2-th oscillator unit and the input of the fourth inverter in the i+2-th oscillator unit, and the output of the fourth inverter in the i-th oscillator unit is respectively connected to the input of the first inverter in the i+2-th oscillator unit and the input of the third inverter in the i+2-th oscillator unit; The output of the first inverter in the n-th level oscillator unit is connected to the input of the first inverter in the first-level oscillator unit and the input of the third inverter in the first-level oscillator unit, respectively; the output of the second inverter in the n-th level oscillator unit is connected to the input of the second inverter in the first-level oscillator unit and the input of the fourth inverter in the second-level oscillator unit, respectively; the output of the third inverter in the n-th level oscillator unit is connected to the input of the second inverter in the second-level oscillator unit and the input of the fourth inverter in the second-level oscillator unit, respectively; and the output of the fourth inverter in the n-th level oscillator unit is connected to the input of the first inverter in the second-level oscillator unit and the input of the third inverter in the second-level oscillator unit, respectively.

4. The ring oscillator frequency multiplication circuit based on current summing mode according to claim 3, characterized in that: When the step signal input to any inverter is from 0 to 1, the inverter generates a discharge current; when the step signal input to any inverter is from 1 to 0, the inverter generates a charge current.

5. The ring oscillator frequency multiplication circuit based on current summing mode according to claim 3, characterized in that: The period of the first inverter in the i+1th oscillator unit is delayed by 1 τ compared to the first inverter in the i-th oscillator unit, where τ represents the delay time; the period of the first inverter in the n-th oscillator unit is delayed by 1 τ compared to the second inverter in the 1st oscillator unit; the period of the second inverter in the i+1th oscillator unit is delayed by 1 τ compared to the second inverter in the i-th oscillator unit; the period of the second inverter in the i-th oscillator unit is delayed by n τ compared to the first inverter in the i-th oscillator.

6. The ring oscillator frequency multiplication circuit based on current summing mode according to claim 3, characterized in that: The switch control module includes 2n switches, each switch is connected to the first inverter and the second inverter in each level of oscillator unit in a one-to-one correspondence, and is used to control the connected inverter to be connected to or not connected to the power supply; and the first inverter and the second inverter in the same oscillator unit need to be connected to the power supply at the same time or not connected to the power supply at the same time.

7. The ring oscillator frequency multiplication circuit based on current summing mode according to claim 6, characterized in that: The current summing module is used to superimpose the output currents of the inverters connected to the power supply in the time domain.

Images