High-speed signal test circuit and test method

Abstract

The invention belongs to the field of signal testing, and particularly discloses a high-speed signal testing circuit and a high-speed signal testing method. The test circuit comprises a first resistor, a second resistor, a third resistor and a connector, the first end of the first resistor is connected with a high-speed signal sending end, the first end of the third resistor is connected with a high-speed signal receiving end, the first end of the second resistor is connected with the first end of the connector, the second end of the connector is grounded, and the second end of the connector is grounded. The second ends of the first resistor, the second resistor and the third resistor are connected; the connector is of a concave structure and is matched with a convex structure of the oscilloscope probe adapter in a complementary mode, and after the connector and the probe adapter are connected, high-speed signals are led into an oscilloscope to be tested. According to the scheme, the problem that the signal is unstable or the switching operation is difficult due to the fact that the high-speed signal is led to the oscilloscope through point contact or welding is solved.

Description

Technical Field

[0001] The present application belongs to the field of signal testing, and more specifically, relates to a high-speed signal testing circuit and a testing method. Background Art

[0002] Signal testing is a commonly used method in the industry to verify high-speed signal performance and solve problems with high-speed signals. High-speed oscilloscopes and probes are used to test high-speed signals. Find the appropriate test point on the device to be tested, use the probe to introduce the signal from the test point to the high-speed oscilloscope, and then use methods such as eye diagram testing and protocol consistency testing to determine whether the high-speed signal quality of the device to be tested is qualified.

[0003] If there are test points reserved on the device to be tested, the probe and the test point can be connected by welding or tapping to perform signal testing; or the high-speed signal channel on the device to be tested generally has an AC capacitor, and the probe and the pad of the AC capacitor can be connected by welding or tapping to perform signal testing. The test solution of performing signal testing after tapping has the problem of unstable signals, and the test solution of performing signal testing after welding has the problem of difficult switching operations. Currently, there is no test solution that is easy to operate and has stable test signals. Summary of the invention

[0004] In view of the above defects or improvement needs of the prior art, the present application provides a high-speed signal testing circuit and a testing method, which aims to solve the technical problem that the current testing scheme cannot take into account both convenient operation and stable test signals.

[0005] To achieve the above-mentioned purpose, in a first aspect, the present application provides a high-speed signal test circuit, the high-speed signal test circuit comprises a resistor network, the resistor network comprises a first resistor, a second resistor, a third resistor and a connector, a first end of the first resistor is connected to a transmitting end of a high-speed signal, a first end of the third resistor is connected to a receiving end of a high-speed signal, a first end of the second resistor is connected to a first end of the connector, a second end of the connector is grounded, and second ends of the first resistor, the second resistor and the third resistor are connected; The connector is a concave structure, which complements and matches the convex structure of the oscilloscope probe adapter.

[0006] Preferably, the connector is an SMP radio frequency connector or an SMPM radio frequency connector.

[0007] Preferably, the first resistor, the second resistor and the third resistor form a T-type resistor network to ensure impedance matching between the signal source output impedance of the high-speed signal, the load input impedance and the characteristic impedance of the connecting line.

[0008] Preferably, the equivalent impedance of the T-type resistor network composed of the first resistor, the second resistor and the third resistor is for: Ω The resistance values ​​of the second resistor and the third resistor are equal.

[0009] Preferably, the resistance values ​​of the first resistor, the second resistor and the third resistor are less than or equal to ohm.

[0010] Preferably, in the PCB layout of the high-speed signal test circuit, the wiring between the connector and the second resistor is as short as possible, and the wiring between the connection between the first resistor and the third resistor and the second resistor is as short as possible.

[0011] Preferably, in the PCB layout of the high-speed signal test circuit, the copper foil in the area below the connector pads and the resistor pads in the GND layer is removed.

[0012] Preferably, the high-speed signal is a high-speed differential signal, and both lines of the differential structure are provided with the resistor network.

[0013] In a second aspect, the present application provides a signal driving and detecting device, comprising the high-speed signal testing circuit as described in the first aspect.

[0014] In a third aspect, the present application proposes a testing method for the high-speed signal testing circuit as described in the first aspect, comprising adjusting the resistance value of the second resistor until the quality of the high-speed signal output by the connector is optimal.

[0015] In general, the above technical solutions conceived by this application have the following beneficial effects compared with the prior art: (1) The present application uses a connector to lead the high-speed signal to a high-speed oscilloscope for signal testing. The interface structures of the connector and the oscilloscope probe adapter are complementary and matched, which facilitates the connection and disconnection of the oscilloscope probe and the connector, and the signal is stable, thereby overcoming the problems of unstable signals or difficult switching operations caused by leading the high-speed signal to the high-speed oscilloscope by tapping or welding.

[0016] (2) The T-type resistor network composed of three resistors in the present application ensures impedance matching between the signal source, the connecting line and the load by adjusting the resistance value of the resistors therein, thereby reducing the impact of the test circuit on the collected high-speed signal.

[0017] (3) The second resistor of the T-type resistor network in the present application is adjustable, so that the resistance value of the second resistor can be fine-tuned and increased during the test process to offset the impedance increase caused by the switching between the receiving end and the signal sending end.

[0018] (4) In the PCB layout of the high-speed signal test circuit of the present application, the impedance matching between the signal source and the load is further ensured by optimizing the length limit of the branch segment, optimizing the hollowing out of the GND layer under the resistor pad and the connector pad, and optimizing the routing layout. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is one of the structural schematic diagrams of a high-speed signal testing circuit provided in an embodiment of the present application.

[0020] Figure 2 This is one of the schematic diagrams for selecting the resistance values ​​of various resistors provided in the embodiments of the present application.

[0021] Figure 3 This is one of the T-type resistor network equivalent resistance simulation diagrams provided in the embodiments of the present application.

[0022] Figure 4 This is the second schematic diagram of the resistance value selection of each resistor provided in the embodiment of the present application.

[0023] Figure 5 This is the second simulation diagram of the equivalent resistance of the T-type resistor network provided in the embodiment of the present application.

[0024] Figure 6 This is the second structural schematic diagram of a high-speed signal testing circuit provided in an embodiment of the present application.

[0025] Figure 7 It is a schematic diagram of a high-speed signal testing circuit provided in an embodiment of the present application.

[0026] Figure 8 This is a PCB design diagram of a high-speed signal test circuit provided in an embodiment of the present application.

[0027] Fig. 9 It is a schematic diagram of the opening of the GND layer in the PCB design diagram provided in an embodiment of the present application.

[0028] Fig.10 This is the measured eye diagram of a differential signal at a rate of 5.8 Gbps provided in an embodiment of the present application.

[0029] Fig.11 This is the measured eye diagram of a differential signal at a rate of 11.6 Gbps provided in an embodiment of the present application. DETAILED DESCRIPTION

[0030] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0031] The terms "first" and "second" in the specification and claims herein are used to distinguish different objects rather than to describe a specific order of objects. For example, a first resistor and a second resistor are used to distinguish different resistors rather than to describe a specific order of resistors.

[0032] In the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0033] In the description of the embodiments of the present application, unless otherwise specified, "multiple" means two or more than two. For example, multiple resistors refer to two or more resistors, etc.; multiple pads refer to two or more pads, etc.

[0034] First, the technical terms involved in the embodiments of the present application are introduced.

[0035] PCB (Printed Circuit Board) is a substrate used to connect and support electronic components in electronic devices.

[0036] GND layer (Ground Layer) is a copper layer specifically used to provide a reference ground potential in PCB design. It is usually a complete plane in a multi-layer board.

[0037] SMP (SubMiniature Push-on, small RF connector) is widely used in high-frequency communications, microwave equipment and compact electronic systems.

[0038] SMPM (SubMiniature Push-on Micro) is a subminiature RF connector that is a miniature version of the SMP connector.

[0039] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application.

[0040] Embodiment 1: Figure 1 This is a schematic diagram of the structure of a high-speed signal test circuit introduced in Example 1, as shown in the figure, The high-speed signal test circuit includes a first resistor R1, a second resistor R2, a third resistor R3 and a connector, wherein the first end of the first resistor R1 is connected to the transmitting end of the high-speed signal, the first end of the third resistor R3 is connected to the receiving end of the high-speed signal, the first end of the second resistor R2 is connected to the first end of the connector, the second end of the connector is grounded, and the second ends of the first resistor R1, the second resistor R2 and the third resistor R3 are connected; the first resistor R1, the second resistor R2 and the third resistor R3 form a T-type resistor network, and the impedance matching between the signal source, the connecting line and the load of the high-speed signal is ensured by adjusting the resistance values ​​of the first resistor R1, the second resistor R2 and the third resistor R3.

[0041] Connect the oscilloscope probe to the oscilloscope probe adapter, push the oscilloscope probe adapter into the connector, and then the high-speed signal between the transmitter and the receiver can be introduced into the oscilloscope through the probe, and the quality of the high-speed signal can be determined by the oscilloscope. After the oscilloscope probe adapter is pushed into the connector, the signal end of the oscilloscope probe adapter is connected to the first end of the connector, and the ground end of the oscilloscope probe adapter is connected to the second end of the connector.

[0042] The connector is a concave structure, which complements the convex structure of the oscilloscope probe adapter. In this way, it can be ensured that the oscilloscope probe adapter can be pushed into the connector very conveniently, and the oscilloscope probe adapter pushed into the connector will not be easily loosened. If it is necessary to switch the test channel, just pull the oscilloscope probe adapter out of the connector, and then push the oscilloscope probe adapter into the connector of other high-speed signal test circuits to complete the switch.

[0043] In this embodiment, an SMP RF connector or an SMPM RF connector is specifically used as the connector. The SMP RF connector or the SMPM RF connector requires that the bandwidth is as wide as possible and the impedance is as close to the target impedance as possible. In this embodiment, the target impedance is 50 ohms.

[0044] In this embodiment, the first resistor R1, the second resistor R2 and the third resistor R3 form a T-type resistor network. First, it is necessary to adjust the resistance values ​​of the first resistor R1, the second resistor R2 and the third resistor R3 to ensure impedance matching between the signal source, the connection line and the load of the high-speed signal to reduce signal reflection. At the same time, in order to ensure that the high-speed signal led out of the connector is consistent with the high-speed signal entering the receiving end, it is necessary to ensure that the impedance from the transmitting end to the connector and from the transmitting end to the receiving end is consistent. At this time, the resistance values ​​of the second resistor R2 and the third resistor R3 must be equal.

[0045] like Figure 2 As shown, in this embodiment, if R2= R3=16.7 ohms and R1=0 ohm are set, the equivalent resistance of the T-type resistor network is calculated by simulation software, as shown in FIG. Figure 3As shown, the equivalent resistance of the T-type resistor network is 33 ohms, which is not equal to the target impedance of 50 ohms, so impedance matching cannot be achieved between the signal source, the connecting line and the load.

[0046] like Figure 4 As shown, in this embodiment, if R1=R2=R3=16.7 ohms is set, the equivalent resistance of the T-type resistor network is calculated by simulation software, as shown in FIG. Figure 5 As shown in the figure, the equivalent resistance of the T-type resistor network is 50.05 ohms, which is close to the target impedance of 50 ohms, thus achieving impedance matching between the signal source, the connecting line and the load. At the same time, to ensure that the resistance has the least effect on the high-speed signal, the resistance values ​​of the first resistor, the second resistor and the third resistor are less than or equal to ohm.

[0047] Therefore, the test circuit of this embodiment can ensure that the high-speed signal drawn out is least affected by the test circuit and has the best quality. From the above analysis, it can be seen that the equivalent impedance of the T-type resistor network composed of the first resistor, the second resistor and the third resistor is for: Ω The resistance values ​​of the second resistor and the third resistor are equal, and the resistance values ​​of the first resistor, the second resistor and the third resistor are less than or equal to ohm.

[0048] In the actual testing process of high-speed signals, the high-speed signal testing circuit may be connected to the signal receiving end through an adapter or an excessively long wire, thereby increasing the impedance of the connection line of the signal entering the receiving end. In order to ensure the consistency of the signal entering the connector at this time, the resistance value of the second resistor R2 may be fine-tuned to ensure that the impedance of the connection line of the signal entering the connector increases accordingly.

[0049] Embodiment 2: Figure 6 This is a circuit schematic diagram of a high-speed signal test circuit introduced in Example 2. As can be seen from the figure, the differential structure consists of two signal lines of equal length and opposite phases.

[0050] The high-speed signal test circuit includes two resistor networks, wherein the first resistor network is used to test the first signal line in the differential structure, and the second resistor network is used to test the second signal line in the differential structure.

[0051] The first resistor network includes a first resistor, a second resistor, a third resistor and a first connector, the first end of the first resistor is connected to the transmitting end of the first signal line, the first end of the third resistor is connected to the receiving end of the first signal line, the first end of the second resistor is connected to the first end of the first connector, the second end of the first connector is grounded, and the second ends of the first resistor, the second resistor and the third resistor are connected.

[0052] The second resistor network includes a fourth resistor, a fifth resistor, a sixth resistor and a second connector, the first end of the fourth resistor is connected to the transmitting end of the second signal line, the first end of the sixth resistor is connected to the receiving end of the second signal line, the first end of the fifth resistor is connected to the first end of the second connector, the second end of the second connector is grounded, and the second ends of the fourth resistor, the fifth resistor and the sixth resistor are connected.

[0053] The first resistor, the second resistor and the third resistor form a T-type resistor network, and the fourth resistor, the fifth resistor and the sixth resistor form a T-type resistor network to ensure impedance matching between the signal source, the connection line and the load of the high-speed signal.

[0054] The resistance values ​​of the resistors in the first resistor network and the second resistor network are symmetrically distributed. That is, the first resistor is equal to the fourth resistor, the second resistor is equal to the fifth resistor, and the third resistor is equal to the sixth resistor. In this embodiment, the first connector and the second connector are SMPM radio frequency connectors.

[0055] The circuit diagram of this embodiment is as follows Figure 7 As shown in the figure, it can be seen that one end of the connector (signal end) is connected to the signal line through a resistor, and the other end of the connector (ground end) is grounded, thereby leading out the high-frequency signal passing through the signal line.

[0056] In order to ensure impedance matching between the signal source and the load and reduce the impact of the tested circuit on the collected high-speed signal, the embodiment of the present application also optimizes the PCB layout. Figure 7 As can be seen in the figure, part of the trace where the high-speed signal enters the signal end of the connector is a branch segment because it is not connected to the load. In this application, it is found that the branch segment will cause signal reflection, impedance discontinuity and signal integrity degradation, especially in high-speed signals, the impact of the branch segment is more significant. Therefore, it is necessary to optimize the branch segment in PCB design.

[0057] like Figure 8 The PCB design diagram of a high-speed signal test circuit of the second embodiment is shown. In order to ensure the quality of the high-speed signal being led out, the branch section is shortened and eliminated as much as possible. It can be seen from the PCB design diagram that the signal line in the PCB layout of the present application is designed with a "J" bend near the connector, so that the signal line is as close to the connector signal end as possible, and the connector signal end and the signal line are almost directly connected through the second resistor, thus ensuring the shortest branch section in the PCB layout. This ensures the quality of the high-speed signal being led out.

[0058] The present applicant discovered that in PCB layout, the routing loss of the signal line is too large when it is arranged on the surface layer, so the present applicant designs the routing of the signal line on the inner layer.

[0059] like Fig. 9The figure shows the hollowing out schematic diagram of the GND layer in the PCB layout of this application, combined with Figure 8 It can be seen that in the PCB design of this application, part of the copper foil in the GND layer below the connector pad and the resistor pad is removed, thereby further accurately controlling the impedance and ensuring the quality of high-speed signals.

[0060] At the same time, in PCB design, the impedance can also be optimized by adjusting the anti-pad size, signal hole spacing, and via size in this application. The adjustment can be made through simulation software until the optimal parameters are found.

[0061] The differential signal is tested by the high-speed signal test circuit of Example 2. The 5.8 Gbps high-speed differential signal is tested first. The eye diagram obtained is as follows: Fig.10 As shown, we switch to the test of 11.6Gbps high-speed differential signal, and the eye diagram is as follows Fig.11 It can be seen that the eye diagram obtained by the present application solution is good, the connection is stable, and it can quickly switch to other channels for testing. It can be applied to high-speed differential signals with a rate of ≤11.6Gbps.

[0062] Embodiment 3: Example 3 discloses a signal driving and detecting device, which includes the high-speed signal testing circuit disclosed in Example 2. The signal driving and detecting device draws out a high-speed differential signal from the high-speed signal testing circuit for detection. The high-speed signal testing circuit and other circuits in the device share a PCB. In this embodiment, the PCB is designed to be 4 layers.

[0063] Since the high-speed signal test circuit of the present application can be integrated into other devices, the number of PCB layers can be changed with other circuits in the device, and the minimum number of layers is limited to 4 layers.

[0064] Embodiment 4: Embodiment 4 discloses a high-speed signal testing method, which is based on the high-speed signal testing circuit disclosed in Embodiment 1 and includes the following steps: The signal output end of the high-speed signal test circuit is connected to the signal receiving end of the peripheral device; One end of the oscilloscope probe is connected to the oscilloscope probe adapter, and the other end of the oscilloscope probe adapter is pushed into the connector; The eye diagram of the high-speed signal is observed through an oscilloscope, and the resistance value of the second resistor is fine-tuned to increase until the high-speed signal quality is optimal.

[0065] The test circuit of the present application overcomes the technical problems of the traditional test method, which is unstable, inconvenient and easy to damage the probe. It can make the test position connection stable, facilitate switching between different channel tests, and not easily damage the probe.

[0066] It should be understood that expressions such as "including" and "may include" that may be used in the present application indicate the existence of the disclosed functions, operations, or constituent elements, and do not limit one or more additional functions, operations, and constituent elements. In the present application, terms such as "including" and / or "having" may be interpreted as indicating specific characteristics, numbers, operations, constituent elements, components, or combinations thereof, but may not be interpreted as excluding the existence or possibility of adding one or more other characteristics, numbers, operations, constituent elements, components, or combinations thereof.

[0067] In the description of the embodiments of the present application, it should be noted that, unless otherwise clearly specified and limited, the term "connection" should be understood in a broad sense. For example, "connection" can be a detachable connection or a non-detachable connection; it can be a direct connection or an indirect connection through an intermediate medium. Among them, "fixed connection" means that the relative position relationship after connection remains unchanged. "Rotational connection" means that the two are connected to each other and can rotate relative to each other after connection. "Sliding connection" means that the two are connected to each other and can slide relative to each other after connection. The directional terms mentioned in the embodiments of the present application, such as "top", "bottom", "inside", "outside", "left", "right", etc., are only reference directions of the accompanying drawings. Therefore, the directional terms used are for better and clearer explanation and understanding of the embodiments of the present application, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the embodiments of the present application.

[0068] In addition, in the embodiments of the present application, the mathematical concepts mentioned are symmetry, equality, parallelism, verticality, etc. These limitations are all for the current state of the art, rather than being absolutely strict definitions in a mathematical sense, and allow a small amount of deviation, approximation to symmetry, approximation to equality, approximation to parallelism, approximation to verticality, etc. For example, A and B are parallel, which means that A and B are parallel or approximately parallel, and the angle between A and B can be between 0 and 10 degrees. A and B are perpendicular, which means that A and B are perpendicular or approximately perpendicular, and the angle between A and B can be between 80 and 100 degrees.

[0069] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A high-speed signal test circuit, characterized in that: The high-speed signal test circuit comprises a resistor network, wherein the resistor network comprises a first resistor, a second resistor, a third resistor and a connector, wherein a first end of the first resistor is connected to a transmitting end of the high-speed signal, a first end of the third resistor is connected to a receiving end of the high-speed signal, a first end of the second resistor is connected to a first end of the connector, a second end of the connector is grounded, and second ends of the first resistor, the second resistor and the third resistor are connected; The connector is a concave structure, which complements and matches the convex structure of the oscilloscope probe adapter.

2. The high-speed signal test circuit according to claim 1, characterized in that: The connector is an SMP radio frequency connector or an SMPM radio frequency connector.

3. The high-speed signal test circuit according to claim 1, characterized in that: The first resistor, the second resistor and the third resistor form a T-type resistor network to ensure impedance matching between the signal source output impedance of the high-speed signal, the load input impedance and the characteristic impedance of the connection line.

4. The high-speed signal test circuit according to claim 1 or 3, characterized in that: The equivalent impedance of the T-type resistor network composed of the first resistor, the second resistor and the third resistor is for: Oh The resistance values ​​of the second resistor and the third resistor are equal.

5. The high-speed signal test circuit according to claim 4, characterized in that: in, The resistance values ​​of the first resistor, the second resistor and the third resistor are less than or equal to ohm.

6. The high-speed signal test circuit according to claim 1, characterized in that: In the PCB layout of the high-speed signal test circuit, the wiring between the connector and the second resistor is as short as possible, and the wiring between the connection between the first resistor and the third resistor and the second resistor is as short as possible.

7. The high-speed signal test circuit according to claim 1, characterized in that: In the PCB layout of the high-speed signal test circuit, the copper foil in the area below the connector pads and the resistor pads in the GND layer is removed.

8. The high-speed signal test circuit according to claim 1, characterized in that: The high-speed signal is a high-speed differential signal, and the resistor network is provided on both lines of the differential structure.

9. A signal driving and detecting device, characterized in that: It comprises the high-speed signal testing circuit as described in claims 1-8.

10. A method for testing a high-speed signal test circuit as claimed in claims 1 to 8, characterized in that: The method includes adjusting the resistance value of the second resistor until the quality of the high-speed signal output by the connector is optimal.

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