Method and circuit for testing overcurrent protection delay time and PCB (printed circuit board)

Abstract

The invention discloses an over-current protection delay time test method, a test circuit and a PCB, and the method comprises the steps: selecting a plurality of temperatures from a preset working temperature range as to-be-tested temperatures, and selecting any to-be-tested temperature for testing; controlling the high-voltage integrated circuit to start working and transmitting a pulse signal to the high-voltage integrated circuit; when the voltage of the PFC protection end is gradually increased or gradually reduced, recording the time for switching the output signal by the PFCO end of the high-voltage integrated circuit to obtain to-be-verified turn-off time and to-be-verified reset time; judging whether the to-be-verified turn-off time and the to-be-verified reset time are within a preset standard time range or not; if yes, selecting another to-be-tested temperature for testing, and returning to control the high-voltage integrated circuit to start working; according to the test method disclosed by the invention, whether the overcurrent protection delay of the high-voltage integrated circuit is normal or not can be verified under different temperature conditions, so that products with unqualified overcurrent protection turn-off delay time and reset delay time are prevented from flowing into the market.

Description

Technical Field

[0001] The present invention relates to the technical field of overcurrent testing, and in particular to a testing method, a testing circuit and a PCB board for overcurrent protection delay time. Background Art

[0002] High voltage integrated circuit, referred to as HVIC, is an integrated circuit product specially used to convert microcontroller signals into signals for driving insulated gate bipolar transistors. This circuit product is responsible for receiving control signals from MCU to drive IGBT or MOSFET to work, and is responsible for feeding back system status detection signals to MCU. It is the core chip inside the intelligent power module.

[0003] With the rapid development of industry, IPM intelligent power modules have been widely used in many fields. As one of the key components inside IPM, the performance of the driver IC, namely HVIC, directly affects the performance of the entire IPM; especially the PFC IGBT drive circuit and its overcurrent protection circuit, which play a vital role in HVIC.

[0004] The PFC IGBT drive circuit controls the on and off of the IGBT in the HVIC PFC circuit through the drive signal of PFCIN. When the IPM intelligent power module is used for motor control, the PFC overcurrent protection circuit can protect the PFC circuit from overcurrent damage and protect the circuit of the entire application system. That is, the PFC circuit is responsible for adjusting the power factor of the electronic control system, which plays a significant role in optimizing energy use.

[0005] Therefore, when HVIC is produced off the line, the performance indicators of its PFC overcurrent protection delay circuit must be strictly tested to ensure compliance with the standards; however, in the current production environment, the detection of the overcurrent protection delay time is often ignored during the off-line stage of the circuit product. It can be seen that the existing technology still needs to be improved and enhanced. Summary of the invention

[0006] In view of the above-mentioned deficiencies in the prior art, the purpose of the present invention is to provide a testing method for overcurrent protection delay time, which can verify whether the overcurrent protection delay time of a high-voltage integrated circuit is normal under different temperature conditions, so as to prevent products with unqualified overcurrent protection shutdown delay time and reset delay time from entering the market.

[0007] In order to achieve the above object, the present invention adopts the following technical solutions:

[0008] A method for testing an overcurrent protection delay time comprises: selecting a plurality of temperatures from an operating temperature range of a high-voltage integrated circuit as temperatures to be tested, and adjusting a test environment of the high-voltage integrated circuit to any temperature to be tested; controlling the high-voltage integrated circuit to start working, and transmitting a pulse signal to a PFCTRIP terminal of the high-voltage integrated circuit; when the real-time voltage of the PFCTRIP terminal reaches a preset shutdown threshold, recording the time taken by the PFCO terminal of the high-voltage integrated circuit to switch an output signal, and setting the recorded time as a shutdown time to be verified; when the real-time voltage of the PFC protection terminal reaches a preset reset threshold, recording the time taken by the PFCO terminal of the high-voltage integrated circuit to switch an output signal, and setting the recorded time as a reset time to be verified; judging whether the shutdown time to be verified and the reset time to be verified are within a preset standard time range, and if not, outputting product unqualified information; if yes, adjusting the test environment of the high-voltage integrated circuit to another temperature to be tested, and returning to execute control of the high-voltage integrated circuit to start working.

[0009] In the test method, multiple temperatures are selected from the operating temperature range of the high-voltage integrated circuit as the temperatures to be tested, and the test environment of the high-voltage integrated circuit is adjusted to any temperature to be tested, including: obtaining the operating temperature range of the high-voltage integrated circuit; selecting the starting point, the end point and one or more intermediate points of the operating temperature range as the temperatures to be tested from the obtained operating temperature range; sorting the multiple temperatures to be tested from low to high according to the temperature, and according to the sorting result, first adjusting the operating temperature of the temperature control box in the test environment to the lowest value of the temperature to be tested.

[0010] In the test method, the control of the high-voltage integrated circuit to start working and transmit a pulse signal to the PFC input terminal and the PFC protection terminal of the high-voltage integrated circuit includes: controlling the first DC power supply to provide a 15V working voltage to the VCC terminal of the high-voltage integrated circuit, controlling the second DC power supply to provide a 5V working voltage to the PFCIN terminal of the high-voltage integrated circuit, and controlling the third DC power supply to provide a 5V working voltage to the PFCIN terminal of the high-voltage integrated circuit, so that the high-voltage integrated circuit starts working; controlling the signal generator to transmit a pulse signal to the PFCTRIP terminal of the high-voltage integrated circuit, so that the real-time voltage of the PFCTRIP terminal of the high-voltage integrated circuit gradually decreases within the rated voltage range and reaches a preset shutdown threshold, or gradually increases and reaches a preset reset threshold.

[0011] In the test method, the determination of whether the shutdown time to be verified and the reset time to be verified are within a preset standard time range, and if not, outputting product unqualified information includes: obtaining a preset standard time range, and the preset standard time range includes a shutdown time upper limit value, a shutdown time lower limit value, a reset time upper limit value, and a reset time lower limit value; determining whether the shutdown time to be tested is greater than or equal to the shutdown time lower limit value and less than or equal to the shutdown time upper limit value, and determining whether the reset time to be verified is greater than or equal to the reset time lower limit value and less than or equal to the reset time upper limit value, and if any one of them is not, outputting product unqualified information.

[0012] In the test method, the preset standard time range includes the shutdown standard time, the reset standard time, the shutdown allowable error value and the reset allowable error value; the shutdown time upper limit value is equal to the shutdown standard time + the shutdown allowable error value, and the shutdown time lower limit value is equal to the shutdown standard time - the shutdown allowable error value; the reset time upper limit value is equal to the reset standard time + the reset allowable error value, and the reset time lower limit value is equal to the reset standard time - the reset allowable error value.

[0013] The present invention also correspondingly provides a test circuit for an overcurrent protection delay time, the test circuit being used to implement any of the test methods described above, the test circuit comprising a high-voltage integrated circuit, a DC power supply unit, a signal generator and a detection unit; the output end of the DC power supply unit is respectively connected to the VCC end, the PFCIN end and the FAULT end of the high-voltage integrated circuit, the output end of the signal generator is connected to the PFCTRIP end of the high-voltage integrated circuit, and the detection unit is used to obtain voltage changes at the PFCIN end, the PFCTRIP end and the PFCO end of the high-voltage integrated circuit.

[0014] In the test circuit, the DC power supply unit includes a first power supply unit, a second power supply unit and a third power supply unit; the first power supply unit is connected to the VCC terminal for providing a 15V DC voltage to the VCC terminal; the second power supply unit is connected to the PFCIN terminal for providing a 5V DC voltage to the PFCIN terminal; the third power supply unit is connected to the FAULT terminal for providing a 5V DC voltage to the FAULT terminal.

[0015] In the test circuit, the first power supply unit includes a first DC power supply and a first capacitor C1, the positive electrode of the first DC power supply and one end of the first capacitor C1 are respectively connected to the VCC terminal, and the negative electrode of the first DC power supply and the other end of the first capacitor C1 are respectively grounded; the second power supply unit includes a second DC power supply, the positive electrode of the second DC power supply is connected to the PFCIN terminal, and the negative electrode of the second DC power supply is grounded; the third power supply unit includes a third DC power supply and a first resistor R1, the positive electrode of the third DC power supply is connected to the FAULT terminal through the first resistor R1, and the negative electrode of the third DC power supply is grounded.

[0016] In the test circuit, the detection unit includes a first oscilloscope, a second oscilloscope and a third oscilloscope, the first oscilloscope is used to obtain the voltage change of the PFCIN terminal, the second oscilloscope is used to obtain the voltage change of the PFCTRIP terminal, and the third oscilloscope is used to obtain the voltage change of the PFCO terminal.

[0017] The present invention also provides a PCB board accordingly, characterized in that a test circuit for the overcurrent protection delay time as described in any one of the above items is printed on the PCB board.

[0018] Beneficial effects:

[0019] The present invention provides a method for testing the overcurrent protection delay time. By selecting a plurality of different temperatures to be tested within the operating temperature range, it is possible to verify whether the overcurrent protection delay time of a high-voltage integrated circuit is normal under different temperature conditions, thereby ensuring that the shutdown time to be tested and the reset time to be verified are both within a preset standard time range, so as to prevent products with unqualified overcurrent protection shutdown delay time and reset delay time from entering the market, thereby improving the reliability and safety of the product, ensuring that the high-voltage integrated circuit can accurately respond to overcurrent protection in actual applications, and avoiding equipment damage or safety accidents caused by overcurrent. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A logic flow chart of the test method provided by the present invention;

[0021] Figure 2 A circuit structure diagram of a test circuit provided by the present invention;

[0022] Figure 3 This is a test timing diagram of the high voltage integrated circuit provided by the present invention.

[0023] Description of main component symbols: 11 - first DC power supply, 12 - second DC power supply, 13 - third DC power supply, 2 - signal generator, 31 - first oscilloscope, 32 - second oscilloscope, 33 - third oscilloscope. DETAILED DESCRIPTION

[0024] The present invention provides a test method, a test circuit and a PCB board for an overcurrent protection delay time. In order to make the purpose, technical scheme and effect of the present invention clearer and more specific, the present invention is further described in detail with reference to the accompanying drawings and examples.

[0025] In the description of the present invention, it should be understood that the terms "installation", "connection" and the like should be understood in a broad sense, and a person skilled in the art can understand the specific meanings of the above terms in the present invention according to specific circumstances.

[0026] See also Figures 1 to 3 The present invention provides a method for testing an overcurrent protection delay time, comprising:

[0027] 100. Select multiple temperatures from the operating temperature range of the high-voltage integrated circuit as the temperatures to be measured, and adjust the test environment of the high-voltage integrated circuit to any temperature to be measured;

[0028] 200. Control the high voltage integrated circuit to start working, and transmit a pulse signal to the PFCTRIP terminal of the high voltage integrated circuit;

[0029] 300. When the real-time voltage at the PFCTRIP terminal reaches a preset shutdown threshold, the time taken by the PFCO terminal of the high-voltage integrated circuit to switch the output signal is recorded, and the recorded time is set as the shutdown time to be verified;

[0030] In this embodiment, the start time of the recorded to-be-verified shutdown time is the time when the real-time voltage of the PFCTRIP terminal reaches the preset shutdown threshold, and the end time is the time when the PFCO terminal outputs a low-level signal.

[0031] 400. When the real-time voltage of the PFC protection terminal reaches a preset reset threshold, the time taken by the PFCO terminal of the high-voltage integrated circuit to switch the output signal is recorded, and the recorded time is set as the reset time to be verified;

[0032] In this embodiment, the start time of the recorded reset time to be verified is the time when the real-time voltage of the PFCTRIP terminal reaches a preset reset threshold, and the end time is the time when the PFCO terminal outputs a high level signal.

[0033] 500. Determine whether the shutdown time to be verified and the reset time to be verified are within a preset standard time range. If not, output product unqualified information; if yes, adjust the test environment of the high-voltage integrated circuit to another temperature to be tested, and return to execute control of the high-voltage integrated circuit to start working;

[0034] In this embodiment, steps 100 to 500 are repeatedly executed until the selected temperatures to be measured are all tested for the overcurrent protection delay time, i.e., the overcurrent protection delay function of the high-voltage integrated circuit is ensured to pass the test under different temperature conditions; when the test result corresponding to any temperature to be measured indicates that the product is unqualified, the product unqualified information is output, and the product qualified information is output only when the test results corresponding to all temperatures to be measured indicate that the product is qualified.

[0035] The present application discloses a method for testing the overcurrent protection delay time. By selecting a plurality of different temperatures to be tested within the operating temperature range, it is possible to verify whether the overcurrent protection delay time of a high-voltage integrated circuit is normal under different temperature conditions, thereby ensuring that the shutdown time to be tested and the reset time to be verified are both within a preset standard time range, so as to prevent products with unqualified overcurrent protection shutdown delay time and reset delay time from entering the market, thereby improving the reliability and safety of the product, ensuring that the high-voltage integrated circuit can accurately respond to the overcurrent protection in actual applications, and avoiding equipment damage or safety accidents caused by overcurrent.

[0036] In this embodiment, step 100 specifically includes:

[0037] 101. Obtain an operating temperature range of a high voltage integrated circuit, where the operating temperature range is -40°C to 125°C;

[0038] 102. From the acquired working temperature range, select a starting point, an end point, and one or more intermediate points of the working temperature range as temperatures to be measured;

[0039] In this embodiment, since the working characteristics of the high-voltage integrated circuit will change to a certain extent at different temperatures, it is necessary to select multiple temperatures to be tested, and to test the overcurrent protection delay time of the high-voltage integrated circuit at the test environment temperature corresponding to each temperature to be tested; specifically, the starting point, end point and one or more key intermediate points of the operating temperature range are selected as the temperatures to be tested, which can ensure that the equipment can maintain stable performance under extreme conditions, thereby improving the reliability and durability of the product. Secondly, by testing at these key temperature points, the performance of the equipment in various temperature environments that may be encountered during actual use can be comprehensively evaluated to ensure that the product can provide stable and reliable services in various environments.

[0040] 103. Sort multiple temperatures to be tested from low to high. According to the sorting result, first adjust the working temperature of the temperature control box in the test environment to the lowest temperature to be tested.

[0041] In this embodiment, the operating temperature of the temperature control box is first adjusted to the lowest value of all temperatures to be tested, which not only lays a stable starting point for subsequent testing work, but also allows the ambient temperature to be adjusted incrementally subsequently, avoiding frequent adjustments to the temperature of the temperature control box during the test, thereby saving valuable time and resources; in addition, this orderly testing method helps to reduce errors caused by temperature fluctuations and ensures the accuracy and reliability of test data.

[0042] In this embodiment, step 200 specifically includes:

[0043] 201. Control the first DC power supply 11 to provide a 15V operating voltage to the VCC terminal of the high-voltage integrated circuit, control the second DC power supply 12 to provide a 5V operating voltage to the PFCIN terminal of the high-voltage integrated circuit, and control the third DC power supply 13 to provide a 5V operating voltage to the PFCIN terminal of the high-voltage integrated circuit, so that the high-voltage integrated circuit starts to work;

[0044] 202. Control signal generator 2 transmits a pulse signal to the PFCTRIP terminal of the high voltage integrated circuit, so that the real-time voltage of the PFCTRIP terminal of the high voltage integrated circuit gradually decreases within the rated voltage range and reaches a preset shutdown threshold, or gradually increases and reaches a preset reset threshold;

[0045] In this embodiment, the rated voltage range is -5-0V, and the shutdown threshold and reset threshold of the high-voltage integrated circuit are related to the design parameters of the high-voltage integrated circuit.

[0046] In this embodiment, step 400 includes:

[0047] 401. Obtain a preset standard time range, where the preset standard time range includes a shutdown time upper limit value, a shutdown time lower limit value, a reset time upper limit value, and a reset time lower limit value;

[0048] In this embodiment, the preset standard time range includes the shutdown standard time, the reset standard time, the shutdown allowable error value and the reset allowable error value; the upper limit value of the shutdown time is equal to the shutdown standard time + the shutdown allowable error value, and the lower limit value of the shutdown time is equal to the shutdown standard time - the shutdown allowable error value; the upper limit value of the reset time is equal to the reset standard time + the reset allowable error value, and the lower limit value of the reset time is equal to the reset standard time - the reset allowable error value; the shutdown standard time and the reset standard time are related to the design parameters of the high-voltage integrated circuit, the shutdown allowable error value is 5%*shutdown standard time, and the reset allowable error is 0.5*reset standard time.

[0049] 402. Determine whether the shutdown time to be tested is greater than or equal to the lower limit of the shutdown time and less than or equal to the upper limit of the shutdown time, and determine whether the reset time to be checked is greater than or equal to the lower limit of the reset time and less than or equal to the upper limit of the reset time. If any one of them is not, output product unqualified information; if both are yes, it indicates that at the temperature to be tested, the over-temperature protection delay time of the high-voltage integrated circuit is normal, and then adjust the ambient temperature of the test environment to another temperature to be tested until the over-temperature protection delay test under all temperature conditions to be tested is completed; when the over-temperature protection delay test under all temperature conditions to be tested indicates that the over-temperature protection delay time of the high-voltage integrated circuit is normal, output product qualified information.

[0050] See also Figure 2 The present invention also provides a test circuit for an overcurrent protection delay time, the test circuit comprising a high-voltage integrated circuit, a DC power supply unit, a signal generator 2 and a detection unit; the output end of the DC power supply unit is respectively connected to the VCC end, the PFCIN end and the FAULT end of the high-voltage integrated circuit, the output end of the signal generator 2 is connected to the PFCTRIP end of the high-voltage integrated circuit, and the detection unit is used to obtain the voltage changes of the PFCIN end, the PFCTRIP end and the PFCO end of the high-voltage integrated circuit.

[0051] For further information, see Figure 2 The DC power supply unit includes a first power supply unit, a second power supply unit and a third power supply unit; the first power supply unit is connected to the VCC terminal for providing a 15V DC voltage to the VCC terminal; the second power supply unit is connected to the PFCIN terminal for providing a 5V DC voltage to the PFCIN terminal; the third power supply unit is connected to the FAULT terminal for providing a 5V DC voltage to the FAULT terminal.

[0052] For further information, see Figure 2 The first power supply unit includes a first DC power supply 11 and a first capacitor C1, the positive electrode of the first DC power supply 11 and one end of the first capacitor C1 are respectively connected to the VCC end, and the negative electrode of the first DC power supply 11 and the other end of the first capacitor C1 are respectively grounded; the first capacitor C1 is a filter capacitor, and the first DC power supply 11 is used to provide a 15V DC voltage; the second power supply unit includes a second DC power supply 12, the positive electrode of the second DC power supply 12 is connected to the PFCIN end, the negative electrode of the second DC power supply 12 is grounded, and the second DC power supply 12 is used to provide a 5V DC voltage; the third power supply unit includes a third DC power supply 13 and a first resistor R1, the positive electrode of the third DC power supply 13 is connected to the FAULT end through the first resistor R1, the negative electrode of the third DC power supply 13 is grounded, the first resistor R1 is a pull-up resistor, and the third DC power supply 13 is used to provide a 5V DC voltage.

[0053] For further information, see Figure 2 , the detection unit includes a first oscilloscope 31, a second oscilloscope 32 and a third oscilloscope 33, the first oscilloscope 31 is used to obtain the voltage change of the PFCIN terminal, the second oscilloscope 32 is used to obtain the voltage change of the PFCTRIP terminal, and the third oscilloscope 33 is used to obtain the voltage change of the PFCO terminal;

[0054] In this embodiment, according to the real-time voltage change of the PFCTRIP terminal monitored by the second oscilloscope 32, it can be determined whether the real-time voltage of the PFCIN terminal drops to a preset shutdown threshold or rises to a preset reset threshold; further, according to the real-time voltage change of the PFCO terminal monitored by the third oscilloscope 33, the time taken for the PFCO terminal to switch the level signal can be obtained, that is, the shutdown time to be verified and the reset time to be verified can be obtained through the third oscilloscope 33.

[0055] The present invention also provides a PCB board accordingly, characterized in that a test circuit for the overcurrent protection delay time as described in any one of the above items is printed on the PCB board.

[0056] It is understandable that those skilled in the art can make equivalent substitutions or changes based on the technical solution and inventive concept of the present invention, and all these changes or substitutions should fall within the protection scope of the present invention.

Claims

1. The test method of overcurrent protection delay time is characterized in that: include: Selecting multiple temperatures from the operating temperature range of the high-voltage integrated circuit as the temperatures to be measured, and adjusting the test environment of the high-voltage integrated circuit to any of the temperatures to be measured; Control the high-voltage integrated circuit to start working and send a pulse signal to the PFCTRIP terminal of the high-voltage integrated circuit; When the real-time voltage at the PFCTRIP terminal reaches the preset shutdown threshold, the time taken by the PFCO terminal of the high-voltage integrated circuit to switch the output signal is recorded, and the recorded time is set as the shutdown time to be verified; When the real-time voltage of the PFC protection terminal reaches a preset reset threshold, the time taken by the PFCO terminal of the high-voltage integrated circuit to switch the output signal is recorded, and the recorded time is set as the reset time to be verified; Determine whether the shutdown time to be verified and the reset time to be verified are within the preset standard time range. If not, output product unqualified information; If yes, the test environment of the high-voltage integrated circuit is adjusted to another temperature to be tested, and the control of the high-voltage integrated circuit is returned to start working.

2. The method for testing the overcurrent protection delay time according to claim 1, characterized in that: The method of selecting a plurality of temperatures from the operating temperature range of the high-voltage integrated circuit as the temperatures to be measured, and adjusting the test environment of the high-voltage integrated circuit to any of the temperatures to be measured, comprises: Get the operating temperature range of the high voltage integrated circuit; From the obtained working temperature range, select the starting point, the end point and one or more intermediate points of the working temperature range as the temperatures to be measured; The multiple temperatures to be tested are sorted from low to high according to the temperature. According to the sorting result, the working temperature of the temperature control box in the test environment is first adjusted to the temperature to be tested with the lowest value.

3. The method for testing the overcurrent protection delay time according to claim 1, characterized in that: The controlling the high-voltage integrated circuit to start working and transmitting a pulse signal to the PFC input terminal and the PFC protection terminal of the high-voltage integrated circuit includes: Control the first DC power supply to provide a 15V operating voltage to the VCC terminal of the high-voltage integrated circuit, control the second DC power supply to provide a 5V operating voltage to the PFCIN terminal of the high-voltage integrated circuit, and control the third DC power supply to provide a 5V operating voltage to the PFCIN terminal of the high-voltage integrated circuit, so that the high-voltage integrated circuit starts to work; The control signal generator transmits a pulse signal to the PFCTRIP terminal of the high voltage integrated circuit, so that the real-time voltage of the PFCTRIP terminal of the high voltage integrated circuit gradually decreases within the rated voltage range and reaches a preset shutdown threshold, or gradually increases and reaches a preset reset threshold.

4. The method for testing the overcurrent protection delay time according to claim 1, characterized in that: The step of judging whether the shutdown time to be verified and the reset time to be verified are within a preset standard time range, and if not, outputting product unqualified information includes: Obtaining a preset standard time range, wherein the preset standard time range includes a shutdown time upper limit value, a shutdown time lower limit value, a reset time upper limit value, and a reset time lower limit value; Determine whether the shutdown time to be tested is greater than or equal to the lower limit of the shutdown time and less than or equal to the upper limit of the shutdown time, and determine whether the reset time to be checked is greater than or equal to the lower limit of the reset time and less than or equal to the upper limit of the reset time. If any of them is not true, output product unqualified information.

5. The method for testing the overcurrent protection delay time according to claim 4, characterized in that: The preset standard time range includes the shutdown standard time, the reset standard time, the shutdown allowable error value and the reset allowable error value; the shutdown time upper limit value is equal to the shutdown standard time + the shutdown allowable error value, and the shutdown time lower limit value is equal to the shutdown standard time - the shutdown allowable error value; the reset time upper limit value is equal to the reset standard time + the reset allowable error value, and the reset time lower limit value is equal to the reset standard time - the reset allowable error value.

6. The test circuit of overcurrent protection delay time is characterized in that: The test circuit is used to implement the test method according to any one of claims 1 to 5, and the test circuit includes a high-voltage integrated circuit, a DC power supply unit, a signal generator and a detection unit; the output end of the DC power supply unit is respectively connected to the VCC end, the PFCIN end and the FAULT end of the high-voltage integrated circuit, the output end of the signal generator is connected to the PFCTRIP end of the high-voltage integrated circuit, and the detection unit is used to obtain the voltage changes of the PFCIN end, the PFCTRIP end and the PFCO end of the high-voltage integrated circuit.

7. The overcurrent protection delay time test circuit according to claim 6, characterized in that: The DC power supply unit includes a first power supply unit, a second power supply unit and a third power supply unit; the first power supply unit is connected to the VCC terminal for providing a 15V DC voltage to the VCC terminal; the second power supply unit is connected to the PFCIN terminal for providing a 5V DC voltage to the PFCIN terminal; the third power supply unit is connected to the FAULT terminal for providing a 5V DC voltage to the FAULT terminal.

8. The overcurrent protection delay time test circuit according to claim 7, characterized in that: The first power supply unit includes a first DC power supply and a first capacitor C1, the positive electrode of the first DC power supply and one end of the first capacitor C1 are respectively connected to the VCC end, and the negative electrode of the first DC power supply and the other end of the first capacitor C1 are respectively grounded; the second power supply unit includes a second DC power supply, the positive electrode of the second DC power supply is connected to the PFCIN end, and the negative electrode of the second DC power supply is grounded; the third power supply unit includes a third DC power supply and a first resistor R1, the positive electrode of the third DC power supply is connected to the FAULT end through the first resistor R1, and the negative electrode of the third DC power supply is grounded.

9. The overcurrent protection delay time test circuit according to claim 7, characterized in that: The detection unit includes a first oscilloscope, a second oscilloscope and a third oscilloscope, the first oscilloscope is used to obtain the voltage change of the PFCIN terminal, the second oscilloscope is used to obtain the voltage change of the PFCTRIP terminal, and the third oscilloscope is used to obtain the voltage change of the PFCO terminal.

10. A PCB board, characterized in that: The PCB board is printed with a test circuit for the overcurrent protection delay time as described in any one of claims 7 to 9.

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