SiPM front-end circuit with background light suppression

Abstract

The invention provides an SiPM front-end circuit with background light suppression, and the circuit is characterized in that a cathode of an external APD is connected with an external high-voltage power supply; the input end of the background light intensity sensing and concurrency detection threshold generation circuit is connected with the anode of the external APD, and the output end is connected with the input end of the concurrency detection circuit; the input end of the OR tree is connected with the output end of the SiPM pixel, and the output end of the OR tree is connected with the input end of the concurrency detection circuit; the external APD is used for sensing the background light intensity; the background light intensity perception and concurrency detection threshold generation circuit is used for outputting a binary threshold according to the background light intensity; the SiPM pixel is used for outputting response voltage according to the echo signal; the OR tree is used for outputting a pulse sequence according to the response voltage; and the concurrency detection circuit is used for outputting a signal capable of reflecting the moment information of the target echo signal according to the pulse sequence and a binary threshold, and the circuit can effectively suppress background light and improve the performance index of the laser radar receiver.

Description

Technical Field

[0001] The present invention relates to the field of laser radar technology, and in particular to a SiPM front-end circuit with background light suppression. Background Art

[0002] Laser radar (LiDAR) is a general term for laser active detection sensor equipment. The working principle of pulse time of flight (TOF) is as follows: the laser radar transmitter emits a beam of laser. After the laser beam encounters an object, it is diffusely reflected and returns to the laser receiver. The radar module sends a signal T START and the received signal T STOP The distance between the transmitter and the object can be calculated by multiplying the time interval by the speed of light c and dividing by 2, that is,

[0003] Background light refers to the light generated by other light sources in the environment in addition to the target signal light. Especially in low-light conditions or where high-sensitivity detection is required, when the LiDAR detects a distant target, its echo signal is weak and the echo signal is easily buried in the background light or mistakenly identified as the target echo signal, resulting in an increase in the probability of LiDAR false alarms. In order to reduce the probability of LiDAR false alarms, a technology that can suppress background light is urgently needed. Summary of the invention

[0004] In order to solve the above problems existing in the prior art, the present invention provides a SiPM front-end circuit with background light suppression, which specifically includes:

[0005] In a first aspect, the present invention provides a SiPM front-end circuit with background light suppression, comprising:

[0006] External APD, background light intensity sensing and concurrency detection threshold generation circuit, SiPM pixel, OR tree and concurrency detection circuit; Among them,

[0007] The cathode of the external APD is connected to the external high voltage power supply V HV , the anode is connected to the input end of the background light intensity sensing and concurrency detection threshold generation circuit;

[0008] The output end of the background light intensity sensing and concurrency detection threshold generation circuit is connected to the input end of the concurrency detection circuit;

[0009] The output of the SiPM pixel is connected to the input of the OR tree;

[0010] The output end of the OR tree is connected to the input end of the concurrency detection circuit;

[0011] An external APD is used to sense the background light intensity and convert the sensed background light intensity value into a photocurrent i APD ;

[0012] Background light intensity sensing and concurrency detection threshold generation circuit for quantifying photocurrent i APD And output the binary threshold N thi ;

[0013] The SiPM pixel is used to receive the echo signal and output a response voltage after processing the received echo signal;

[0014] OR tree, used to receive the response voltage and output a pulse sequence V according to the response voltage OR ;

[0015] Concurrency detection circuit for pulse train V OR After counting and binary threshold N thi A comparison is made, and a signal reflecting the time information of the target echo signal is outputted according to the comparison result.

[0016] In a second aspect, the present invention further provides a chip, comprising any SiPM front-end circuit with background light suppression provided in the first aspect.

[0017] In a third aspect, the present invention further provides a laser radar receiver, comprising any chip provided in the second aspect.

[0018] Beneficial effects of the present invention:

[0019] The SiPM front-end circuit with background light suppression provided by the present invention comprises an external APD, a background light intensity sensing and concurrency detection threshold generation circuit, a SiPM pixel, an OR tree and a concurrency detection circuit; wherein the cathode of the external APD is connected to an external high-voltage power supply V HV The anode is connected to the input end of the background light intensity sensing and concurrency detection threshold generation circuit; the output end of the background light intensity sensing and concurrency detection threshold generation circuit is connected to the input end of the concurrency detection circuit; the output end of the SiPM pixel is connected to the input end of the OR tree; the output end of the OR tree is connected to the input end of the concurrency detection circuit; an external APD is used to sense the background light intensity and convert the sensed background light intensity value into a photocurrent i APD ; Background light intensity perception and concurrency detection threshold generation circuit for quantifying photocurrent i APD And output the binary threshold N thi ; SiPM pixel, used to receive the echo signal, and output the response voltage after processing the received echo signal; OR tree, used to receive the response voltage, and output the pulse sequence V according to the response voltage OR ; Concurrency detection circuit, used to detect the pulse sequence V OR After counting and binary threshold N thiA comparison is made, and a signal that can reflect the time information of the target echo signal is output according to the comparison result. The circuit can effectively suppress background light, improve the performance indicators of the laser radar receiver, reduce the false alarm probability of the receiver, and improve the reliability of the laser radar.

[0020] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A schematic diagram of the structure of a SiPM front-end circuit with background light suppression provided by the present invention;

[0022] Figure 2 A schematic diagram of the structure of a background light intensity sensing and concurrency detection threshold generation circuit provided by the present invention;

[0023] Figure 3 A schematic diagram of the structure of a SiPM pixel provided by the present invention;

[0024] Figure 4 A schematic diagram of the structure of an OR tree provided by the present invention. DETAILED DESCRIPTION

[0025] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0026] Avalanche photodiode (APD) linear mode, also known as non-Geiger mode, is the working state of APD when the reverse bias voltage is lower than its avalanche breakdown voltage. In this mode, APD linearly amplifies the incident photoelectrons, and the photocurrent is proportional to the incident light intensity. In Geiger mode, the output pulse height of each single photon avalanche diode (SPAD) pixel is independent of the number of photons entering the pixel. This means that each SPAD pixel will only respond to received or unreceived photons and provide echo photon information.

[0027] Based on this, the present invention provides a silicon photomultiplier (SiPM) front-end circuit with background light suppression, which determines the time information of the target echo signal by comparing the acquired ambient light intensity with the received echo signal.

[0028] Specifically, Figure 1 As shown, the SiPM front-end circuit with background light suppression provided by the present invention includes:

[0029] External APD11, background light intensity sensing and concurrency detection threshold generation circuit 12, SiPM pixel 13, OR tree 14 and concurrency detection circuit 15.

[0030] The cathode of the external APD11 is connected to the external high voltage power supply V HV The anode is connected to the input end of the background light intensity sensing and concurrency detection threshold generating circuit 12.

[0031] The output end of the background light intensity sensing and concurrency detection threshold generating circuit 12 is connected to the input end of the concurrency detection circuit 15 .

[0032] The output terminal of the SiPM pixel 13 is connected to the input terminal of the OR tree 14 .

[0033] The output terminal of the OR tree 14 is connected to the input terminal of the concurrency detection circuit 15 .

[0034] An external APD11 is used to sense the background light intensity and convert the sensed background light intensity value into a photocurrent i APD .

[0035] Background light intensity sensing and concurrency detection threshold generation circuit 12, used to quantify the photocurrent i APD And output the binary threshold N thi .

[0036] The SiPM pixel 13 is used to receive a signal and output a response voltage after processing the received signal.

[0037] The OR tree 14 is used to receive the response voltage and output a pulse sequence V according to the response voltage. OR .

[0038] Concurrency detection circuit 15 is used to detect the pulse sequence V OR After counting and binary threshold N thi A comparison is made, and a signal reflecting the time information of the target echo signal is outputted according to the comparison result.

[0039] In the present invention, the external APD 11 works in a linear mode to ensure that the number of photons is proportional to the response intensity within a certain light intensity and pulse time range. The APD 11 detects the ambient background light, and then the background light intensity perception and concurrent detection threshold generation circuit 12 can generate a binary threshold N representing the background light intensity. thi .

[0040] The SiPM front-end circuit with background light suppression provided by the present invention can adapt to the laser radar receiver's high sensitivity perception of echo signals under different background light conditions, and adaptively adjust the binary threshold N according to the background light intensity value. thi , reducing the false alarm rate of the lidar receiver detecting the echo.

[0041] Further, optional, such as Figure 2 As shown, the background light intensity sensing and concurrency detection threshold generation circuit 12 includes:

[0042] A transimpedance amplifier 121 , a reference voltage generating circuit 122 , a first comparator 123 , a second comparator 124 and a third comparator 125 .

[0043] The input end of the transimpedance amplifier 121 is the input end of the background light intensity sensing and concurrency detection threshold generation circuit 12 , and is connected to the anode of the external APD 11 .

[0044] The output terminal of the transimpedance amplifier 121 is connected to the non-inverting input terminals of the first comparator 123 , the second comparator 124 , and the third comparator 125 , respectively.

[0045] The three output terminals of the reference voltage generating circuit 122 are connected to the inverting input terminals of the first comparator 123 , the second comparator 124 and the third comparator 125 , respectively.

[0046] The output ends of the first comparator 123, the second comparator 124 and the third comparator 125 are all output ends of the background light intensity perception and concurrency detection threshold generation circuit 120. The signals output by the first comparator 123, the second comparator 124 and the third comparator 125 constitute the binary threshold N thi Each bit value of .

[0047] Further, optionally, the three output terminals of the reference voltage generating circuit 122 are used to output three different voltage signals.

[0048] Further, optional, such as Figure 3 As shown, the SiPM pixel 13 includes multiple SPAD devices and their front-end circuits 131.

[0049] Among them, any SPAD device and its front-end circuit 131 include a SPAD device 1311 , a quenching circuit 1312 and a pulse compression circuit 1313 .

[0050] The output end of the SPAD device 1311 is connected to the input end of the quenching circuit 1312 .

[0051] The output terminal of the quenching circuit 1312 is connected to the input terminal of the pulse compression circuit 1313 .

[0052] The output end of the pulse compression circuit 1313 is the output end of the corresponding SPAD device and its front-end circuit 131 .

[0053] The signal waveform after the SPAD device 1311, the quenching circuit 1312 and the pulse compression circuit 1313 is as follows: Figure 3 As shown, the SPAD device output waveform has the characteristics of short rise time and long fall time. The quenching circuit digitizes the SPAD device output waveform to obtain high and low levels. The pulse compression circuit compresses the pulse width output by the quenching circuit and then outputs it as shown in FIG. Figure 3 The narrow pulse signal shown.

[0054] SPAD has the sensitivity of single photon detection, but there is a current tailing phenomenon, which leads to a long dead time and affects the detection of the next echo photon. In order to reduce the influence of current tailing, the pulse current is rapidly reduced by a quenching circuit to reduce the dead time, and then the pulse compression circuit is used to reduce the pulse width so that the echo photon detection can be completed within a short time window.

[0055] Further, optionally, a plurality of SPAD devices and their front-end circuits 131 are arranged in an array structure.

[0056] The number of elements in each row of the array structure may be the same as that in each column, such as an m×n array, where m≠n, or may be different, such as an m×m array.

[0057] Further, optionally, the SiPM pixel 13 includes 9 SPAD devices and their front-end circuits 131, and the 9 SPAD devices and their front-end circuits 131 form a 3×3 array structure.

[0058] like Figure 1 As shown, the SiPM pixel 13 is used to output a response voltage V SP1 ~V SP9 , the OR tree 14 is used to receive the response voltage V SP1 ~V SP9 And output pulse train V OR .

[0059] The present invention adopts array SPAD devices and front-end circuits thereof to realize SiPM picture elements, thus overcoming the shortcoming of low detection efficiency of a single silicon-based SPAD device.

[0060] Further, optional, such as Figure 4 As shown, the OR tree 14 includes: 4 three-input OR gates with the same structure, namely a first three-input OR gate 141, a second three-input OR gate 142, a third three-input OR gate 143 and a fourth three-input OR gate 144.

[0061] The input terminals of the first three-input OR gate 141, the second three-input OR gate 142, the third three-input OR gate 143 and the fourth three-input OR gate 144 constitute the input terminals of the OR tree 14. That is, the OR tree 14 has 9 input terminals.

[0062] The output terminals of the first three-input OR gate 141 , the second three-input OR gate 142 , and the third three-input OR gate 143 are all input terminals of the fourth three-input OR gate 144 .

[0063] The output terminal of the fourth three-input OR gate 144 is the output terminal of the OR tree 14 .

[0064] pass Figure 4 The OR tree 14 shown can combine the single pulses output by the SiPM pixels 13 into a pulse sequence within a time window, which is convenient for subsequent concurrency detection circuits to count.

[0065] Further, optionally, the concurrency detection circuit 15 is specifically used to: calculate the pulse sequence V OR The number of N; the pulse sequence V OR The number N and the binary threshold N thi Compare, if N≤N thi It is determined that the signal detected by the SiPM pixel 13 is the ambient background light, and the output signal of the concurrency detection circuit 15 is zero; if N>N thi The signal detected by the SiPM pixel 13 is determined to be the target echo signal, and the output signal of the concurrency detection circuit 15 jumps. The moment when the output signal of the concurrency detection circuit 15 jumps is the moment information of the target echo signal.

[0066] It can be seen that the input end of the concurrency detection circuit 15 determines whether the current moment is the arrival moment of the target echo by comparing the output signal of the background light intensity sensing and concurrency detection threshold generation circuit 12 with the output signal of the OR tree 14. That is, the concurrency detection circuit 15 identifies and records the number of pulse sequences output by the OR tree 14 within a certain time window and the binary threshold N representing the background light intensity. thi By comparing, the effective time information of the echo signal can be obtained.

[0067] The SiPM front-end circuit with background light suppression provided by the present invention is suitable for situations where the background light has a significant impact on the laser radar receiver. It can effectively suppress the background light, improve the performance indicators of the laser radar receiver, reduce the false alarm probability of the receiver, and improve the reliability of the laser radar.

[0068] The present invention also provides a chip, comprising any SiPM front-end circuit with background light suppression provided by the above circuit embodiments.

[0069] The present invention also provides a laser radar receiver, comprising any chip provided by the present invention.

[0070] As for the chip / lidar receiver embodiment, since it is basically similar to the circuit embodiment, the description is relatively simple, and the specific contents and beneficial effects and other related matters can be referred to the partial description of the circuit embodiment.

[0071] The terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0072] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A SiPM front-end circuit with background light suppression, characterized in that: include: External APD, background light intensity sensing and concurrency detection threshold generation circuit, SiPM pixel, OR tree and concurrency detection circuit; Among them, The cathode of the external APD is connected to an external high voltage power supply V HV , the anode is connected to the input end of the background light intensity sensing and concurrency detection threshold generating circuit; The output end of the background light intensity sensing and concurrency detection threshold generating circuit is connected to the input end of the concurrency detection circuit; The output end of the SiPM pixel is connected to the input end of the OR tree; The output end of the OR tree is connected to the input end of the concurrency detection circuit; The external APD is used to sense the background light intensity and convert the sensed background light intensity value into a photocurrent i APD ; The background light intensity sensing and concurrency detection threshold generation circuit is used to quantify the photocurrent i APD And output the binary threshold N thi ; The SiPM pixel is used to receive the echo signal and output a response voltage after processing the received echo signal; The OR tree is used to receive the response voltage and output a pulse sequence V according to the response voltage. OR ; The concurrency detection circuit is used to detect the pulse sequence V OR After counting and the binary threshold N thi A comparison is made, and a signal reflecting the time information of the target echo signal is outputted according to the comparison result.

2. The circuit according to claim 1, characterized in that The background light intensity sensing and concurrency detection threshold generation circuit comprises: A transimpedance amplifier, a reference voltage generating circuit, a first comparator, a second comparator and a third comparator, wherein: The input end of the transimpedance amplifier is the input end of the background light intensity sensing and concurrency detection threshold generation circuit, and is connected to the anode of the external APD; The output end of the transimpedance amplifier is connected to the non-inverting input ends of the first comparator, the second comparator and the third comparator respectively; The three output terminals of the reference voltage generating circuit are respectively connected to the inverting input terminals of the first comparator, the second comparator and the third comparator; The output ends of the first comparator, the second comparator and the third comparator are all output ends of the background light intensity perception and concurrency detection threshold generation circuit, and the signals output by the first comparator, the second comparator and the third comparator constitute the binary threshold N in sequence. thi Each bit value of .

3. The circuit according to claim 2, characterized in that The three output terminals of the reference voltage generating circuit are used to output three different voltage signals.

4. The circuit according to claim 3, characterized in that The SiPM pixel includes a plurality of SPAD devices and front-end circuits thereof; Any of the above-mentioned SPAD devices and front-end circuits thereof, comprising: SPAD devices, quenching circuits and pulse compression circuits; The output end of the SPAD device is connected to the input end of the quenching circuit; The output end of the quenching circuit is connected to the input end of the pulse compression circuit; The output end of the pulse compression circuit is the output end of the corresponding SPAD device and its front-end circuit.

5. The circuit according to claim 4, characterized in that A plurality of the SPAD devices and their front-end circuits (131) are arranged in an array structure.

6. The circuit according to claim 5, characterized in that The SiPM pixel includes 9 SPAD devices and their front-end circuits, and the 9 SPAD devices and their front-end circuits form a 3×3 array structure.

7. The circuit according to claim 6, characterized in that The OR tree comprises: There are four three-input OR gates with the same structure, namely, a first three-input OR gate, a second three-input OR gate, a third three-input OR gate and a fourth three-input OR gate, wherein: The input terminals of the first three-input OR gate, the second three-input OR gate, the third three-input OR gate and the fourth three-input OR gate constitute the input terminals of the OR tree; The output ends of the first three-input OR gate, the second three-input OR gate, and the third three-input OR gate are all input ends of the fourth three-input OR gate; The output end of the fourth three-input OR gate is the output end of the OR tree.

8. The circuit according to claim 7, characterized in that The concurrency detection circuit is specifically used for: Calculate the pulse sequence V OR The number N; The pulse sequence V OR The number N and the binary threshold N thi Compare, if N≤N thi It is determined that the signal detected by the SiPM pixel is the ambient background light, and the output signal of the concurrency detection circuit is zero; if N>N thi It is determined that the signal detected by the SiPM pixel is a target echo signal, and the output signal of the concurrency detection circuit jumps. The moment when the output signal of the concurrency detection circuit jumps is the moment information of the target echo signal.

9. A chip, characterized in that: The invention comprises a SiPM front-end circuit with background light suppression as described in any one of claims 1 to 8.

10. A laser radar receiver, characterized in that: Any chip as claimed in claim 9.

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