Radio frequency switch
By designing the characteristic distance of the second transistor in the RF switch to be greater than the corresponding characteristic distance of the first transistor, and increasing the surface resistance to extend the ESD current path, the problem of insufficient anti-ESD capability of the RF switch is solved and the working quality is improved.
Patent Information
- Application Number
- CN202411958698.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-27
- Publication Date
- 2025-04-29
AI Technical Summary
With the advancement of integrated circuit technology, the anti-static release capability (anti-ESD capability) of RF switches has become poor, resulting in system-level ESD events that are more likely to occur during the operation of RF switches, affecting the quality of work.
A radio frequency switch is designed, and the characteristic distance of the second transistor is greater than the corresponding characteristic distance of the first transistor. By increasing the surface resistance of the second transistor, the path of the system-level ESD current is extended and the resistance to system-level ESD is improved.
While maintaining normal working performance, the system-level ESD resistance of the RF switch is improved, and the possibility of system-level ESD events is reduced, thereby improving the working quality of the RF switch.
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Figure CN119906401A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the technical field of switch design, and in particular to a radio frequency switch. Background Art
[0002] The RF switch is an important component of the RF transceiver and has the function of switching different signal paths for RF signal transmission.
[0003] Current RF switches usually include multiple signal paths, each of which is connected by multiple transistors. During the operation of the RF switch, the working conditions of the transistors can be switched so that each signal path in the RF switch can be turned on or off, thereby realizing RF signal transmission through different signal paths.
[0004] However, with the continuous advancement of integrated circuit technology, the characteristic size and gate oxide thickness of transistors are constantly decreasing, and the anti-static release capability (i.e., anti-ESD capability) of RF switches has also become poorer; Electrostatic discharge (ESD) refers to the transfer of electrostatic charge between two objects at different electrostatic potentials. ESD events are usually divided into two categories. One category refers to chip-level ESD events that occur during the production, transportation and assembly of chips, and the other category refers to system-level ESD events that occur when chips are used. Under the same pre-charge voltage, the energy released by system-level ESD events is much greater than that of chip-level ESD events, so system-level ESD events are more damaging to devices. Due to the reduction in the characteristic size and gate oxide thickness of transistors, RF switches are more prone to system-level ESD events, which leads to worse anti-static release capability of RF switches, resulting in poor working quality of RF switches. Summary of the invention
[0005] In view of this, an embodiment of the present application provides a radio frequency switch to at least partially solve the above problems.
[0006] A radio frequency switch provided according to an embodiment of the present application includes: at least one common port, at least one path and at least one non-common port, the path includes a first branch and a second branch; one end of the first branch is connected to any of the common ports, the other end of the first branch is connected to any of the non-common ports, the first branch includes at least one first transistor; one end of the second branch is connected between the first branch and the non-common port, the other end of the second branch is grounded, and the second branch includes at least one second transistor; a first characteristic distance of the second transistor is greater than the first characteristic distance of the first transistor, the first characteristic distance is the distance between a source metal through hole and a gate region of the corresponding transistor along the gate length direction; a second characteristic distance of the second transistor is greater than the second characteristic distance of the first transistor, the second characteristic distance is the distance between a drain metal through hole and a gate region of the corresponding transistor along the gate length direction.
[0007] In a possible implementation, a first characteristic distance of the second transistor is greater than or equal to 0.3 micrometers, and a second characteristic distance of the second transistor is greater than or equal to 0.3 micrometers.
[0008] In a possible implementation, the first transistor includes a first substrate, a first source region, a first drain region, a first body region and a first gate region; the first source region, the first drain region and the first body region are respectively arranged above the first substrate; and the first gate region is arranged above the first body region.
[0009] In a possible implementation, the second transistor includes a second substrate, a second source region, a second drain region, a second body region, a second gate region and an anti-corrosion protective oxide layer; the second source region, the second drain region and the second body region are respectively arranged above the second substrate; the second gate region is arranged above the second body region; the anti-corrosion protective oxide layer covers the second source region, the second drain region and the second gate region.
[0010] In a possible implementation manner, a gate width of the first transistor is greater than a gate width of the second transistor.
[0011] In a possible implementation manner, both the first transistor and the second transistor are N-channel transistors.
[0012] In a possible implementation, the first branch includes one first transistor, or the first branch includes at least two first transistors connected in series; the second branch includes one second transistor, or the second branch includes at least two second transistors connected in series.
[0013] In a possible implementation, the RF switch also includes an analog circuit, and the gate of the first transistor, the body electrode of the first transistor, the gate of the second transistor, and the body electrode of the second transistor are all connected to the analog circuit; the analog circuit is used to control the working states of the first transistor and the second transistor, so that when the first branch included in the target path in the at least one path is in an on state, the second branch included in the target path is in an off state, the first branch included in the path other than the target path in the at least one path is in an off state, and the second branch included in the path other than the target path in the at least one path is in an on state, wherein the target path is any one of the at least one path.
[0014] In a possible implementation manner, at least part of the paths in the radio frequency switch are symmetrically arranged.
[0015] In one possible implementation, the first characteristic distance of the first transistor is 0.1 micron to 0.3 micron, and the difference between the first characteristic distance of the second transistor and the first characteristic distance of the first transistor is 0.2 micron to 1 micron; the second characteristic distance of the first transistor is 0.1 micron to 0.3 micron, and the difference between the second characteristic distance of the second transistor and the second characteristic distance of the first transistor is 0.2 micron to 1 micron.
[0016] According to the RF switch provided in the embodiment of the present application, when any path of the RF switch is in the on state, the first transistor of the path is in the on state, so that the first branch of the path is turned on, and the second transistor of the path is in the off state, so that the second branch of the path is turned off. Therefore, for the related scheme that the first characteristic distance of the first transistor and the second transistor are equal, and the second characteristic distance of the first transistor and the second transistor are equal, since the system-level ESD resistance capability of the transistor in the off state is poor, when any path of the RF switch is turned on, the second branch of the path will cause the path to have poor system-level ESD resistance. Compared with the related scheme, the first characteristic distance of the second transistor in the embodiment of the present application is greater than the first characteristic distance of the first transistor, and the second characteristic distance of the second transistor is greater than the first characteristic distance of the first transistor. Furthermore, when any path is turned on, the first characteristic distance and the second characteristic distance of the first transistor included in the path are smaller, so that the conductive channel in the first transistor is shorter, so that the working state of the first transistor The performance is better. At the same time, the first characteristic distance and the second characteristic distance of the second transistor included in the path are larger, which can increase the surface resistance of the second transistor, so that after the parasitic NPN of the second transistor is turned on, the path of the system-level ESD current is deeper and the conduction is more uniform, thereby increasing the ESD failure current, so that the second branch has better system-level ESD resistance. Therefore, the working performance of the first branch of the path is better, and the system-level ESD resistance of the second branch of the path is better. Based on this, compared with the related scheme, the RF switch in the embodiment of the present application improves the system-level ESD resistance of the RF switch while maintaining good working performance of normal operation, reduces the possibility of system-level ESD events, and improves the working quality of the RF switch. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of the present application. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.
[0018] Figure 1A is a schematic diagram of a radio frequency switch according to an embodiment of the present application;
[0019] Figure 1B is a schematic diagram of a radio frequency switch according to another embodiment of the present application;
[0020] Figure 1C is a schematic diagram of a radio frequency switch according to another embodiment of the present application;
[0021] Figure 2is a cross-sectional view of an SOI process of a first transistor according to an embodiment of the present application;
[0022] Figure 3 is a schematic diagram of a layout of a first transistor according to an embodiment of the present application;
[0023] Figure 4 is a cross-sectional view of an SOI process of a second transistor according to an embodiment of the present application;
[0024] Figure 5 is a schematic diagram of a layout of a second transistor according to an embodiment of the present application;
[0025] Figure 6 This is a schematic diagram of the layout of the second transistor after the anti-corrosion protection oxide layer is hidden in one embodiment of the present application.
[0026] Description of reference numerals:
[0027] 1. Passage; 11. First branch; 111. First transistor; 12. Second branch; 121. Second transistor. DETAILED DESCRIPTION
[0028] As mentioned above, current RF switches usually include multiple signal paths, each of which is connected by multiple transistors. During the operation of the RF switch, the working conditions of the transistors can be switched to make each signal path in the RF switch turned on or off, thereby realizing RF signal transmission through different signal paths. However, with the continuous advancement of integrated circuit technology, the characteristic size and gate oxide thickness of transistors continue to decrease, and the anti-static release ability of RF switches has also become poorer, that is, RF switches are more prone to ESD events during operation, and ESD events cause more serious damage to devices, especially system-level ESD events. The damage to devices is more serious; due to the reduction in the characteristic size and gate oxide thickness of the transistor, the RF switch is more prone to system-level ESD events, which leads to worse anti-static release ability of the RF switch, resulting in poor working quality of the RF switch.
[0029] In view of the above problems, an embodiment of the present application provides a radio frequency switch, and the radio frequency switch is described in detail through multiple embodiments below.
[0030] Figure 1A is a schematic diagram of a radio frequency switch according to an embodiment of the present application. Figure 1B is a schematic diagram of a radio frequency switch according to another embodiment of the present application. Figure 1C FIG. 1 is a schematic diagram of a radio frequency switch according to another embodiment of the present application. Figure 1A , Figure 1B and Figure 1CAs shown, the radio frequency switch includes at least one common port, at least one path 1 and at least one non-common port, and the path 1 includes a first branch 11 and a second branch 12 .
[0031] One end of the first branch 11 is connected to any common port, and the other end of the first branch 11 is connected to any non-common port. The first branch 11 includes at least one first transistor 111 .
[0032] One end of the second branch 12 is connected between the first branch 11 and the non-common port, the other end of the second branch 12 is grounded, and the second branch 12 includes at least one second transistor 121 .
[0033] The first characteristic distance of the second transistor 121 is greater than the first characteristic distance of the first transistor 111 , and the first characteristic distance is the distance between the source metal via and the gate region of the corresponding transistor along the gate length direction.
[0034] The second characteristic distance of the second transistor 121 is greater than the second characteristic distance of the first transistor 111 , and the second characteristic distance is the distance between the drain metal through hole and the gate region of the corresponding transistor along the gate length direction.
[0035] The RF switch may be a single-pole single-throw switch (SPST), a single-pole multi-throw switch (SPNT), a multi-pole single-throw switch (MPST) or a multi-pole multi-throw switch (MPNT), etc., wherein the single-pole multi-throw switch may be, for example, a single-pole double-throw switch (SPDT), a single-pole three-throw switch (SP3T) or a single-pole four-throw switch (SP4T), etc., the multi-pole single-throw switch may be, for example, a double-pole single-throw switch (DPST), a three-pole single-throw switch (3PST) or a four-pole single-throw switch (3PST), etc., the multi-pole multi-throw switch may be, for example, a double-pole double-throw switch (DPDT), a three-pole double-throw switch (3PDT) or a double-pole four-throw switch (DP4T), etc., and the embodiments of the present application are not limited thereto.
[0036] The number of public ports and the number of non-public ports are related to the specific type of the RF switch. For example, if the RF switch is a single-pole single-throw switch, the RF switch includes one public port and one non-public port. If the RF switch is a single-pole multi-throw switch, the RF switch includes one public port and multiple non-public ports. If the RF switch is a multi-pole single-throw switch, the RF switch includes multiple public ports and one non-public port. If the RF switch is a multi-pole multi-throw switch, the RF switch includes multiple public ports and multiple non-public ports. For example, Figure 1A The single-pole double-throw switch (SPDT) shown in FIG. 1 includes a common port ANT1 and two non-common ports RF1 and RF2. Figure 1B The single-pole four-throw switch (SP4T) shown in the figure includes a common port ANT2 and four non-common ports RF3, RF4, RF5, and RF6. Figure 1C The double-pole four-throw switch (SP4T) shown in FIG. 1 includes a common port ANT3 , ANT4 and four non-common ports RF7 , RF8 , RF9 , RF10 .
[0037] Optionally, the path 1 included in the RF switch can be an L-shaped or T-shaped path (the L-shaped path means that the first branch 11 included in the path 1 is directly connected to the corresponding non-common port, and the T-shaped path means that the first branch 11 included in the path 1 is connected to the corresponding non-common port through a third transistor or at least two third transistors connected in series, that is, a third transistor or at least two third transistors are connected in series between the first branch 11 in the T-shaped path and the connected non-common port, and optionally, the third transistor can be the same as the first transistor), and the embodiment of the present application is not limited to this.
[0038] It should be noted that, in the T-shaped path, the end of the second branch 12 connected between the first branch 11 and the non-common port is specifically connected between the first branch 11 and the third transistor directly connected to the first branch 11 .
[0039] In the embodiment of the present application, when any path 1 of the RF switch is in the on state, the first transistor 111 of the path 1 is in the on state, so that the first branch 11 of the path 1 is turned on, and the second transistor 121 of the path 1 is in the off state, so that the second branch 12 of the path 1 is turned off. Therefore, for the related scheme that the first characteristic distance of the first transistor 111 and the second transistor 121 are equal, and the second characteristic distance of the first transistor 111 and the second transistor 121 are equal, since the system-level ESD resistance capability of the transistor in the off state is poor, when any path 1 of the RF switch is turned on, the second branch 12 of the path 1 will cause the path 1 to have poor system-level ESD resistance capability. Compared with the related scheme, the first characteristic distance of the second transistor 121 in the embodiment of the present application is greater than the first characteristic distance of the first transistor 111, and the second characteristic distance of the second transistor 121 is greater than the first characteristic distance of the first transistor 111. Further, when any path 1 is turned on, the first characteristic distance and the second characteristic distance of the first transistor 111 included in the path 1 are smaller, so that the conductive channel in the first transistor 111 is shorter, so that The working performance of the first transistor 111 is better. At the same time, the first characteristic distance and the second characteristic distance of the second transistor 121 included in the path 1 are larger, which can increase the surface resistance of the second transistor 121, so that after the parasitic NPN of the second transistor 121 is turned on, the path of the system-level ESD current is deeper and the conduction is more uniform, thereby increasing the ESD failure current, so that the second branch 12 has better system-level ESD resistance. Therefore, the working performance of the first branch 11 of the path 1 is better, and the system-level ESD resistance of the second branch 12 of the path 1 is better. Based on this, compared with the related scheme, the RF switch in the embodiment of the present application improves the system-level ESD resistance of the RF switch while maintaining good working performance of normal operation, reduces the possibility of system-level ESD events, and improves the working quality of the RF switch.
[0040] In one possible implementation, Figure 1A , Figure 1B and Figure 1C As shown, the first branch 11 includes a first transistor 111, or the first branch 11 includes at least two first transistors 111 connected in series; the second branch 12 includes a second transistor 121, or the second branch 12 includes at least two second transistors 121 connected in series.
[0041] It should be noted that the multiple transistors connected in series are the drains and sources of two adjacent transistors in the multiple transistors connected. For example, the first branch 11 includes three first transistors 111 connected in series, then the source of the first first transistor 111 is one end of the first branch 11, the drain of the first first transistor 111 is connected to the source of the second first transistor 111, the drain of the second first transistor 111 is connected to the source of the third first transistor 111, and the drain of the third first transistor 111 is the source of the first branch 11. 1; the second branch 12 includes four second transistors 121 connected in series, the source of the first second transistor 121 is one end of the second branch 12, the drain of the first second transistor 121 is connected to the source of the second second transistor 121, the drain of the second second transistor 121 is connected to the source of the third second transistor 121, the drain of the third second transistor 121 is connected to the source of the fourth second transistor 121, and the drain of the fourth second transistor 121 is the other end of the second branch 12.
[0042] In the embodiment of the present application, the number of first transistors 111 included in the first branch 11 of the path 1 and the number of second transistors 121 included in the second branch 12 of the path 1 can be adjusted according to the voltage resistance design to reduce the cost while maximizing the voltage resistance performance of the RF switch.
[0043] In one possible implementation, the first characteristic distance of the first transistor 111 is 0.1 microns to 0.3 microns, for example, the first characteristic distance of the first transistor 111 may be 0.2 microns, and the difference between the first characteristic distance of the second transistor 121 and the first characteristic distance of the first transistor 111 is 0.2 microns to 1 micron; the second characteristic distance of the first transistor 111 is 0.1 microns to 0.3 microns, for example, the second characteristic distance of the first transistor 111 may be 0.2 microns, and the difference between the second characteristic distance of the second transistor 121 and the second characteristic distance of the first transistor 111 is 0.2 microns to 1 micron.
[0044] In a possible implementation, the first characteristic distance of the second transistor 121 is greater than or equal to 0.3 micrometers, and the second characteristic distance of the second transistor 121 is greater than or equal to 0.3 micrometers.
[0045] Taking the first characteristic distance and the second characteristic distance of the first transistor 111 included in the RF switch as 0.2 microns as an example, the RF switch can be subjected to a system-level ESD performance test. The test is performed according to the IEC6100-4-2 test standard and adopts a contact discharge method. Specifically, the tip of the discharge gun can be aimed at the microstrip line of the chip carrier corresponding to the RF switch, and vertical discharge is performed. The single round of discharge is performed 10 times, and the discharge interval between two adjacent discharges in a single round is 1s. The electrostatic gun is discharged with a ground wire each time it discharges, and both positive and negative pressure tests are covered in the experiment, and the test results shown in Table 1 below are obtained.
[0046]
[0047]
[0048] Table 1
[0049] As shown in Table 1, when the first characteristic distance of the second transistor 121 is equal to the first characteristic distance of the first transistor 111, and the second characteristic distance of the second transistor 121 is equal to the second characteristic distance of the first transistor 111, the system-level ESD resistance of the RF switch is ±2 kilovolts; when the first characteristic distance of the second transistor 121 is greater than the first characteristic distance of the first transistor 111, and the second characteristic distance of the second transistor 121 is greater than the second characteristic distance of the first transistor 111, the system-level ESD resistance of the RF switch is ±6 kilovolts.
[0050] Among them, the RF switch's system-level ESD resistance of ±n kilovolts means that when the tip of the discharge gun is aimed at the microstrip line of the chip carrier corresponding to the RF switch and discharges to ±n kilovolts, the RF switch is still not damaged, and when the tip of the discharge gun is aimed at the microstrip line of the chip carrier corresponding to the RF switch and discharges to ±(n+1) kilovolts, the RF switch is damaged.
[0051] It can be seen from Table 1 that the system-level ESD resistance of the RF switch increases with the increase of the first characteristic distance of the second transistor 121 and the second characteristic distance of the second transistor 121. Therefore, in the embodiment of the present application, the first characteristic distance of the second transistor 121 is set to be greater than the first characteristic distance of the first transistor 111, and the second characteristic distance of the second transistor 121 is set to be greater than the second characteristic distance of the first transistor 111. This can reduce the cost as much as possible while also improving the system-level ESD resistance of the RF switch.
[0052] In a possible implementation, the gate width of the first transistor 111 is greater than the gate width of the second transistor 121 .
[0053] In the embodiment of the present application, when any path 1 of the RF switch is in the on state, the first branch 11 of the path 1 is on, and the second branch 12 of the path 1 is off. When any path 1 of the RF switch is in the off state, the first branch 11 of the path 1 is off, and the second branch 12 of the path 1 is on. Since one end of the second branch 12 is grounded, the second branch 12 in the on state can reduce the possibility of the RF signal of the non-common port of the path 1 affecting the common port, thereby optimizing the working performance of the RF switch. Therefore, since the gate width of the first transistor 111 included in the second branch 12 is large, the equivalent resistance of the first transistor 111 when working in the linear region can be minimized, that is, the RF performance such as the S parameter of the RF switch can be improved.
[0054] In a possible implementation, the first transistor 111 and the second transistor 121 are both N-channel transistors. Specifically, the first transistor 111 and the second transistor 121 can be NMOS, so that the RF switch can obtain good switching RF performance.
[0055] In one possible implementation, Figure 1A , 1B As shown in 1C, at least part of the passages in the RF switch are symmetrically arranged, which is more aesthetically pleasing and also facilitates maintenance and other operations on the RF switch.
[0056] In a possible implementation, the RF switch also includes an analog circuit, and the gate of the first transistor 111, the body electrode of the first transistor 111, the gate of the second transistor 121, and the body electrode of the second transistor 121 are all connected to the analog circuit; the analog circuit is used to control the working state of the first transistor 111 and the second transistor 121, so that when the first branch 11 included in the target channel 1 in at least one channel 1 is in an on state, the second branch 12 included in the target channel 1 is in an off state, the first branch 11 included in the channel 1 other than the target channel 1 in at least one channel 1 is in an off state, and the second branch 12 included in the channel 1 other than the target channel 1 in at least one channel 1 is in an on state, wherein the target channel 1 is any channel 1 in at least one channel 1.
[0057] In a specific embodiment, the RF switch includes a path 1, based on which the analog circuit is used to control the working state of the first transistor 111 and the second transistor 121, so that when the first branch 11 of the path 1 included in the RF switch is in an on state, the second branch 12 included in the target path 1 is in an off state, and when the first branch 11 of the path 1 included in the RF switch is in an off state, the second branch 12 included in the target path 1 is in an on state.
[0058] In another specific embodiment, the RF switch includes multiple paths 1, based on which the analog circuit is used to control the working state of the first transistor 111 and the second transistor 121, so that when the first branch 11 included in the target path 1 among the multiple paths 1 is in the on state, the second branch 12 included in the target path 1 is in the off state, the first branch 11 included in the path 1 other than the target path 1 among the multiple paths 1 is in the off state, and the second branch 12 included in the path 1 other than the target path 1 among the multiple paths 1 is in the on state.
[0059] It should be noted that when the first branch 11 is in the on state, the first transistor 111 included in the first branch 11 operates in the linear region; when the first branch 11 is in the off state, the first transistor 111 included in the first branch 11 operates in the cut-off region; when the second branch 12 is in the on state, the second transistor 121 included in the second branch 12 operates in the linear region; when the second branch 12 is in the off state, the second transistor 121 included in the second branch 12 operates in the cut-off region.
[0060] In addition, the embodiments of the present application do not limit the specific analog circuit, so the analog circuit is not shown in the drawings.
[0061] In the embodiment of the present application, the analog circuit makes only one path 1 in the RF switch in the on state at the same time, and other paths 1 other than the path 1 are in the off state. Therefore, the function of switching different paths 1 for RF signal transmission is realized through the analog circuit in the RF switch.
[0062] In one possible implementation, Figure 2 and Figure 3 As shown, the first transistor 111 includes a first substrate Substrate1, a first source region Source1, a first drain region Drain1, a first body region Bulk1 and a first gate region Gate1; the first source region Source1, the first drain region Drain1 and the first body region Bulk1 are respectively arranged above the first substrate Substrate1, and the first gate region Gate1 is arranged above the first body region Bulk1.
[0063] In a specific example:
[0064] like Figure 2As shown, the first transistor 111 includes a first substrate Substrate1, a first buried oxide layer BuriedOxide1, a first source region Source1, a first drain region Drain1, a first body region Bulk1 and a first gate region Gate1; the first buried oxide layer Buried Oxide1 is arranged above the first substrate Substrate1, the first source region Source1, the first drain region Drain1 and the first body region Bulk1 are arranged above the first buried oxide layer Buried Oxide1, and the first gate region Gate1 is arranged above the first body region Bulk1. Optionally, another layer GB1 may be arranged between the first gate region Gate1 and the first body region Bulk1.
[0065] like Figure 2 and Figure 3 As shown, a is a metal through hole in the body region of the first transistor 111, which is used to lead out the body electrode B1 of the first transistor 111, b is a metal through hole in the source region of the first transistor 111, which is used to lead out the source S1 of the first transistor 111, c is a metal through hole in the drain region of the first transistor 111, which is used to lead out the drain D1 of the first transistor 111, d is a metal through hole in the gate region of the first transistor 111, which is used to lead out the gate G1 of the first transistor 111, and the substrate electrode SUB1 of the first transistor 111 is led out on the first substrate Substrate1.
[0066] Based on this, the first characteristic distance of the first transistor 111 is Figure 2 and Figure 3 L GS , the second characteristic distance of the first transistor 111 is Figure 2 and Figure 3 L GD .
[0067] In an embodiment of the present application, the first branch 11 where the first transistor 111 is located is a main branch for passing the RF signal when the corresponding path 1 is turned on. No resist protection oxide (RPO) layer is provided above the first transistor 111, which can make the RF switch performance better, for example, better in terms of S parameters, harmonics, withstand voltage and path switching time.
[0068] In one possible implementation, Figure 4 , Figure 5 and Figure 6As shown, the second transistor 121 includes a second substrate Substrate2, a second source region Source2, a second drain region Drain2, a second body region Bulk2, a second gate region Gate2 and an RPO layer; the second source region Source2, the second drain region Drain2 and the second body region Bulk2 are respectively arranged above the second substrate Substrate2, and the second gate region Gate2 is arranged above the second body region Bulk2; the RPO layer covers the second source region Source2, the second drain region Drain2 and the second gate region Gate2.
[0069] In a specific example:
[0070] like Figure 4 As shown, the first transistor 111 includes a second substrate Substrate2, a second buried oxide layer BuriedOxide2, a second source region Source2, a second drain region Drain2, a second body region Bulk2, a second gate region Gate2 and an RPO layer; the second buried oxide layer Buried Oxide2 is arranged above the second substrate Substrate2, the second source region Source2, the second drain region Drain2 and the second body region Bulk2 are arranged above the second buried oxide layer Buried Oxide2, the second gate region Gate2 is arranged above the second body region Bulk2, and the RPO layer covers the second source region Source2, the second drain region Drain2 and the second gate region Gate2. The embodiment of the present application does not limit the specific material of the RPO layer. Optionally, other layers GB2 may be arranged between the second gate region Gate2 and the second body region Bulk2, which is not limited in the embodiment of the present application.
[0071] like Figure 4 , Figure 5 and Figure 6 As shown, e is a metal through hole in the body region of the second transistor 121, which is used to lead out the body electrode B2 of the second transistor 121, f is a metal through hole in the source region of the second transistor 121, which is used to lead out the second source S2, g is a metal through hole in the drain region of the second transistor 121, which is used to lead out the second drain D2, and a metal through hole h in the gate region of the second transistor 121 is arranged at the bottom of the part of the second gate region Gate2 not covered by the RPO layer (the gate metal through hole h is not shown in the figure), which is used to lead out the gate G2 of the second transistor 121 (the gate G2 is not shown in the figure), and a substrate electrode SUB2 of the second transistor 121 is led out on the second substrate Substrate2.
[0072] Based on this, the first characteristic distance of the second transistor 121 is Figure 4 and Figure 6 L1+L GS, the second characteristic distance of the second transistor 121 is Figure 4 and Figure 6 L1+L GD When the gate width of the second transistor 121 is fixed, the size of L1 is positively correlated with the system-level ESD resistance capability of the RF switch.
[0073] From the foregoing, it can be seen that for the RF switch corresponding to the relevant scheme that the first characteristic distance between the first transistor 111 and the second transistor 121 is equal, and the second characteristic distance between the first transistor 111 and the second transistor 121 is equal, when any path 1 of the RF switch is turned on, the second branch 12 of the path 1 will cause the path 1 to have poor system-level ESD resistance, that is, the second branch 12 is the position in the RF switch where the system-level ESD resistance is relatively weak.
[0074] In response to this, in an embodiment of the present application, the second source region Source2, the second drain region Drain2 and the second gate region Gate2 of the second transistor 121 included in the second branch 12 are covered with an RPO layer, so that the surface resistance of the second transistor 121 can be increased, so that after the parasitic NPN of the second transistor 121 is turned on, the path of the system-level ESD current is deeper and the conduction is more uniform, thereby increasing the failure current of the ESD, thereby increasing the failure current of the ESD, so that the second branch 12 has better system-level ESD resistance, and thus the system-level ESD resistance of the RF switch can be improved.
[0075] Furthermore, in order to improve the series resistance and contact resistance of the active area, the gate source and the gate drain are usually a low-resistance film. When a system-level ESD event occurs, the system-level ESD current will first flow along the low-resistance surface of the active area, causing the metal surface to heat up and directly burn the RF switch. After adding the RPO layer to the second transistor 121, the series resistance and contact resistance of the active area can be improved, and the source and drain resistances can be increased, thereby enhancing the RF switch's ability to resist system-level ESD.
[0076] In addition, the buried oxide layer in the first transistor 111 and the second transistor 121 is set based on the silicon on insulating substrate (Silicon On Insulator, SOI) technology, so that the RF switch can work better in a high voltage, high temperature or radiation-resistant environment, and because the buried oxide layer isolates the substrate, SOI technology can simultaneously integrate mixed digital and analog circuits and RF circuits, reducing the impact of the common substrate on other modules.
[0077] The first transistor 111 and the second transistor 121 may also be manufactured based on complementary metal oxide semiconductor (CMOS) technology, which is not limited in the embodiment of the present application.
[0078] Optionally, the first transistor 111 in the embodiment of the present application may also be a transistor that is completely identical to the second transistor 121, so that the RF switch has better system-level ESD resistance. Compared with this solution, the first transistor 111 in the above embodiment is a transistor different from the second transistor 121, which can save costs.
[0079] It should be noted that, in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "comprise a ..." do not exclude the existence of other identical factors in the process, method, article or device including the elements.
[0080] Not all steps and modules in the above-mentioned processes and system structure diagrams are necessary, and some steps or modules can be ignored according to actual needs. The execution order of each step is not fixed and can be adjusted as needed. The system structure described in the above-mentioned embodiments can be a physical structure or a logical structure, that is, some modules may be implemented by the same physical entity, or some modules may be implemented by multiple physical entities, or some components in multiple independent devices may be implemented together.
[0081] In the above embodiments, the hardware module can be implemented mechanically or electrically. For example, a hardware module can include permanent dedicated circuits or logic (such as special processors, FPGA or ASIC) to complete the corresponding operation. The hardware module can also include programmable logic or circuits (such as general-purpose processors or other programmable processors), which can be temporarily set by software to complete the corresponding operation. The specific implementation method (mechanical method, or dedicated permanent circuit, or temporarily set circuit) can be determined based on cost and time considerations.
[0082] The present application is presented and described in detail above through the accompanying drawings and preferred embodiments; however, the present application is not limited to these disclosed embodiments. Based on the above multiple embodiments, those skilled in the art may know that the code review methods in the above different embodiments may be combined to obtain more embodiments of the present application, and these embodiments are also within the scope of protection of the present application.
Claims
1. A radio frequency switch, characterized in that: include: at least one common port, at least one passage, and at least one non-common port, the passage comprising a first branch and a second branch; One end of the first branch is connected to any of the common ports, the other end of the first branch is connected to any of the non-common ports, and the first branch includes at least one first transistor; One end of the second branch is connected between the first branch and the non-common port, the other end of the second branch is grounded, and the second branch includes at least one second transistor; The first characteristic distance of the second transistor is greater than the first characteristic distance of the first transistor, and the first characteristic distance is the distance between the source metal through hole and the gate region of the corresponding transistor along the gate length direction; The second characteristic distance of the second transistor is greater than the second characteristic distance of the first transistor, and the second characteristic distance is the distance between the drain metal through hole and the gate region of the corresponding transistor along the gate length direction.
2. The radio frequency switch according to claim 1, characterized in that: The first characteristic distance of the second transistor is greater than or equal to 0.3 micrometers, and the second characteristic distance of the second transistor is greater than or equal to 0.3 micrometers.
3. The radio frequency switch according to claim 1, characterized in that: The first transistor includes a first substrate, a first source region, a first drain region, a first body region and a first gate region; The first source region, the first drain region and the first body region are respectively arranged above the first substrate; The first gate region is disposed above the first body region.
4. The radio frequency switch according to claim 1, characterized in that: The second transistor includes a second substrate, a second source region, a second drain region, a second body region, a second gate region and an anti-corrosion protection oxide layer; The second source region, the second drain region and the second body region are respectively arranged above the second substrate; The second gate region is disposed above the second body region; The anti-corrosion protection oxide layer covers the second source region, the second drain region and the second gate region.
5. The radio frequency switch according to claim 1, characterized in that: A gate width of the first transistor is greater than a gate width of the second transistor.
6. The radio frequency switch according to claim 1, characterized in that: The first transistor and the second transistor are both N-channel transistors.
7. The radio frequency switch according to claim 1, characterized in that: The first branch includes one first transistor, or the first branch includes at least two first transistors connected in series; The second branch includes one second transistor, or the second branch includes at least two second transistors connected in series.
8. The radio frequency switch according to any one of claims 1 to 7, characterized in that: The radio frequency switch further includes an analog circuit, and the gate of the first transistor, the body electrode of the first transistor, the gate of the second transistor, and the body electrode of the second transistor are all connected to the analog circuit; The analog circuit is used to control the working states of the first transistor and the second transistor so that when the first branch included in the target path in the at least one path is in an on state, the second branch included in the target path is in an off state, the first branch included in the path other than the target path in the at least one path is in an off state, and the second branch included in the path other than the target path in the at least one path is in an on state, wherein the target path is any one of the at least one path.
9. The radio frequency switch according to claim 1, characterized in that: At least part of the paths in the radio frequency switch are arranged symmetrically.
10. The radio frequency switch according to claim 1, characterized in that: The first characteristic distance of the first transistor is 0.1 micrometer to 0.3 micrometer, and the difference between the first characteristic distance of the second transistor and the first characteristic distance of the first transistor is 0.2 micrometer to 1 micrometer; The second characteristic distance of the first transistor is 0.1 micrometer to 0.3 micrometer, and the difference between the second characteristic distance of the second transistor and the second characteristic distance of the first transistor is 0.2 micrometer to 1 micrometer.