Electronic control unit interface with flexible input signal conditioning circuit

Abstract

The invention relates to an electronic control unit interface with a flexible input signal conditioning circuit. The electronic control unit includes a housing and an interface extending across the housing, the interface including a plurality of interface pins accessible at an exterior of the housing and at an interior of the housing. The circuit board is disposed in the housing. A plurality of conductive traces are operatively coupled with the circuit board and extend between the plurality of discrete component footprints. A microcontroller is positioned on the microcontroller footprint and includes an input pin conductively coupled with the first conductive trace. An input terminal is positioned on the input terminal footprint and is conductively coupled with the second conductive trace and one of the plurality of interface pins. A flexible input signal conditioning (FISC) circuit includes a plurality of discrete components positioned on respective discrete component footprints and conductively coupled with respective sets of a plurality of conductive traces.

Description

Technical Field

[0001] The present application relates to an electronic control unit (ECU) interface with flexible input signal conditioning circuitry and related devices, systems, and processes. Background Art

[0002] Electronic control units (ECUs) may be provided in applications such as vehicle systems, engine systems, power generation systems, and other industrial equipment or systems. ECU design faces several constraints and limitations including on configurability, adaptability, and flexibility to support multiple applications and features, as well as limitations on input / output (I / O) pins, mechanical package size, PCB density, and other constraints and limitations. There remains a significant need for the unique apparatus, process, and system of the present disclosure. Summary of the invention

[0003] For the purpose of clearly, concisely and precisely describing the exemplary embodiments of the present disclosure, the manner and process of making and using the exemplary embodiments of the present disclosure, and to enable the practice, making and use of the exemplary embodiments of the present disclosure, reference will now be made to certain exemplary embodiments, including the embodiments illustrated in the various figures, and specific language will be used to describe the exemplary embodiments. However, it should be understood that no limitation of the scope of the present invention is thereby created, and the present invention includes and protects such changes, modifications and further applications of the exemplary embodiments as would occur to a person skilled in the art.

[0004] Some embodiments include apparatus including a configurable ECU interface. Some embodiments include unique processes involving a configurable ECU interface. Some embodiments include unique systems including a configurable ECU interface. Further embodiments, forms, objects, features, advantages, aspects, and benefits will become apparent from the following description and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Figure 1 is a schematic diagram depicting certain aspects of an example system in an example operating environment.

[0006] Figure 2 It is a depiction Figure 1 Schematic diagram of certain aspects of an example implementation of a system

[0007] Figure 3 It is a depiction Figure 2 Schematic diagram of certain aspects of certain components of an example embodiment of the present invention in a first assembled state.

[0008] Figure 4 It is a depiction Figure 2 Schematic diagram of certain aspects of certain components of an example embodiment of the present invention in a second assembled state.

[0009] Figure 5 It is a depiction Figure 2 FIG. 1 is a schematic diagram of certain aspects of certain components of an example embodiment of FIG. 1 in a third assembled state.

[0010] Figure 6 is a flowchart depicting certain aspects of an example process. DETAILED DESCRIPTION

[0011] refer to Figure 1 , illustrates an example system 100 that includes a prime mover system 110 (also referred to herein as system 110) and at least a portion of one or more loads 109. System 100 can be provided in several forms, including, for example, in the form of a vehicle or vehicle drive train (e.g., a highway vehicle or highway vehicle drive train or an off-highway vehicle or off-highway vehicle drive train), a work machine or work machine drive train, a generator set or generator set drive train, or a hydraulic fracturing rig or hydraulic fracturing rig drive train, to name a few non-limiting examples. It should be appreciated that system 100 may include several other components that will occur to those skilled in the art with the benefit and insight of this disclosure.

[0012] In the illustrated example, the system 110 is configured and provided as an internal combustion engine system, including an intake air treatment system 112, an engine 114, an exhaust system 116, a fuel system 158, and an electronic control system 130. It should be appreciated that the system 110 may include several other components that will occur to one skilled in the art with the benefit and insight of this disclosure. In other example embodiments, the system 110 may be configured and provided as another type of prime mover system, such as, for example, a hybrid combustion engine-electric prime mover system, a battery electric prime mover system, a fuel cell prime mover system, or another type of prime mover system.

[0013] The intake air treatment system 112 may include one or more air handling ducts, air filters, compressors (such as the compressor of a turbocharger or supercharger), coolers (such as a supercharger air cooler, which may be, for example, an air-to-air type or an air-to-liquid type, an intercooler, and / or an aftercooler), and sensors (such as temperature sensors, pressure sensors, mass flow sensors, and other types of sensors), among other components.

[0014] The engine 114 can be provided in several forms, and typically includes a cylinder block and a cylinder head coupled to the cylinder block, the cylinder block including a plurality of cylinders. The cylinder head typically includes an intake port, an intake valve configured to selectively open and close the intake port, an exhaust port, an exhaust valve configured to selectively open and close the exhaust port, an injector hole, a fuel injector disposed in the injector hole, a spark plug hole, and a spark plug disposed in the spark plug hole. A plurality of pistons can be provided in corresponding cylinders in the plurality of cylinders. The crankshaft can be coupled to the plurality of pistons and configured to translate the reciprocating motion of the plurality of pistons to provide a torque for driving the load 109, which may include an internal load of the system 110 (such as an oil pump, a valve mechanism, a fuel pump, and other loads of the engine 114, and an accessory load of the system 110). It should be appreciated that the system 110 may include several other components that would be expected by those skilled in the art with the benefit and insight of the present disclosure.

[0015] The exhaust system 116 may include one or more exhaust treatment conduits, a turbine (such as a turbine of a turbocharger), after-treatment components (such as an oxidation catalyst, certain filters, a selective catalytic reduction (SCR) catalyst, and / or other catalysts and after-treatment components), and sensors (such as temperature sensors, pressure sensors, oxygen or lambda sensors, mass flow sensors, and other types of sensors), among other components.

[0016] Fuel system 158 may be configured and provided as a high pressure common rail fuel injection system including a plurality of fuel injectors in fluid communication with a common fuel rail that supplies fuel to the plurality of fuel injectors at a relatively high pressure. Fuel may be supplied to the common fuel rail by a high pressure pump that in turn may be supplied by a relatively low pressure fuel circuit including a boost pump that may be immersed in a tank containing a fuel storage tank.

[0017] The ECS 130 preferably includes one or more programmable microcontrollers of a solid-state, integrated circuit type and one or more non-transitory memory media configured to store instructions executable by the one or more microcontrollers. For the purposes of this application, the term microcontroller should be understood to also cover microprocessors and other types of integrated circuit processors. The ECS 130 is in operational communication with sensors or controllers of the intake air treatment system 112, the engine 114, the exhaust system 116, and the fuel system 158, and can be adapted and configured to control the operation of and / or receive input from sensors or controllers of the intake air treatment system 112, the engine 114, the exhaust system 116, and the fuel system 158. The ECS 130 is in operational communication with one or more system sensors 102 of the system 100, and can be adapted and configured to control the operation of and / or receive input from one or more system sensors 102 of the system 100, which can include, for example, a throttle position sensor or an accelerator position sensor. It should be appreciated that Figure 1 The control relationships between the aforementioned components are conceptually depicted using dashed arrows, and may be implemented using various communication hardware and protocols, such as one or more controller area networks (CAN) or other communication components.

[0018] ECS130 can be implemented in any of several ways, which combine or distribute control functions across one or more control units in various ways. ECS130 can execute operational logic that defines various control, management and / or regulation functions. The operational logic can be in the form of dedicated hardware, such as a hard-wired state machine, an analog computing machine, programming instructions and / or different forms that a person skilled in the art would think of. ECS130 can be provided as a single component or a collection of operationally coupled components; and can be composed of digital circuits, analog circuits, or a mixed combination of these types. When in a multi-component form, ECS130 can have one or more components that are remotely located relative to other components in a distributed arrangement. ECS130 may include multiple processing units that are arranged to operate independently, operate in a pipeline processing arrangement, operate in a parallel processing arrangement, etc. It should be further appreciated that ECS130 and / or any of its constituent components may include one or more signal conditioners, modulators, demodulators, arithmetic logic units (ALUs), central processing units (CPUs), limiters, oscillators, control clocks, amplifiers, signal conditioners, filters, format converters, communication ports, clamps, delay devices, memory devices, analog-to-digital (A / D) converters, digital-to-analog (D / A) converters, and / or various circuits or components as would occur to one of skill in the art to perform the desired communications.

[0019] Figure 1100 , an operating environment 99 is also depicted. As described above, during typical operation of the system 100, ambient air 91 of the operating environment 99 is received as an input to the system 100, and treated exhaust 93 from the system 100 is released to the operating environment 99. In some embodiments, the load 109 may at least partially comprise a portion of the operating environment 99. For example, in embodiments in which the system 100 is provided in the form of a generator set or a generator set drive train, in addition to load components that are an integral part of the system 100 even if they are small, one or more loads 109 may include loads at various nodes in the distributed power network. As another example, in embodiments in which the system 100 is provided in the form of a vehicle or a vehicle drive train, in addition to load components that are an integral part of the system 100 even if they are small, the load 109 may include forces such as wind, gravity, road friction, and other environmental load components.

[0020] refer to Figure 2 , illustrates an example implementation of the ECS 130. In the illustrated example, the ECS 130 includes an electronic control unit (ECU) 210. The ECU 210 includes a housing 212 and an interface 217. The housing 212 surrounds an interior 214 containing a plurality of electronic control components. The interface 217 extends across the housing 212 and includes a plurality of interface pins 107 that are conductively accessible at an exterior 94 of the housing 212 and conductively accessible at an interior 214 of the housing 212.

[0021] A circuit board 215 is contained within the housing 212. The circuit board 215 includes a flexible input signal conditioning (FISC) circuit 220, which includes an input terminal 219 operatively coupled to the interface pin 107a of the interface 217 and to the microcontroller 250. The FISC circuit 220 is also coupled to an input pin 254 of the microcontroller 250, which is mounted on the circuit board 215 and is thereby operatively coupled to the circuit board 215.

[0022] Interface pins 107a may be selectively operatively coupled to sensor 77 via connector 119 of wiring harness 117, and they may be Figure 1 107a. In such an operationally coupled state, the interface pin 107a can receive the sensor signal 97 from the sensor 77, which in turn can be received and conditioned by the FISC circuit 220 and provided as an input to the microcontroller 205. Depending on the selection and configuration of the sensor 77, the input signal 97 can be one of a variety of forms. For example, the sensor 77 can be configured to provide the sensor signal 97 in the form of an analog signal or a single edge nibble transmission (SENT) signal.

[0023] refer to Figure 3 , illustrates the circuit board 215 in a first assembled state, wherein a plurality of conductors are provided on the circuit board 215. Figure 3 In the assembled state illustrated in , the plurality of conductors include conductive traces 221-229, which may be integrally formed with the circuit board 215 (e.g., using deposition, etching, lamination, machining, masking, photoresist, and / or other formation techniques) and operatively coupled with the circuit board 215 through such integral formation. Figure 3 In the illustrated assembled state, the FISC circuit 220 includes conductive traces 221 - 229 , and may consist essentially of conductive traces 221 - 229 in combination with one or more ground planes and / or reference planes of the circuit board 215 .

[0024] Conductive traces 221-229 include corresponding groups of mounting conductors 230-247, which are preferably formed continuously with their corresponding conductive traces, or can be formed separately and conductively coupled with their corresponding conductive traces. Each of the mounting conductors 230-247 can be configured and provided in several forms, for example, as a mounting pad, a through-hole mount, or another type of mounting conductor. In the illustrated example, the mounting conductors 230-246 are configured and provided as mounting pads, and are also referred to as mounting pads herein. In other embodiments, one or more of the mounting conductors 230-246 can be configured and provided as through-hole mounts or another type of mounting conductor. In the illustrated example, the mounting conductor 247 is configured and provided as a mounting pad combined with one or more mechanical reinforcement features, and is also referred to as a terminal mount herein. In other embodiments, the mounting conductor 247 can be configured and provided as a through-hole mount or another type of mounting conductor.

[0025] A portion 221a of conductive trace 221 extends between and conductively couples mounting pad 230 and mounting pad 231. Mounting pad 230 is configured to interface with footprint 205, which is configured to interface with microcontroller 250. It should be appreciated that the configuration of circuit board mounting conductors, such as mounting pads and footprints, refers to the arrangement, geometry, positioning, size, and other physical characteristics that facilitate the mounting pads to interface with and operatively couple with circuit components that can be arranged on the footprints, operatively coupled with the mounting pads, and thereby mounted on the circuit board.

[0026] The mounting pad 231 is configured to interface with the footprint 201, which is configured to interface with discrete passive circuit components. It should be appreciated that discrete passive circuit components according to the present disclosure may include circuit elements such as resistors, zero-ohm resistors or jumpers, capacitors, and diodes, for example, as described herein in conjunction with Figure 4 and Figure 5 Specific discrete passive components described.

[0027] Conductive trace 222 includes a first portion 222a that extends between and conductively couples mounting pad 232 and mounting pad 233. Mounting pad 232 is configured to interface with footprint 201. Mounting pad 233 is configured to interface with footprint 202, which is configured to interface with a discrete passive circuit component.

[0028] Conductive trace 222 includes a second portion 222b that extends between and conductively couples first portion 222a and mounting pad 239. Mounting pad 239 is configured to interface with footprint 204, which is configured to interface with a discrete passive circuit component.

[0029] Conductive trace 223 includes a first portion 223a extending between and conductively coupling mounting pad 234 and mounting pad 235. Mounting pad 234 is configured to interface with footprint 202. Mounting pad 235 is configured to interface with footprint 203, which is configured to interface with a discrete passive circuit component. Conductive trace 223 includes a second portion 223b extending between and conductively coupling first portion 223a and mounting pad 241. Mounting pad 241 is configured to interface with footprint 205, which is configured to interface with a discrete passive circuit component.

[0030] Conductive trace 224 includes a first portion 224a that extends between and conductively couples mounting pad 236 and terminal mount 247. Mounting pad 236 is configured to interface with footprint 203. Terminal mount 247 is configured to interface with footprint 209, which is configured to interface with terminal mount 247, which is configured to interface with circuit board input terminal 219.

[0031] Conductive trace 224 includes a second portion 224b that extends between and conductively couples first portion 223a and mounting pad 243. Mounting pad 243 is configured to interface with footprint 206, which is configured to interface with a discrete passive circuit component.

[0032] Conductive trace 224 includes a third portion 224c that extends between and conductively couples first portion 223a and mounting pad 245. Mounting pad 245 is configured to interface with footprint 207, which is configured to interface with a discrete passive circuit component.

[0033] Conductive trace 224 includes a fourth portion 224d that extends between and conductively couples first portion 223a and mounting pad 237. Mounting pad 237 is configured to interface with footprint 208, which is configured to interface with a discrete passive circuit component.

[0034] Conductive traces 225, 226, 227, 228 are configured to provide grounding for FISC circuit 220. A portion 225a of conductive trace 225 extends between and conductively couples mounting pad 240 and grounding, which may be configured, for example, as a ground plane of circuit board 215, which may include analog ground, digital ground, chassis or chassis ground, and / or other types of grounding. Mounting pad 240 is configured to interface with footprint 204. A portion 226a of conductive trace 226 extends between and conductively couples mounting pad 242 and grounding. Mounting pad 242 is configured to interface with footprint 205. A portion 227a of conductive trace 227 extends between and conductively couples mounting pad 244 and grounding. Mounting pad 244 is configured to interface with footprint 206. A portion 228a of conductive trace 228 extends between and conductively couples mounting pad 246 and ground. Mounting pad 246 is configured to interface with footprint 207.

[0035] Conductive trace 229 is configured to provide a reference to FISC circuit 220. A portion 229a of conductive trace 229 extends between and conductively couples mounting pad 238 and voltage source V_ref. Mounting pad 238 is configured to interface with footprint 208.

[0036] exist Figure 4 In the assembled state shown in FIG. 1 , the FISC circuit 220 is configured and operable to receive and regulate, for example, signals from a sensor (such as a combination of Figure 2 The described sensor 77) receives a SENT signal.

[0037] refer to Figure 4 , illustrates the circuit board 215 in a second assembled state, wherein the first set of circuit components has been populated on the circuit board 215 and is operatively coupled to the circuit board 215. Figure 4 In the assembled state shown in FIG. , the first set of circuit components includes a microcontroller 250, resistors 261, 262, 263, 268, capacitors 264, 255, 267, and a clamping diode 266. Figure 3 In the assembled state illustrated in the figure, the FISC circuit 220 includes conductive traces 221-conductive traces 229 and mounting pads 230-mounting pads 246, and can essentially be composed of a combination of conductive traces 221-conductive traces 229 and mounting pads 230-mounting pads 246 and a first group of discrete passive components and one or more ground planes and / or reference planes of the circuit board 215.

[0038] Capacitor 267 is populated on footprint 207 and conductively coupled to mounting pads 245, 246, and thereby conductively coupled to conductive trace 224, terminal mount 247, and input terminal 219 on one side, and conductively coupled to conductive trace 228 and ground on the other side, respectively. Capacitor 267 is configured to provide electrostatic discharge (ESD) protection for FISC circuit 220. It should be appreciated that the configuration of a capacitor, such as capacitor 267 and other capacitors disclosed herein, refers to its capacitance value, and may also refer to other electrical characteristics, such as voltage rating or current rating, and physical characteristics, such as temperature rating and size, and other characteristics.

[0039] The clamping diode 266 is populated on the footprint 206 and conductively coupled with the mounting pads 243, 244, and thereby conductively coupled with the conductive trace 224, the terminal mounting member 247 and the input terminal 219 on one side, and conductively coupled with the conductive trace 227 and ground on the other side. The clamping diode 266 is configured to clamp the voltage at the node of the conductive trace 224 within one or more predetermined limits or within a predetermined range. In some embodiments, the clamping diode 266 can be provided in the form of a package assembly that includes two Zener diodes configured in an anti-parallel arrangement. In the illustrated embodiment, the clamping diode 266 is configured and provided as a two-terminal device. In other embodiments, the clamping diode 266 can be configured and provided as a three-terminal device with two inputs conductively coupled at a common node. In such an embodiment, one or more additional mounting pads and / or one or more additional conductive traces can be provided, which are configured to provide such conductive coupling at a common node.

[0040] Resistor 268 is populated on footprint 208 and conductively coupled to mounting pads 237, 238, and thereby conductively coupled to conductive trace 224, terminal mount 247, and input terminal 219 on one side, and conductively coupled to conductive trace 229 and reference voltage V_ref on the other side, respectively. Resistor 268 is configured in a pull-up configuration to provide a default reference voltage for FISC circuit 220. It should be appreciated that the configuration of a resistor, such as resistor 268 and other resistors disclosed herein, refers to its resistance value, and may also refer to other electrical characteristics, such as voltage rating or current rating, and physical characteristics, such as temperature rating and size, among other characteristics.

[0041] Resistor 263 is populated on footprint 203 and conductively coupled to mounting pads 236, 235, and thereby conductively coupled to conductive trace 224, terminal mounting 247 and input terminal 219 on one side, and conductively coupled to conductive trace 223 on the other side. Capacitor 255 is populated on footprint 205 and conductively coupled to mounting pads 241, 242, and thereby conductively coupled to conductive trace 223 on one side, and conductively coupled to conductive trace 226 and ground on the other side. Resistor 263 and capacitor 255 form a first resistor-capacitor (RC) network 271, and are respectively configured to provide a first low-pass filtering for an input signal received by FISC circuit 220 via input terminal 219.

[0042] Resistor 262 is populated on footprint 202 and conductively coupled to mounting pads 234, 233, and thereby conductively coupled to conductive trace 223 on one side and conductively coupled to conductive trace 222 on the other side, respectively. Capacitor 264 is populated on footprint 204 and conductively coupled to mounting pads 239, 240, and thereby conductively coupled to conductive trace 222 on one side and conductively coupled to conductive trace 225 and ground on the other side, respectively. Resistor 262 and capacitor 264 form a second resistor-capacitor (RC) network 272, and are respectively configured to provide a second low-pass filtering for an input signal received by FISC circuit 220 via input terminal 219.

[0043] Resistor 261 is populated on footprint 201 and conductively coupled to mounting pads 232, 231, and thereby conductively coupled to conductive trace 222 on one side and conductive trace 221 and mounting pad 230 on the other side, respectively. Resistor 261 is configured to provide input current limiting. Microcontroller 250 is populated on footprint 205 and conductively coupled to mounting pad 230 and the aforementioned components of FISC circuit 220.

[0044] refer to Figure 5, illustrates the circuit board 215 in a third assembled state, wherein a second set of circuit components has been populated on the circuit board 215 and is operatively coupled to the circuit board 215. Figure 5 In the assembled state shown in FIG. , the first set of circuit components includes the microcontroller 250, resistors 263, 268, zero ohm resistors or short circuits 371, 372, and capacitors 255, 267 and clamping diode 266. Figure 5 In the assembled state illustrated in the figure, the FISC circuit 220 includes conductive traces 221-conductive traces 229 and mounting pads 230-mounting pads 246, and can essentially be composed of a combination of conductive traces 221-conductive traces 229 and mounting pads 230-mounting pads 246 and a second group of discrete passive components and one or more ground planes and / or reference planes of the circuit board 215.

[0045] exist Figure 5 In the assembled state shown in FIG. 1 , FISC circuit 220 includes capacitor 267, resistor 268, resistor 263, and capacitor 255, which can be combined with Figure 4 The same form and configuration as described in the illustrated assembled state are provided, and they may have the same Figure 4 The placeholders 204, 206 are not populated in the form shown. In other embodiments, the placeholders 204, 206 may be combined with Figure 4 220 and some or all of the portions 224 b of the conductive trace 224 and some or all of the portions 222 b of the conductive trace 222 may be selectively ablated or interrupted to isolate the populated components from the operating portions of the FISC circuit 220.

[0046] A zero ohm resistor or short 372 is conductively coupled to mounting pads 234, 233 and thereby conductively coupled to conductive trace 223 on one side and conductive trace 222 on the other side, respectively.

[0047] Zero ohm resistor or short 371 is conductively coupled to mounting pads 232, 231 and thereby conductively coupled to conductive trace 222 on one side and conductively coupled to conductive trace 221 and mounting pad 230 on the other side, respectively. Microcontroller 250 is populated on footprint 205 and conductively coupled to mounting pad 230 and the components of FISC circuit 220 mentioned above.

[0048] exist Figure 5 In the assembled state shown in FIG. 1 , the FISC circuit 220 is configured and operable to receive and condition, for example, signals from a sensor (such as a combination of Figure 2It should be appreciated that by selectively including and excluding certain components from a plurality of discrete components, the FISC circuit 220 can be assembled into Figure 4 Assembly state or Figure 5 assembly status.

[0049] refer to Figure 6 , illustrates an example system configuration process 300 (also referred to herein as process 300), which may be performed by or in conjunction with an electronic control system (such as ECS 130) or another electronic control system, such as microcontroller 250 or another microcontroller. Process 300 initiates at start operation 302 and proceeds to operation 304, which reads one or more microcontroller calibrations (such as calibration 252 or another microcontroller calibration).

[0050] From operation 304, process 300 proceeds to conditional 306, which evaluates whether the analog calibration is set, for example, whether the calibration read at operation 304 is configured to cause the microcontroller to process and operate using analog inputs. If conditional 306 evaluates positively, process 300 proceeds to operation 308.

[0051] At operation 308, the microcontroller performs an analog input check. Operation 308 may, for example, include the microcontroller controlling the system (such as system 100) in other ways so that, in the case of a properly functioning system, analog inputs are received and the microcontroller is operated to detect and process such inputs. Process 300 proceeds from operation 308 to condition 310.

[0052] Condition 310 evaluates whether the analog input check passes, e.g., whether the microcontroller receives the analog input and / or whether the microcontroller receives the expected value of the analog input. If condition 310 evaluates to positive, process 300 proceeds to operation 312, which sets the analog input condition to active. Process 300 proceeds from operation 312 to end operation 390, and may then be repeated or called.

[0053] If condition 310 evaluates to negative, process 300 proceeds to operation 314, which sets simulated input error to true. Process 300 proceeds from operation 312 to end operation 390, and can then be repeated or called. In some embodiments, process 300 can alternatively proceed from operation 314 to operation 318.

[0054] If condition 306 evaluates to negative, process 300 proceeds to condition 316, which evaluates whether the SENT calibration is set, for example, whether the calibration read at operation 304 is configured to cause the microcontroller to use the SENT input for processing and operation. If condition 316 evaluates to negative, process 300 proceeds to operation 326, which sets the calibration error condition equal to true. Process 300 proceeds from operation 326 to end operation 390, and can then be repeated or called.

[0055] If condition 316 evaluates to positive, process 300 proceeds to operation 318. At operation 318, the microcontroller performs a SENT input check. Operation 318 may, for example, include the microcontroller controlling the system (such as system 100) in other ways so that, in the case of a properly functioning system, a SENT input is received, and operating the microcontroller to detect and process such input. Process 300 proceeds from operation 318 to condition 320.

[0056] Condition 320 evaluates whether the SENT input check passes, e.g., whether the microcontroller receives the SENT input and / or whether the microcontroller receives the expected value of the SENT input. If condition 320 evaluates to positive, process 300 proceeds to operation 322, which sets the SENT input condition to active. Process 300 proceeds from operation 322 to end operation 390, and may then be repeated or called.

[0057] If condition 320 evaluates to negative, process 300 proceeds to operation 324, which sets SENT input error to true. Process 300 proceeds from operation 322 to end operation 390, and may then be repeated or invoked.

[0058] If condition 306 evaluates to negative, process 300 proceeds to condition 316, which evaluates whether the SENT calibration is set, for example, whether the calibration read at operation 304 is configured to cause the microcontroller to process and operate using the received SENT input. If condition 316 evaluates to negative, process 300 proceeds to operation 326, which sets the calibration error condition equal to true. Process 300 proceeds from operation 326 to end operation 390, and can then be repeated or called.

[0059] As illustrated by the detailed description, the present disclosure contemplates multiple embodiments including the following examples. A first example embodiment is an electronic control system including: an electronic control unit including a housing and an interface extending across the housing, the interface including a plurality of interface pins accessible at an exterior of the housing and at an interior of the housing; a circuit board disposed in the housing; a plurality of conductive traces operatively coupled to the circuit board and extending between a plurality of discrete component footprints; a microcontroller positioned on the microcontroller footprint and including an input pin conductively coupled to a first conductive trace of the plurality of conductive traces; an input terminal positioned on the input terminal footprint and conductively coupled to a second conductive trace of the plurality of conductive traces and one of the plurality of interface pins; and and a flexible input signal conditioning (FISC) circuit, comprising a plurality of discrete components, the plurality of discrete components being positioned on corresponding ones of a plurality of discrete component footprints and conductively coupled to corresponding groups of a plurality of conductive traces, the FISC circuit being selectively configurable into a first configuration and a second configuration, the first configuration comprising a capacitor configured to prevent electrostatic discharge, a voltage clamp, a reference voltage generator, a first low-pass filter and a second low-pass filter, the second configuration comprising the capacitor and the first low-pass filter and excluding the voltage clamp and the second low-pass filter, the first configuration being configured to condition a SENT input signal, and the second configuration being configured to condition an analog input signal.

[0060] The second example embodiment includes the features of the first example embodiment, wherein the plurality of conductive traces and the plurality of discrete component footprints include: a first conductive trace extending between the microcontroller footprint and the first discrete component footprint; a third conductive trace extending between the first discrete component footprint, the second discrete component footprint, and the third discrete component footprint; a fourth conductive trace extending between the second discrete component footprint, the fourth discrete component footprint, and the fifth discrete component footprint; and a second conductive trace extending between the fourth discrete component footprint, the sixth discrete component footprint, the seventh discrete component footprint, the eighth discrete component footprint, and the input terminal footprint.

[0061] The third example embodiment includes the features of the second example embodiment, wherein the capacitor is positioned on the seventh discrete component footprint and conductively coupled to the fourth conductive trace and ground.

[0062] A fourth example embodiment includes the features of the second example embodiment, wherein the voltage clamp includes a resistor positioned on the sixth discrete component footprint and conductively coupled to the fourth conductive trace and ground.

[0063] The fifth example embodiment includes the features of the second example embodiment, wherein the reference voltage generator includes a resistor positioned on the eighth discrete component footprint and conductively coupled to the voltage source.

[0064] The sixth example embodiment includes the features of the second example embodiment, wherein the first low pass filter comprises a resistor positioned on the fourth discrete component footprint and conductively coupled to the second conductive trace and the fourth conductive trace, and a capacitor positioned on the fifth discrete component footprint and conductively coupled to the fourth conductive trace and ground.

[0065] A seventh example embodiment includes the features of the second example embodiment, wherein the second low pass filter comprises a resistor positioned on the second discrete component footprint and conductively coupled to the third conductive trace and the fourth conductive trace, and a capacitor positioned on the third discrete component footprint and conductively coupled to the third conductive trace and ground.

[0066] An eighth example embodiment includes the features of the first example embodiment, wherein the microcontroller is selectably configured to process one of an analog input signal and a SENT input signal provided to the one of the plurality of interface pins and received at an input pin of the microcontroller.

[0067] A ninth example embodiment is a process of configuring an electronic control unit, the electronic control unit including a housing and an interface extending across the housing, the interface including a plurality of interface pins accessible at an exterior of the housing and at an interior of the housing, the process comprising: populating a circuit board including a plurality of conductive traces operatively coupled to the circuit board and extending between a plurality of discrete component footprints, wherein a microcontroller is positioned on the microcontroller footprint and includes an input pin and an input terminal, the input pin conductively coupled to a first conductive trace of the plurality of conductive traces, the input terminal being positioned on the input terminal footprint and conductively coupled to a second conductive trace of the plurality of conductive traces and one of the plurality of interface pins ; optionally populating the circuit board with a flexible input signal conditioning (FISC) circuit, the circuit comprising a plurality of discrete components positioned on corresponding ones of a plurality of discrete component footprints and conductively coupled to corresponding groups of a plurality of conductive traces according to one of the following: a first configuration comprising a capacitor configured to prevent electrostatic discharge, a voltage clamp, a reference voltage generator, a first low-pass filter and a second low-pass filter, and a second configuration comprising the capacitor and the first low-pass filter and excluding the voltage clamp and the second low-pass filter, the first configuration being configured to condition a SENT input signal, the second configuration being configured to condition an analog input signal; and deploying the circuit board in a housing of an electronic control unit.

[0068] The tenth example embodiment includes the features of the ninth example embodiment, wherein the plurality of conductive traces and the plurality of discrete component footprints include: a first conductive trace extending between the microcontroller footprint and the first discrete component footprint; a third conductive trace extending between the first discrete component footprint, the second discrete component footprint, and the third discrete component footprint; a fourth conductive trace extending between the second discrete component footprint, the fourth discrete component footprint, and the fifth discrete component footprint; and a second conductive trace extending between the fourth discrete component footprint, the sixth discrete component footprint, the seventh discrete component footprint, the eighth discrete component footprint, and the input terminal footprint.

[0069] The eleventh exemplary embodiment includes the features of the tenth exemplary embodiment, wherein the capacitor is positioned on the seventh discrete component footprint and conductively coupled to the fourth conductive trace and ground.

[0070] The twelfth example embodiment includes the features of the tenth example embodiment, wherein the voltage clamp includes a resistor positioned on the sixth discrete component footprint and conductively coupled to the fourth conductive trace and ground.

[0071] The thirteenth exemplary embodiment includes the features of the tenth exemplary embodiment, wherein the reference voltage generator comprises a resistor positioned on the eighth discrete component footprint and conductively coupled to the voltage source.

[0072] The fourteenth example embodiment includes the features of the tenth example embodiment, wherein the first low pass filter comprises a resistor positioned on the fourth discrete component footprint and conductively coupled to the second conductive trace and the fourth conductive trace, and a capacitor positioned on the fifth discrete component footprint and conductively coupled to the fourth conductive trace and ground.

[0073] The fifteenth example embodiment includes the features of the tenth example embodiment, wherein the second low pass filter comprises a resistor positioned on the second discrete component footprint and conductively coupled to the third conductive trace and the fourth conductive trace, and a capacitor positioned on the third discrete component footprint and conductively coupled to the third conductive trace and ground.

[0074] The sixteenth example embodiment includes the features of the ninth example embodiment including selectably configuring the microcontroller to process one of an analog input signal and a SENT input signal provided to the one of the plurality of interface pins and received at an input pin of the microcontroller.

[0075] The seventeenth example embodiment is a device comprising: a circuit board adapted to be mounted in a housing of an electronic control unit, the electronic control unit comprising an interface extending across the housing, the interface comprising a plurality of interface pins accessible at an exterior of the housing and at an interior of the housing; a plurality of conductive traces operatively coupled to the circuit board and extending between a plurality of discrete component footprints; a microcontroller positioned on the microcontroller footprint and comprising an input pin conductively coupled to a first conductive trace of the plurality of conductive traces; an input terminal positioned on the input terminal footprint and coupled to a second conductive trace of the plurality of conductive traces and one of the plurality of interface pins conductively coupled; and a flexible input signal conditioning (FISC) circuit, which includes a plurality of discrete components, the plurality of discrete components are positioned on corresponding ones of the plurality of discrete component footprints and conductively coupled to corresponding groups of the plurality of conductive traces, the FISC circuit being selectively configurable into a first configuration and a second configuration, the first configuration including a capacitor configured to prevent electrostatic discharge, a voltage clamp, a reference voltage generator, a first low-pass filter and a second low-pass filter, the second configuration including the capacitor and the first low-pass filter and not including the voltage clamp and the second low-pass filter, the first configuration being configured to condition the SENT input signal, and the second configuration being configured to condition the analog input signal.

[0076] The eighteenth example embodiment includes the features of the seventeenth example embodiment, wherein the plurality of conductive traces and the plurality of discrete component footprints include: a first conductive trace extending between the microcontroller footprint and the first discrete component footprint; a third conductive trace extending between the first discrete component footprint, the second discrete component footprint, and the third discrete component footprint; a fourth conductive trace extending between the second discrete component footprint, the fourth discrete component footprint, and the fifth discrete component footprint; and a second conductive trace extending between the fourth discrete component footprint, the sixth discrete component footprint, the seventh discrete component footprint, the eighth discrete component footprint, and the input terminal footprint.

[0077] The nineteenth exemplary embodiment includes the features of the eighteenth exemplary embodiment, wherein the capacitor is positioned on the seventh discrete component footprint and conductively coupled to the fourth conductive trace and ground.

[0078] The twentieth example embodiment includes the features of the nineteenth example embodiment, wherein the voltage clamp includes a resistor positioned on the sixth discrete component footprint and conductively coupled to the fourth conductive trace and ground.

[0079] A twenty-first example embodiment includes the features of the eighteenth example embodiment, wherein the reference voltage generator comprises a resistor positioned on the eighth discrete component footprint and conductively coupled to the voltage source.

[0080] The twenty-second example embodiment includes the features of the eighteenth example embodiment, wherein the first low pass filter comprises a resistor positioned on the fourth discrete component footprint and conductively coupled to the second conductive trace and the fourth conductive trace, and a capacitor positioned on the fifth discrete component footprint and conductively coupled to the fourth conductive trace and ground.

[0081] The twenty-third example embodiment includes the features of the eighteenth example embodiment, wherein the second low pass filter comprises a resistor positioned on the second discrete component footprint and conductively coupled to the third conductive trace and the fourth conductive trace, and a capacitor positioned on the third discrete component footprint and conductively coupled to the third conductive trace and ground.

[0082] The twenty-fourth example embodiment includes the features of the eighteenth example embodiment, wherein the microcontroller is selectively configurable to process one of an analog input signal and a SENT input signal provided to the one of the plurality of interface pins and received at an input pin of the microcontroller.

[0083] The twenty-fifth example embodiment includes the features of the seventeenth example embodiment, comprising an electronic control unit having a circuit board mounted in a housing of the electronic control unit.

[0084] It should be understood that terms such as "non-transitory memory," "non-transitory memory medium," and "non-transitory memory device" refer to several types of devices and storage media that can be configured to store information such as data and instructions that can be read or executed by a processor or other component of a computer system, and that such terms include and encompass a single or unitary device or medium that stores such information, multiple devices or media that store corresponding portions of such information across or among multiple devices or media, and multiple devices or media that store multiple copies of such information across or among multiple devices or media.

[0085] It should be understood that terms such as "determine," "determined," and "ascertained," when utilized in connection with a control method or process, an electronic control system or controller, an electronic control, or components or operations of the foregoing, include, without limitation, operations or calculations of parameters or values, obtaining parameters or values ​​from a lookup table or using a lookup operation, receiving parameters or values ​​from a data link or network communication, receiving an electrical signal (e.g., a voltage, SENT, current, or pulse width modulated (PWM) signal) indicative of a parameter or value, receiving an output of a sensor indicative of a parameter or value, receiving other output or input indicative of a parameter or value, reading a parameter or value from a memory location on a computer-readable medium, receiving a parameter or value such as a run-time parameter, and / or receiving a parameter or value that can be calculated to interpret a parameter, and / or by reference to a default value that is interpreted as a parameter value.

[0086] Although the example embodiments of the present disclosure have been illustrated and described in detail in the drawings and the foregoing description, these example embodiments are considered to be illustrative and not restrictive in nature, and it is understood that only certain example embodiments are shown and described, and it is desired to protect all changes and modifications that fall within the spirit of the claimed invention. It should be understood that although the use of words such as preferred, preferably, preferred or more preferred in the above description indicates that the features described in this way may be more desirable, it may not be necessary, and embodiments lacking these features may be considered to be within the scope of the present invention, and the scope is defined by the following claims. In reading the claims, it is intended that when words such as "one", "one", "at least one" or "at least a portion" are used, unless specifically stated to the contrary in the claims, it is not intended to limit the claims to only one item. When the language "at least a portion" and / or "a portion" is used, unless specifically stated to the contrary, the item may include a portion and / or the entire item.

Claims

1. An electronic control system, comprising: An electronic control unit comprising a housing and an interface extending across the housing, the interface comprising a plurality of interface pins accessible at an exterior of the housing and at an interior of the housing; a circuit board disposed in the housing; a plurality of conductive traces operatively coupled to the circuit board and extending between a plurality of discrete component footprints; a microcontroller positioned on the microcontroller footprint and including an input pin conductively coupled to a first conductive trace of the plurality of conductive traces; an input terminal positioned on the input terminal footprint and conductively coupled to a second one of the plurality of conductive traces and one of the plurality of interface pins; as well as A flexible input signal conditioning (FISC) circuit, comprising a plurality of discrete components positioned on corresponding ones of the plurality of discrete component footprints and conductively coupled to corresponding groups of the plurality of conductive traces, the FISC circuit selectively configurable into a first configuration and a second configuration, the first configuration comprising a capacitor configured to prevent electrostatic discharge, a voltage clamp, a reference voltage generator, a first low-pass filter and a second low-pass filter, the second configuration comprising the capacitor and the first low-pass filter and excluding the voltage clamp and the second low-pass filter, the first configuration being configured to condition a SENT input signal, and the second configuration being configured to condition an analog input signal.

2. The electronic control system according to claim 1, wherein: The plurality of conductive traces and the plurality of discrete component footprints include: the first conductive trace extending between the microcontroller footprint and the first discrete component footprint, a third conductive trace extending between the first discrete component footprint, the second discrete component footprint, and the third discrete component footprint, a fourth conductive trace extending between the second discrete component footprint, the fourth discrete component footprint, and the fifth discrete component footprint, and The second conductive trace extends between the fourth discrete component placeholder area, the sixth discrete component placeholder area, the seventh discrete component placeholder area, the eighth discrete component placeholder area and the input terminal placeholder area.

3. The electronic control system according to claim 2, wherein: The capacitor is positioned on the seventh discrete component footprint and conductively coupled to the fourth conductive trace and ground.

4. The electronic control system according to claim 2, wherein: The voltage clamp includes a resistor positioned on the sixth discrete component footprint and conductively coupled to the fourth conductive trace and ground.

5. The electronic control system according to claim 2, wherein: The reference voltage generator includes a resistor positioned on the eighth discrete component footprint and conductively coupled to a voltage source.

6. The electronic control system according to claim 2, wherein: The first low pass filter includes a resistor positioned on the fourth discrete component footprint and conductively coupled to the second conductive trace and the fourth conductive trace, and a capacitor positioned on the fifth discrete component footprint and conductively coupled to the fourth conductive trace and ground.

7. The electronic control system according to claim 2, wherein: The second low pass filter includes a resistor positioned on the second discrete component footprint and conductively coupled to the third conductive trace and the fourth conductive trace, and a capacitor positioned on the third discrete component footprint and conductively coupled to the third conductive trace and ground.

8. The electronic control system according to claim 1, wherein: The microcontroller is selectively configured to process one of an analog input signal and a SENT input signal provided to the one of the plurality of interface pins and received at the input pin of the microcontroller.

9. A process for configuring an electronic control unit, the electronic control unit comprising a housing and an interface extending across the housing, the interface comprising a plurality of interface pins accessible at an exterior of the housing and at an interior of the housing, the process comprising: populating a circuit board, the circuit board comprising a plurality of conductive traces operatively coupled to the circuit board and extending between a plurality of discrete component footprints, wherein a microcontroller is positioned on the microcontroller footprint and comprises an input pin conductively coupled to a first conductive trace of the plurality of conductive traces and an input terminal positioned on the input terminal footprint and conductively coupled to a second conductive trace of the plurality of conductive traces and one of the plurality of interface pins; optionally populating the circuit board with a flexible input signal conditioning (FISC) circuit, the FISC circuit comprising a plurality of discrete components positioned on respective ones of the plurality of discrete component footprints and conductively coupled to respective groups of the plurality of conductive traces according to one of: a first configuration comprising a capacitor configured to prevent electrostatic discharge, a voltage clamp, a reference voltage generator, a first low-pass filter, and a second low-pass filter; and a second configuration comprising the capacitor and the first low-pass filter and excluding the voltage clamp and the second low-pass filter, the first configuration being configured to condition a SENT input signal, the second configuration being configured to condition an analog input signal; as well as The circuit board is disposed in the housing of the electronic control unit.

10. The process of claim 9, wherein: The plurality of conductive traces and the plurality of discrete component footprints include: the first conductive trace extending between the microcontroller footprint and the first discrete component footprint, a third conductive trace extending between the first discrete component footprint, the second discrete component footprint, and the third discrete component footprint, a fourth conductive trace extending between the second discrete component footprint, the fourth discrete component footprint, and the fifth discrete component footprint, and The second conductive trace extends between the fourth discrete component placeholder area, the sixth discrete component placeholder area, the seventh discrete component placeholder area, the eighth discrete component placeholder area and the input terminal placeholder area.

11. The process of claim 10, wherein: The capacitor is positioned on the seventh discrete component footprint and conductively coupled to the fourth conductive trace and ground.

12. The process of claim 10, wherein: The voltage clamp includes a resistor positioned on the sixth discrete component footprint and conductively coupled to the fourth conductive trace and ground.

13. The process of claim 10, wherein: The reference voltage generator includes a resistor positioned on the eighth discrete component footprint and conductively coupled to a voltage source.

14. The process of claim 10, wherein: The first low pass filter includes a resistor positioned on the fourth discrete component footprint and conductively coupled to the second conductive trace and the fourth conductive trace, and a capacitor positioned on the fifth discrete component footprint and conductively coupled to the fourth conductive trace and ground.

15. The process of claim 10, wherein: The second low pass filter includes a resistor positioned on the second discrete component footprint and conductively coupled to the third conductive trace and the fourth conductive trace, and a capacitor positioned on the third discrete component footprint and conductively coupled to the third conductive trace and ground.

16. The process of claim 9, comprising selectably configuring the microcontroller to process one of an analog input signal and a SENT input signal provided to the one of the plurality of interface pins and received at the input pin of the microcontroller.

17. An apparatus comprising: a circuit board adapted to be mounted in a housing of an electronic control unit, the electronic control unit comprising an interface extending across the housing, the interface comprising a plurality of interface pins accessible at an exterior of the housing and at an interior of the housing; a plurality of conductive traces operatively coupled to the circuit board and extending between a plurality of discrete component footprints; a microcontroller positioned on the microcontroller footprint and including an input pin conductively coupled to a first conductive trace of the plurality of conductive traces; an input terminal positioned on the input terminal footprint and conductively coupled to a second one of the plurality of conductive traces and one of the plurality of interface pins; as well as A flexible input signal conditioning (FISC) circuit, comprising a plurality of discrete components positioned on corresponding ones of the plurality of discrete component footprints and conductively coupled to corresponding groups of the plurality of conductive traces, the FISC circuit selectively configurable into a first configuration and a second configuration, the first configuration comprising a capacitor configured to prevent electrostatic discharge, a voltage clamp, a reference voltage generator, a first low-pass filter and a second low-pass filter, the second configuration comprising the capacitor and the first low-pass filter and excluding the voltage clamp and the second low-pass filter, the first configuration being configured to condition a SENT input signal, and the second configuration being configured to condition an analog input signal.

18. The device according to claim 17, wherein: The plurality of conductive traces and the plurality of discrete component footprints include: the first conductive trace extending between the microcontroller footprint and the first discrete component footprint, a third conductive trace extending between the first discrete component footprint, the second discrete component footprint, and the third discrete component footprint, a fourth conductive trace extending between the second discrete component footprint, the fourth discrete component footprint, and the fifth discrete component footprint, and The second conductive trace extends between the fourth discrete component placeholder area, the sixth discrete component placeholder area, the seventh discrete component placeholder area, the eighth discrete component placeholder area and the input terminal placeholder area.

19. The device according to claim 18, wherein: The capacitor is positioned on the seventh discrete component footprint and conductively coupled to the fourth conductive trace and ground.

20. The device according to claim 18, wherein The voltage clamp includes a resistor positioned on the sixth discrete component footprint and conductively coupled to the fourth conductive trace and ground.

21. The device according to claim 18, wherein The reference voltage generator includes a resistor positioned on the eighth discrete component footprint and conductively coupled to a voltage source.

22. The device according to claim 18, wherein The first low pass filter includes a resistor positioned on the fourth discrete component footprint and conductively coupled to the second conductive trace and the fourth conductive trace, and a capacitor positioned on the fifth discrete component footprint and conductively coupled to the fourth conductive trace and ground.

23. The device according to claim 18, wherein The second low pass filter includes a resistor positioned on the second discrete component footprint and conductively coupled to the third conductive trace and the fourth conductive trace, and a capacitor positioned on the third discrete component footprint and conductively coupled to the third conductive trace and ground.

24. The device according to claim 17, wherein: The microcontroller is selectively configured to process one of an analog input signal and a SENT input signal provided to the one of the plurality of interface pins and received at the input pin of the microcontroller.

25. The apparatus of claim 17, comprising the electronic control unit, wherein the circuit board is mounted in the housing of the electronic control unit.

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