Low-temperature dry etching method for protection circuit
By using low-temperature dry etching method and photoresist protection circuit technology during dry etching, the problem of protecting circuit under high temperature and high power conditions is solved, and effective etching of semiconductor components with circuits is achieved, reducing costs and improving reliability.
Patent Information
- Application Number
- CN202411909652.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-24
- Publication Date
- 2025-04-29
AI Technical Summary
During dry etching, how to effectively etch semiconductor components with circuits under the premise of protecting the circuit, especially under high temperature and high power conditions, to avoid the collapse of circuits and fillers.
The low-temperature dry etching method is used to protect the circuit through the photoresist, and the mask is grown using chemical vapor deposition technology or liquid deposition technology, and the photoresist is protected with the baffle to ensure etching under low temperature conditions.
Under the premise of protecting the circuit, the semiconductor components are dry etched, avoiding the collapse of the circuit and filler under high temperature and high power conditions, reducing production costs, and improving process reliability.
Smart Images

Figure CN119907191A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of semiconductor technology and relates to a low-temperature dry etching method for protecting a circuit, and in particular to a low-temperature dry etching method for semiconductor materials with circuits, which is suitable for component processes with deep etching of circuits. Background Art
[0002] At present, there are two main methods for the structure production of semiconductor devices: dry etching and wet etching. Although wet etching has the advantages of being simple and fast, this method also has the disadvantages of poor anisotropy and uniformity, and performs poorly when completing the transfer of small graphics. In contrast, dry etching has fast etching rate, good anisotropy, high uniformity and high repeatability, so dry etching is widely used in the preparation process of semiconductor devices. The dry etching technology is a narrow sense of dry etching that processes the surface of the material based on the physical or chemical process generated by plasma discharge.
[0003] With the continuous advancement of semiconductor device technology, the preparation technology of various wafer materials has gradually matured, and there are specific requirements for the micro-nano processing technology of semiconductor components of different materials. In particular, for semiconductor components made of indium phosphide with circuits, it is usually necessary to protect the circuit and metal at the same time during the preparation of tiny pixels, which puts higher and more stringent requirements on dry etching technology.
[0004] Since plasma bombards the component surface during dry etching, the circuit needs to be protected by a mask before dry etching. Since the circuit is made of metal and semiconductor, the protective mask material can only be organic materials such as photoresist, so that the circuit can be removed without damaging the photoresist. Photoresist is easy to apply and develop as a mask, and can be directly removed after the process is completed. It has the advantages of simple process and easy removal. However, photoresist is easy to soften at high temperature, so it is not suitable as a mask in high temperature environment; at the same time, high-energy plasma bombardment will cause photoresist carbonization, increasing the difficulty of removal (Li Yafei, Li Xiaoliang, Ma Yingjie, etc. Influence of ICP etching on photoresist mask and etching pattern side wall [J]. Semiconductor Optoelectronics, 2018, 39 (2): 216-220.). In particular, for dry etching of components made of indium phosphide materials, since the etching product InClx of indium phosphide requires high temperature to vaporize and detach from the surface, indium phosphide materials must be processed under high temperature and high power conditions, which puts higher requirements on the use of photoresist masks. At the same time, the chip and the circuit are interconnected through indium columns, and the indium columns are filled with filling glue. Under high temperature and high power conditions, the indium columns and the filling glue will melt, causing the collapse of the components.
[0005] In summary, how to dry-etch a semiconductor component with a circuit while protecting the circuit has become an urgent problem to be solved by those skilled in the art. Summary of the invention
[0006] (I) Purpose of the invention
[0007] The purpose of the present invention is to provide a low-temperature dry etching method for protecting a circuit, so as to realize dry etching of a semiconductor component with a circuit under the premise of protecting the circuit.
[0008] (II) Technical solution
[0009] In order to solve the above technical problems, the present invention provides a low-temperature dry etching method for a protection circuit, which comprises the following steps:
[0010] (1) Select components;
[0011] (2) Decontamination, cleaning and drying of the components;
[0012] (3) Protect the surface of the component with integrated circuits by dripping photoresist;
[0013] (4) growing a mask on the surface of the component using chemical vapor deposition technology or liquid deposition technology;
[0014] (5) Peeling off the mask on the circuit to expose the circuit as a photolithography alignment mark;
[0015] (6) Making a photomask for etching component patterns: Spin-coating photoresist, and transferring the pattern from the photomask to the photoresist through operations such as coating, pre-baking, exposure, and development.
[0016] (7) Use corresponding corrosive solution or low-temperature dry etching process to etch the mask to transfer the pattern from the photoresist to the mask.
[0017] (8) Protect the circuit part by dripping photoresist, and use the photoresist to fix the baffle on the surface of the component to protect the photoresist.
[0018] (9) Use the corresponding low-temperature dry etching process to etch the component and transfer the pattern from the mask to the component.
[0019] (10) Use acetone, methanol or isopropanol organic solvent to remove the photoresist on the surface of the circuit component, recover the baffle, decontaminate, clean and dry.
[0020] (III) Beneficial effects
[0021] The low temperature dry etching method for the protection circuit provided by the above technical solution has the following characteristics:
[0022] Beneficial effects:
[0023] 1. Dry etching can be performed on components while protecting the circuit. Photoresist can be used to protect the circuit to prevent the circuit from being deformed under plasma bombardment. Baffles can be used to protect the photoresist to prevent the photoresist from being deformed even under extreme conditions such as high power, special gases or high temperatures. This ensures that the photoresist can protect the circuit while also being able to be cleaned and removed using organic solvents after etching is completed.
[0024] 2. Since the etching process and the growth process are carried out at a temperature not exceeding 100°C, the indium column with a low melting point in the circuit will not melt, while reducing the impact on component performance. This process can be used to complete processing with a thickness of several microns to tens of microns.
[0025] 3. The baffle can be used multiple times and has a very low production cost; the only chemicals required throughout the process are organic solvents and photoresists, which reduces production costs and improves reliability. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figure 1 It is a flowchart of the preparation method of the present invention;
[0027] Figure 2 A schematic diagram of the components selected for the implementation of the present invention;
[0028] Figure 3 A schematic diagram of a component after being protected by photoresist used in an embodiment of the present invention;
[0029] Figure 4 A schematic diagram of a component after mask growth used in an embodiment of the present invention;
[0030] Figure 5 It is a schematic diagram of a component after being photolithographically masked according to an embodiment of the present invention;
[0031] Figure 6 A schematic diagram of a component after mask etching according to an embodiment of the present invention;
[0032] Figure 7 A schematic diagram of a component protected by a baffle and a photoresist according to an embodiment of the present invention;
[0033] Figure 8 It is a schematic diagram of a component after etching indium phosphide according to an embodiment of the present invention. DETAILED DESCRIPTION
[0034] In order to make the purpose, content and advantages of the present invention more clear, the specific implementation methods of the present invention are further described in detail below in conjunction with the drawings and examples.
[0035] This embodiment provides a low-temperature dry etching method for protecting a circuit, which mainly includes: cleaning of components, protection of circuits, growth of masks, photolithography production and pattern transfer. The entire process is as follows: Figure 1 As shown, the specific steps include:
[0036] (1) Select components, such as Figure 2 As shown; the component includes a ceramic substrate 1, a circuit 2 formed on the ceramic substrate 1, an indium column 3 and a filling glue 4 formed above the central area of the circuit 2, and a semiconductor chip 5 formed above the indium column 3 and the filling glue 4;
[0037] (2) Decontamination, cleaning and drying of the components;
[0038] (3) The part of the component surface with the integrated circuit is protected by drop-coating photoresist 6, such as Figure 3 As shown;
[0039] (4) growing a mask on the surface of the component using chemical vapor deposition technology or liquid deposition technology, wherein the mask is one or more of SiO2, SiNx, SiNxOy, Al2O3, C, Ti, and Cr;
[0040] (5) Use acetone, methanol or isopropanol organic solvent to peel off the mask 7 on the circuit, so that the circuit is exposed as a photolithography alignment mark, such as Figure 4 As shown;
[0041] (6) Making a photomask for etching component patterns: Spin-coating photoresist 6, and transferring the pattern from the photomask to the photoresist through coating, pre-baking, exposure, and development operations. Figure 5 shown.
[0042] (7) Use a corresponding etching solution or a low-temperature dry etching process to etch the mask 7 to transfer the pattern from the photoresist to the mask, such as Figure 6 shown.
[0043] (8) Protect the circuit part by dripping photoresist, and use the photoresist to fix the baffle 8 on the surface of the component to protect the photoresist. Figure 7 shown.
[0044] (9) Use the corresponding low-temperature dry etching process to etch the component and transfer the pattern from the mask to the component.
[0045] (10) Use acetone, methanol or isopropanol organic solvent to remove the photoresist 6 on the surface of the circuit component, recover the baffle 8, clean it and dry it, such as Figure 8 shown.
[0046] In this embodiment, the etching material of the component in step (1) is indium phosphide.
[0047] Step (2) is as follows: first, clean the component with acetone, methanol or isopropanol solvent for 2 to 5 minutes, then rinse the component with deionized water, blow dry the residue on the surface of the component with nitrogen, and finally place the component on a 95°C hot plate for drying for 5 minutes.
[0048] The circuit protection using photoresist in step (3) and step (8) is to apply photoresist on the circuit part of the component, and then place the component on a 95° C. hot plate to dry the photoresist for 10 minutes.
[0049] The mask growth temperature in step (4) is 100°C.
[0050] The etching process in step (7) has a temperature not higher than 20°C.
[0051] The material of the baffle in step (8) is silicon carbide, quartz or glass.
[0052] The etching process in step (9) has a temperature not lower than 60°C and not higher than 100°C.
[0053] Step (10) is specifically as follows: first, clean the component with acetone, methanol or isopropanol solvent for 2 to 5 minutes, separate the baffle and the component, then rinse the component and the baffle with deionized water respectively, use nitrogen to blow dry the residue on the surface of the component and the baffle, and finally place the component and the baffle on a 95°C hot plate for drying for 5 minutes.
[0054] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.
Claims
1. A low temperature dry etching method for protecting a circuit, characterized in that: The steps include: (1) Select components; (2) Decontamination, cleaning and drying of the components; (3) Protect the surface of the component with integrated circuits by dripping photoresist; (4) growing a mask on the surface of the component using chemical vapor deposition technology or liquid deposition technology; (5) Peeling off the mask on the circuit to expose the circuit as a photolithography alignment mark; (6) Making a photomask for etching component patterns: Spin-coating photoresist, and transferring the pattern from the photomask to the photoresist through operations such as coating, pre-baking, exposure, and development. (7) Use corresponding corrosive solution or low-temperature dry etching process to etch the mask to transfer the pattern from the photoresist to the mask. (8) Protect the circuit part by dripping photoresist, and use the photoresist to fix the baffle on the surface of the component to protect the photoresist. (9) Use the corresponding low-temperature dry etching process to etch the component and transfer the pattern from the mask to the component. (10) Use acetone, methanol or isopropanol organic solvent to remove the photoresist on the surface of the circuit component, recover the baffle, decontaminate, clean and dry.
2. The low temperature dry etching method for a protection circuit according to claim 1, characterized in that: In step (2), the component is first cleaned with acetone, methanol or isopropanol solvent for 2 to 5 minutes, then the component is rinsed with deionized water, the residue on the surface of the component is blown dry with nitrogen, and finally the component is placed on a 95°C hot plate for drying for 5 minutes.
3. The low temperature dry etching method for a protection circuit according to claim 2, characterized in that: In step (3) and step (8), the circuit is protected by using photoresist by applying photoresist on the circuit part of the component, and then placing the component on a 95° C. hot plate to dry the photoresist for 10 minutes.
4. The low temperature dry etching method for a protection circuit as claimed in claim 3, characterized in that: In step (4), the mask is one or more of SiO2, SiNx, SiNxOy, Al2O3, C, Ti, and Cr.
5. The low temperature dry etching method for a protection circuit as claimed in claim 4, characterized in that: In step (4), the mask growth temperature is 100°C.
6. The low temperature dry etching method for a protection circuit as claimed in claim 5, characterized in that: In step (5), an organic solvent such as acetone, methanol or isopropanol is used to strip the mask on the circuit.
7. The low temperature dry etching method for a protection circuit according to claim 6, characterized in that: In step (7), the temperature of the etching process is no higher than 20°C.
8. The low temperature dry etching method for a protection circuit according to claim 7, characterized in that: In step (8), the material of the baffle is silicon carbide, quartz or glass.
9. The low temperature dry etching method for a protection circuit according to claim 8, characterized in that: In step (9), the temperature of the etching process is not lower than 60°C and not higher than 100°C.
10. The low temperature dry etching method for a protection circuit according to claim 9, characterized in that: In step (10), firstly, the component is cleaned with acetone, methanol or isopropanol solvent for 2 to 5 minutes, the baffle and the component are separated, and then the component and the baffle are rinsed with deionized water respectively, and the residue on the surface of the component and the baffle is blown dry with nitrogen, and finally the component and the baffle are placed on a 95°C hot plate for drying for 5 minutes.