Tracker circuit and tracking method

Abstract

A tracker circuit (1A) is provided with: an output switching circuit (30) configured so as to selectively output at least one of a plurality of discrete voltages to a power amplifier (2A); a voltage supply path (P41) that connects the output switching circuit (30) and the power amplifier (2A); and a filter circuit (40A) connected to the voltage supply path (P41), the power amplifier (2A) being configured so as to amplify a high-frequency signal (RFA) of a frequency band A to which TDD is applied, and the filter circuit (40A) being not connected in series with the voltage supply path (P41) but connected in a shunt.

Description

Technical Field

[0001] The present invention relates to a tracker circuit and a tracking method. Background Art

[0002] In recent years, the power added efficiency (PAE) has been improved by applying the envelope tracking (ET) mode to the power amplifier. Patent document 1 discloses a technology related to the digital ET mode for supplying multiple discrete voltages. In addition, Patent document 2 discloses a technology related to the symbol power tracking (SPT) mode for supplying multiple discrete voltages.

[0003] Patent Document 1: U.S. Patent No. 8829993

[0004] Patent Document 2: U.S. Patent No. 10686407

[0005] However, in the above-mentioned conventional technology, distortion of high-frequency signals may increase in the power amplifier. Summary of the invention

[0006] Therefore, the present invention provides a tracker circuit and a tracking method capable of suppressing distortion of a high-frequency signal amplified using a plurality of discrete voltages.

[0007] A tracker circuit of one embodiment of the present invention comprises: an output switch circuit, configured to selectively output at least one discrete voltage among a plurality of discrete voltages to a first power amplifier; a first voltage supply path, connecting the output switch circuit and the first power amplifier; and a filter circuit, connected to the first voltage supply path, wherein the first power amplifier is configured to amplify a first high-frequency signal of a first frequency band applying time division duplexing, and the filter circuit is not connected in series with the first voltage supply path but is connected in a branch manner.

[0008] A tracker circuit of one embodiment of the present invention comprises: a first external connection terminal connected to a first power amplifier, wherein the first power amplifier is configured to amplify a first high-frequency signal of a first frequency band applying time division duplexing; an output switching circuit configured to selectively output at least one discrete voltage among a plurality of discrete voltages to the first external connection terminal; a first voltage supply path directly connecting the output switching circuit to the first external connection terminal; and a filter circuit connected between the first voltage supply path and ground.

[0009] A tracking method in one embodiment of the present invention does not connect a filter circuit to a voltage supply path when the channel bandwidth of a high-frequency signal in a frequency band applying time division duplexing amplified by a power amplifier is greater than a threshold width, and connects the filter circuit to the voltage supply path when the channel bandwidth is less than the threshold width, and selectively supplies at least one discrete voltage among a plurality of discrete voltages to the power amplifier via the voltage supply path.

[0010] According to the tracker circuit and the like of one embodiment of the present invention, it is possible to suppress distortion of a high-frequency signal amplified using a plurality of discrete voltages. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1A This is a graph showing an example of transition of the power supply voltage in the average power tracking (APT: Average Power Tracking) mode.

[0012] Figure 1B This is a graph showing an example of the transition of the power supply voltage in the simulated ET mode.

[0013] Figure 1C This is a graph showing an example of transition of the power supply voltage in the digital ET mode.

[0014] Figure 2 This is a circuit configuration diagram of a communication device according to Embodiment 1.

[0015] Figure 3 This is a circuit configuration diagram of a pre-regulator circuit, a switched capacitor circuit, an output switch circuit, and a filter circuit according to the first embodiment.

[0016] Figure 4 This is a circuit configuration diagram of a digital control circuit according to the first embodiment.

[0017] Figure 5 This is a flowchart showing the tracking method of implementation mode 1.

[0018] Figure 6 This is a top view of the tracker module according to Embodiment 1.

[0019] Figure 7 This is a top view of the tracker module according to Embodiment 1.

[0020] Figure 8 This is a cross-sectional view of the tracker module according to Embodiment 1.

[0021] Fig. 9 This is a circuit configuration diagram of a communication device according to the second embodiment.

[0022] Fig.10 This is a circuit configuration diagram of a filter circuit according to the second embodiment.

[0023] Fig.11 This is a circuit configuration diagram of a filter circuit according to a variation of the second embodiment.

[0024] Fig.12 This is a circuit configuration diagram of a communication device according to the third embodiment.

[0025] Fig.13 This is a circuit configuration diagram of a filter circuit according to the third embodiment.

[0026] Fig.14 It is a circuit configuration diagram of a filter circuit according to another embodiment. DETAILED DESCRIPTION

[0027] (Process of realizing the present invention)

[0028] When a plurality of discrete voltages are supplied to a power amplifier, noise increases due to discrete changes in voltage levels. In particular, when a digital ET mode in which discrete changes in voltage levels are rapid is used, the increase in noise becomes significant.

[0029] Generally speaking, when the high-frequency signal amplified by the power amplifier is a transmission signal of the frequency division duplex (FDD) band, in order to prevent the intermodulation distortion (IMD) between the noise and the transmission signal (for example, the distortion component generated in the frequency after adding the frequency of the noise to the frequency of the transmission signal) from interfering with the reception signal, a filter for attenuating the noise of the differential frequency between the transmission channel frequency and the reception channel frequency is inserted in the voltage supply path. On the other hand, when the high-frequency signal amplified by the power amplifier is a transmission signal of the time division duplex (TDD) band, IMD will not interfere with the reception signal because the transmission and reception are switched in time. Therefore, when amplifying the transmission signal of the TDD band, it is also possible not to insert a filter in the voltage supply path.

[0030] However, the inventors have found the following problem: even in the TDD band, when the power supply voltage noise is large, spurious emission increases due to IMD and the adjacent channel leakage power ratio (ACPR / ACLR) deteriorates.

[0031] Therefore, the tracker circuit and tracking method that can suppress the distortion of high-frequency signals when multiple discrete voltages are supplied to a power amplifier configured to amplify a transmission signal in a TDD frequency band are described in detail below based on the embodiments. In addition, the embodiments described below all represent general or specific examples. The numerical values, shapes, materials, components, configurations of components, and connection methods shown in the following embodiments are examples and do not limit the meaning of the present invention.

[0032] In addition, each figure is a schematic diagram that appropriately emphasizes, omits, or adjusts the ratio in order to illustrate the present invention, and is not necessarily strictly illustrated, and may differ from the actual shape, positional relationship, and ratio. In each figure, the same reference numerals are used for substantially the same structure, and repeated descriptions are omitted or simplified.

[0033] In the following figures, the x-axis and the y-axis are axes that are orthogonal to each other on a plane parallel to the main surface of the module substrate. Specifically, when the module substrate has a rectangular shape in a plan view, the x-axis is parallel to the first side of the module substrate, and the y-axis is parallel to the second side of the module substrate, wherein the second side is orthogonal to the first side. In addition, the z-axis is an axis perpendicular to the main surface of the module substrate, and its positive direction indicates the upper side, and its negative direction indicates the lower side.

[0034] In the circuit structure of the present invention, the so-called "connection" includes not only the case of direct connection through connecting terminals and / or wiring conductors, but also the case of electrical connection through other circuit elements. The so-called "direct connection" refers to direct connection through connecting terminals and / or wiring conductors without passing through other circuit elements. The so-called "connection between A and B" refers to connection between A and B and both A and B, and refers to a path connected in series between A and B. The so-called "path between A and B" refers to a path composed of conductors that electrically connect A and B. The so-called "connection in series with the path" refers to connection in series on the path, and refers to connection between one end of the path and the other end of the path. The so-called "connection in a shunt with the path" refers to connection between the path and ground.

[0035] In the component configuration of the present invention, the so-called "components are configured on the substrate" includes components configured on the main surface of the substrate and components configured inside the substrate. The so-called "components are configured on the main surface of the substrate" includes not only the case where the components are configured in contact with the main surface of the substrate, but also the case where the components are not in contact with the main surface but are configured above the main surface (for example, the components are stacked on other components configured in contact with the main surface). In addition, "components are configured on the main surface of the substrate" may also include components configured in recesses formed on the main surface. The so-called "components are configured inside the substrate" includes not only the case where the components are encapsulated in the module substrate, but also the case where although all components are configured between the two main surfaces of the substrate, part of the components are not covered by the substrate, and only part of the components are configured inside the substrate.

[0036] In addition, in the component arrangement of the present invention, the so-called "a top view of the module substrate" means observing the object by orthogonally projecting it onto the xy plane from the positive side of the z-axis. The so-called "A overlaps with B when viewed from above" means that at least a part of the area of ​​A orthogonally projected onto the xy plane overlaps with at least a part of the area of ​​B orthogonally projected onto the xy plane. In addition, the so-called "A is arranged between B and C" means that at least one of the multiple line segments connecting an arbitrary point in B and an arbitrary point in C passes through A.

[0037] In addition, in the component configuration of the present invention, the so-called "A and B are adjacently configured" means that A and B are close to each other, specifically, it means that there are no other circuit components in the space opposite to A and B. In other words, the so-called "A and B are adjacently configured" means that any of the multiple line segments from any point on the surface of A opposite to B along the normal direction of the surface to B does not pass through circuit components other than A and B. Here, the so-called circuit components refer to components including active components and / or passive components. In other words, the circuit components include active components including transistors or diodes and passive components including inductors, transformers, capacitors or resistors, but do not include electromechanical components including terminals, connectors or wiring.

[0038] In the present invention, the so-called "terminal" refers to the point where the conductor in the element ends. In addition, when the impedance of the conductor between the elements is sufficiently low, the terminal can be interpreted not only as a single point, but also as an arbitrary point on the conductor between the elements or the conductor as a whole.

[0039] In addition, terms such as “parallel” and “perpendicular” indicating the relationship between elements, terms such as “rectangular” indicating the shape of elements, and numerical ranges do not have strict meanings but also include substantially equivalent ranges, such as errors of several %.

[0040] First, as a technique for efficiently amplifying high-frequency signals, a tracking mode for supplying a power amplifier with a power supply voltage that is dynamically adjusted over time based on the high-frequency signal will be described. The so-called tracking mode refers to a mode for dynamically adjusting the power supply voltage applied to the power amplifier circuit. There are several types of tracking modes, but here, reference is made to the following. Figure 1A to Figure 1C The APT mode and ET mode (including analog ET mode and digital ET mode) are explained. Figure 1A to Figure 1C In FIG. 1 , the horizontal axis represents time and the vertical axis represents voltage. In addition, the thick solid line represents the power supply voltage and the thin solid line (waveform) represents the modulation signal.

[0041] Figure 1A : is a graph showing an example of the transition of the power supply voltage in the APT mode. In the APT mode, the power supply voltage is changed to a plurality of discrete voltage levels in units of one frame based on the average power.

[0042] The so-called frame refers to the unit that constitutes the high-frequency signal (modulation signal). For example, in 5GNR (5th Generation New Radio) and LTE (Long Term Evolution), a frame contains ten subframes, each subframe contains multiple time slots, and each time slot consists of multiple symbols. The subframe length is 1ms and the frame length is 10ms.

[0043] In addition, a mode in which the voltage level is varied in units of one frame or larger than one frame based on average power is called an APT mode, and is distinguished from a mode in which the voltage level is varied in units smaller than one frame (e.g., a subframe, a time slot, or a symbol). For example, a mode in which the voltage level is varied in units of a symbol is called a symbol power tracking (SPT: Symbol Power Tracking) mode, and is distinguished from the APT mode.

[0044] Figure 1B 2 is a graph showing an example of the transition of the power supply voltage in the analog ET mode. In the analog ET mode, the power supply voltage is continuously varied based on the envelope signal to track the envelope of the modulation signal.

[0045] The so-called envelope signal is a signal representing the envelope of the modulation signal. The envelope value is expressed, for example, by (I 2 +Q 2 ). Here, (I, Q) represents a constellation point. A constellation point is a point on a constellation diagram that represents a signal modulated by digital modulation. For example, (I, Q) is determined based on the transmission information, such as by a BBIC (Baseband Integrated Circuit).

[0046] Figure 1C : is a graph showing an example of the transition of the power supply voltage in the digital ET mode. In the digital ET mode, the power supply voltage is varied to a plurality of discrete voltage levels within one frame based on the envelope signal to track the envelope of the modulation signal.

[0047] (Implementation Method 1)

[0048] The following describes the first embodiment. The communication device 7A of this embodiment is equivalent to a user terminal (UE: User Equipment) in a cellular network, typically a mobile phone, a smart phone, a tablet computer, a wearable device, etc. In addition, the communication device 7A may also be an IoT (Internet of Things) sensor device, a medical / health care device, a car, an unmanned aerial vehicle (UAV: Unmanned Aerial Vehicle) (so-called drone), an unmanned guided vehicle (AGV: Automated Guided Vehicle). In addition, the communication device 7A may also function as a BS (Base Station: Base Station) in a cellular network.

[0049] Reference Figure 2 The circuit configurations of the communication device 7A and the tracker circuit 1A according to the present embodiment will be described. Figure 2 It is a circuit configuration diagram of the communication device 7A according to the present embodiment.

[0050] also, Figure 2 The circuit structures are exemplary, and the communication device 7A and the tracker circuit 1A may be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 7A and the tracker circuit 1A provided below should not be interpreted in a limiting sense.

[0051] [1.1 Circuit Configuration of Communication Device 7A]

[0052] First, refer to Figure 2 A communication device 7A according to the present embodiment will be described. The communication device 7A includes a tracker circuit 1A, a power amplifier 2A, a filter 3A, a switch 4A, a RFIC (Radio Frequency Integrated Circuit) 5, and an antenna 6A.

[0053] The tracker circuit 1A can supply a plurality of discrete voltages V based on the tracking mode to the power amplifier 2A. T1 As the tracking mode, a digital ET mode or an SPT mode can be used, but the present invention is not limited thereto.

[0054] like Figure 2As shown, the tracker circuit 1A includes a pre-regulator circuit 10 , a switched capacitor circuit 20 , an output switch circuit 30 , a filter circuit 40A, a DC power supply 50 , a digital control circuit 60 , and an external connection terminal 141 .

[0055] The external connection terminal 141 is an example of a first external connection terminal, and is connected to the power amplifier 2A outside the tracker circuit 1A, and is connected to the output switch circuit 30 via the voltage supply path P41 inside the tracker circuit 1A.

[0056] The voltage supply path P41 is an example of a first voltage supply path, and is a part of a path connecting the output switch circuit 30 and the power amplifier 2A. Here, the voltage supply path P41 is a path directly connecting the output switch circuit 30 and the external connection terminal 141. That is, no circuit elements (active elements and passive elements) are connected in series on the voltage supply path P41.

[0057] The pre-regulator circuit 10 includes a power inductor and a switch. The so-called power inductor is an inductor used for stepping up and / or stepping down a direct current (DC) voltage. The power inductor is connected in series to the DC path. In addition, the power inductor can also be connected (configured in parallel) between the DC path and the ground. The pre-regulator circuit 10 is capable of converting an input voltage into a first voltage using a power inductor. Such a pre-regulator circuit 10 is also called a magnetic regulator or a DC / DC converter.

[0058] The switched capacitor circuit 20 includes a plurality of capacitors and a plurality of switches, and can generate a plurality of second voltages as a plurality of discrete voltages according to the first voltage from the pre-regulator circuit 10, wherein the plurality of second voltages respectively have a plurality of discrete voltage levels. The switched capacitor circuit 20 is also referred to as a switched-capacitor voltage ladder circuit.

[0059] The output switch circuit 30 is configured to modulate the power supply voltage by selecting at least one voltage from a plurality of second voltages generated in the switch capacitor circuit 20 and outputting it to the power amplifier 2A. At this time, the voltage is supplied to the power amplifier 2A via the voltage supply path P41. The output switch circuit 30 is controlled based on the digital control signal. In addition, the output switch circuit 30 is also called a supply modulator circuit.

[0060] The filter circuit 40A is a pulse shaping network, is configured to be connectable to the voltage supply path P41 in a branch manner, and can attenuate noise components from a signal (a plurality of discrete voltages) transmitted in the voltage supply path P41.

[0061] The DC power source 50 can supply a DC voltage to the pre-regulator circuit 10. As the DC power source 50, for example, a rechargeable battery can be used, but the present invention is not limited thereto.

[0062] The digital control circuit 60 can control the pre-regulator circuit 10 , the switched capacitor circuit 20 , the output switch circuit 30 , and the filter circuit 40A based on the digital control signal from the RFIC 5 .

[0063] In addition, the tracker circuit 1A may not include at least one of the pre-regulator circuit 10, the switched capacitor circuit 20, the output switch circuit 30, the filter circuit 40A, the DC power supply 50, and the digital control circuit 60. For example, the tracker circuit 1A may not include the DC power supply 50. In addition, any combination of the pre-regulator circuit 10, the switched capacitor circuit 20, the output switch circuit 30, and the filter circuit 40A may be integrated into a single circuit. In addition, the tracker circuit 1A may include a plurality of voltage supply circuits instead of the pre-regulator circuit 10 and the switched capacitor circuit 20 as described in Patent Document 2. In this case, the output switch circuit 30 may also be configured to select at least one of the plurality of voltage supply circuits.

[0064] The power amplifier 2A is an example of a first power amplifier, and is connected between the RFIC 5 and the filter 3A. The power amplifier 2A is connected to the tracker circuit 1A. The power amplifier 2A can use a plurality of discrete voltages V received from the tracker circuit 1A. T1 , for the high frequency signal RF of band A received from RFIC5 A (An example of a first high frequency signal) amplified.

[0065] The filter 3A is connected between the power amplifier 2A and the antenna 6A. The filter 3A is a bandpass filter having a passband including the frequency band A.

[0066] Band A is a frequency band used for communication systems built using radio access technology (RAT), and is predefined by standardization organizations such as 3GPP (registered trademark) (3rd Generation Partnership Project) and IEEE (Institute of Electrical and Electronics Engineers). Examples of communication systems include 5GNR (5th Generation New Radio) systems, LTE (Long Term Evolution) systems, and WLAN (Wireless Local Area Network) systems.

[0067] Band A is an example of a first band and is a band to which TDD is applied (ie, a TDD band). In this embodiment, band A is included in the ultra-high frequency group (3300 to 5000 MHz). Band A is not limited to bands included in the ultra-high frequency group.

[0068] The switch 4A includes a terminal connected to the filter 3A, a terminal connected to the output of the power amplifier 2A, and a terminal connected to the input of a low noise amplifier (not shown). The switch 4A can switch the connection of the filter 3A between the power amplifier 2A and the low noise amplifier.

[0069] RFIC5 is an example of a signal processing circuit that processes a high-frequency signal. Specifically, RFIC5 performs signal processing on an input transmission signal by up-conversion, etc., and supplies the high-frequency transmission signal generated by the signal processing to the power amplifier 2A. In addition, RFIC5 has a control unit that controls the tracker circuit 1A. In addition, part or all of the functions of the control unit of RFIC5 can also be installed outside RFIC5.

[0070] The antenna 6A outputs a transmission signal of the frequency band A input from the power amplifier 2A via the filter 3A. The antenna 6A may not be included in the communication device 7A.

[0071] also, Figure 2 The circuit configuration of the communication device 7A shown is an example and is not limited thereto. For example, the communication device 7A may also include a circuit that uses a higher frequency signal RF A Baseband signal processing circuit that processes signals in the low intermediate frequency band.

[0072] [1.2 Circuit structure of tracker circuit 1A]

[0073] Next, refer to Figure 3 and Figure 4 The circuit configurations of the pre-regulator circuit 10 , the switched capacitor circuit 20 , the output switch circuit 30 , the filter circuit 40A, and the digital control circuit 60 included in the tracker circuit 1A will be described. Figure 3 1 is a circuit configuration diagram of the pre-regulator circuit 10 , the switched capacitor circuit 20 , the output switch circuit 30 , and the filter circuit 40A according to the present embodiment. Figure 4 2 is a circuit configuration diagram of the digital control circuit 60 according to the present embodiment.

[0074] also, Figure 3 and Figure 4 The circuit configuration is exemplary, and the pre-regulator circuit 10, the switched capacitor circuit 20, the output switch circuit 30, the filter circuit 40A, and the digital control circuit 60 may be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of each circuit provided below should not be interpreted in a limiting sense.

[0075] [1.2.1 Circuit Structure of Switched Capacitor Circuit 20]

[0076] First, the circuit structure of the switched capacitor circuit 20 is described. Figure 3 As shown, the switched capacitor circuit 20 includes capacitors C11 to C16, capacitors C10, C20, C30 and C40, switches S11 to S14, S21 to S24, S31 to S34 and S41 to S44. Energy and charge are input from the pre-regulator circuit 10 to the switched capacitor circuit 20 at nodes N1 to N4, and are led out from the switched capacitor circuit 20 to the output switch circuit 30 at nodes N1 to N4.

[0077] The capacitors C11 to C16 function as flying capacitors (also called cross-circuit capacitors). That is, the capacitors C11 to C16 are used to step up or step down the first voltage supplied from the pre-regulator circuit 10. More specifically, the capacitors C11 to C16 move charges between the capacitors C11 to C16 and the nodes N1 to N4 so as to maintain voltages V1 to V4 (voltages relative to the ground potential) satisfying V1:V2:V3:V4=1:2:3:4 at the four nodes N1 to N4. The voltages V1 to V4 correspond to a plurality of second voltages each having a plurality of discrete voltage levels.

[0078] The capacitor C11 has two electrodes. One of the two electrodes of the capacitor C11 is connected to one end of the switch S11 and one end of the switch S12. The other of the two electrodes of the capacitor C11 is connected to one end of the switch S21 and one end of the switch S22.

[0079] The capacitor C12 has two electrodes. One of the two electrodes of the capacitor C12 is connected to one end of the switch S21 and one end of the switch S22. The other of the two electrodes of the capacitor C12 is connected to one end of the switch S31 and one end of the switch S32.

[0080] The capacitor C13 has two electrodes. One of the two electrodes of the capacitor C13 is connected to one end of the switch S31 and one end of the switch S32. The other of the two electrodes of the capacitor C13 is connected to one end of the switch S41 and one end of the switch S42.

[0081] The capacitor C14 has two electrodes. One of the two electrodes of the capacitor C14 is connected to one end of the switch S13 and one end of the switch S14. The other of the two electrodes of the capacitor C14 is connected to one end of the switch S23 and one end of the switch S24.

[0082] The capacitor C15 has two electrodes. One of the two electrodes of the capacitor C15 is connected to one end of the switch S23 and one end of the switch S24. The other of the two electrodes of the capacitor C15 is connected to one end of the switch S33 and one end of the switch S34.

[0083] The capacitor C16 has two electrodes. One of the two electrodes of the capacitor C16 is connected to one end of the switch S33 and one end of the switch S34. The other of the two electrodes of the capacitor C16 is connected to one end of the switch S43 and one end of the switch S44.

[0084] The group of capacitors C11 and C14 , the group of capacitors C12 and C15 , and the group of capacitors C13 and C16 can be complementarily charged and discharged by repeating the first phase and the second phase, respectively.

[0085] Specifically, in the first stage, switches S12, S13, S22, S23, S32, S33, S42, and S43 are turned on. Thus, for example, one of the two electrodes of capacitor C12 is connected to node N3, the other of the two electrodes of capacitor C12 and one of the two electrodes of capacitor C15 are connected to node N2, and the other of the two electrodes of capacitor C15 is connected to node N1.

[0086] On the other hand, in the second phase, switches S11, S14, S21, S24, S31, S34, S41, and S44 are turned on. Thus, for example, one of the two electrodes of capacitor C15 is connected to node N3, the other of the two electrodes of capacitor C15 and one of the two electrodes of capacitor C12 are connected to node N2, and the other of the two electrodes of capacitor C12 is connected to node N1.

[0087] By repeating the first and second stages, for example, when one of capacitor C12 and capacitor C15 is charged from node N2, the other of capacitor C12 and capacitor C15 can discharge capacitor C30. That is, capacitor C12 and capacitor C15 can be charged and discharged complementarily.

[0088] The group of capacitors C11 and C14 and the group of capacitors C13 and C16 can also be charged and discharged complementarily in the same manner as the group of capacitors C12 and C15 by repeating the first stage and the second stage.

[0089] The capacitors C10 , C20 , C30 , and C40 function as smoothing capacitors, respectively. That is, the capacitors C10 , C20 , C30 , and C40 are used to hold and smooth the voltages V1 to V4 at the nodes N1 to N4 , respectively.

[0090] The capacitor C10 is connected between the node N1 and the ground. Specifically, one of the two electrodes of the capacitor C10 is connected to the node N1. On the other hand, the other of the two electrodes of the capacitor C10 is connected to the ground.

[0091] The capacitor C20 is connected between the node N2 and the node N1. Specifically, one of the two electrodes of the capacitor C20 is connected to the node N2. On the other hand, the other of the two electrodes of the capacitor C20 is connected to the node N1.

[0092] The capacitor C30 is connected between the node N3 and the node N2. Specifically, one of the two electrodes of the capacitor C30 is connected to the node N3. On the other hand, the other of the two electrodes of the capacitor C30 is connected to the node N2.

[0093] The capacitor C40 is connected between the node N4 and the node N3. Specifically, one of the two electrodes of the capacitor C40 is connected to the node N4. On the other hand, the other of the two electrodes of the capacitor C40 is connected to the node N3.

[0094] The switch S11 is connected between one of the two electrodes of the capacitor C11 and the node N3. Specifically, one end of the switch S11 is connected to one of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S11 is connected to the node N3.

[0095] The switch S12 is connected between one of the two electrodes of the capacitor C11 and the node N4. Specifically, one end of the switch S12 is connected to one of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S12 is connected to the node N4.

[0096] The switch S21 is connected between one of the two electrodes of the capacitor C12 and the node N2. Specifically, one end of the switch S21 is connected to one of the two electrodes of the capacitor C12 and the other of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S21 is connected to the node N2.

[0097] The switch S22 is connected between one of the two electrodes of the capacitor C12 and the node N3. Specifically, one end of the switch S22 is connected to one of the two electrodes of the capacitor C12 and the other of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S22 is connected to the node N3.

[0098] The switch S31 is connected between the other electrode of the capacitor C12 and the node N1. Specifically, one end of the switch S31 is connected to the other electrode of the capacitor C12 and one electrode of the capacitor C13. On the other hand, the other end of the switch S31 is connected to the node N1.

[0099] The switch S32 is connected between the other electrode of the two electrodes of the capacitor C12 and the node N2. Specifically, one end of the switch S32 is connected to the other electrode of the two electrodes of the capacitor C12 and one electrode of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S32 is connected to the node N2. That is, the other end of the switch S32 is connected to the other end of the switch S21.

[0100] The switch S41 is connected between the other electrode of the two electrodes of the capacitor C13 and the ground. Specifically, one end of the switch S41 is connected to the other electrode of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S41 is connected to the ground.

[0101] The switch S42 is connected between the other electrode of the two electrodes of the capacitor C13 and the node N1. Specifically, one end of the switch S42 is connected to the other electrode of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S42 is connected to the node N1. That is, the other end of the switch S42 is connected to the other end of the switch S31.

[0102] The switch S13 is connected between one of the two electrodes of the capacitor C14 and the node N3. Specifically, one end of the switch S13 is connected to one of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S13 is connected to the node N3. That is, the other end of the switch S13 is connected to the other end of the switch S11 and the other end of the switch S22.

[0103] The switch S14 is connected between one of the two electrodes of the capacitor C14 and the node N4. Specifically, one end of the switch S14 is connected to one of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S14 is connected to the node N4. That is, the other end of the switch S14 is connected to the other end of the switch S12.

[0104] The switch S23 is connected between one of the two electrodes of the capacitor C15 and the node N2. Specifically, one end of the switch S23 is connected to one of the two electrodes of the capacitor C15 and the other of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S23 is connected to the node N2. That is, the other end of the switch S23 is connected to the other end of the switch S21 and the other end of the switch S32.

[0105] The switch S24 is connected between one of the two electrodes of the capacitor C15 and the node N3. Specifically, one end of the switch S24 is connected to one of the two electrodes of the capacitor C15 and the other of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S24 is connected to the node N3. That is, the other end of the switch S24 is connected to the other end of the switch S11, the other end of the switch S22, and the other end of the switch S13.

[0106] The switch S33 is connected between the other electrode of the two electrodes of the capacitor C15 and the node N1. Specifically, one end of the switch S33 is connected to the other electrode of the two electrodes of the capacitor C15 and one electrode of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S33 is connected to the node N1. That is, the other end of the switch S33 is connected to the other end of the switch S31 and the other end of the switch S42.

[0107] The switch S34 is connected between the other electrode of the two electrodes of the capacitor C15 and the node N2. Specifically, one end of the switch S34 is connected to the other electrode of the two electrodes of the capacitor C15 and one electrode of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S34 is connected to the node N2. That is, the other end of the switch S34 is connected to the other end of the switch S21, the other end of the switch S32, and the other end of the switch S23.

[0108] The switch S43 is connected between the other electrode of the two electrodes of the capacitor C16 and the ground. Specifically, one end of the switch S43 is connected to the other electrode of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S43 is connected to the ground.

[0109] The switch S44 is connected between the other electrode of the two electrodes of the capacitor C16 and the node N1. Specifically, one end of the switch S44 is connected to the other electrode of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S44 is connected to the node N1. That is, the other end of the switch S44 is connected to the other end of the switch S31, the other end of the switch S42, and the other end of the switch S33.

[0110] The first group of switches including switches S12, S13, S22, S23, S32, S33, S42 and S43 and the second group of switches including switches S11, S14, S21, S24, S31, S34, S41 and S44 are switched on and off complementarily based on the control signal S2. Specifically, in the first stage, the first group of switches are turned on and the second group of switches are turned off. Conversely, in the second stage, the first group of switches are turned off and the second group of switches are turned on.

[0111] For example, in one of the first stage and the second stage, the capacitors C11 to C13 are charged to the capacitors C10 to C40, and in the other of the first stage and the second stage, the capacitors C14 to C16 are charged to the capacitors C10 to C40. That is, the capacitors C11 to C13 or the capacitors C14 to C16 are always charged to the capacitors C10 to C40, so even if the current flows from the nodes N1 to N4 to the output switch circuit 30 at a high speed, the nodes N1 to N4 can be replenished with charges at a high speed, so the potential fluctuation of the nodes N1 to N4 can be suppressed.

[0112] By operating in this way, the switched capacitor circuit 20 can maintain approximately equal voltages at both ends of each of the capacitors C10, C20, C30, and C40. Specifically, at the four nodes labeled V1 to V4, voltages V1 to V4 (voltages relative to the ground potential) that satisfy V1:V2:V3:V4=1:2:3:4 are maintained. The voltage levels of the voltages V1 to V4 correspond to a plurality of discrete voltage levels that can be supplied to the output switch circuit 30 through the switched capacitor circuit 20.

[0113] In addition, the voltage ratio (V1:V2:V3:V4) is not limited to (1:2:3:4). For example, the voltage ratio (V1:V2:V3:V4) may be (1:2:4:8).

[0114] in addition, Figure 3 The structure of the switched capacitor circuit 20 shown is an example and is not limited thereto. Figure 3 In the embodiment, the switched capacitor circuit 20 is configured to supply voltages of four discrete voltage levels, but is not limited thereto. The switched capacitor circuit 20 may also be configured to supply voltages of any number of discrete voltage levels or more. For example, in the case of supplying voltages of two discrete voltage levels, the switched capacitor circuit 20 may include at least a capacitor C12, a capacitor C15, switches S21 to S24, and switches S31 to S34.

[0115] [1.2.2 Circuit Structure of Output Switch Circuit 30]

[0116] Next, the circuit structure of the output switch circuit 30 is described. The output switch circuit 30 is connected to the digital control circuit 60. Figure 3 As shown, the output switch circuit 30 includes input terminals 131 to 134 , switches S51 to S54 , and an output terminal 130 .

[0117] The output terminal 130 is connected to the external connection terminal 141. The output terminal 130 is a terminal for supplying a power supply voltage selected from the voltages V1 to V4 to the power amplifier 2A via the external connection terminal 141.

[0118] The input terminals 131 to 134 are respectively connected to the nodes N4 to N1 of the switched capacitor circuit 20. The input terminals 131 to 134 are terminals for receiving the voltages V4 to V1 from the switched capacitor circuit 20.

[0119] The switch S51 is connected between the input terminal 131 and the output terminal 130. Specifically, the switch S51 has a terminal connected to the input terminal 131 and a terminal connected to the output terminal 130. In this connection structure, the switch S51 can switch the connection and non-connection between the input terminal 131 and the output terminal 130 by switching on / off according to the control signal S3.

[0120] The switch S52 is connected between the input terminal 132 and the output terminal 130. Specifically, the switch S52 has a terminal connected to the input terminal 132 and a terminal connected to the output terminal 130. In this connection structure, the switch S52 can switch the connection and non-connection between the input terminal 132 and the output terminal 130 by switching on / off according to the control signal S3.

[0121] The switch S53 is connected between the input terminal 133 and the output terminal 130. Specifically, the switch S53 has a terminal connected to the input terminal 133 and a terminal connected to the output terminal 130. In this connection structure, the switch S53 can switch the connection and non-connection between the input terminal 133 and the output terminal 130 by switching on / off according to the control signal S3.

[0122] The switch S54 is connected between the input terminal 134 and the output terminal 130. Specifically, the switch S54 has a terminal connected to the input terminal 134 and a terminal connected to the output terminal 130. In this connection structure, the switch S54 can switch the connection and non-connection between the input terminal 134 and the output terminal 130 by switching on / off according to the control signal S3.

[0123] These switches S51 to S54 are controlled to be exclusively turned on. That is, only one of the switches S51 to S54 is turned on, and the rest of the switches S51 to S54 are turned off. Thus, the output switch circuit 30 can output one voltage selected from the voltages V1 to V4.

[0124] also, Figure 3 The structure of the output switch circuit 30 shown is an example and is not limited thereto. In particular, the switches S51 to S54 may have any structure as long as they can selectively connect at least one of the four input terminals 131 to 134 to the output terminal 130. For example, the output switch circuit 30 may further include a switch connected between the switches S51 to S53 and the switch S54 and the output terminal 130. For another example, the output switch circuit 30 may further include a switch connected between the switches S51 and S52 and the switches S53 and S54 and the output terminal 130.

[0125] Furthermore, when voltages of two discrete voltage levels are supplied from the switched capacitor circuit 20 , the output switch circuit 30 only needs to include at least two of the switches S51 to S54 .

[0126] [1.2.3 Circuit Structure of Pre-regulator Circuit 10]

[0127] First, the structure of the pre-regulator circuit 10 is described. Figure 3 As shown, the pre-regulator circuit 10 includes an input terminal 110, output terminals 111 to 114, inductor connection terminals 115 and 116, switches S61 to S63, S71 and S72, a power inductor L71, and capacitors C61 to C64.

[0128] The input terminal 110 is an input terminal for a DC voltage. In other words, the input terminal 110 is a terminal for receiving an input voltage from the DC power supply 50 .

[0129] The output terminal 111 is an output terminal of the voltage V4. That is, the output terminal 111 is a terminal for supplying the voltage V4 to the switched capacitor circuit 20. The output terminal 111 is connected to the node N4 of the switched capacitor circuit 20.

[0130] The output terminal 112 is an output terminal of the voltage V3. That is, the output terminal 112 is a terminal for supplying the voltage V3 to the switched capacitor circuit 20. The output terminal 112 is connected to the node N3 of the switched capacitor circuit 20.

[0131] The output terminal 113 is an output terminal of the voltage V2. That is, the output terminal 113 is a terminal for supplying the voltage V2 to the switched capacitor circuit 20. The output terminal 113 is connected to the node N2 of the switched capacitor circuit 20.

[0132] The output terminal 114 is an output terminal of the voltage V1. That is, the output terminal 114 is a terminal for supplying the voltage V1 to the switched capacitor circuit 20. The output terminal 114 is connected to the node N1 of the switched capacitor circuit 20.

[0133] The inductor connection terminal 115 is connected to one end of the power inductor L71 , and the inductor connection terminal 116 is connected to the other end of the power inductor L71 .

[0134] The switch S71 is connected between the input terminal 110 and one end of the power inductor L71. Specifically, the switch S71 has a terminal connected to the input terminal 110 and a terminal connected to one end of the power inductor L71 via the inductor connection terminal 115. In this connection structure, the switch S71 can switch the connection and non-connection between the input terminal 110 and one end of the power inductor L71 by switching on / off based on the control signal S1.

[0135] The switch S72 is connected between one end of the power inductor L71 and the ground. Specifically, the switch S72 has a terminal connected to one end of the power inductor L71 via the inductor connection terminal 115 and a terminal connected to the ground. In this connection structure, the switch S72 can switch the connection and non-connection between one end of the power inductor L71 and the ground by switching on / off based on the control signal S1.

[0136] The switch S61 is connected between the other end of the power inductor L71 and the output terminal 111. Specifically, the switch S61 has a terminal connected to the other end of the power inductor L71 via the inductor connection terminal 116 and a terminal connected to the output terminal 111. In this connection structure, the switch S61 can switch the connection and non-connection between the other end of the power inductor L71 and the output terminal 111 by switching on / off based on the control signal S1.

[0137] The switch S62 is connected between the other end of the power inductor L71 and the output terminal 112. Specifically, the switch S62 has a terminal connected to the other end of the power inductor L71 via the inductor connection terminal 116 and a terminal connected to the output terminal 112. In this connection structure, the switch S62 can switch the connection and non-connection between the other end of the power inductor L71 and the output terminal 112 by switching on / off based on the control signal S1.

[0138] The switch S63 is connected between the other end of the power inductor L71 and the output terminal 113. Specifically, the switch S63 has a terminal connected to the other end of the power inductor L71 via the inductor connection terminal 116 and a terminal connected to the output terminal 113. In this connection structure, the switch S63 can switch the connection and non-connection between the other end of the power inductor L71 and the output terminal 113 by switching on / off based on the control signal S1.

[0139] One of the two electrodes of the capacitor C61 is connected to the switch S61 and the output terminal 111. The other of the two electrodes of the capacitor C61 is connected to the switch S62, the output terminal 112, and one of the two electrodes of the capacitor C62.

[0140] One of the two electrodes of capacitor C62 is connected to switch S62, output terminal 112 and the other of the two electrodes of capacitor C61, and the other of the two electrodes of capacitor C62 is connected to a path connecting switch S63, output terminal 113 and one of the two electrodes of capacitor C63.

[0141] One of the two electrodes of capacitor C63 is connected to switch S63, output terminal 113, and the other of the two electrodes of capacitor C62. The other of the two electrodes of capacitor C63 is connected to output terminal 114 and one of the two electrodes of capacitor C64.

[0142] One of the two electrodes of the capacitor C64 is connected to the output terminal 114 and the other of the two electrodes of the capacitor C63. The other of the two electrodes of the capacitor C64 is connected to the ground.

[0143] The switches S61 to S63 are controlled to be exclusively turned on. That is, only one of the switches S61 to S63 is turned on, and the remaining switches of the switches S61 to S63 are turned off. By turning on only one of the switches S61 to S63, the pre-regulator circuit 10 can change the voltage supplied to the switched capacitor circuit 20 to the voltage level of the voltage V2 to V4.

[0144] The pre-regulator circuit 10 configured in this manner can supply electric charge to the switched capacitor circuit 20 via at least one of the output terminals 111 to 113 .

[0145] Furthermore, when the input voltage is converted into a first voltage, the pre-regulator circuit 10 only needs to include at least the switch S71 , the switch S72 , and the power inductor L71 .

[0146] [1.2.4 Circuit Structure of Filter Circuit 40A]

[0147] Next, the circuit structure of the filter circuit 40A is described. The filter circuit 40A is configured to be connectable to the voltage supply path P41, and can attenuate noise components from the signal (a plurality of discrete voltages) transmitted in the voltage supply path P41. The filter circuit 40A is sometimes called a pulse shaping circuit or a termination circuit.

[0148] like Figure 3 As shown, the filter circuit 40A is connected in shunt with the voltage supply path P41. That is, the filter circuit 40A is connected between the voltage supply path P41 and the ground. The filter circuit 40A includes an inductor L51, a capacitor C51 and a switch S55 connected in series.

[0149] The inductor L51 is an example of a first inductor, and is connected between the switch S55 and the capacitor C51. Specifically, one end of the inductor L51 is connected to the switch S55, and the other end of the inductor L51 is connected to the capacitor C51.

[0150] The capacitor C51 is an example of a first capacitor, and is connected between the inductor L51 and the ground. Specifically, one end of the capacitor C51 is connected to the inductor L51, and the other end of the capacitor C51 is connected to the ground.

[0151] The switch S55 is an example of a first switch, and is connected between the voltage supply path P41 and the inductor L51. Specifically, one end of the switch S55 is connected to the voltage supply path P41, and the other end of the switch S55 is connected to the inductor L51.

[0152] In the switch S55 connected in this way, on / off is switched based on the control signal S4. Specifically, on / off of the switch S55 is controlled as follows.

[0153] (1) In high frequency signal RF A When the channel bandwidth (that is, the modulation bandwidth) is greater than the threshold width, the switch S55 is turned off. As a result, the inductor L51 and the capacitor C51 are disconnected from the voltage supply path P41. At this time, a plurality of discrete voltages V are supplied to the power amplifier 2A via the external connection terminal 141. T1 However, the filter circuit 40A does not function as a band-stop filter (also called a notch filter) in the voltage supply path P41.

[0154] (2) In high frequency signal RF A When the channel bandwidth is less than the threshold width, the switch S55 is closed (On). As a result, the inductor L51 and the capacitor C51 are connected to the voltage supply path P41 in a shunt manner. At this time, a plurality of discrete voltages V are supplied to the power amplifier 2A via the external connection terminal 141. T1 , the filter circuit 40A functions as a band-stop filter in the voltage supply path P41.

[0155] As the threshold width (an example of the first threshold width) used for controlling the switch S55, a value (eg, 50 MHz, etc.) predetermined through experiments and / or experience can be used.

[0156] As the stop band of the filter circuit 40A, a frequency band depending on the threshold width is realized. For example, when 50 MHz is used as the threshold width and 1.5 is used as the specified coefficient, the stop band of the filter circuit 40A includes a frequency (75 MHz) obtained by multiplying the value of the threshold width (50 MHz) by the specified coefficient (1.5). Thus, the filter circuit 40A can reduce the noise component near 75 MHz in the voltage supply path P41. As a result, the high-frequency signal RF can be suppressed in the power amplifier 2A. AThe IMD between the signal and the noise (75 MHz component) can reduce the adjacent channel leakage power (ACP: Adjacent Channel leakage Power) in the power amplifier 2A. The threshold width and the predetermined coefficient are examples and are not limited to these values.

[0157] The stop band is defined as a frequency band having an insertion loss of 15 dB or more. Therefore, the stop band of the filter circuit 40A can be determined by measuring the power loss between the output end of the output switch circuit 30 and the external connection terminal 141 and detecting the frequency band where the measured loss is 15 dB or more.

[0158] also, Figure 3 The structure of the filter circuit 40A shown is an example and is not limited thereto. For example, the filter circuit 40A may not include the switch S55. For another example, the switch S55 may be connected between the capacitor C51 and the ground. In addition, the filter circuit 40A may also be partially or completely composed of parasitic reactance and / or parasitic resistance. The parasitic reactance, for example, includes the inductance and / or capacitance of the metal trace connecting the two nodes. In addition, the parasitic resistance, for example, includes the resistance of the metal trace connecting the two nodes.

[0159] [1.2.5 Circuit structure of digital control circuit 60]

[0160] Next, the circuit structure of the digital control circuit 60 is described. Figure 4 As shown, the digital control circuit 60 includes a first controller 61 , a second controller 62 , a capacitor C81 , a capacitor C82 , and control terminals 601 to 604 .

[0161] The first controller 61 is capable of processing the source synchronous digital control signal received from the RFIC5 via the control terminal 601 and the control terminal 602 to generate control signals S1, S2 and S4. The control signal S1 is a signal for controlling the on / off of switches S61 to S63, S71 and S72 included in the pre-regulator circuit 10. The control signal S2 is a signal for controlling the on / off of switches S11 to S14, S21 to S24, S31 to S34 and S41 to S44 included in the switch capacitor circuit 20. The control signal S4 is a signal for controlling the on / off of switch S55 included in the filter circuit 40A. In addition, a feedback signal for controlling the pre-regulator circuit 10 may also be input to the first controller 61.

[0162] In addition, the digital control signal processed in the first controller 61 is not limited to the source synchronous digital control signal. For example, the first controller 61 may also process the clock embedded digital control signal. In addition, the first controller 61 may also generate a control signal for controlling the output switch circuit 30.

[0163] In addition, although in the present embodiment, a set of a clock signal and a data signal is used as a digital control signal for the pre-regulator circuit 10, the switched capacitor circuit 20, and the filter circuit 40A, the present invention is not limited thereto. For example, a set of a clock signal and a data signal may be used alone as a digital control signal for the pre-regulator circuit 10, the switched capacitor circuit 20, and the filter circuit 40A.

[0164] The second controller 62 generates a control signal S3 by processing the digital control level (DCL) signals (DCL1, DCL2) received from the RFIC5 via the control terminal 603 and the control terminal 604. The DCL signals (DCL1, DCL2) are generated based on the envelope signal of the high-frequency signal, etc., by the RFIC5. The control signal S3 is a signal for controlling the on / off of the switches S51 to S54 included in the output switch circuit 30.

[0165] The DCL signals (DCL1, DCL2) are each a one-bit signal. Voltages V1 to V4 are each represented by a combination of two one-bit signals. For example, V1, V2, V3, and V4 are represented by "00", "01", "10", and "11", respectively. Gray code can also be used to express voltage levels.

[0166] The capacitor C81 is connected between the first controller 61 and the ground. For example, the capacitor C81 is connected between the power supply line for supplying power to the first controller 61 and the ground, and functions as a bypass capacitor. The capacitor C82 is connected between the second controller 62 and the ground. In addition, the capacitor C81 and the capacitor C82 may not be included in the digital control circuit 60.

[0167] In addition, although two digital control level signals are used for the control of the output switch circuit 30 in the present embodiment, the number of digital control level signals is not limited thereto. For example, one or more than three digital control level signals may be used according to the number of voltage levels selectable by each output switch circuit 30. In addition, the digital control signal used for the control of the output switch circuit 30 is not limited to the digital control level signal.

[0168] [1.3 Tracking method]

[0169] Next, refer to Figure 5 A method of supplying a plurality of discrete voltages, that is, a tracking method, of the tracker circuit 1A configured as described above will be described. Figure 5 This is a flowchart showing the tracking method according to the present embodiment.

[0170] For example, through RFIC5, the high-frequency signal RF A The channel bandwidth of the high frequency signal RF is less than the threshold width (S101). A When the channel bandwidth is less than the threshold width (S101: Yes), the digital control circuit 60 receives the digital control signal indicating the closing of the switch S55, and sends the control signal S4 for closing the switch S55 to the filter circuit 40A. The switch S55 is closed based on the control signal S4, and the filter circuit 40A is connected to the voltage supply path P41 (S103).

[0171] On the other hand, when the high frequency signal RF is determined A When the channel bandwidth is greater than the threshold width (S101: No), the digital control circuit 60 receives the digital control signal indicating to turn off the switch S55, and sends the control signal S4 for turning off the switch S55 to the filter circuit 40A. The switch S55 is turned off based on the control signal S4, and the filter circuit 40A is disconnected from the voltage supply path P41 (S105).

[0172] With the filter circuit 40A controlled in this manner, the output switch circuit 30 selectively outputs at least one of the plurality of discrete voltages to the external connection terminal 141 based on the control signal S3 ( S107 ). As a result, at least one of the plurality of discrete voltages is selectively supplied to the power amplifier 2A.

[0173] [1.4 Example of installation of tracker circuit 1A]

[0174] Next, as an example of implementation of the tracker circuit 1A configured as above, refer to Figure 6 to Figure 8 The tracker module 100 will be described. In this implementation example, the power inductor L71 included in the pre-regulator circuit 10 is not disposed on the module substrate 90 , but the present invention is not limited thereto. That is, the power inductor L71 may be disposed on the module substrate 90 .

[0175] Figure 6 1 is a top view of tracker module 100 according to the present embodiment. Figure 7 1 is a plan view of the tracker module 100 according to the present embodiment, and is a view showing the main surface 90 b side of the module substrate 90 as viewed from the positive side along the z-axis. Figure 8 2 is a cross-sectional view of tracker module 100 according to the present embodiment. Figure 8The cross sections of the tracker module 100 are Figure 6 and Figure 7 Section on line VIII-VIII.

[0176] In addition, Figure 6 to Figure 8 In FIG. 9 , a portion of wiring connecting a plurality of circuit components disposed on the module substrate 90 is omitted. Figure 6 and Figure 7 In FIG. 1 , the resin member 91 covering the plurality of circuit components and the surface shielding electrode layer 92 covering the resin member 91 are omitted. Figure 6 In FIG. 1 , shaded blocks represent arbitrary circuit components that are not essential to the present invention.

[0177] The tracker module 100 includes Figure 3 and Figure 4 In addition to the multiple circuit components of active elements and passive elements included in the pre-regulator circuit 10, switch capacitor circuit 20, output switch circuit 30, filter circuit 40A and digital control circuit 60 shown, it also has a module substrate 90, a resin component 91, a shielding electrode layer 92 and multiple electrodes 150.

[0178] The module substrate 90 has a main surface 90a and a main surface 90b facing each other. A ground electrode layer 90e and the like are formed in the module substrate 90 and on the main surface 90a. Figure 6 and Figure 7 In the embodiment, the module substrate 90 has a rectangular shape in a plan view, but is not limited to this shape.

[0179] As the module substrate 90, for example, a low temperature co-fired ceramic (LTCC: Low Temperature Co-fired Ceramics) substrate or a high temperature co-fired ceramic (HTCC: High Temperature Co-fired Ceramics) substrate having a stacked structure of multiple dielectric layers, a component-embedded substrate, a substrate having a redistribution layer (RDL: Redistribution Layer), or a printed circuit substrate can be used, but it is not limited to these substrates.

[0180] The integrated circuit 80 , capacitors C10 to C16 , C20 , C30 , C40 , C51 , C61 to C64 , C81 , and C82 , an inductor L51 , and a resin member 91 are arranged on the main surface 90 a .

[0181] The integrated circuit 80 includes a PR switch section 80a, an SC switch section 80b, an OS switch section 80c, and a filter switch section 80d. The PR switch section 80a includes switches S61 to S63, S71, and S72. The SC switch section 80b includes switches S11 to S14, S21 to S24, S31 to S34, and S41 to S44. The OS switch section 80c includes switches S51 to S54. The filter switch section 80d includes a switch S55.

[0182] In addition, although Figure 6 In the embodiment, the PR switch section 80a, the SC switch section 80b, the OS switch section 80c and the filter switch section 80d are included in a single integrated circuit 80, but are not limited to this. For example, the PR switch section 80a and the SC switch section 80b may be included in one integrated circuit, and the OS switch section 80c and the filter switch section 80d may be included in another integrated circuit. For another example, the SC switch section 80b, the OS switch section 80c and the filter switch section 80d may be included in one integrated circuit, and the PR switch section 80a may be included in another integrated circuit. For another example, the PR switch section 80a, the OS switch section 80c and the filter switch section 80d may be included in one integrated circuit, and the SC switch section 80b may be included in another integrated circuit. For another example, the PR switch section 80a, the SC switch section 80b, the OS switch section 80c and the filter switch section 80d may be included in four integrated circuits, respectively. In addition, multiple integrated circuits can be manufactured at different process technology nodes.

[0183] In addition, although Figure 6 In the embodiment, the integrated circuit 80 has a rectangular shape when the module substrate 90 is viewed from above, but the shape is not limited to this.

[0184] The integrated circuit 80 can be formed using, for example, CMOS (Complementary Metal Oxide Semiconductor), and specifically, can be manufactured by an SOI (Silicon on Insulator) process. The integrated circuit 80 is not limited to CMOS.

[0185] Capacitors C10 to C16, C20, C30, C40, C51, C61 to C64, C81, and C82 are mounted as chip capacitors, respectively. The so-called chip capacitor refers to a surface mount device (SMD: Surface Mount Device) that constitutes a capacitor. In addition, the installation of multiple capacitors is not limited to chip capacitors. For example, part or all of the multiple capacitors may be included in an integrated passive device (IPD: Integrated Passive Device), or may be included in an integrated circuit 80.

[0186] The inductor L51 is mounted as a chip inductor. The so-called chip inductor refers to an SMD that constitutes an inductor. In addition, the mounting of the inductor L51 is not limited to the chip inductor. For example, the inductor L51 may also be included in the IPD.

[0187] The plurality of capacitors and inductors arranged on the main surface 90 a are grouped for each circuit and arranged around the integrated circuit 80 .

[0188] Specifically, when the module substrate 90 is viewed from above, the group of capacitors C61 to C64 included in the pre-regulator circuit 10 is arranged in a region on the main surface 90a sandwiched between a straight line along the left side of the integrated circuit 80 and a straight line along the left side of the module substrate 90. Thus, the group of circuit components included in the pre-regulator circuit 10 is arranged near the PR switch section 80a in the integrated circuit 80.

[0189] When looking down at the module substrate 90, the group of capacitors C10 to C16, C20, C30, and C40 included in the switched capacitor circuit 20 is arranged in an area on the main surface 90a sandwiched by a straight line along the upper side of the integrated circuit 80 and a straight line along the upper side of the module substrate 90, and an area on the main surface 90a sandwiched by a straight line along the right side of the integrated circuit 80 and a straight line along the right side of the module substrate 90. Thus, the group of circuit components included in the switched capacitor circuit 20 is arranged near the SC switch section 80b in the integrated circuit 80. That is, the SC switch section 80b is arranged at a position closer to the switched capacitor circuit 20 than each of the PR switch section 80a and the OS switch section 80c.

[0190] When the module substrate 90 is viewed from above, the group of capacitors C51 and inductors L51 included in the filter circuit 40A is arranged in a region on the main surface 90a sandwiched between a straight line along the lower side of the integrated circuit 80 and a straight line along the lower side of the module substrate 90. Thus, the group of circuit components included in the filter circuit 40A is arranged near the filter switch section 80d in the integrated circuit 80. That is, the filter switch section 80d is arranged at a position closer to the capacitor C51 and inductor L51 of the filter circuit 40A than each of the PR switch section 80a and the SC switch section 80b.

[0191] A plurality of electrodes 150 are arranged on the main surface 90b. At least one of the plurality of electrodes 150 is used as Figure 2 The external connection terminals 141 shown play a role. The plurality of electrodes 150 are electrically connected to the plurality of electronic components arranged on the main surface 90a via the conducting conductors formed in the module substrate 90. Copper electrodes can be used as the plurality of electrodes 150, but are not limited thereto. For example, solder electrodes can also be used as the plurality of electrodes.

[0192] Resin member 91 covers main surface 90a and at least a portion of the plurality of electronic components on main surface 90a. Resin member 91 has a function of ensuring reliability such as mechanical strength and moisture resistance of the plurality of electronic components on main surface 90a. Resin member 91 may not be included in tracker module 100.

[0193] The shielding electrode layer 92 is an example of a metal layer, for example, a metal thin film formed by a sputtering method. The shielding electrode layer 92 is formed to cover the surface (upper surface and side surface) of the resin member 91. The shielding electrode layer 92 is connected to the ground, and suppresses the intrusion of external noise into the electronic components constituting the tracker module 100 and the noise generated in the tracker module 100 from interfering with other modules or other devices. In addition, the shielding electrode layer 92 may not be included in the tracker module 100.

[0194] also, Figure 6 to Figure 8 The structure of the tracker module 100 shown is an example and is not limited thereto. For example, a part of the capacitor and the inductor arranged on the main surface 90a may be formed in the module substrate 90. In addition, a part of the capacitor and the inductor arranged on the main surface 90a may not be included in the tracker module 100, and may not be arranged on the module substrate 90.

[0195] [1.5 Effects, etc.]

[0196] As described above, the tracker circuit 1A of this embodiment includes: an output switch circuit 30 configured to selectively output at least one discrete voltage among a plurality of discrete voltages to the power amplifier 2A; a voltage supply path P41 connecting the output switch circuit 30 and the power amplifier 2A; and a filter circuit 40A connected to the voltage supply path P41. The power amplifier 2A is configured to receive a high-frequency signal RF of a frequency band A to which TDD is applied. A The amplification filter circuit 40A is not connected in series with the voltage supply path P41, but is connected in shunt.

[0197] Thus, since the filter circuit 40A is connected to the high-frequency signal RF of the frequency band A to which TDD is applied, A The filter circuit 40A is connected to the voltage supply path P41 between the amplified power amplifier 2A and the output switch circuit 30, so the noise in the voltage supply path P41 can be reduced. Therefore, the IMD in the power amplifier 2A used for the TDD band can be suppressed, and the spurious emission can be reduced, for example, the ACPR / ACLR can be improved. In addition, the filter circuit 40A is not connected in series with the voltage supply path P41, but is connected in a shunt. Therefore, the loss in the voltage supply path P41 can be reduced, and the degradation of the multiple discrete voltages supplied to the power amplifier 2A can be suppressed.

[0198] According to another viewpoint, the tracker circuit 1A of the present embodiment includes an external connection terminal 141 and a high-frequency signal RF of a frequency band A to which TDD is applied. A The amplified power amplifier 2A is connected; the output switch circuit 30 is configured to selectively output at least one discrete voltage among a plurality of discrete voltages to the external connection terminal 141; the voltage supply path P41 directly connects the output switch circuit 30 to the external connection terminal 141; and the filter circuit 40A is connected between the voltage supply path P41 and the ground.

[0199] Thus, the filter circuit 40A is connected to the circuit to generate a signal for the high-frequency signal RF of the frequency band A to which TDD is applied. A The amplified power amplifier 2A is connected to the voltage supply path P41 between the external connection terminal 141 and the output switch circuit 30, so the noise in the voltage supply path P41 can be reduced. Therefore, the IMD in the power amplifier 2A used for the TDD band can be suppressed, and the spurious emission can be reduced, for example, the ACPR / ACLR can be improved. In addition, the filter circuit 40A is connected between the voltage supply path P41 and the ground, and the output switch circuit 30 and the external connection terminal 141 are directly connected through the voltage supply path P41. Therefore, the loss in the voltage supply path P41 can be reduced, and the degradation of multiple discrete voltages in the voltage supply path P41 can be suppressed.

[0200] For example, in the tracker circuit 1A of the present embodiment, the filter circuit 40A may include an inductor L51, a capacitor C51, and a switch S55 connected in series, and the inductor L51 and the capacitor C51 may be connected in a branch connection with the voltage supply path P41 via the switch S55.

[0201] That is, in the tracker circuit 1A of this embodiment, the filter circuit 40A may include an inductor L51, a capacitor C51, and a switch S55 connected in series, and the inductor L51 and the capacitor C51 may be connected between the voltage supply path P41 and the ground via the switch S55.

[0202] Thus, since the filter circuit 40A includes the switch S55, the connection and disconnection of the inductor L51 and the capacitor C51 with the voltage supply path P41 can be switched. Therefore, it is possible to switch between giving priority to reducing noise in the voltage supply path P41 and giving priority to suppressing degradation of multiple discrete voltages in the voltage supply path P41.

[0203] For example, in the tracker circuit 1A of the present embodiment, the high frequency signal RF A When the channel bandwidth is greater than the threshold width, the switch S55 is disconnected, and the high frequency signal RF A When the channel bandwidth is less than the threshold width, the switch S55 is closed.

[0204] Therefore, the high frequency signal RF A In the case where the channel bandwidth is narrow, the switch S55 of the filter circuit 40A is closed. If the channel bandwidth is narrow, the distance (frequency) from the center frequency of the channel to the adjacent channel is short, so the frequency of IMD that affects ACP is reduced. In the case of supplying multiple discrete voltages, the lower the frequency in the voltage supply path P41, the greater the noise, so if the channel bandwidth is narrow, the noise of the frequency of IMD that affects ACP is large. Therefore, in the case of a narrow channel bandwidth, by closing the switch S55, the noise of the frequency of IMD that affects ACP can be preferentially reduced, and the spurious emission (that is, ACP) in the power amplifier 2A can be effectively reduced. On the other hand, in the case of a high-frequency signal RF A When the channel bandwidth is wide, the switch S55 of the filter circuit 40A is turned off. If the channel bandwidth is wide, the changes of the plurality of discrete voltages are accelerated, so a better responsiveness is required for the voltage supply path P41. Therefore, when the channel bandwidth is wide, by turning off the switch S55, the degradation of the responsiveness of the voltage supply path P41 can be suppressed, and the degradation of the plurality of discrete voltages in the voltage supply path P41 can be effectively suppressed.

[0205] For example, in the tracker circuit 1A of the present embodiment, the filter circuit 40A may have a stop band that depends on the threshold width.

[0206] This makes it possible to realize a stop band smaller than the threshold width of the channel bandwidth suitable for activating the filter circuit 40A by closing the switch S55, and effectively reduce spurious emission in the power amplifier 2A.

[0207] In the tracker circuit 1A of the present embodiment, the frequency band A may be included in the range of 3300 to 5000 MHz.

[0208] This allows the connection and non-connection of the filter circuit 40A to be switched in the voltage supply path P41 for the higher frequency band A that can utilize a wider channel bandwidth. Therefore, the effect of suppressing degradation of a plurality of discrete voltages caused by disconnection of the filter circuit 40A is large.

[0209] In addition, the tracking method of this embodiment is used for the high-frequency signal RF of the frequency band A to which TDD is applied, which is amplified by the power amplifier 2A. A When the channel bandwidth is greater than the threshold width, the filter circuit 40A is cut off from the voltage supply path P41. When the channel bandwidth is less than the threshold width, the filter circuit 40A is connected to the voltage supply path P41, and at least one of the multiple discrete voltages is selectively supplied to the power amplifier 2A via the voltage supply path P41.

[0210] Therefore, the high frequency signal RF A In the case where the channel bandwidth is narrow, the filter circuit 40A can be connected to the voltage supply path P41. If the channel bandwidth is narrow, the distance (frequency) from the center frequency of the channel to the adjacent channel is short, so the frequency of IMD that affects ACP is reduced. In the case of supplying multiple discrete voltages, the lower the frequency in the voltage supply path P41, the greater the noise, so if the channel bandwidth is narrow, the noise at the frequency of IMD that affects ACP is large. Therefore, in the case of a narrow channel bandwidth, by connecting the filter circuit 40A to the voltage supply path P41, the noise at the frequency of IMD that affects ACP can be preferentially reduced, and the spurious emission (that is, ACP) in the power amplifier 2A can be effectively reduced. On the other hand, in the case of a high-frequency signal RF AWhen the channel bandwidth is wide, the filter circuit 40A can be cut off from the voltage supply path P41. If the channel bandwidth is wide, the changes of the plurality of discrete voltages are accelerated, so the voltage supply path P41 is required to have better responsiveness. Therefore, when the channel bandwidth is wide, by cutting off the filter circuit 40A from the voltage supply path P41, the degradation of the responsiveness of the voltage supply path P41 can be suppressed, and the degradation of the plurality of discrete voltages in the voltage supply path P41 can be effectively suppressed.

[0211] In addition, Figure 2 and Figure 3 In the circuit structure of , the tracker circuit 1A may further include a plurality of arbitrary additional filter circuits on the voltage supply path P41. For example, the tracker circuit 1A may also include an arbitrary additional filter circuit having one end connected to the output switch circuit 30 and the other end connected to the filter circuit 40A and the external connection terminal 141 and / or an arbitrary additional filter circuit having one end connected to the output switch circuit 30 and the filter circuit 40A and the other end connected to the external connection terminal 141. These arbitrary additional filter circuits may include, for example, an inductor, a capacitor, and a switch, similar to the filter circuit 40A.

[0212] (Implementation Method 2)

[0213] Next, Embodiment 2 will be described. The tracker circuit of this embodiment differs from the tracker circuit of Embodiment 1 mainly in that a plurality of discrete voltages can be supplied to two different power amplifiers. Hereinafter, the tracker circuit of this embodiment will be described with reference to the drawings, centering on the differences from Embodiment 1.

[0214] [2.1 Circuit Configuration of Communication Device 7B]

[0215] First, refer to Fig. 9 The communication device 7B according to this embodiment will be described. Fig. 9 It is a circuit configuration diagram of the communication device 7B according to the present embodiment.

[0216] also, Fig. 9 The circuit configuration is exemplary, and the communication device 7B may be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 7B provided below should not be interpreted in a limiting sense.

[0217] like Fig. 9 As shown, the communication device 7B includes a tracker circuit 1B, power amplifiers 2A and 2B, filters 3A to 3C, switches 4A to 4C, an RFIC 5, and antennas 6A and 6B.

[0218] The tracker circuit 1B can supply a plurality of discrete voltages V based on the tracking mode to the power amplifier 2A. T1 , and can supply multiple discrete voltages V based on the tracking mode to the power amplifier 2B T2 .like Fig. 9 As shown, the tracker circuit 1B includes a pre-regulator circuit 10 , a switched capacitor circuit 20 , an output switch circuit 30 , a filter circuit 40B, a DC power supply 50 , a digital control circuit 60 , and external connection terminals 141 and 142 .

[0219] The external connection terminal 142 is an example of a second external connection terminal, and is connected to the power amplifier 2B outside the tracker circuit 1B, and is connected to the output switch circuit 30 via the voltage supply path P42 inside the tracker circuit 1B.

[0220] The voltage supply path P42 is an example of a second voltage supply path, and is a part of a path connecting the output switch circuit 30 and the power amplifier 2B. Here, the voltage supply path P42 is a path connecting the output switch circuit 30 and the external connection terminal 142.

[0221] The power amplifier 2B is an example of a second power amplifier, and is connected between the RFIC 5 and the filter 3B and the filter 3C. The power amplifier 2B is connected to the tracker circuit 1B. The power amplifier 2B can use a plurality of discrete voltages V received from the tracker circuit 1B. T2 , the high frequency signal RF of band B received from RFIC5 B (An example of the second high frequency signal) and the high frequency signal RF of the frequency band C C (An example of the third high frequency signal) amplified.

[0222] The filter 3B is connected between the power amplifier 2B and the antenna 6B. The filter 3B is a bandpass filter having a passband including the frequency band B.

[0223] The filter 3C is connected between the power amplifier 2B and the antenna 6B. The filter 3C is a bandpass filter having a passband including a transmission band of Band C.

[0224] Band B and Band C are frequency bands used for communication systems constructed using RAT, respectively, and are predefined by standardization organizations, etc. Band B is an example of a second frequency band, and is a frequency band to which TDD is applied. Band C is an example of a third frequency band, and is a frequency band to which FDD is applied (i.e., an FDD frequency band). In this embodiment, Band B and Band C are included in the mid-high frequency group (1427 to 2690 MHz). In addition, Band B and Band C are not limited to the frequency bands included in the mid-high frequency group.

[0225] The switch 4B includes a terminal connected to the output end of the power amplifier 2B, a terminal connected to one end of the filter 3B, and a terminal connected to one end of the filter 3C, and includes a terminal connected to the input end of the low noise amplifier (not shown) as needed. The switch 4B can switch the connection of the power amplifier 2B between the filter 3B and the filter 3C. In addition, the switch 4B can also switch the connection of the filter 3B between the power amplifier 2B and the low noise amplifier.

[0226] The switch 4C includes a terminal connected to the antenna 6B, a terminal connected to the filter 3B, and a terminal connected to the filter 3C. The switch 4C can switch the connection of the antenna 6B between the filter 3B and the filter 3C.

[0227] The antenna 6B outputs the transmission signals of the frequency band B and the frequency band C input from the power amplifier 2B via the filter 3B and the filter 3C. The antenna 6B may not be included in the communication device 7B.

[0228] In addition, the communication device 7B may further include a filter having a passband including the reception band of the band C. In this case, the filter may be mounted together with the filter 3C as a duplexer.

[0229] [2.2 Circuit Structure of Filter Circuit 40B]

[0230] Next, refer to Fig.10 The circuit configuration of the filter circuit 40B included in the tracker circuit 1B will be described. Fig.10 4 is a circuit configuration diagram of a filter circuit 40B according to the present embodiment.

[0231] also, Fig.10 is an exemplary circuit configuration, and the filter circuit 40B can be implemented using any of a variety of circuit implementations and circuit techniques. Therefore, the description of the filter circuit 40B provided below should not be interpreted in a limiting sense.

[0232] The filter circuit 40B is a pulse shaping network, which is configured to be connectable to the voltage supply path P41 and the voltage supply path P42, and can attenuate noise components from the signal (a plurality of discrete voltages) transmitted in the voltage supply path P41 and the voltage supply path P42. Fig.10 As shown, the filter circuit 40B includes an inductor L51, a capacitor C51, and a switch S55 connected in series.

[0233] The inductor L51 is an example of a first inductor and is connected between the voltage supply path P42 and the capacitor C51. Specifically, one end of the inductor L51 is connected to the path between the switch S55 and the external connection terminal 142 in the voltage supply path P42, and the other end of the inductor L51 is connected to the capacitor C51.

[0234] The capacitor C51 is an example of a first capacitor, and is connected between the inductor L51 and the ground. Specifically, one end of the capacitor C51 is connected to the inductor L51, and the other end of the capacitor C51 is connected to the ground.

[0235] The switch S55 is an example of a first switch, and is connected between the output switch circuit 30 and the external connection terminal 142, and between the voltage supply path P41 and the inductor L51. Specifically, one end of the switch S55 is connected to the voltage supply path P41, and the other end of the switch S55 is connected to the inductor L51 and the external connection terminal 142.

[0236] In the switch S55 connected in this way, on / off is switched based on the control signal S4. Specifically, on / off of the switch S55 is controlled as follows.

[0237] (1) Amplify the high frequency signal RF using power amplifier 2A A , and does not use the power amplifier 2B to amplify the high frequency signal RF B and RF C In the case of high frequency signal RF A If the channel bandwidth of is greater than the threshold width, the switch S55 is turned off. As a result, the inductor L51 and the capacitor C51 are disconnected from the voltage supply path P41. At this time, a plurality of discrete voltages V are supplied to the power amplifier 2A via the external connection terminal 141. T1 However, the filter circuit 40B does not function as a band-stop filter for the voltage supply path P41.

[0238] (2) Amplifying the high frequency signal RF using power amplifier 2A A , and does not use the power amplifier 2B to amplify the high frequency signal RF B and RF C In the case of high frequency signal RF A If the channel bandwidth is less than the threshold width, the switch S55 is closed. As a result, the inductor L51 and the capacitor C51 are connected to the voltage supply path P41 in a shunt manner. At this time, a plurality of discrete voltages V are supplied to the power amplifier 2A via the external connection terminal 141. T1 , the filter circuit 40B functions as a band-stop filter in the voltage supply path P41.

[0239] (3) Amplifying the high frequency signal RF using power amplifier 2B B or RF C , and does not use the power amplifier 2A to amplify the high frequency signal RF A In the case of , the switch S55 is closed. As a result, the inductor L51 and the capacitor C51 are connected to the voltage supply path P42 in a shunt manner. At this time, a plurality of discrete voltages V are supplied to the power amplifier 2B via the external connection terminal 142. T2 , the filter circuit 40B functions as a band-stop filter in the voltage supply path P42.

[0240] As the threshold width used for controlling the switch S55, the same threshold width as that in the first embodiment can be used.

[0241] [2.3 Effects, etc.]

[0242] As described above, in the tracker circuit 1B of the present embodiment, the output switch circuit 30 may be configured to further selectively output at least one discrete voltage among the plurality of discrete voltages to the power amplifier 2B, and the power amplifier 2B may be configured to output the high frequency signal RF of the frequency band B to which TDD is applied. B and the high frequency signal RF of band C to which FDD is applied C At least one side of the amplification is performed, and the tracker circuit 1B may also have a voltage supply path P42 connecting the output switch circuit 30 and the power amplifier 2B, the inductor L51 and the capacitor C51 may also be connected in branch with the voltage supply path P42, and the switch S55 may also be connected in series with the voltage supply path P42.

[0243] That is, the tracker circuit 1B of the present embodiment may further include an external connection terminal 142 configured to correspond to the high-frequency signal RF of the frequency band B to which TDD is applied. B and the high frequency signal RF of band C to which FDD is applied C At least one of the power amplifiers 2B amplifying the power of the output device 10 is connected; and a voltage supply path P42, connecting the output switch circuit 30 and the external connection terminal 142, the switch S55 can also be connected between the output switch circuit 30 and the external connection terminal 142, and the inductor L51 and the capacitor C51 can also be connected between the path between the switch S55 and the external connection terminal 142 in the voltage supply path P42 and the ground.

[0244] Thus, inductor L51 and capacitor C51 are connected to voltage supply path P42 in addition to voltage supply path P41. Therefore, the same effect as voltage supply path P41 can be achieved in voltage supply path P42. Furthermore, since inductor L51 and capacitor C51 are shared by both voltage supply path P41 and voltage supply path P42, the increase of circuit elements can be suppressed.

[0245] For example, in the tracker circuit 1B of the present embodiment, the high frequency signal RF is amplified by the power amplifier 2A. A In the case of (i) if the high frequency signal RF A If the channel bandwidth is greater than the threshold width, the switch S55 can be disconnected. (ii) If the high frequency signal RF A If the channel bandwidth is less than the threshold width, the switch S55 can be closed, and the high frequency signal RF is amplified by the power amplifier 2B. B Or high frequency signal RF C In this case, switch S55 can be closed.

[0246] Thus, the high frequency signal RF is amplified by the power amplifier 2A. A In the case of high frequency signal RF A If the channel bandwidth is narrow, the switch S55 of the filter circuit 40B is closed. If the channel bandwidth is narrow, the distance (frequency) from the center frequency of the channel to the adjacent channel is short, so the frequency of IMD that affects the ACP is reduced. In the case of supplying multiple discrete voltages, since the lower the frequency in the voltage supply path P41, the greater the noise, if the channel bandwidth is narrow, the noise of the frequency of IMD that affects the ACP is larger. Therefore, in the case of a narrow channel bandwidth, by closing the switch S55, the noise of the frequency of IMD that affects the ACP can be preferentially reduced, and the spurious emission in the power amplifier 2A can be effectively reduced. On the other hand, when the high-frequency signal RF is amplified by the power amplifier 2A A In the case of high frequency signal RF A If the channel bandwidth is wide, the switch S55 of the filter circuit 40B is turned off. If the channel bandwidth is wide, the changes of the plurality of discrete voltages are accelerated, so the voltage supply path P41 is required to have better responsiveness. Therefore, in the case of a wide channel bandwidth, by turning off the switch S55, the degradation of the responsiveness of the voltage supply path P41 can be suppressed, and the degradation of the plurality of discrete voltages in the voltage supply path P41 can be effectively suppressed. In addition, when the high frequency signal RF is amplified by the power amplifier 2B, B or RF CIn this case, the switch S55 of the filter circuit 40B is closed. As a result, in the voltage supply path P42, the noise of the frequency that generates IMD that affects the ACP and / or the reception band can be reduced, which can contribute to the reduction of spurious emissions in the power amplifier 2B and / or the improvement of the reception sensitivity.

[0247] For example, in the tracker circuit 1B of the present embodiment, the frequency band A may be included in the range of 3300 to 5000 MHz, and the frequency band B and the frequency band C may be included in the range of 1427 to 2690 MHz.

[0248] Thus, in the voltage supply path P41 for the higher frequency band A that can utilize a wider channel bandwidth, the connection and non-connection of the filter circuit 40B can be switched. Therefore, the degradation suppression effect of the plurality of discrete voltages in the voltage supply path P41 is large. On the other hand, in the voltage supply path P42 for the lower frequency band B and / or frequency band C that cannot utilize a wider channel bandwidth, the filter circuit 40B can be connected regardless of the channel bandwidth. Therefore, the noise of the frequency that generates IMD that affects the ACP can be preferentially reduced, and the spurious emission in the power amplifier 2B can be effectively reduced.

[0249] (Variation of Implementation Example 2)

[0250] Next, a modification of Embodiment 2 will be described. In this modification, the configuration of the main filter circuit is different from that of Embodiment 2. Hereinafter, the tracker circuit of this modification will be described with reference to the drawings, focusing on the differences from Embodiment 2.

[0251] [2.4 Circuit Structure of Filter Circuit 40C]

[0252] Reference Fig. 9 and Fig.11 The circuit configuration of the filter circuit 40C included in the tracker circuit 1B according to the present modification example will be described. Fig.11 4 is a circuit configuration diagram of a filter circuit 40C according to this modification.

[0253] also, Fig.11 is an exemplary circuit configuration, and the filter circuit 40C may be implemented using any of a variety of circuit implementations and circuit techniques. Therefore, the description of the filter circuit 40C provided below should not be interpreted in a limiting sense.

[0254] The filter circuit 40C is a pulse shaping network, which is configured to be connectable to the voltage supply path P41 and the voltage supply path P42, and can attenuate noise components from the signal (a plurality of discrete voltages) transmitted in the voltage supply path P41 and the voltage supply path P42. Fig.11As shown, the filter circuit 40C includes an inductor L52 and a switch S56 in addition to the inductor L51, the capacitor C51, and the switch S55.

[0255] Inductor L52 is an example of a second inductor, and is connected between switch S55 and external connection terminal 142 and between switch S56 and inductor L51. Specifically, one end of inductor L52 is connected to switch S55 and inductor L51, and the other end of inductor L52 is connected to switch S56 and external connection terminal 142.

[0256] The switch S56 is connected in series with the path connecting the voltage supply path P41 and the voltage supply path P42. Specifically, one end of the switch S56 is connected to the voltage supply path P41, and the other end of the switch S56 is connected to the path between the inductor L52 and the external connection terminal 142 in the voltage supply path P42.

[0257] In the switch S56 connected in this way, the on / off switching is performed based on the control signal S4, similarly to the switch S55. Specifically, the on / off switching of the switch S55 and the switch S56 is controlled as follows.

[0258] (1) Amplify the high frequency signal RF using power amplifier 2A A , and does not use the power amplifier 2B to amplify the high frequency signal RF B and RF C In the case of high frequency signal RF A When the channel bandwidth of is greater than the first threshold width, switches S55 and S56 are turned off. As a result, inductors L51 and L52 and capacitor C51 are disconnected from voltage supply path P41. At this time, a plurality of discrete voltages V are supplied to power amplifier 2A via external connection terminal 141. T1 However, the filter circuit 40C does not function as a band-stop filter for the voltage supply path P41.

[0259] (2) Amplifying the high frequency signal RF using power amplifier 2A A , and does not use the power amplifier 2B to amplify the high frequency signal RF B and RF C In the case of high frequency signal RF A If the channel bandwidth is greater than the second threshold width and less than the first threshold width, the switch S55 is closed and the switch S56 is opened. As a result, the inductor L51 and the capacitor C51 are connected to the voltage supply path P41 in a shunt manner. At this time, the power amplifier 2A is supplied with a plurality of discrete voltages V via the external connection terminal 141. T1, the filter circuit 40C functions as a first band-stop filter having a first stopband depending on the first threshold width in the voltage supply path P41. For example, when the first threshold width is 50 MHz, a stopband including a frequency (75 MHz) obtained by multiplying the value of the first threshold width (50 MHz) by a predetermined coefficient (1.5) is realized as the first stopband.

[0260] (3) Amplify the high frequency signal RF using power amplifier 2A A , and does not use the power amplifier 2B to amplify the high frequency signal RF B and RF C In the case of high frequency signal RF A If the channel bandwidth is less than the second threshold width, the switch S55 is opened and the switch S56 is closed. As a result, the inductor L52 and the inductor L51 and the capacitor C51 are connected to the voltage supply path P41 in a shunt manner. At this time, the power amplifier 2A is supplied with a plurality of discrete voltages V via the external connection terminal 141. T1 , the filter circuit 40C functions as a second band-stop filter having a second stopband depending on the second threshold width in the voltage supply path P41. For example, when the second threshold width is 20 MHz, a stopband including a frequency (30 MHz) obtained by multiplying the value of the second threshold width (20 MHz) by a predetermined coefficient (1.5) is realized as the second stopband.

[0261] (4) Amplifying the high frequency signal RF using power amplifier 2B B , and does not use the power amplifier 2A to amplify the high frequency signal RF A In the case of high frequency signal RF B When the channel bandwidth of the power amplifier 2B is greater than the second threshold width, the switch S55 is closed and the switch S56 is opened. As a result, the inductor L51 and the capacitor C51 are connected to the voltage supply path P42 in shunt, and the inductor L52 is connected to the voltage supply path P42 in series. At this time, a plurality of discrete voltages V are supplied to the power amplifier 2B via the external connection terminal 142. T2 , the filter circuit 40C functions as a third band-stop filter having a third stop band in the voltage supply path P42.

[0262] (5) Amplifying the high frequency signal RF using power amplifier 2B B , and does not use the power amplifier 2A to amplify the high frequency signal RF A In the case of high frequency signal RF BIf the channel bandwidth is less than the second threshold width, the switch S55 is opened and the switch S56 is closed. As a result, the inductor L52 and the inductor L51 and the capacitor C51 are connected to the voltage supply path P42 in a shunt manner. At this time, the power amplifier 2B is supplied with a plurality of discrete voltages V via the external connection terminal 142. T2 , the filter circuit 40C functions as a second band-stop filter having a second stop band in the voltage supply path P42.

[0263] (6) Amplifying the high frequency signal RF using power amplifier 2B C , and does not use the power amplifier 2A to amplify the high frequency signal RF A In the case of , switch S55 is closed and switch S56 is opened. As a result, inductor L51 and capacitor C51 are connected to voltage supply path P42 in shunt, and inductor L52 is connected to voltage supply path P42 in series. At this time, multiple discrete voltages V are supplied to power amplifier 2B via external connection terminal 142. T2 , the filter circuit 40C functions as a third band-stop filter having a third stop band in the voltage supply path P42.

[0264] As the first threshold width and the second threshold width used in controlling the switch S55 and the switch S56, values ​​predetermined by experiments and / or experience can be used. As the first threshold width, a frequency width wider than the second threshold width (e.g., 100 MHz) is used, and as the second threshold width, a frequency width narrower than the first threshold width (e.g., 50 MHz) is used.

[0265] By the switch control as described above, the filter circuit 40C functions as a variable band-stop filter whose stop band changes according to the channel bandwidth.

[0266] In addition, the values ​​of the first threshold width, the second threshold width, and the predetermined coefficient are merely examples, and are not limited to the above-described values.

[0267] [2.5 Effects, etc.]

[0268] As described above, in the tracker circuit 1B of this variant, the filter circuit 40C may also further include: an inductor L52, which is connected in series with the path between the switch S55 in the voltage supply path P42 and the power amplifier 2B; and a switch S56, which is connected in series with the path connecting the voltage supply path P41 and the voltage supply path P42, or one end of the switch S56 may be connected to the voltage supply path P41, and the other end of the switch S56 may be connected to the path between the inductor L52 in the voltage supply path P42 and the power amplifier 2B.

[0269] Thus, the connection between the inductor L52 and the voltage supply path P41 and the voltage supply path P42 can be switched by the switch S55 and the switch S56, and the stop band of the filter circuit 40C can be changed. In particular, with respect to the voltage supply path P41, the two switches S55 and the switch S56 can be switched to cut off the inductor L51, the inductor L52, and the capacitor C51 from the voltage supply path P41, connect the inductor L51 and the capacitor C51 to the voltage supply path P41 in a shunt manner, and connect the inductor L51, the inductor L52, and the capacitor C51 to the voltage supply path P41 in a shunt manner. In addition, for the voltage supply path P42, the two switches S55 and S56 can be used to switch between the inductor L51 and the capacitor C51 and the voltage supply path P42, and between the inductor L52 and the voltage supply path P42 in series, and between the inductor L51 and the inductor L52 and the capacitor C51 and the voltage supply path P42. In this way, in the filter circuit 40C, the two switches S55 and S56 can be used to switch between multiple stop bands of the two voltage supply paths P41 and P42.

[0270] For example, in the tracker circuit 1B of this modified example, the high frequency signal RF is amplified by the power amplifier 2A. A In the case of (i) if the high frequency signal RF A If the channel bandwidth is greater than the first threshold width, the switches S55 and S56 can be disconnected. (ii) If the high frequency signal RF A The channel bandwidth is greater than the second threshold width and less than the first threshold width, then the switch S55 can be closed and the switch S56 can be opened. (iii) If the high frequency signal RF A If the channel bandwidth is less than the second threshold width, the switch S55 can be opened and the switch S56 can be closed, and the high frequency signal RF is amplified by the power amplifier 2B. B In the case of (i) if the high frequency signal RF B The channel bandwidth of the high frequency signal RF is greater than the second threshold width, the switch S55 can be closed and the switch S56 can be opened. (ii) If the high frequency signal RF B If the channel bandwidth is less than the second threshold width, the switch S55 can be opened and the switch S56 can be closed, and the high frequency signal RF is amplified by the power amplifier 2B. C In this case, switch S55 may be closed and switch S56 may be opened.

[0271] Thus, the switches S55 and S56 can be switched open and closed according to the frequency band of the high-frequency signal and the channel bandwidth, thereby achieving a balance between reducing noise in the voltage supply path P41 and the voltage supply path P42 and suppressing degradation of multiple discrete voltages.

[0272] For example, in the tracker circuit 1B of the present modification, the frequency band A may be included in the range of 3300 to 5000 MHz, and the frequency band B and the frequency band C may be included in the range of 1427 to 2690 MHz.

[0273] Thus, the wider and higher-frequency channel bandwidth that can be used by the filter circuit 40C, the more types of stopbands can be realized according to the channel bandwidth. Therefore, the stopband can be controlled more finely according to the channel bandwidth, and the spurious emission in the power amplifier 2A and the power amplifier 2B can be effectively reduced.

[0274] In addition, Figures 9 to 11 In the circuit structure of , the tracker circuit 1B may further include one or more arbitrary additional filter circuits on the voltage supply path P41. For example, the tracker circuit 1B may also include an arbitrary additional filter circuit having one end connected to the output switch circuit 30 and the other end connected to the filter circuit 40B / 40C and the external connection terminal 141 and / or an arbitrary additional filter circuit having one end connected to the output switch circuit 30 and the filter circuit 40B / 40C and the other end connected to the external connection terminal 141. For example, in Fig.11 In the embodiment of the present invention, any additional filter circuit may be connected between the output switch circuit 30 and a node on the voltage supply path P41 to which the switch S55 of the filter circuit 40C is connected. For another example, any additional filter circuit may be connected between a node on the voltage supply path P41 to which the switch S55 of the filter circuit 40C is connected and a node on the voltage supply path P41 to which the switch S56 of the filter circuit 40C is connected. For another example, any additional filter circuit may be connected between a node on the voltage supply path P41 to which the switch S56 of the filter circuit 40C is connected and the external connection terminal 141. These additional filter circuits may include, for example, an inductor, a capacitor, and a switch in the same manner as the filter circuits 40B / 40C.

[0275] (Implementation method 3)

[0276] Next, embodiment 3 is described. The tracker circuit of this embodiment mainly differs from the tracker circuits of embodiments 1 and 2 in that a plurality of discrete voltages can be supplied to three different power amplifiers. Hereinafter, the tracker circuit of this embodiment will be described with reference to the accompanying drawings, centering on the differences from embodiments 1 and 2.

[0277] [3.1 Circuit Structure of Communication Device 7D]

[0278] First, refer to Fig.12 The communication device 7D according to this embodiment will be described. Fig.12 It is a circuit configuration diagram of a communication device 7D according to this embodiment.

[0279] also, Fig.12 The circuit configuration is exemplary, and the communication device 7D can be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 7D provided below should not be interpreted in a limiting sense.

[0280] like Fig.12 As shown, the communication device 7D includes a tracker circuit 1D, power amplifiers 2A, 2B, and 2D, filters 3A to 3D, switches 4A to 4C, an RFIC 5, and antennas 6A, 6B, and 6D.

[0281] The tracker circuit 1D can supply a plurality of discrete voltages V in a tracking mode to the power amplifier 2A and the power amplifier 2B. T1 and V T2 , and can supply a plurality of discrete voltages V based on the tracking mode to the power amplifier 2D T3 .like Fig.12 As shown, the tracker circuit 1D includes a pre-regulator circuit 10 , a switched capacitor circuit 20 , an output switch circuit 30 , a filter circuit 40D, a DC power supply 50 , a digital control circuit 60 , and external connection terminals 141 to 143 .

[0282] The external connection terminal 143 is an example of a third external connection terminal, and is connected to the power amplifier 2D outside the tracker circuit 1D, and is connected to the output switch circuit 30 via the voltage supply path P43 inside the tracker circuit 1D.

[0283] The voltage supply path P43 is an example of a third voltage supply path, and is a part of a path connecting the output switch circuit 30 and the power amplifier 2D. Here, the voltage supply path P43 is a path connecting the output switch circuit 30 and the external connection terminal 143.

[0284] The power amplifier 2D is an example of a third power amplifier, and is connected between the RFIC5 and the filter 3D. The power amplifier 2D is connected to the tracker circuit 1D. The power amplifier 2D can use a plurality of discrete voltages V received from the tracker circuit 1D. T3 , for the high frequency signal RF of band D received from RFIC5 D (An example of the fourth high frequency signal) amplification.

[0285] The filter 3D is connected between the power amplifier 2D and the antenna 6D. The filter 3D is a bandpass filter having a passband including a transmission band of the band D.

[0286] Band D is a frequency band used for a communication system constructed using RAT and is predefined by a standardization organization or the like. Band D is an example of the fourth frequency band and is a frequency band to which FDD is applied. In the present embodiment, Band D is included in the low frequency group (698 to 960 MHz). In addition, Band D is not limited to the frequency band included in the low frequency group.

[0287] The antenna 6D outputs a transmission signal of the frequency band D input from the power amplifier 2D via the filter 3D. The antenna 6D may not be included in the communication device 7D.

[0288] [3.2 Circuit Structure of Filter Circuit 40D]

[0289] Next, refer to Fig.13 The circuit configuration of the filter circuit 40D included in the tracker circuit 1D will be described. Fig.13 4 is a circuit configuration diagram of a filter circuit 40D according to the present embodiment.

[0290] also, Fig.13 is an exemplary circuit configuration, and the filter circuit 40D may be implemented using any of a variety of circuit implementations and circuit techniques. Therefore, the description of the filter circuit 40D provided below should not be interpreted in a limiting sense.

[0291] The filter circuit 40D is a pulse shaping network, which is configured to be connectable to the voltage supply paths P41 to P43 and can attenuate noise components from signals (multiple discrete voltages) transmitted in the voltage supply paths P41 to P43. Fig.13 As shown, the filter circuit 40D includes inductors L51 to L53, capacitors C51 and C52, and switches S55 to S57.

[0292] The inductor L53 is an example of a third inductor, and is connected between the voltage supply path P43 and the capacitor C52. Specifically, one end of the inductor L53 is connected to the path between the switch S57 and the external connection terminal 143 in the voltage supply path P43, and the other end of the inductor L53 is connected to the capacitor C52.

[0293] The capacitor C52 is an example of a second capacitor, and is connected between the inductor L53 and the ground. Specifically, one end of the capacitor C52 is connected to the inductor L53, and the other end of the capacitor C52 is connected to the ground.

[0294] The switch S57 is an example of a third switch, and is connected between the output switch circuit 30 and the external connection terminal 143, and is connected between the voltage supply path P42 and the inductor L53. Specifically, one end of the switch S57 is connected to the path between the inductor L52 and the external connection terminal 142 in the voltage supply path P42, and the other end of the switch S57 is connected to the inductor L53 and the external connection terminal 143.

[0295] In the switch S57 connected in this way, on / off is switched based on the control signal S4. Specifically, on / off of the switches S55 to S57 is controlled as follows.

[0296] (1) Amplify the high frequency signal RF using power amplifier 2A A , and the high frequency signal is not amplified by the power amplifier 2B and the power amplifier 2D, if the high frequency signal RF A When the channel bandwidth of is greater than the first threshold width, switches S55 to S57 are turned off. As a result, inductors L51 to L53 and capacitors C51 and C52 are disconnected from voltage supply path P41. At this time, multiple discrete voltages V are supplied to power amplifier 2A via external connection terminal 141. T1 , however, the filter circuit 40D does not function as a band-stop filter for the voltage supply path P41.

[0297] (2) Amplifying the high frequency signal RF using power amplifier 2A A , and the high frequency signal is not amplified by the power amplifier 2B and the power amplifier 2D, if the high frequency signal RF A When the channel bandwidth is greater than the second threshold width and less than the first threshold width, the switch S55 is closed, and the switches S56 and S57 are opened. As a result, the inductor L51 and the capacitor C51 are connected to the voltage supply path P41 in a shunt manner. At this time, the power amplifier 2A is supplied with a plurality of discrete voltages V via the external connection terminal 141. T1 , the filter circuit 40D functions as a first band-stop filter having a first stop band that depends on the first threshold width in the voltage supply path P41.

[0298] (3) Amplify the high frequency signal RF using power amplifier 2A A , and the high frequency signal is not amplified by the power amplifier 2B and the power amplifier 2D, if the high frequency signal RF AIf the channel bandwidth is less than the second threshold width, the switch S55 is opened, and the switches S56 and S57 are closed. As a result, the inductor L52, the inductor L51 and the capacitor C51 are connected to the voltage supply path P41 in a branched manner, and the inductor L53 and the capacitor C52 are also connected to the voltage supply path P41 in a branched manner. At this time, a plurality of discrete voltages V are supplied to the power amplifier 2A via the external connection terminal 141. T1 , the filter circuit 40D functions as a second band-stop filter having a second stop band that depends on the second threshold width in the voltage supply path P41.

[0299] (4) Amplifying the high frequency signal RF using power amplifier 2B B , and the high frequency signal is not amplified by the power amplifier 2A and the power amplifier 2D, if the high frequency signal RF B When the channel bandwidth of the power amplifier 2B is greater than the second threshold width, the switch S55 is closed, and the switches S56 and S57 are opened. As a result, the inductor L51 and the capacitor C51 are connected to the voltage supply path P42 in shunt, and the inductor L52 is connected to the voltage supply path P42 in series. At this time, a plurality of discrete voltages V are supplied to the power amplifier 2B via the external connection terminal 142. T2 , the filter circuit 40D functions as a third band-stop filter having a third stop band in the voltage supply path P42.

[0300] (5) Amplifying the high frequency signal RF using power amplifier 2B B , and the high frequency signal is not amplified by the power amplifier 2A and the power amplifier 2D, if the high frequency signal RF B If the channel bandwidth is less than the second threshold width, the switch S55 is opened, and the switches S56 and S57 are closed. As a result, the inductor L52, the inductor L51 and the capacitor C51 are connected to the voltage supply path P42 in a branch manner, and the inductor L53 and the capacitor C52 are also connected to the voltage supply path P42 in a branch manner. At this time, the power amplifier 2B is supplied with a plurality of discrete voltages V via the external connection terminal 142. T2 , the filter circuit 40D functions as a second band-stop filter having a second stop band in the voltage supply path P42.

[0301] (6) Amplifying the high frequency signal RF using power amplifier 2B C, and when the high frequency signal is not amplified by the power amplifier 2A and the power amplifier 2D, the switch S55 is closed, and the switch S56 and the switch S57 are opened. As a result, the inductor L51 and the capacitor C51 are connected to the voltage supply path P42 in a shunt manner, and the inductor L52 is connected in series with the voltage supply path P42. At this time, a plurality of discrete voltages V are supplied to the power amplifier 2B via the external connection terminal 142. T2 , the filter circuit 40D functions as a third band-stop filter having a third stop band in the voltage supply path P42.

[0302] (7) Using power amplifier 2D to amplify high-frequency signal RF D , and when the high frequency signal is not amplified by the power amplifier 2A and the power amplifier 2B, the switch S55 is opened, and the switch S56 and the switch S57 are closed. As a result, the inductor L52, the inductor L51 and the capacitor C51 are connected to the voltage supply path P43 in a branch manner, and the inductor L53 and the capacitor C52 are also connected to the voltage supply path P43 in a branch manner. At this time, a plurality of discrete voltages V are supplied to the power amplifier 2D via the external connection terminal 143. T3 , the filter circuit 40D functions as a second band-stop filter having a second stop band in the voltage supply path P43.

[0303] As the first threshold width and the second threshold width used for controlling the switches S55 to S57 , the same threshold widths as those in the modification of the second embodiment can be used.

[0304] By the switch control as described above, the filter circuit 40D functions as a variable band-stop filter whose stop band changes according to the channel bandwidth.

[0305] In addition, Fig.12 and Fig.13 In the circuit structure of the tracker circuit 1D, the tracker circuit 1D may also include one or more arbitrary additional filter circuits on the voltage supply path P41. For example, the tracker circuit 1D may also include an arbitrary additional filter circuit having one end connected to the output switch circuit 30 and the other end connected to the filter circuit 40D and the external connection terminal 141 and / or an arbitrary additional filter circuit having one end connected to the output switch circuit 30 and the filter circuit 40D and the other end connected to the external connection terminal 141. For example, in Fig.13In the embodiment, an arbitrary additional filter circuit may be connected between the output switch circuit 30 and a node on the voltage supply path P41 of the switch S55 connected to the filter circuit 40D. For another example, an arbitrary additional filter circuit may be connected between a node on the voltage supply path P41 of the switch S55 connected to the filter circuit 40D and a node on the voltage supply path P41 of the switch S56 connected to the filter circuit 40D. For another example, an arbitrary additional filter circuit may be connected between a node on the voltage supply path P41 of the switch S56 connected to the filter circuit 40D and the external connection terminal 141. These arbitrary additional filter circuits may be the same as the filter circuit 40D, including an inductor, a capacitor, and a switch.

[0306] [3.3 Effects, etc.]

[0307] As described above, in the tracker circuit 1D of the present embodiment, the output switch circuit 30 may be configured to further selectively output at least one discrete voltage among the plurality of discrete voltages to the power amplifier 2D, and the power amplifier 2D may be configured to output the high frequency signal RF of the frequency band D to which FDD is applied. D Amplification, the tracker circuit 1D may also have a voltage supply path P43 connecting the output switch circuit 30 and the power amplifier 2D, and the filter circuit 40D may also include an inductor L53, a capacitor C52 and a switch S57. The inductor L53 and the capacitor C52 may also be connected to the voltage supply path P42 branch via the switch S57, and connected to the voltage supply path P43 branch. The switch S57 may also be connected in series with the voltage supply path P43. One end of the switch S57 may also be connected to the path between the inductor L52 and the power amplifier 2B in the voltage supply path P42, and the other end of the switch S57 is connected to the power amplifier 2D.

[0308] That is, the tracker circuit 1D of the present embodiment may further include an external connection terminal 143 configured to respond to a high-frequency signal RF of a frequency band D to which FDD is applied. D The amplified power amplifier 2D is connected; and the voltage supply path P43 connects the output switch circuit 30 and the external connection terminal 143. The filter circuit 40D may also further include an inductor L53, a capacitor C52 and a switch S57. The inductor L53 and the capacitor C52 may also be connected between the voltage supply path P42 and the ground via the switch S57, and connected between the voltage supply path P43 and the ground. The switch S57 may also be connected between the output switch circuit 30 and the external connection terminal 143. One end of the switch S57 may also be connected to the path between the inductor L52 in the voltage supply path P42 and the external connection terminal 142, and the other end of the switch S57 may also be connected to the external connection terminal 143.

[0309] Thus, the connection of the inductors L51 to L53 and a part or all of the capacitors C51 and C52 to the voltage supply paths P41 to P43 can be switched by the switches S55 to S57, and the stop band of the filter circuit 40D can be changed. In particular, with respect to the voltage supply path P41, the three switches S55 to S57 can be switched to cut off the inductors L51 to L53 and the capacitors C51 and C52 from the voltage supply path P41, connect the inductors L51 and the capacitors C51 to the voltage supply path P41 in a shunt manner, and connect the inductors L51 to L53 and the capacitors C51 and C52 to the voltage supply path P41 in a shunt manner. In addition, for the voltage supply path P42, the three switches S55 to S57 can be used to switch the inductor L51 and the capacitor C51 to the voltage supply path P42 in a shunt connection, the inductor L52 to the voltage supply path P42 in series, and the inductors L51 to L53 and the capacitors C51 and C52 to the voltage supply path P42 in a shunt connection. In this way, in the filter circuit 40D, the three switches S55 to S57 can be used to switch the multiple stop bands of the three voltage supply paths P41 to P43.

[0310] For example, in the tracker circuit 1D of the present embodiment, the high frequency signal RF is amplified by the power amplifier 2A. A In the case of (i) if the high frequency signal RF A If the channel bandwidth is greater than the first threshold width, switches S55, S56 and S57 can be turned off. (ii) If the high-frequency signal RF A The channel bandwidth is greater than the second threshold width and less than the first threshold width, then the switch S55 can be closed, and the switch S56 and the switch S57 can be opened. (iii) If the high frequency signal RF A If the channel bandwidth is less than the second threshold width, the switch S55 can be opened, and the switch S56 and the switch S57 can be closed, and the high frequency signal RF is amplified by the power amplifier 2B. B In the case of (i) if the high frequency signal RF B The channel bandwidth of the high frequency signal RF is greater than the second threshold width, the switch S55 can be closed, and the switch S56 and the switch S57 can be opened. (ii) If the high frequency signal RF B If the channel bandwidth is less than the second threshold width, the switch S55 can be opened, and the switch S56 and the switch S57 can be closed, and the high frequency signal RF is amplified by the power amplifier 2B. C In the case of, the switch S55 can be closed, and the switch S56 and the switch S57 can be opened, and the high frequency signal RF is amplified by the power amplifier 2D. DIn this case, switch S55 may be opened, and switch S56 and switch S57 may be closed.

[0311] Thus, the switches S55 to S57 can be switched on and off according to the frequency band of the high-frequency signal and the channel bandwidth, thereby achieving a balance between reducing noise in the voltage supply paths P41 to P43 and suppressing degradation of a plurality of discrete voltages.

[0312] For example, in the tracker circuit 1D of this embodiment, the frequency band A may be included in the range of 3300 to 5000 MHz, the frequency band B and the frequency band C may be included in the range of 1427 to 2690 MHz, and the frequency band D may be included in the range of 698 to 960 MHz.

[0313] Thus, the wider the available channel bandwidth and the higher the frequency band, the more types of stopbands the filter circuit 40D can realize according to the channel bandwidth. Therefore, the stopband can be controlled more finely according to the channel bandwidth, and the spurious emission in the power amplifiers 2A, 2B and 2D can be effectively reduced.

[0314] (Other embodiments)

[0315] The tracker circuit, tracker module, and tracking method of the present invention are described above based on the embodiments, but the tracker circuit, tracker module, and tracking method of the present invention are not limited to the above embodiments. Other embodiments implemented by combining any constituent elements in the above embodiments, modified examples obtained by implementing various modifications that can be conceived by those skilled in the art to the above embodiments within the scope of the present invention, and various devices having the above tracker circuit built therein are also included in the present invention.

[0316] For example, in the circuit configurations of the various circuits of the above-described embodiments, other circuit elements and wirings may be inserted between the paths connecting the various circuit elements and signal paths disclosed in the drawings. For example, an impedance matching circuit may be inserted between the power amplifier 2A and the filter 3A.

[0317] In addition, in each of the above-mentioned embodiments, a plurality of discrete voltages are supplied from the switched capacitor circuit to the output switch circuit, but the present invention is not limited thereto. For example, a plurality of voltages may be supplied from a plurality of DCDC converters, respectively. In addition, when the voltage levels of the plurality of discrete voltages are equally spaced, it is preferred to use a switched capacitor circuit, which is effective for miniaturization of the tracker module.

[0318] In addition, in the above embodiments, four discrete voltages are supplied to the power amplifier, but the number of discrete voltages is not limited to 4. For example, as long as the plurality of discrete voltages at least include a voltage corresponding to the maximum output power and a voltage corresponding to the output power with the highest generation frequency, PAE can be improved.

[0319] In the first embodiment, the plurality of circuit components of the tracker circuit 1A are arranged on the main surface 90a of the module substrate 90, but they may be arranged on both the main surface 90a and the main surface 90b. In this case, for example, the integrated circuit 80 may be arranged on the main surface 90b.

[0320] In addition, in each of the above embodiments, the tracker circuit includes one output switch circuit 30, but may also include a plurality of output switch circuits. Fig.14 As shown, the tracker circuit may be configured to include two output switch circuits and to supply a plurality of discrete voltages to six power amplifiers via six external connection terminals.

[0321] Fig.14 FIG. 4 is a circuit diagram of a filter circuit 41 and a filter circuit 42 according to another embodiment. Fig.14 In FIG. 1 , the tracker circuit includes two output switch circuits 31 and 32 , two filter circuits 41 and 42 , and six external connection terminals 141 to 146 .

[0322] The external connection terminals 144 to 146 are connected to different power amplifiers (not shown). The external connection terminals 144 to 146 are used to supply a plurality of discrete voltages V T4 ~V T6 Terminals.

[0323] Since the output switch circuit 31 and the output switch circuit 32 have the same structure as the output switch circuit 30 , detailed description thereof will be omitted.

[0324] The filter circuit 41 and the filter circuit 42 each have a structure similar to the filter circuit 40D. Specifically, the filter circuit 41 includes inductors L51 to L53, capacitors C51 and C52, and switches S55 to S58. The switch S58 is connected between the voltage supply path P42 and the external connection terminal 146. By closing the switch S58, the output switch circuit 31 can output a plurality of discrete voltages to the external connection terminal 146.

[0325] In the filter circuit 42, inductors L54 to L56, capacitors C53 and C54, switches S59 to S58, and voltage supply paths P44 to P46 correspond to inductors L51 to L53, capacitors C51 and C52, switches S55 to S58, and voltage supply paths P41 to P43, respectively.

[0326] The present invention can be widely used in communication equipment such as mobile phones as a tracker circuit for supplying voltage to a power amplifier.

[0327] Description of Reference Numerals

[0328] 1A, 1B, 1D…tracker circuit, 2A, 2B, 2D…power amplifier, 3A, 3B, 3C, 3D…filter, 4A, 4B, 4C…switch, 5…RFIC, 6A, 6B, 6D…antenna, 7A, 7B, 7D…communication device, 10…pre-regulator circuit, 20…switched capacitor circuit, 30, 31, 32…output switch circuit, 40A, 40B, 40C, 40D, 41, 42…filter circuit, 50…DC power supply, 60…digital control circuit, 61…first controller, 62…second controller, 80…integrated circuit, 80a…PR switch section, 80b…SC switch section, 80c…OS switch Switch portion, 80d…Filter switch portion, 90…Module substrate, 90a, 90b…Main surface, 90e…Ground electrode layer, 91…Resin component, 92…Shielding electrode layer, 100…Tracker module, 110, 131, 132, 133, 134…Input terminal, 111, 112, 113, 114, 130…Output terminal, 115, 116…Inductor connection terminal, 141, 142, 143, 144, 145, 146…External connection terminal, 150…Electrode, 601, 602, 603, 604…Control terminal, P41, P42, P43, P44, P45, P46…Voltage supply path.

Claims

1. A tracker circuit, comprising: an output switch circuit configured to selectively output at least one discrete voltage among a plurality of discrete voltages to the first power amplifier; A first voltage supply path connecting the output switch circuit and the first power amplifier; and A filter circuit connected to the first voltage supply path, The first power amplifier is configured to amplify a first high frequency signal of a first frequency band using time division duplexing. The filter circuit is not connected in series with the first voltage supply path but is connected in shunt.

2. The tracker circuit according to claim 1, wherein: The filter circuit comprises a first inductor, a first capacitor and a first switch connected in series. The first inductor and the first capacitor are connected in a branch manner to the first voltage supply path via the first switch.

3. The tracker circuit of claim 2, wherein: When the channel bandwidth of the first high frequency signal is greater than a first threshold width, the first switch is turned off. When the channel bandwidth of the first high-frequency signal is smaller than the first threshold width, the first switch is closed.

4. The tracker circuit of claim 3, wherein: The filter circuit has a stopband that depends on the width of the first threshold.

5. The tracker circuit according to any one of claims 2 to 4, wherein: The first frequency band is included in the range of 3300 to 5000 MHz.

6. The tracker circuit of claim 2, wherein: The output switch circuit is configured to further selectively output at least one discrete voltage among the plurality of discrete voltages to the second power amplifier. The second power amplifier is configured to amplify at least one of a second high frequency signal in a second frequency band to which time division duplexing is applied and a third high frequency signal in a third frequency band to which frequency division duplexing is applied. The tracker circuit further includes a second voltage supply path, wherein the second voltage supply path connects the output switch circuit and the second power amplifier. The first inductor and the first capacitor are connected in a shunt relationship with the second voltage supply path. The first switch is connected in series with the second voltage supply path.

7. The tracker circuit of claim 6, wherein: When the first high frequency signal is amplified by the first power amplifier, (i) if the channel bandwidth of the first high frequency signal is greater than a first threshold width, the first switch is opened, and (ii) if the channel bandwidth of the first high frequency signal is less than the first threshold width, the first switch is closed. When the second high-frequency signal or the third high-frequency signal is amplified by the second power amplifier, the first switch is closed.

8. The tracker circuit of claim 6, wherein: The filter circuit further comprises: a second inductor connected in series with a path between the first switch and the second power amplifier in the second voltage supply path; and The second switch is connected in series with a path connecting the first voltage supply path and the second voltage supply path. One end of the second switch is connected to the first voltage supply path, and the other end of the second switch is connected to a path between the second inductor and the second power amplifier in the second voltage supply path.

9. The tracker circuit of claim 8, wherein: When the first high-frequency signal is amplified by the first power amplifier, (i) if the channel bandwidth of the first high-frequency signal is greater than a first threshold width, the first switch and the second switch are opened, (ii) if the channel bandwidth of the first high-frequency signal is greater than a second threshold width and less than the first threshold width, the first switch is closed and the second switch is opened, (iii) if the channel bandwidth of the first high-frequency signal is less than the second threshold width, the first switch is opened and the second switch is closed, When the second high frequency signal is amplified by the second power amplifier, (i) if the channel bandwidth of the second high frequency signal is greater than the second threshold width, the first switch is closed and the second switch is opened, (ii) if the channel bandwidth of the second high frequency signal is less than the second threshold width, the first switch is opened and the second switch is closed, When the third high frequency signal is amplified by the second power amplifier, the first switch is closed and the second switch is opened.

10. The tracker circuit according to any one of claims 6 to 9, wherein: The first frequency band is within the range of 3300 to 5000 MHz. The second frequency band and the third frequency band are included in the range of 1427 to 2690 MHz.

11. The tracker circuit of claim 8, wherein: The output switch circuit is configured to further selectively output at least one discrete voltage among the plurality of discrete voltages to a third power amplifier. The third power amplifier is configured to amplify a fourth high frequency signal in a fourth frequency band using frequency division duplexing. The tracker circuit further includes a third voltage supply path, wherein the third voltage supply path connects the output switch circuit and the third power amplifier. The filter circuit further includes a third inductor, a second capacitor and a third switch. The third inductor and the second capacitor are connected in a branch connection to the second voltage supply path via the third switch, and are also connected in a branch connection to the third voltage supply path. The third switch is connected in series with the third voltage supply path. One end of the third switch is connected to a path between the second inductor and the second power amplifier in the second voltage supply path, and the other end of the third switch is connected to the third power amplifier.

12. The tracker circuit of claim 11, wherein: When the first high-frequency signal is amplified by the first power amplifier, (i) if the channel bandwidth of the first high-frequency signal is greater than a first threshold width, the first switch, the second switch, and the third switch are opened, (ii) if the channel bandwidth of the first high-frequency signal is greater than a second threshold width and less than the first threshold width, the first switch is closed, and the second switch and the third switch are opened, (iii) if the channel bandwidth of the first high-frequency signal is less than the second threshold width, the first switch is opened, and the second switch and the third switch are closed, When the second high frequency signal is amplified by the second power amplifier, (i) if the channel bandwidth of the second high frequency signal is greater than the second threshold width, the first switch is closed, and the second switch and the third switch are opened; (ii) if the channel bandwidth of the second high frequency signal is less than the second threshold width, the first switch is opened, and the second switch and the third switch are closed. When the third high frequency signal is amplified by the second power amplifier, the first switch is closed, and the second switch and the third switch are opened. When the fourth high frequency signal is amplified by the third power amplifier, the first switch is opened, and the second switch and the third switch are closed.

13. A tracker circuit according to claim 11 or 12, wherein: The first frequency band is within the range of 3300 to 5000 MHz. The second frequency band and the third frequency band are included in the range of 1427 to 2690 MHz. The fourth frequency band is included in the range of 698 to 960 MHz.

14. A tracker circuit comprising: The first external connection terminal is connected to the first power amplifier, wherein: The first power amplifier is configured to amplify a first high frequency signal of a first frequency band using time division duplexing; an output switch circuit configured to selectively output at least one discrete voltage among a plurality of discrete voltages to the first external connection terminal; a first voltage supply path, directly connecting the output switch circuit to the first external connection terminal; and The filter circuit is connected between the first voltage supply path and the ground.

15. The tracker circuit of claim 14, wherein: The filter circuit comprises a first inductor, a first capacitor and a first switch connected in series. The first inductor and the first capacitor are connected between the first voltage supply path and the ground via the first switch.

16. The tracker circuit of claim 15, wherein: The above tracker circuit also has: A second external connection terminal connected to a second power amplifier, wherein the second power amplifier is configured to amplify at least one of a second high frequency signal of a second frequency band applying time division duplexing and a third high frequency signal of a third frequency band applying frequency division duplexing; and The second voltage supply path is connected between the output switch circuit and the second external connection terminal. The first switch is connected between the output switch circuit and the second external connection terminal. The first inductor and the first capacitor are connected between a path between the first switch and the second external connection terminal in the second voltage supply path and ground.

17. The tracker circuit of claim 16, wherein: The filter circuit further comprises: a second inductor connected between the first switch and the second external connection terminal; and The second switch is connected between the first voltage supply path and the second voltage supply path. One end of the second switch is connected to the first voltage supply path, and the other end of the second switch is connected to a path between the second inductor and the second external connection terminal in the second voltage supply path.

18. The tracker circuit of claim 17, wherein: The above tracker circuit also has: a third external connection terminal connected to a third power amplifier, wherein the third power amplifier is configured to amplify a fourth high frequency signal of a fourth frequency band using frequency division duplexing; and A third voltage supply path is connected between the output switch circuit and the third external connection terminal. The filter circuit further includes a third inductor, a second capacitor and a third switch. The third inductor and the second capacitor are connected between the second voltage supply path and the ground via the third switch, and are connected between the third voltage supply path and the ground. The third switch is connected between the output switch circuit and the third external connection terminal. One end of the third switch is connected to a path between the second inductor and the second external connection terminal in the second voltage supply path, and the other end of the third switch is connected to the third external connection terminal.

19. A tracking method, wherein: When the channel bandwidth of the high frequency signal in the frequency band for time division duplexing amplified by the power amplifier is equal to or larger than the threshold width, the filter circuit is not connected to the voltage supply path, When the channel bandwidth is smaller than the threshold width, the filter circuit is connected to the voltage supply path. At least one discrete voltage among a plurality of discrete voltages is selectively supplied to the power amplifier via the voltage supply path.

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