Chip, circuit board assembly and manufacturing method thereof, and electronic equipment

Abstract

The invention provides a chip, a circuit board assembly, a manufacturing method of the circuit board assembly and electronic equipment. The chip comprises a substrate which is provided with a first surface; the wafer is fixed on the first surface; the side wall comprises a plurality of wall bodies, the plurality of wall bodies form a split type structure, and the plurality of wall bodies are respectively fixed on the first surface. According to the invention, the rigidity of the chip can be smaller.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a chip, a circuit board assembly, a manufacturing method thereof, and an electronic device. Background Art

[0002] In the production process of circuit board assembly, the chip is first made of wafer and substrate, and then a ball grid array is set at the bottom of the chip, and the chip is soldered to the circuit board through the ball grid array. In the process of making the chip, due to the large difference in thermal expansion coefficients between the substrate and the wafer, the substrate will inevitably warp. In order to prevent the problem of loose welding between the chip and the circuit board due to excessive warping of the chip, it is necessary to reduce the warping of the chip before soldering it to the circuit board.

[0003] In the related art, the warping of the chip is reduced by increasing the rigidity of the chip. However, when the circuit board assembly is in use, both the circuit board and the chip will warp. Since the chip has a large rigidity, when the circuit board warps, the chip with a large rigidity cannot warp to the same extent as the circuit board, which will cause the solder balls between the chip and the circuit board to break, thereby affecting the normal use of the chip. Summary of the invention

[0004] In order to solve the above technical problems, the present application provides a chip, a circuit board assembly, a manufacturing method thereof, and an electronic device, which can make the chip more rigid.

[0005] The first aspect of the present application provides a chip, comprising: a substrate, a wafer and a side wall. The substrate has a first surface. The wafer is fixed to the first surface. The side wall comprises a plurality of wall bodies, the plurality of wall bodies form a split structure, and the plurality of wall bodies are respectively fixed to the first surface.

[0006] During the board-level reliability test of the chip or the use of the chip, each wall of the side wall with a split structure can produce sufficient deformation when heated or stressed. Compared with the side wall with an integral structure, the side wall with a split structure adopted in the present application has a smaller rigidity. Therefore, compared with the chip including the side wall with an integral structure, the chip including the split structure in the present application has a smaller rigidity. Therefore, when the circuit board warps due to heat, the chip can warp along with the circuit board to reduce the stress of the solder balls between the chip and the circuit board, thereby reducing the risk of solder ball breakage, and further reducing the situation where the chip cannot be used normally due to solder ball breakage.

[0007] In some embodiments, a plurality of walls are arranged around the chip. Since the area of ​​the first surface of the substrate is usually larger than the projection area of ​​the chip on the first surface, during the welding process between the substrate and the chip, the portion of the substrate surrounding the projection of the chip on the first surface will be warped. When the chip is applied to a circuit board assembly, the chip needs to be welded to the circuit board. When a plurality of walls are arranged around the chip, the plurality of walls can apply pressure to the portion of the substrate surrounding the projection of the chip on the first surface, thereby reducing the warping of the chip, thereby making the welding between the chip and the circuit board more secure.

[0008] The number of chips can be one or more. When the number of chips is one, multiple walls are arranged around the chip; when the number of chips is multiple, multiple walls are surrounded to form a containing space, and multiple chips are located in the containing space.

[0009] Furthermore, the accommodation space formed by the multiple walls is open toward the side away from the substrate, so that it is convenient to perform heat dissipation and power consumption testing on the chip through the open accommodation space.

[0010] In some embodiments, there is a first gap between two adjacent walls. In this way, during use, when each wall is warped by force or heat, the portion displaced by the warping can move into the first gap, that is, the first gap provides enough space for the displacement of the wall, so that each wall will not interfere with the warping of other walls, thereby further reducing the rigidity of the chip.

[0011] Regarding the structure of the wall, in a first possible implementation, at least one wall includes a first connecting wall and a second connecting wall connected to each other, the first connecting wall and the second connecting wall are both long strip structures, and the extension direction of the first connecting wall and the extension direction of the second connecting wall have an angle. In other words, the first connecting wall and the second connecting wall can form an "L"-shaped structure. When each wall structure is the same, multiple walls can be combined to form a rectangular frame structure. In this case, the side wall may include four walls, and the four walls are arranged in a rectangular array, and the first gap between every two adjacent walls is away from the corner of the rectangular frame structure. In this way, the rigidity of the chip can be moderate, thereby better reducing the warping of the chip.

[0012] In a second possible implementation, at least one wall is a strip-shaped structure and extends along a first direction. The first direction is perpendicular to the thickness direction of the chip. For example, each wall can be a strip-shaped structure. When a plurality of walls are combined to form a rectangular frame, the side wall can include four walls, two of which are arranged opposite to each other, and the other two walls are arranged opposite to each other. The first gap between each two adjacent walls is located at the corner of the rectangular frame, thereby further reducing the rigidity of the chip.

[0013] Based on this, a through groove can be set on the wall, which is set along the extension direction of the wall and passes through from the top surface to the bottom surface of the wall. In this way, circuit components can be set in the through groove and fixed on the circuit board.

[0014] In a third possible implementation, at least one wall is a block structure. For example, each wall can be a block structure, thereby further reducing the rigidity of the side wall and further reducing the rigidity of the chip.

[0015] In some embodiments, the thermal expansion coefficient of the sidewall is greater than the thermal expansion coefficient of the substrate. When the thermal expansion coefficient of an object is greater, the object can produce greater deformation when heated. In the present application, the thermal expansion coefficient of the sidewall is greater than the thermal expansion coefficient of the substrate, so the sidewall can produce a greater deformation when heated, so that the sidewall will not inhibit the deformation of the substrate, so that the chip can deform together with the circuit board, that is, the chip can warp together with the circuit board.

[0016] Moreover, the width dimension of the wall is in the range of 3mm-15mm. It is understandable that the multiple directions perpendicular to the thickness direction of the wall include the length direction and the width direction, and the dimension in the length direction is greater than the dimension in the width direction. Therefore, the width dimension of the wall is the smallest dimension among the dimensions in the multiple directions perpendicular to the thickness direction of the wall. If the width dimension of the wall is less than 3mm, the width dimension of the wall is too small. When the chip needs to fix the pressing block on the wall, the surface of the fixing pressing block on the wall is relatively narrow, which leads to the connection between the wall and the pressing block not being strong enough; if the width dimension of the wall is greater than 15mm, the wall will occupy too large an area of ​​the first surface of the substrate, which leads to the distance between the chip and other electrical devices fixed on the substrate being too small and causing mutual interference. Therefore, when the width dimension of the wall is in the range of 3mm-15mm, the wall can provide a sufficiently large mounting surface for the pressing block to make the connection between the two firm; it can also occupy a smaller area of ​​the substrate, thereby ensuring a sufficient distance between the chip and other electrical devices.

[0017] In addition, the elastic modulus of the side wall ranges from 50Gpa to 360Gpa, and the Young's modulus of the side wall ranges from 30Gpa to 410Mpa. The larger the elastic modulus and Young's modulus of an object, the smaller the deformation of the object when subjected to force; the smaller the elastic modulus and Young's modulus of an object, the larger the deformation of the object when subjected to force. The elastic modulus and Young's modulus of the side wall of the present application are selected within the above range, so that the elastic modulus and Young's modulus of the side wall are moderate, and appropriate deformation can be generated when subjected to force, so as to provide reliable fixation for the compression block while also reducing the increase in chip stiffness. Based on this, the material of the side wall may include metal or glass. The metal or glass has sufficient hardness to achieve a fixed connection with the compression block.

[0018] On the basis of the above structure, the chip also includes a pressing block, which is detachably connected to the side of the side wall away from the substrate. The chip can be applied to a circuit board assembly. When the circuit board assembly is manufactured, the chip can be fixed to the circuit board by welding. Since the chip includes a side wall and a pressing block, and the pressing block is connected to the side wall, the side wall and the pressing block can jointly apply pressure to the substrate, thereby reducing the warping of the substrate, that is, reducing the warping of the chip. After the chip is fixed to the circuit board, the pressing block can be removed, so that the chip in the circuit board assembly only includes the side wall but not the pressing block, thereby reducing the stiffness of the chip. Therefore, this scheme can reduce the warping of the chip in the process of manufacturing the circuit board assembly, making the welding between the chip and the circuit board more firm, and can also remove the pressing block after the chip is fixed to the circuit board to reduce the stiffness of the chip.

[0019] Regarding the structure of the pressing block, in a possible implementation, the pressing block is an integrated structure. In this way, the rigidity of the pressing block is relatively large. While the side wall and the pressing block jointly apply pressure to the substrate, the side wall and the pressing block are also subjected to the reaction force generated by the substrate having a tendency to warp. Since the rigidity of the pressing block is relatively large, the pressing block is not easily deformed when subjected to the reaction force provided by the substrate, and therefore, the warping of the chip can be better reduced.

[0020] Based on this, in one example, a hollow portion is provided on the pressing block, and the projection of the hollow portion on the first surface overlaps with the projection of the wafer on the first surface. For example, the hollow portion corresponds to the position of the wafer, and the projection of the hollow portion on the first surface may be larger than the projection of the wafer on the first surface; or, the projection of the hollow portion on the first surface may be the same as the projection of the wafer on the first surface; or, the projection of the hollow portion on the first surface may be smaller than the projection of the wafer on the first surface.

[0021] Before fixing the chip on the circuit board, it is necessary to perform a heat dissipation power consumption test on the chip. When a hollow portion is provided on the pressing block, and the projection of the hollow portion on the first surface overlaps with the projection of the chip on the first surface, the hollow portion can provide sufficient space for the heat dissipation power consumption test of the chip, thereby facilitating the heat dissipation power consumption test.

[0022] In another example, the thickness of the side wall is greater than the thickness of the wafer, and the pressing block is a cover plate structure. When the thickness of the side wall is greater than the thickness of the wafer, the top surface of the side wall is higher than the top surface of the wafer. Since the pressing block is fixed to the top surface of the side wall, the bottom surface of the pressing block is higher than the top surface of the wafer. Therefore, when the pressing block is a cover plate structure, the pressing block will not collide with the wafer. The cover plate structure can increase the rigidity and weight of the pressing block, thereby better reducing the warping of the chip. The pressing block is a cover plate structure, which means that the pressing block is a flat plate structure, and the plate surface of the flat plate is a complete surface, that is, no hollow parts, grooves, holes and other structures are set.

[0023] Regarding the structure of the pressing block, in another possible implementation, the pressing block includes a plurality of pressing bodies surrounding the wafer, the plurality of pressing bodies forming a split structure, a second gap being provided between two adjacent pressing bodies, and the second gap not overlapping with the first gap between two adjacent wall bodies. In this way, on the one hand, the pressing block can provide pressure to the substrate to reduce the warpage of the substrate; on the other hand, when the second gap does not overlap with the first gap, the structural rigidity of the pressing block and the side wall after being connected can be moderate, thereby better controlling the warpage of the substrate and thus better controlling the warpage of the chip.

[0024] Based on this, a hollow portion is provided on the pressing block, that is, a hollow portion can be formed between the multiple pressing bodies. The projection of the hollow portion on the first surface overlaps with the projection of the chip on the first surface. In this way, the hollow portion can provide sufficient test space for the heat dissipation power consumption test of the chip, thereby facilitating the heat dissipation power consumption test.

[0025] In some embodiments, the thickness of the pressing block is greater than the thickness of the sidewall. Thus, by controlling the thickness of the pressing block, the weight of the pressing block is greater than the weight of the sidewall, thereby providing a greater pressure to the substrate, thereby better reducing the warpage of the substrate, and further better reducing the warpage of the chip.

[0026] In some embodiments, the projection of the pressing block on the first surface covers the projection of the sidewall on the first surface. In this way, the surface area of ​​the pressing block can be adjusted so that the weight of the pressing block is greater than the weight of the sidewall, thereby providing a greater pressure on the substrate, thereby better reducing the warpage of the substrate, and further better reducing the warpage of the chip.

[0027] In a second aspect of the present application, a circuit board assembly is provided, comprising a circuit board and a chip according to any of the above embodiments, wherein the chip is fixed on the circuit board and the substrate faces the circuit board. The circuit board assembly can achieve all the effects of the chip.

[0028] In a third aspect of the present application, an electronic device is provided, comprising a housing and a circuit board assembly according to any one of the above embodiments, wherein the circuit board assembly is fixed in the housing. The electronic device can achieve all the effects of the circuit board assembly.

[0029] The fourth aspect of the present application also provides a method for manufacturing the above-mentioned circuit board assembly, the manufacturing method comprising: fixing a wafer to a first surface of a substrate; fixing a pressing block structure to the first surface to obtain a chip, wherein the pressing block structure comprises a side wall and a pressing block detachably connected to the side wall, the side wall comprises a plurality of walls, the plurality of walls form a split structure, and the plurality of walls are respectively fixed to the first surface. The chip is fixed to the circuit board, with the substrate facing the circuit board. The pressing block is removed.

[0030] Because the chip is provided with side walls and a pressure block before being fixed on the circuit board, and the pressure block is connected to the side walls, the side walls and the pressure block can jointly apply pressure to the substrate, thereby reducing the warpage of the substrate, that is, reducing the warpage of the chip. After the chip is fixed on the circuit board, the pressure block can be removed, so that the chip in the circuit board assembly only includes the side walls but not the pressure block, thereby reducing the rigidity of the chip. Therefore, this solution can reduce the warpage of the chip in the process of fixing the chip on the circuit board, making the welding between the chip and the circuit board more firm, and can also remove the pressure block after the chip is fixed on the circuit board to reduce the rigidity of the chip.

[0031] In a possible implementation, before the step of fixing the pressing block structure to the first surface to obtain the chip, the manufacturing method further includes: fixing the pressing block to the side wall in a detachable manner to obtain the pressing block structure. Since the side wall is a split structure, when the pressing block is an integral structure, after the pressing block is fixed to the side wall to form the pressing block structure, the pressing block structure is an integral structure, thereby facilitating fixing the pressing block structure on the chip.

[0032] Based on this, the step of fixing the pressing block structure on the first surface to obtain the chip includes: applying adhesive on the first surface. Placing the pressing block structure on the adhesive to obtain the chip. Applying pressure on the pressing block structure and heating the chip. Baking the chip. In this way, the connection between the substrate and the pressing block structure is more firmly established by heating twice.

[0033] In another possible implementation, the step of fixing the pressing block structure to the first surface to obtain the chip includes: fixing the side wall to the first surface. Fixing the pressing block to the side of the side wall away from the substrate in a detachable manner to obtain the chip. Before fixing the chip to the circuit board, it is necessary to perform a heat dissipation power consumption test on the chip. The heat dissipation power consumption test can be performed before the pressing block is fixed to the side wall. This facilitates the heat dissipation power consumption test. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0035] Figure 1 It is a structural schematic diagram of a circuit board assembly in the related art;

[0036] Figure 2 for Figure 1 A schematic diagram of the manufacturing process of the circuit board assembly shown;

[0037] Figure 3 For the general Figure 2 (3) is a schematic diagram of the structure of a chip with warpage after ball implantation and placed on a circuit board;

[0038] Figure 4 for Figure 2 Schematic diagram of a circuit board assembly shown in (6) that is warped during use;

[0039] Figure 5 for Figure 1 A plan view of the circuit board assembly shown;

[0040] Figure 6 This is a schematic structural diagram of a circuit board assembly in the first embodiment of the present application;

[0041] Figure 7 for Figure 6 A cross-sectional view at AA when the side wall of the circuit board assembly shown adopts the first structure;

[0042] Figure 8 This is a schematic diagram of the structure of a circuit board assembly in the second embodiment of the present application;

[0043] Fig. 9 for Figure 8 Sectional view at the middle BB;

[0044] Fig.10 for Figure 6 A cross-sectional view at AA when the side wall of the circuit board assembly shown adopts the second structure;

[0045] Fig.11 for Figure 6 A cross-sectional view at AA when the side wall of the circuit board assembly shown adopts the third structure;

[0046] Fig.12 for Figure 6 A cross-sectional view at AA when the side wall of the circuit board assembly shown adopts the fourth structure;

[0047] Fig.13 This is a schematic structural diagram of a circuit board assembly in a third embodiment of the present application;

[0048] Fig.14 for Fig.13 A cross-sectional view at CC when the pressing block in the circuit board assembly shown adopts the first structure;

[0049] Fig.15 This is a schematic structural diagram of a circuit board assembly in a fourth embodiment of the present application;

[0050] Fig.16 for Fig.13A cross-sectional view at CC when the pressing block in the circuit board assembly shown adopts the first structure;

[0051] Fig.17 for Fig.16 Sectional view at DD in the middle;

[0052] Fig.18 This is a structural schematic diagram of a circuit board assembly in a fifth embodiment of the present application;

[0053] Fig.19 for Figure 6 A schematic flow chart of a first method for manufacturing a circuit board assembly is shown;

[0054] Fig. 20 To adopt Fig.19 A schematic diagram of a specific manufacturing process of a circuit board assembly according to the manufacturing method shown;

[0055] Fig.21 for Figure 6 A schematic flow chart of a second method for manufacturing a circuit board assembly is shown;

[0056] Fig. 22 To adopt Fig.21 The manufacturing method shown is a schematic diagram of the specific manufacturing process of the circuit board assembly.

[0057] Icons: 1-circuit board assembly; 10-circuit board; 11-rib; 12-screw; 13-groove; 20-chip; 21-substrate; 211-first surface; 212-second surface; 22-wafer; 23-bump; 24-pressing block structure; 25-side wall; 251-wall; 2511-first connecting wall; 2512-second connecting wall; 252-accommodating space; 253-first gap; 254-through hole; 26-pressing block; 261-hollow part; 262-pressing body; 2621-first pressing plate; 2622-second pressing plate; 263-second gap; 264-countersunk hole; 27-adhesive; 30-grid ball array; 31-solder ball. DETAILED DESCRIPTION

[0058] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0059] The term "and / or" herein is merely a description of the association relationship of associated objects, indicating that there may be three relationships. For example, A and / or B may represent: A exists alone, A and B exist at the same time, and B exists alone, wherein A and B may be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one (item)" refers to one or more, and "plurality" refers to two or more. "At least one of the following (items)" or similar expressions refers to any combination of these items, including any combination of single (items) or plural (items). For example, at least one (item) of a, b or c may represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", wherein a, b, c may be single or multiple.

[0060] The terms "first" and "second" in the description and claims of the embodiments of the present application are used to distinguish different objects rather than to describe a specific order of objects. For example, a first target object and a second target object are used to distinguish different target objects rather than to describe a specific order of target objects.

[0061] "Connected", "connected" and similar words are used to express the intercommunication or interaction between different components, which may include direct connection or indirect connection through other components. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, inclusion of a series of steps or units. Methods, systems, products or devices are not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices. "Up", "down", "left", "right" and the like are only used relative to the orientation of the components in the drawings. These directional terms are relative concepts. They are used for description and clarification relative to the description, which may change accordingly according to the change of the orientation of the components in the drawings.

[0062] In the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0063] In the description of the embodiments of the present application, unless otherwise specified, the meaning of "multiple" refers to two or more than two. For example, multiple processing units refer to two or more processing units; multiple systems refer to two or more systems.

[0064] An electronic device is usually provided with a housing and a circuit board assembly, and the circuit board assembly is fixed in the housing. Figure 1 As shown, the circuit board assembly 1 includes a circuit board 10, a chip 20, a ball grid array 30 and circuit components ( Figure 1 The chip 20 is electrically connected to the circuit board 10 through the ball grid array 30. The ball grid array 30 includes a plurality of solder balls 31 arranged in an array. The circuit components are also electrically connected to the circuit board 10. The circuit components may be, for example, resistors, capacitors, or inductors. The chip 20 includes a substrate 21, a die 22, and bumps 23 located between the substrate 21 and the die 22. The die 22 is fixed to the substrate 21 through the bumps 23, and the die is fixed to the side of the substrate 21 facing away from the circuit board 10.

[0065] When manufacturing the circuit board assembly 1 , the chip 20 may be manufactured first, and then the chip 20 may be fixed on the circuit board 10 .

[0066] The chip 20 can be manufactured by flip chip packaging (FC). In this process, the wafer can be polished and cut to obtain the following: Figure 2 The wafer 22 shown in (1) is shown in FIG. Figure 2 As shown in (2), bumps 23 are formed on the surface of wafer 22. Figure 2 As shown in (3), a flip-chip process is used to make the bumps 23 face the substrate 21, and the bumps 23 are placed on the substrate 21. The bumps 23 on the wafer 22 are soldered to the pads on the substrate 21 by a process such as reflow soldering to obtain a chip 20.

[0067] The material of the chip 22 includes silicon (Si), and the material of the substrate 21 is a composite material including copper. Therefore, the materials of the chip 22 and the substrate 21 are quite different, and thus, the coefficient of thermal expansion (CTE) of the chip 22 and the substrate 21 are quite different. Figure 2 As shown in (3), the deformation amounts of the wafer 22 and the substrate 21 are different, and the chip 20 will be warped.

[0068] like Figure 3As shown, after the chip 20 is manufactured, the chip 20 needs to be soldered to the circuit board 10. Since the warpage of the chip 20 is too large, the problem of loose soldering between the chip 20 and the circuit board 10 will occur during the process of soldering the chip 20 to the circuit board 10. In order to ensure that the chip 20 and the circuit board 10 are soldered firmly, the coplanarity (COP) of the chip 20 needs to meet the requirements of the surface mount technology (SMT), that is, the warpage of the chip 20 needs to meet the warpage requirements, that is, the warpage of the chip 20 cannot be too large.

[0069] In order to reduce the warpage of the chip 20, in one example, Figure 2 As shown in (4), a pressure block structure 24 can be added to the substrate 21. The pressure block structure 24 is usually a metal part. In this way, the pressure block structure 24 can provide pressure for the chip 20, and the pressure can reduce the warpage of the chip 20. In another example, the thermal expansion coefficient of the wafer 22 and the substrate 21 can be adjusted to reduce the warpage generated during the manufacturing process of the chip 20.

[0070] Then, if Figure 2 Zhong (5) and Figure 2 As shown in (6), the chip 20 is fixed on the circuit board 10 by using a flip chip ballgrid array (FCBGA). Figure 2 As shown in (5), a ball grid array (BGA) 30 may be fabricated on the bottom surface of the substrate 21. Figure 2 As shown in (6), the chip 20 is soldered to the circuit board 10 through the ball grid array 30 to obtain Figure 2 The circuit board assembly 1 shown in (6).

[0071] like Figure 2 As shown in (6), the circuit board assembly 1 also includes a pressing block structure 24. However, the pressing block structure 24 is usually a metal part. The setting of the pressing block structure 24 increases the rigidity of the chip 20. During the board level reliability (BLR) test and the long-term use of the chip 20, the circuit board 10 and the chip 20 both generate heat. Figure 4 As shown, both the circuit board 10 and the chip 20 will warp. Since the chip 20 has a relatively large rigidity, when the circuit board 10 warps, the chip 20 with a relatively large rigidity cannot warp to the same extent as the circuit board 10, which will cause the solder balls 31 between the chip 20 and the circuit board 10 to break, thereby affecting the normal use of the chip 20.

[0072] In order to reduce the risk of the solder ball 31 breaking, in the first related technology, the thermal expansion coefficients of the circuit board 10 and the chip 20 are adjusted to reduce the difference between the thermal expansion coefficients of the circuit board 10 and the chip 20, so that the warping degrees of the circuit board 10 and the chip 20 in long-term operation are close, thereby reducing the strain ratchet effect generated by the solder ball 31 during use and reducing the board-level reliability risk.

[0073] However, the circuit board 10 is usually a printed circuit board (PCB). Moreover, in order to meet the application requirements of the high-performance chip 20, the circuit board 10 includes multiple layers of copper plates and multiple layers of dielectric plates stacked alternately, which will result in a smaller degree of freedom in adjusting the thermal expansion coefficient of the circuit board 10, thereby making it difficult to reduce the difference between the thermal expansion coefficients of the circuit board 10 and the chip 20.

[0074] In the second related technology, an edge bond is provided at the edge of the chip 20 to bond the edge of the chip 20 to the circuit board 10 , thereby preventing relative displacement between the chip 20 and the circuit board 10 and protecting the solder balls 31 .

[0075] However, the edge glue adhesive can only bond the edge of the chip 20 and the circuit board 10, but does not wrap and protect the solder balls 31. Therefore, the protection effect on the solder balls 31 is limited during the operation of the chip 20 or in the board-level reliability test.

[0076] like Figure 5 As shown, in order to improve the rigidity of the circuit board 10, a spacer 11 is usually provided on the circuit board 10, and the spacer 11 is fixed on the circuit board 10 by screws 12. Therefore, in the third related technology, by reducing the spacer 11, reducing the screws 12, increasing the distance between the screws 12 and the chip 20, and opening a groove 13 in the stress sensitive area of ​​the circuit board 10, the pulling force of the screws 12 on the circuit board 10 and the solder ball 31 during the welding process can be reduced, the stress of the solder ball 31 can be reduced, and the welding reliability of the chip 20 and the circuit board 10 can be improved.

[0077] However, the solution of reducing the ribs 11, reducing the screws 12, and increasing the distance between the screws 12 and the chip 20 requires full consideration of the structure and layout of the circuit board 10, the chip 20 fixed on the circuit board 10, and other circuit components, and is difficult to implement. The solution of opening the groove 13 on the circuit board 10 will reduce the strength and rigidity of the circuit board 10, thereby causing damage to the circuit board 10 during use.

[0078] Based on this, Figure 6As shown, the embodiment of the present application provides a circuit board assembly 1, which includes a circuit board 10, a chip 20 and a ball grid array 30. The chip 20 is fixed on the circuit board 10 through the ball grid array 30.

[0079] like Figure 6 As shown, the chip 20 includes: a substrate 21, a wafer 22, bumps 23 and sidewalls 25. The substrate 21 has a first surface 211. The first surface 211 is a surface of the substrate 21 that is away from the circuit board 10.

[0080] The wafer 22 is fixed to the first surface 211 through the bumps 23. The number of the wafer 22 can be one or more. Figure 6 As shown, when the number of the wafer 22 is one, the wafer 22 is fixed to the first surface 211 of the substrate 21 through the bumps 23. Figure 8 As shown, when there are multiple wafers 22, the multiple wafers 22 are fixed to the first surface 211 of the substrate 21 through the bumps 23. The material of the wafer 22 may include silicon, or may include aluminum nitride, silicon carbide, gallium nitride, etc.

[0081] like Figure 7 and Fig. 9 As shown, the side wall 25 includes a plurality of walls 251, and the plurality of walls 251 form a split structure. The plurality of walls 251 are respectively fixed to Figure 6 The first surface 211 is shown. During the board-level reliability test and use of the circuit board assembly 1, each wall 251 of the side wall 25 with a split structure can produce sufficient deformation when heated or stressed. Compared with the side wall with an integral structure, the side wall 251 with a split structure adopted in this embodiment has a smaller rigidity. Therefore, compared with the chip including the side wall with an integral structure, the chip 20 including the split structure in this embodiment has a smaller rigidity. Therefore, when the circuit board 10 is warped due to heat, the chip 20 can be warped together with the circuit board 10, thereby reducing the stress of the solder ball 31 between the chip 20 and the circuit board 10, thereby reducing the risk of the solder ball 31 breaking, and further reducing the situation where the chip 20 cannot be used normally due to the breakage of the solder ball 31, thereby improving the reliability of the chip 20.

[0082] A plurality of walls 251 are arranged around the wafer 22. Figure 7 As shown, when the number of wafers 22 is one, a plurality of walls 251 are arranged around the wafer 22. Fig. 9 As shown, when there are multiple wafers 22, multiple walls 251 are arranged around the multiple wafers 22. Exemplarily, the multiple walls 251 can enclose a receiving space 252, and the multiple wafers 22 are all located in the receiving space 252.

[0083] like Figure 6As shown, since the area of ​​the first surface 211 of the substrate 21 is usually larger than the projection area of ​​the chip 22 on the first surface 211, during the welding process of the substrate 21 and the chip 22, the portion of the substrate 21 surrounding the projection of the chip 22 on the first surface 211 will be warped. When a plurality of walls 251 are arranged around the chip 22, the plurality of walls 251 can apply pressure on the portion of the substrate 21 surrounding the projection of the chip 22 on the first surface 211, thereby reducing the warpage of the chip 20, thereby making the welding between the chip 20 and the circuit board 10 more secure.

[0084] like Figure 7 As shown, there is a first gap 253 between two adjacent walls 251. In this way, during use, when each wall 251 is warped by force or heat, the part displaced by the warping can move into the first gap 253, that is, the first gap 253 provides enough space for the displacement of the wall 251, so that each wall 251 will not interfere with the warping of other walls 251, thereby further reducing the rigidity of the chip 20.

[0085] Regarding the structure of the wall 251, in a first possible implementation manner, as Figure 7 As shown, the wall 251 includes a first connecting wall 2511 and a second connecting wall 2512 connected to each other. The first connecting wall 2511 and the second connecting wall 2512 are both long strip structures. The extension direction of the first connecting wall 2511 and the extension direction of the second connecting wall 2512 have an angle. The angle can be, for example, 90°. In other embodiments, the angle is also an acute angle or an obtuse angle. In this way, the first connecting wall 2511 and the second connecting wall 2512 can form an "L"-shaped structure.

[0086] like Figure 7 As shown, the plurality of walls 251 may be enclosed into a rectangular frame shape. In this case, the side wall 25 may include four walls 251a, 251b, 251c and 251d. The four walls 251a, 251b, 251c and 251d are arranged in a rectangular array.

[0087] like Figure 7 As shown, the first connecting wall 2511 of the wall 251a and the first connecting wall 2511 of the wall 251b are arranged opposite to each other, and the second connecting wall 2512 of the wall 251a and the second connecting wall 2512 of the wall 251b extend in opposite directions and have a first gap 253. The positional relationship between the wall 251b and the wall 251c, the positional relationship between the wall 251c and the wall 251d, and the positional relationship between the wall 251d and the wall 251a are similar to the positional relationship between the wall 251a and the wall 251b, and will not be described in detail here.

[0088] like Figure 7 As shown, the first gap 253 between the wall 251a and the wall 251b, the first gap 253 between the wall 251b and the wall 251c, the first gap 253 between the wall 251c and the wall 251d, and the first gap 253 between the wall 251d and the wall 251a are all far away from the corners of the rectangular frame structure, thereby making the rigidity of the chip 20 moderate, thereby better reducing the warpage of the chip 20.

[0089] Moreover, the width of the first connecting wall 2511 and the second connecting wall 2512 of each wall 251 may range from 3 mm to 15 mm. The width of the first connecting wall 2511 may refer to the dimension of the first connecting wall 2511 along the X direction, and the width of the second connecting wall 2512 may refer to the dimension of the second connecting wall 2512 along the Y direction.

[0090] Regarding the structure of the side wall 25, in a second possible implementation manner, as shown in FIG. Fig.10 As shown, each wall 251 is a long strip structure and extends in a straight line. A plurality of walls 251 can be combined into a rectangular frame structure. In this case, the side wall 25 may include four walls 251, namely two walls 251a and two walls 251b. Two walls 251a are arranged opposite to each other, and the other two walls 251b are arranged opposite to each other. Moreover, the extension direction of the wall 251a is different from that of the wall 251b. For example, the two walls 251a extend along the X direction, and the two walls 251b extend along the Y direction. The X direction is perpendicular to the Y direction, and both the X direction and the Y direction are perpendicular to the thickness direction of the circuit board assembly 1.

[0091] like Fig.10 As shown, the width dimension of each wall 251 may range from 3mm to 15mm. It is understandable that the multiple directions perpendicular to the thickness direction of the wall 251 may include a length direction and a width direction, and the dimension in the length direction is greater than the dimension in the width direction. Therefore, the width dimension of the wall 251 may be the smallest dimension in the multiple directions perpendicular to the thickness direction of the wall 251. Exemplarily, for wall 251a, its width dimension may be the dimension of wall 251a along the Y direction. For wall 251b, its width dimension may be the dimension of wall 251b along the X direction. If the width dimension of wall 251 is less than 3mm, the width dimension of wall 251 is too small, and when the chip 20 needs to be fixed on the wall 251 Fig.13 When the pressing block 26 is shown, the surface of the wall 251 on which the pressing block 26 is fixed is relatively narrow, which results in an insufficiently firm connection between the wall 251 and the pressing block 26; if the width of the wall 251 is greater than 15 mm, the wall 251 will occupy Figure 8The first surface 211 of the substrate 21 shown is too large, so that the distance between the chip 22 and other electrical devices fixed on the substrate 21 is too small, causing mutual interference. Therefore, when the width of the wall 251 ranges from 3mm to 15mm, the wall 251 can provide a sufficiently large mounting surface for the pressing block 26 to ensure a firm connection between the two; it can also occupy a smaller area of ​​the substrate 21, thereby ensuring a sufficient distance between the chip 22 and other electrical devices.

[0092] Moreover, if Fig.10 As shown, there is a first gap 253 between every two adjacent walls 251. The first gap 253 is close to the corner of the rectangular frame structure, thereby further reducing Figure 6 The stiffness of the chip 20 in the illustrated embodiment.

[0093] Based on this, a through groove ( Fig.10 (not shown), the through groove is arranged along the extension direction of the wall 251, and the through groove runs through from the top surface to the bottom surface of the wall 251, so that the circuit components can be arranged in the through groove and fixed on the circuit board 10.

[0094] Regarding the structure of the side wall 25, in a third possible implementation manner, as shown in FIG. Fig.11 As shown, each wall 251 is a block structure. The wall 251 is a block structure, which may mean that the ratio between the dimension of the wall 251 along the X direction and the dimension along the Y direction is 1 or close to 1.

[0095] like Fig.11 As shown, a plurality of walls 251 are evenly distributed on the periphery of the chip 22 in an array arrangement. A first gap 253 is provided between every two walls 251, thereby further reducing the rigidity of the sidewall 25 and further reducing the rigidity of the chip 20.

[0096] It is understandable that in Figure 7 , Fig. 9 , Fig.10 and Fig.11 In the embodiment shown, the structure of each wall 251 is the same, in other embodiments, the structure of each wall 251 is different; or, the structure of the first wall 251 is the same, the structure of the second wall 251 is the same, or the structure of the first wall 251 and the structure of the second wall 251 are different. Fig.12 As shown, the first wall 251a is made of Figure 7 The structure of the embodiment shown in the figure, the second wall 251b is Fig.11 The structure of the embodiment shown.

[0097] In this embodiment, the thermal expansion coefficient of the sidewall 25 is greater than the thermal expansion coefficient of the substrate 21. When the thermal expansion coefficient of an object is greater, the deformation of the object when heated is greater. When the thermal expansion coefficient of the sidewall 25 is greater than the thermal expansion coefficient of the substrate 21, the sidewall 25 can be greatly deformed when heated, so that the sidewall 25 will not inhibit the deformation of the substrate 21, so that the chip 20 can be moved along with the substrate 21. Figure 8 The circuit board 10 shown is deformed together.

[0098] In addition, the elastic modulus of the side wall 25 ranges from 50Gpa to 360Gpa, and the Young's modulus of the side wall 25 ranges from 30Gpa to 410Mpa. The larger the elastic modulus and Young's modulus of an object, the smaller the deformation of the object when subjected to force; the smaller the elastic modulus and Young's modulus of an object, the larger the deformation of the object when subjected to force. The elastic modulus and Young's modulus of the side wall 25 are selected within the above ranges, so that the elastic modulus and Young's modulus of the side wall 25 are moderate, and can produce appropriate deformation when subjected to force, so as to achieve the desired effect. Fig.13 The clamp shown provides a secure fixation while increasing the rigidity of the chip by a relatively small amount.

[0099] Exemplarily, the material of the side wall 25 may be a metal material, such as stainless steel, copper, etc. The material of the side wall 25 may also be a non-metal material, such as glass, plastic, etc. Metal or glass has sufficient hardness to achieve a fixed connection with the pressing block 26 .

[0100] In other embodiments of the present application, Fig.13 As shown, Figure 6 The difference between the embodiments shown is that Figure 7 The chip 20 of the embodiment shown in the figure has a pressing block 26 added thereto. That is, in the embodiment, the chip 20 includes a substrate 21, bumps 23, a wafer 22, a sidewall 25 and a pressing block 26.

[0101] The pressing block 26 is detachably connected to the side of the side wall 25 away from the base plate 21. For example, the pressing block 26 can be connected to the side wall 25 by fastener connection, mortise and tenon structure plugging or glue bonding. When the pressing block 26 is fixed to the side wall 25 by fastener connection, as shown in FIG. Fig.13 As shown, a countersunk hole 264 can be provided on the surface of the pressing block 26 away from the side wall 25, and the countersunk hole 264 penetrates the side wall 25. A threaded hole 254 is provided on the side wall 25, and the countersunk hole 264 is communicated with the threaded hole 254. In this way, a screw can be placed in the countersunk hole 264 and screwed into the threaded hole 254, so that the pressing block 26 can be detachably fixed to the side wall 25. The screw head can sink into the countersunk hole 264 and does not exceed the top surface of the pressing block 26.

[0102] When manufacturing the chip 20, the substrate 21 may be glued with chip adhesive (AD) to form adhesive glue on the first surface 211. The side wall 25 and the pressing block 26 are connected as a whole and fixed on the adhesive glue on the first surface 211. The adhesive glue may be cured by applying pressure on the pressing block 26 and heating the chip 20. Since the screw head connecting the side wall 25 and the pressing block 26 does not extend beyond the top surface of the pressing block 26, it is convenient to apply pressure on the pressing block 26.

[0103] The chip 20 can be fixed on the circuit board 10 by welding. Since the chip 20 includes the side wall 25 and the pressing block 26, and the pressing block 26 is connected to the side wall 25, the side wall 25 and the pressing block 26 can jointly apply pressure to the substrate 21, thereby reducing the warpage of the substrate 21, that is, reducing the warpage of the chip 20. After the chip 20 is fixed on the circuit board 10, the pressing block 26 can be removed to obtain Figure 7 The circuit board assembly 1 shown. The chip 20 in the circuit board assembly 1 thus includes only the side wall 25 but not the pressing block 26, thereby reducing the rigidity of the chip 20. Therefore, the present solution can reduce the warpage of the chip 20 during the process of manufacturing the circuit board assembly 1, making the welding between the chip 20 and the circuit board 10 more secure, and can also remove the pressing block 26 after the chip 20 is fixed on the circuit board 10 to reduce the rigidity of the chip 20.

[0104] like Fig.13 As shown, in this embodiment, the thickness of the sidewall 25 is greater than the thickness of the wafer 22, and the top surface of the sidewall 25 is also higher than the top surface of the wafer 22. In other embodiments, the thickness of the sidewall 25 may also be the same as the thickness of the wafer 22, or less than the thickness of the wafer 22.

[0105] Regarding the structure of the pressing block 26, in a possible implementation manner, as Fig.14 As shown, the pressing block 26 is an integrated structure. Exemplarily, the pressing block 26 can be obtained by cutting a flat plate or the like; or, the pressing block 26 can be formed by sequentially connecting end to end a plurality of long strips extending in a straight line and welding them. Since the pressing block 26 is an integrated structure, the pressing block 26 is a rigid structure, and therefore, the rigidity of the pressing block 26 is relatively large. When the side wall 25 and the pressing block 26 jointly apply pressure to the substrate 21, the side wall 25 and the pressing block 26 are also subjected to a reaction force generated by the warping tendency of the substrate 21. Since the rigidity of the pressing block 26 is relatively large, the pressing block 26 is not easily deformed when subjected to the reaction force, and therefore, the warping degree of the chip 20 can be better reduced.

[0106] Based on this, in one example, Fig.13As shown, a hollow portion 261 is provided on the pressing block 26, and the projection of the hollow portion 261 on the first surface 211 overlaps with the projection of the wafer 22 on the first surface 211. For example, the hollow portion 261 corresponds to the position of the wafer 22, and the projection of the hollow portion 261 on the first surface 211 may be larger than the projection of the wafer 22 on the first surface 211; or, the projection of the hollow portion 261 on the first surface 211 may be the same as the projection of the wafer 22 on the first surface 211; or, the projection of the hollow portion 261 on the first surface 211 may be smaller than the projection of the wafer 22 on the first surface 211.

[0107] Before fixing the chip 20 on the circuit board 10, it is necessary to perform a heat dissipation and power consumption test on the chip 22. When a hollow portion 261 is provided on the pressing block 26, and the projection of the hollow portion 261 on the first surface 211 overlaps with the projection of the chip 22 on the first surface 211, and the accommodating space 252 formed by the multiple walls 251 is open to the side away from the substrate 21, the hollow portion 261 and the accommodating space 252 can provide sufficient test space for the heat dissipation and power consumption test of the chip 22, thereby facilitating the heat dissipation and power consumption test.

[0108] In another example, Fig.15 As shown, the pressing block 26 is a cover plate structure. In this case, the top surface of the side wall 25 is higher than the top surface of the wafer 22. Since the pressing block 26 is fixed to the top surface of the side wall 25, the bottom surface of the pressing block 26 is higher than the top surface of the wafer 22. Therefore, when the pressing block 26 is a cover plate structure, the pressing block 26 will not collide with the wafer 22. The cover plate structure can increase the rigidity and weight of the pressing block 26, thereby better reducing the warpage of the chip 20.

[0109] It can be understood that the pressing block 26 is a cover plate structure, which means that the pressing block 26 is a flat plate structure, and the plate surface of the flat plate is a complete surface, that is, no hollow parts, grooves, holes and other structures are set.

[0110] Regarding the structure of the pressing block 26, in another possible implementation, as Fig.16 As shown, the pressing block 26 includes a plurality of pressing bodies 262 surrounding the wafer 22, and the plurality of pressing bodies 262 form a split structure. Fig.16 As shown, the plurality of pressing bodies 262 may be combined into a rectangular frame structure. In this case, the pressing block 26 may include four pressing bodies 262a, 262b, 262c and 262d. The four pressing bodies 262a, 262b, 262c and 262d are arranged in a rectangular array.

[0111] like Fig.16As shown, each pressing body 262 may include a first pressing plate 2621 and a second pressing plate 2622 connected to each other, the first pressing plate 2621 and the second pressing plate 2622 are both long strip structures, and the extension direction of the first pressing plate 2621 and the extension direction of the second pressing plate 2622 form an angle. The angle may be 90°. In other words, the first pressing plate 2621 and the second pressing plate 2622 may form an "L" shaped structure.

[0112] like Fig.16 As shown, the first pressing plate 2621 of the pressing body 262a and the first pressing plate 2621 of the pressing body 262b are arranged opposite to each other, and the second pressing plate 2622 of the pressing body 262a and the second pressing plate 2622 of the pressing body 262b extend in opposite directions and have a second gap 263. The positional relationship between the pressing body 262b and the pressing body 262c, the positional relationship between the pressing body 262c and the pressing body 262d, and the positional relationship between the pressing body 262d and the pressing body 262a are similar to the positional relationship between the pressing body 262a and the pressing body 262b, and will not be described in detail here.

[0113] like Fig.16 As shown, there is a second gap 263 between two adjacent pressing bodies 262. Fig.17 As shown, the second gap 263 does not overlap with the first gap 253. Thus, on the one hand, the pressing block 26 can be Fig.13 The substrate 21 shown provides pressure to reduce the warping of the substrate 21, thereby reducing the warping of the chip 20; on the other hand, compared with the structure in which the second gap 263 overlaps with the first gap 253, the structure in which the second gap 263 does not overlap with the first gap 253 can make the rigidity of the structure after the pressing block 26 and the side wall 25 are connected greater, so that the rigidity of the structure is moderate, and thus the warping of the substrate 21 can be better controlled, so as to better control the warping of the chip 20.

[0114] Based on this, Fig.16 As shown, a hollow portion 261 is provided on the pressing block 26, that is, a hollow portion 261 can be formed between a plurality of pressing bodies 262. Fig.13 As shown, the projection of the hollow portion 261 on the first surface 211 overlaps with the projection of the wafer 22 on the first surface 211. In this way, the hollow portion 261 can provide sufficient test space for the heat dissipation and power consumption test of the wafer 22, thereby facilitating the heat dissipation and power consumption test.

[0115] like Fig.18 As shown, the thickness of the pressing block 26 is greater than the thickness of the side wall 25. Here, the thickness of the side wall 25 may be the dimension of the side wall 25 along the Z direction. In addition, the circuit board assembly 1 may also generally include a heat dissipation structure ( Fig.18), and the heat dissipation structure can be installed after removing the pressing block 26, so that the heat dissipation structure will not limit the thickness of the pressing block 26. In this way, by controlling the thickness of the pressing block 26, the weight of the pressing block 26 is greater than the weight of the sidewall 25, thereby providing a greater pressure for the substrate 21, thereby better reducing the warpage of the substrate 21, and further better reducing the warpage of the chip 20.

[0116] The projection of the pressing block 26 on the first surface 211 covers the projection of the side wall 25 on the first surface 211. For example, in a possible implementation, Fig.13 As shown, the projection of the pressing block 26 on the first surface 211 is the same as the projection of the side wall 25 on the first surface 211, that is, the size of the pressing block 26 along the X direction is the same as the size of the side wall 25 along the X direction, and the pressing block 26 along the X direction is the same as the projection of the side wall 25 on the first surface 211. Fig.14 The dimension in the Y direction shown is the same as the dimension of the side wall 25 along the Y direction.

[0117] In another possible implementation, Fig.18 As shown, the projected area of ​​the pressing block 26 on the first surface 211 is larger than the projected area of ​​the sidewall 25 on the first surface 211. For example, the size of the pressing block 26 along the X direction is larger than the size of the sidewall 25 along the X direction. Moreover, the size of the pressing block 26 along the Y direction is larger than the size of the sidewall 25 along the Y direction. In this way, by adjusting the size of the pressing block 26 along the X direction and / or the size along the Y direction, the weight of the pressing block 26 is greater than the weight of the sidewall 25, thereby providing a greater pressure on the substrate 21, thereby better reducing the warpage of the substrate 21, and further better reducing the warpage of the chip 20.

[0118] The material of the pressing block 26 can be metal, such as stainless steel, copper, etc., or non-metallic material, such as glass, plastic, etc. The material of the pressing block 26 can be the same as that of the side wall 25, or different from that of the side wall 25.

[0119] The present application also provides a method for manufacturing a circuit board assembly, which can be used to manufacture Figure 6 and Figure 8 The circuit board assembly 1 shown in FIG. 8 is taken as an example to illustrate the method for manufacturing the circuit board assembly 1. Fig.19 As shown, the production method includes:

[0120] S51, fixing the pressing block 26 on the side wall 25 in a detachable manner to obtain the pressing block structure 24.

[0121] The pressing block 26 can be connected to the side wall 25 by fastener connection, mortise and tenon structure insertion or glue bonding. The side wall 25 can be a split structure, and the pressing block 26 can be an integrated structure. After the pressing block 26 is fixed to the side wall 25 to form the pressing block structure 24, the pressing block structure 24 is an integrated structure.

[0122] S52 , fixing the wafer 22 on the substrate 21 .

[0123] like Fig. 20 As shown, the substrate 21 has a first surface 211, and the chip 22 is fixed to the first surface 211 through the bumps 23. The projection of the chip 22 on the first surface 211 is smaller than the first surface 211. The bottom surface of the substrate 21 may be provided with an underfill (UF).

[0124] It can be understood that, in this embodiment, step S51 is executed first and then step S52. In other embodiments, step S52 may be executed first and then step S51, or step S51 and step S52 may be executed simultaneously.

[0125] S53 , coating the adhesive 27 on the substrate 21 .

[0126] The adhesive 27 may be applied to the area of ​​the first surface 211 where the chip 22 is not fixed. Specifically, the adhesive 27 may be formed on the first surface 211 by dispensing the chip adhesive on the substrate 21 .

[0127] S54 , placing the pressing block structure 24 on the adhesive 27 to obtain the chip 20 .

[0128] The pressing block structure 24 can be placed on the adhesive 27 by the robot arm grabbing, aligning and placing. When the pressing block structure 24 is an integrated structure, it is convenient to fix the pressing block structure 24 on the substrate 21.

[0129] S55 , applying pressure to the pressing block structure 24 and heating the chip 20 .

[0130] The chip 20 may be placed in a hot pressing device, pressure may be applied to the pressing block structure 24 , and the chip 20 may be heated to solidify the adhesive 27 between the pressing block structure 24 and the substrate 21 .

[0131] S56 , baking the chip 20 .

[0132] The chip 20 can be placed in an oven for baking until the adhesive 27 is completely cured. In this way, the connection between the substrate 21 and the pressing block structure 24 is made more secure by heating twice.

[0133] S57 , fixing the chip 20 on the circuit board 10 .

[0134] Ball grid array package (BGA) can be implanted on the second surface 212 of the substrate 21 of the chip 20 to obtain Fig. 20 The ball grid array 30 is shown as being soldered to the circuit board 10 by using surface mounting technology and reflow soldering.

[0135] S58, removing the pressing block 26.

[0136] The pressing block 26 is removed by removing the fasteners, decoupling the mortise and tenon structure or removing the glue by automated equipment. Since the chip 20 includes the side wall 25 and the pressing block 26 before the chip 20 is fixed on the circuit board 10, and the pressing block 26 is connected to the side wall 25, the side wall 25 and the pressing block 26 can jointly apply pressure to the substrate 21, thereby reducing the warpage of the substrate 21, that is, reducing the warpage of the chip 20. After the chip 20 is fixed on the circuit board 10, the pressing block 26 can be removed. Thus, the chip 20 in the circuit board assembly 1 only includes the side wall 25, but not the pressing block 26, thereby reducing the rigidity of the chip 20. Therefore, this solution can reduce the warpage of the chip 20 in the process of manufacturing the circuit board assembly 1, making the welding between the chip 20 and the circuit board 10 more firm, and can also remove the pressing block 26 after the chip 20 is fixed on the circuit board 10 to reduce the rigidity of the chip 20.

[0137] In addition, the above-mentioned method for manufacturing the circuit board assembly 1 can directly use the hot pressing equipment, oven, automation equipment, etc. required in the production process of the circuit board assembly 1 in the related technology without the need for additional equipment. As a result, the manufacturing method of this embodiment is compatible with the manufacturing method of the related technology, and there is no need to improve the production line, thereby reducing manufacturing costs.

[0138] In other embodiments of the present application, a method for manufacturing a circuit board assembly is also provided, which can be used to manufacture Figure 6 and Figure 8 The circuit board assembly 1 shown in FIG. Fig.19 The difference between the embodiments shown is that the structure of the pressing block 26 used in the embodiment is different. Fig.15 The pressing block 26 in the embodiment shown. Based on this, the manufacturing method and Fig.19 The manufacturing method shown is different. Specifically, Fig.21 As shown, the production method includes:

[0139] S61 , fixing the wafer 22 on the substrate 21 .

[0140] Reference Fig.19 Step S52 of the illustrated embodiment.

[0141] S62 , coating the adhesive 27 on the substrate 21 .

[0142] Reference Fig.19 Step S53 of the illustrated embodiment.

[0143] S63 , placing the side wall 25 on the adhesive 27 .

[0144] The robot can grab, align and place Fig. 22 The side walls 25 are shown placed on the adhesive 27 .

[0145] S64 , applying pressure to the side wall 25 and heating the adhesive 27 .

[0146] Can Fig. 22 The sidewalls 25, adhesive 27, substrate 21 and chip 22 shown are placed in a hot pressing device, pressure is applied to the sidewalls 25, and the sidewalls 25, adhesive 27, substrate 21 and chip 22 are heated to solidify the adhesive 27 between the sidewalls 25 and the substrate 21.

[0147] S65, baking the adhesive 27.

[0148] Can Fig. 22 The sidewall 25, adhesive 27, substrate 21 and wafer 22 are placed in an oven for baking until the adhesive 27 is completely cured. In this way, the connection between the substrate 21 and the sidewall 25 is more secure by heating twice. After baking the adhesive 27, the wafer 22 can also be tested for heat dissipation and power consumption.

[0149] S66 , fixing the pressing block 26 to a side of the sidewall 25 facing away from the substrate 21 in a detachable manner, to obtain the chip 20 .

[0150] like Fig. 22 As shown, the pressing block 26 can be connected to the side wall 25 by fastener connection, mortise and tenon structure insertion or glue bonding. The side wall 25 can be a split structure, and the pressing block 26 can be an integrated structure, and a cover plate structure.

[0151] S67 , fixing the chip 20 on the circuit board 10 .

[0152] Reference Fig.19 Step S57 of the illustrated embodiment.

[0153] S68, remove the pressing block 26.

[0154] Reference Fig.19 Step S58 of the illustrated embodiment.

[0155] Since the pressing block 26 is a cover plate structure in this embodiment, after the pressing block 26 is connected to the side wall 25, the pressing block 26 covers the wafer 22, thereby making it difficult to perform a heat dissipation power consumption test on the wafer 22. In this embodiment, the heat dissipation power consumption test can be performed before the pressing block 26 is fixed to the side wall 25, thereby facilitating the heat dissipation power consumption test.

[0156] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A chip, characterized in that: include: a substrate having a first surface; a wafer, the wafer being fixed to the first surface; The side wall includes a plurality of wall bodies, the plurality of wall bodies form a split structure, and the plurality of wall bodies are respectively fixed to the first surface.

2. The chip according to claim 1, characterized in that: The plurality of walls are disposed around the wafer.

3. The chip according to claim 2, characterized in that: The space enclosed by the multiple walls is open toward a side away from the base plate.

4. The chip according to any one of claims 1 to 3, characterized in that: There is a first gap between two adjacent walls.

5. The chip according to any one of claims 1 to 4, characterized in that: At least one of the walls includes a first connecting wall and a second connecting wall connected to each other. The first connecting wall and the second connecting wall are both long strip structures. An extension direction of the first connecting wall and an extension direction of the second connecting wall form an included angle.

6. The chip according to any one of claims 1 to 4, characterized in that: At least one of the walls is a strip-shaped structure and extends along a first direction, and the first direction is perpendicular to the thickness direction of the chip.

7. The chip according to any one of claims 1 to 4, characterized in that: At least one of the walls is a block structure.

8. The chip according to any one of claims 1 to 7, characterized in that: The thermal expansion coefficient of the sidewall is greater than the thermal expansion coefficient of the substrate.

9. The chip according to any one of claims 1 to 8, characterized in that: The width of the wall is in the range of 3 mm to 15 mm, and the width of the wall is the smallest dimension among dimensions in multiple directions perpendicular to the thickness direction of the wall.

10. The chip according to any one of claims 1 to 9, characterized in that: The elastic modulus of the side wall ranges from 50 Gpa to 360 Gpa, and the Young's modulus of the side wall ranges from 30 Gpa to 410 Mpa.

11. The chip according to any one of claims 1 to 10, characterized in that: The side wall is made of metal or glass.

12. The chip according to any one of claims 1 to 10, characterized in that: The chip further comprises a pressing block, which is detachably connected to a side of the side wall facing away from the substrate.

13. The chip according to claim 12, characterized in that: The pressing block is an integrated structure.

14. The chip according to claim 12, characterized in that: The pressing block includes a plurality of pressing bodies surrounding the wafer, the plurality of pressing bodies forming a split structure, a second gap being provided between two adjacent pressing bodies, and the second gap having no overlap with a first gap between two adjacent wall bodies.

15. The chip according to any one of claims 12 to 14, characterized in that: The pressing block is provided with a hollow portion, and a projection of the hollow portion on the first surface overlaps with a projection of the wafer on the first surface.

16. The chip according to claim 12 or 13, characterized in that: The thickness of the side wall is greater than the thickness of the wafer, and the pressing block is a cover plate structure.

17. The chip according to any one of claims 12 to 16, characterized in that: The thickness of the pressing block is greater than the thickness of the side wall.

18. The chip according to any one of claims 12 to 17, characterized in that: The projection of the pressing block on the first surface covers the projection of the side wall on the first surface.

19. A circuit board assembly, characterized in that: It comprises a circuit board and the chip according to any one of claims 1 to 18, wherein the chip is fixed on the circuit board, and the substrate faces the circuit board.

20. An electronic device, characterized in that: It comprises a housing and the circuit board assembly as claimed in claim 19, wherein the circuit board assembly is fixed in the housing.

21. A method for manufacturing a circuit board assembly, characterized in that: The production method comprises: Fixing the wafer to the first surface of the substrate; Fixing a pressing block structure on the first surface to obtain a chip, wherein the pressing block structure includes a side wall and a pressing block detachably connected to the side wall, the side wall includes a plurality of wall bodies, the plurality of wall bodies form a split structure, and the plurality of walls are respectively fixed to the first surface; Fixing the chip on a circuit board, wherein the substrate faces the circuit board; The pressure block is removed.

22. The manufacturing method according to claim 21, characterized in that: Before the step of fixing the pressing block structure on the first surface to obtain the chip, the manufacturing method further includes: The pressing block is detachably fixed to the side wall to obtain the pressing block structure.

23. The manufacturing method according to claim 21, characterized in that: The step of fixing the pressing block structure on the first surface to obtain a chip includes: fixing the side wall to the first surface; The pressing block is detachably fixed to a side of the side wall facing away from the substrate to obtain the chip.

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