Hdi circuit board manufacturing method, apparatus, and printed circuit board

Abstract

The application relates to an HDI circuit board manufacturing method and device and a printed circuit board. The application sequentially performs the following steps on a PCB multilayer board: drilling blind holes, first copper manufacturing, first copper reducing, first through hole drilling, second copper manufacturing, resin hole plugging, second copper reducing and third copper manufacturing, so that high vertical and horizontal blind holes and through holes are manufactured on the PCB multilayer board; better hole filling effect and better through hole copper uniformity of deep plating capacity are obtained; and the problem of uneven copper thickness caused by insufficient deep plating capacity of hole filling copper plating through holes is effectively avoided.

Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of PCB production, and more particularly to a method and device for producing an HDI circuit board and a printed circuit board. Background Art

[0002] HDI circuit boards, or high-density interconnect circuit boards, utilize micro-blind and buried via technology to create a high-density circuit board. Designed specifically for small-volume users, these compact products feature high density, high precision, and high performance. As electronic products evolve toward greater multifunctionality, sophistication, and miniaturization, HDI circuit boards are increasingly widely used.

[0003] With the development of integrated circuits, high-aspect-ratio circuit boards are increasingly being used. In the circuit board manufacturing industry, high-aspect-ratio refers to products with apertures ≤0.2mm and aspect ratios ≥15:1. The via metallization electroplating process presents significant challenges, primarily due to the significant difference in copper plating rates between the via opening and the center of the via. The copper plating rate is fast at the via opening, but slow in the center of the via. This results in a significant difference in copper thickness between the via opening and the center of the via, impacting the quality and reliability of the via copper. This can lead to uneven copper ductility and thickness, causing resistance and signal impedance issues. Furthermore, the small via diameter complicates the resin via plugging process, potentially leading to poor via quality.

[0004] High-aspect-ratio HDI circuit boards also use through-hole and blind via co-plating, which often leads to quality issues during the production process, such as poor copper uniformity, small hole diameter, uneven copper ductility, and poor resin plugging. The higher the aspect ratio of the circuit board, the more serious the problems will be. Summary of the Invention

[0005] In light of the above-mentioned issues, embodiments of the present invention provide an HDI circuit board manufacturing method, apparatus, and printed circuit board to address the prior art problem of co-plating through-hole and blind vias in HDI circuit boards with high aspect ratios. This often leads to quality issues during production, such as poor copper uniformity, small hole diameters, uneven copper ductility, and poor resin plugging. These issues become more severe with higher aspect ratios of circuit boards where both blind and through vias are plated together.

[0006] According to one aspect of an embodiment of the present invention, a method for manufacturing an HDI circuit board is provided, the method comprising:

[0007] Drilling blind holes, obtaining a PCB multilayer board and making blind holes in the PCB multilayer board;

[0008] The first copper production is to produce the first copper surface of the PCB multilayer board by copper deposition and copper plating in sequence, wherein the copper plating solution in the copper plating method is a hole filling solution;

[0009] The first copper reduction is to reduce the copper on the first surface;

[0010] Drilling a through hole for the first time to make a first through hole on the PCB multilayer board;

[0011] The second copper making process is to make the second copper surface of the PCB multilayer board by copper sinking, flash copper plating and pulse electroplating in sequence, wherein the copper plating solution in the flash copper plating and pulse electroplating methods is a non-hole filling solution;

[0012] Filling the first through hole with resin;

[0013] The second copper reduction is to reduce copper in the cover hole area of ​​the PCB multilayer board, wherein the cover hole area is the area connected to the first through hole;

[0014] The third copper making process is to sequentially make a hole-covering copper layer in the hole-covering area by copper deposition, copper flash plating and pulse electroplating. The copper plating solution in the copper flash plating and pulse electroplating methods is a non-hole-filling solution.

[0015] In some optional embodiments, the first copper reduction specifically includes:

[0016] In the first grinding, the copper on the first side was ground down by 2μm-4μm, and the grinding was performed twice with a current of 1.8A, a grinding scar width of 5mm±2mm, and a brushing time of 2 seconds;

[0017] The first micro-etching is to micro-etch the first copper surface to reduce the copper thickness by 22 μm.

[0018] In some optional embodiments, the second copper reduction specifically includes:

[0019] The second grinding is to grind off the excess resin of the resin plug hole and grind off the copper on the second side of the cover hole area to reduce the copper thickness by 2μm-4μm. The grinding is performed three times with a current of 1.8A, a grinding scar width of 5mm±2mm, and a brushing time of 2 seconds.

[0020] The second micro-etching is to micro-etch and reduce the copper in the cover hole area to a thickness of 10 μm to 20 μm;

[0021] The third grinding is to grind flat the resin protruding after the second micro-etching, and the grinding is performed once with a current of 1.8 A, a grinding scar width of 5 mm ± 2 mm, and a brushing time of 2 seconds.

[0022] In some optional embodiments, the drilling of blind holes specifically includes:

[0023] Laser blind vias, laser-drilling blind vias in the PCB multilayer board;

[0024] The first plasma debonding is used to remove excess resin in the blind hole.

[0025] In some optional embodiments, after the second copper reduction and before the third copper production, the process further includes:

[0026] Drilling a through hole a second time to form a second through hole in the PCB multilayer board;

[0027] The second plasma debonding is performed to remove excess resin in the second through hole.

[0028] In some optional embodiments, the pore filling solution is composed of 9%-11% H2SO4, 5.75%-6.25% CU 2+ , 1.125%-1.575% leveling agent, 1.125%-1.575% brightener, 50-70PPM CL - composition.

[0029] In some optional embodiments, the non-hole filling solution is composed of 22.5%-27% H2SO4, 3.375%-4.15% CU 2+ , 0.85%-1.15% leveling agent, 0.055%-0.105% brightener, 0.75-1.25 leveling agent, 50-70PPM CL - composition.

[0030] In some optional embodiments, the second copper-making and third copper-making pulse electroplating processes include six stages, specifically including:

[0031] The first stage, which accounts for 15% of the entire pulse plating cycle, uses 100% positive current for pulse plating;

[0032] The second stage, which accounts for 30% of the entire pulse plating cycle, uses a forward and reverse current ratio of 1:3 and a forward and reverse current time ratio of 20:1;

[0033] The third stage accounts for 25% of the entire pulse plating cycle, with a positive and negative current ratio of 1:3 and a positive and negative current time ratio of 18:9;

[0034] The fourth stage accounts for 10% of the entire pulse plating cycle, with a positive and negative current ratio of 1:2 and a positive and negative current time ratio of 16:8;

[0035] The fifth stage accounts for 15% of the entire pulse plating cycle, with a positive and negative current ratio of 1:2 and a positive and negative current time ratio of 14:7;

[0036] The sixth stage, accounting for 15% of the entire pulse plating cycle, uses 100% positive current for pulse plating.

[0037] According to another aspect of an embodiment of the present invention, there is provided an HDI circuit board manufacturing device, which is used to execute the above-mentioned HDI circuit board manufacturing method to manufacture a printed circuit board.

[0038] According to another aspect of an embodiment of the present invention, a printed circuit board is provided. The printed circuit board is manufactured by executing the above-mentioned HDI circuit board manufacturing method using the above-mentioned HDI circuit board manufacturing device.

[0039] The HDI circuit board manufacturing method, device, and printed circuit board of the present invention have the following beneficial effects: the present invention sequentially performs the steps of blind hole drilling, first copper preparation, first copper reduction, first through-hole drilling, second copper preparation, resin hole plugging, second copper reduction, and third copper preparation on a PCB multilayer board, thereby manufacturing high-profile blind holes and through-holes on the PCB multilayer board; achieving good hole filling effect and copper uniformity of the through-holes with good throwing power, effectively avoiding the problem of uneven copper thickness caused by insufficient throwing power of copper plating and through-hole plating.

[0040] The above description is only an overview of the technical solutions of the embodiments of the present invention. In order to more clearly understand the technical means of the embodiments of the present invention, they can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the embodiments of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are specifically listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The accompanying drawings are only used to illustrate the embodiments and are not to be considered as limiting the present invention. In addition, the same reference symbols are used to represent the same components throughout the drawings. In the drawings:

[0042] Figure 1 A schematic flow chart of a method for manufacturing an HDI circuit board according to Example 1 of the present invention is shown;

[0043] Figure 2 The figure shows a schematic diagram of the process of first copper reduction in Example 1 provided by the present invention;

[0044] Figure 3 The figure shows a schematic diagram of the process of the second copper reduction in Example 1 provided by the present invention. DETAILED DESCRIPTION

[0045] The exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present invention are shown in the drawings, it should be understood that the present invention can be implemented in various forms and should not be limited to the embodiments set forth herein.

[0046] Example 1,

[0047] See also Figure 1The embodiment of the present invention provides a method for manufacturing an HDI circuit board, the method comprising:

[0048] 110, drilling blind holes, obtaining a PCB multilayer board and making blind holes in the PCB multilayer board; in step 110, drilling blind holes specifically includes: laser blind holes, using laser to laser out blind holes in the PCB multilayer board; the first plasma debonding, removing excess resin in the blind holes.

[0049] 120, the first copper making, the first copper surface of the PCB multilayer board is made by copper sinking method and copper plating method in sequence, wherein the copper plating solution in the copper plating method adopts hole filling solution; in step 120, the hole filling solution is composed of 9%-11% H2SO4, 5.75%-6.25% CU 2+ , 1.125%-1.575% leveling agent, 1.125%-1.575% brightener, 50-70PPM CL - The filling solution can achieve good blind hole filling quality and high filling efficiency.

[0050] 130, the first copper reduction, copper reduction of the first surface copper; in step 130, the first copper reduction specifically includes: the first grinding, grinding the first surface copper to reduce copper by 2μm-4μm, grinding twice with 1.8A current, 5mm±2mm wear mark width, and 2 seconds brushing time; the first micro-etching, micro-etching the first surface copper to reduce copper, and the copper thickness is reduced by 22μm.

[0051] 140, drilling a through hole for the first time, making a first through hole in the PCB multilayer board; in step 140, a through hole can be drilled in the PCB multilayer board by mechanical drilling or laser drilling, wherein the first through hole connects the upper and lower surfaces of the PCB multilayer board.

[0052] 150, the second copper making, the second side copper is made on the PCB multilayer board by copper sinking method, flash copper plating method and pulse electroplating method in sequence, wherein the copper plating solution in the flash copper plating method and pulse electroplating method is a non-hole filling solution; in step 150, the non-hole filling solution is composed of 22.5%-27% H2SO4, 3.375%-4.15% CU 2+ , 0.85%-1.15% leveling agent, 0.055%-0.105% brightener, 0.75-1.25 leveling agent, 50-70PPM CL - In this step, a low copper ratio is used to reduce the copper plating speed in high-current areas, reduce uneven copper plating between high and low current levels, and coordinate with the reverse current in the pulse plating process to reduce the thicker copper in high-potential areas. This step is used to create a second copper layer on top of the first copper layer, thickening the copper cladding thickness of multi-layer PCBs.

[0053] 160 , filling the first through hole with resin; In step 160 , the first through hole is filled with epoxy resin to protect the inner layer circuit of the first through hole.

[0054] 170, the second copper reduction, the copper is reduced in the cover hole area of ​​the PCB multilayer board, wherein the cover hole area is the area connected to the first through hole; in step 170, the second copper reduction specifically includes: the second grinding, grinding off the excess resin of the resin plug hole, and grinding off the second side copper of the cover hole area, the copper reduction thickness is 2μm-4μm, and the grinding is performed three times with a current of 1.8A, a wear mark width of 5mm±2mm, and a brush mark time of 2 seconds; the second micro-etching, micro-etching the cover hole area to reduce the copper, and the copper reduction thickness is 10μm-20μm; the third grinding, grinding off the resin protruding after the second micro-etching, and performing one grinding with a current of 1.8A, a wear mark width of 5mm±2mm, and a brush mark time of 2 seconds.

[0055] 180, the third copper making, through the copper sinking method, flash copper plating method and pulse electroplating method to sequentially make the hole cover copper layer in the hole cover area, wherein the copper plating solution in the flash copper plating method and pulse electroplating method is a non-hole filling solution. In step 180, the non-hole filling solution is composed of 22.5%-27% H 2 SO 4 , 3.375%-4.15% CU 2+ , 0.85%-1.15% leveling agent, 0.055%-0.105% brightener, 0.75-1.25 leveling agent, 50-70PPM CL - In this step, a low copper ratio is used to reduce the copper plating speed in high-current areas, minimize uneven copper plating between high and low current levels, and facilitate the reverse current in the pulse plating process to reduce the thicker copper in high-potential areas. This step is used to create a cover copper layer in the cover area, covering the first through-hole location.

[0056] The present invention sequentially performs the steps of blind hole drilling, first copper preparation, first copper reduction, first through-hole drilling, second copper preparation, hole plugging with resin, second copper reduction, and third copper preparation on a PCB multilayer board, thereby producing high-profile blind holes and through-holes in the PCB multilayer board; achieving good hole filling effect and copper uniformity in through-holes with good deep plating capability, and effectively avoiding the problem of uneven copper thickness caused by insufficient deep plating capability of hole filling and copper plating of through-holes.

[0057] In some optional embodiments, see Figure 2 The first copper reduction includes:

[0058] 210, the first grinding, the copper on the first side is ground to reduce copper by 2μm-4μm, and two grindings are performed with 1.8A current, 5mm±2mm grinding width, and 2 seconds brushing time; the grinding can be performed by grinding equipment, and the first grinding specifically includes the following steps: according to the high current distribution characteristics of hole filling electroplating, the thicker copper is all at the pinch point position, so in the grinding stage, the product is electroplated with a pinch point end against the side of the ceramic grinding wheel, so that the grinding pressure at the position with thicker copper is the largest, and a greater grinding and copper reduction effect is obtained, ensuring that the extreme difference in copper thickness of the entire PCB multi-layer board surface is reduced.

[0059] 220, the first micro-etching, micro-etching the first copper surface to reduce the copper thickness by 22μm. In this embodiment, the first micro-etching can be performed using a micro-etching solution composed of sulfuric acid, hydrogen peroxide, a water-soluble metal salt, and a micro-etching stabilizer. The micro-etching is specifically performed by the following steps: the plated end of the product is placed horizontally on the production line. Then, the micro-etching nozzle pressure is increased according to the location of the thicker copper plating, increasing the micro-etching rate of the solution at that location to achieve a greater copper reduction effect, thereby reducing the extreme variation in copper thickness across the entire board surface.

[0060] In some optional embodiments, see Figure 3 The second copper reduction includes:

[0061] 310, the second grinding, the excess resin of the resin plug hole is ground flat, and the second side copper of the cover hole area is ground to reduce the copper thickness of 2μm-4μm, and 3 grindings are performed with 1.8A current, 5mm±2mm grinding width, and 2 seconds brushing time; grinding can be performed by grinding equipment, and the second grinding specifically includes the following steps: According to the high current distribution characteristics of the hole filling electroplating, the thicker copper is all at the pinch point position, so in the grinding stage, the product is electroplated with a pinch point on the side of the ceramic grinding wheel, so that the grinding pressure at the thicker copper position is the largest, and a greater grinding and copper reduction effect is obtained, ensuring that the extreme difference in copper thickness of the entire PCB multilayer board surface is reduced.

[0062] 320. The second micro-etching process involves micro-etching the cover hole area to reduce copper by 10-20μm. This second micro-etching process can be performed using a micro-etching solution composed of sulfuric acid, hydrogen peroxide, water-soluble metal salts, and a micro-etching stabilizer. The micro-etching process involves placing the plated end of the product horizontally against the production line. The micro-etching nozzle pressure is then increased based on the location of thicker copper plating, increasing the micro-etching rate at that location to achieve greater copper reduction, thereby minimizing the extreme variation in copper thickness across the board.

[0063] 330, the third grinding, smoothes out the resin protruding after the second micro-etching. This is done with a current of 1.8A, a 5mm±2mm grinding width, and a 2-second brushing time. The third grinding is used to remove excess resin from the cover hole area, making the surface of the cover hole area smooth and convenient for the third electroplating.

[0064] In this embodiment, the product is electroplated with a pinch point on one end against a horizontal production line, and then the micro-etching copper reduction nozzle pressure is increased according to the thicker copper plating position, and the micro-etching rate of the solution at this position is increased to achieve a multi-copper reduction effect, thereby reducing the extreme difference in copper thickness on the entire board surface. The first micro-etching is used to reduce the surface copper added by the hole filling electroplating, from approximately 25μm~30μm to 8~10μm. For the first electroplating, the extreme difference in surface copper thickness is controlled to be ≤5μm. The second micro-etching is used to reduce the surface copper that needs to be plated for hole cover, from approximately 30μm~35μm to 15~20μm. Through the two processes of grinding + micro-etching, the extreme difference in copper thickness on the board surface is controlled within 10μm for the thick copper area to ensure that the fine lines meet the etching process capabilities. If the copper thickness deviation is large or exceeds 10μm, etching will result in incomplete etching short circuits or excessive etching resulting in smaller lines.

[0065] In the above embodiment, through the first grinding, the second grinding and the third grinding, according to the high current distribution characteristics of the hole filling electroplating or the through-hole electroplating, the areas with thicker copper are all pinch points. Therefore, during the grinding stage, the end of the product with the pinch point is placed against the side of the ceramic grinding wheel. In this way, the grinding pressure at the area with thicker copper is the greatest, and a greater grinding and copper reduction effect is obtained, ensuring that the extreme difference in copper thickness of the entire board surface is reduced.

[0066] In some optional embodiments, the blind hole drilling specifically includes: laser blind hole, which is to laser-drill blind holes in the PCB multilayer board by laser; in addition, the blind hole can be made by mechanical drilling.

[0067] The first plasma degumming is to remove the excess resin in the blind hole. The resin glue remaining after drilling the PCB multilayer board can be removed by any of the following methods: vacuum plasma cleaning, chemical dissolution, mechanical removal, thermal stripping, and potassium permanganate. In this solution, the epoxy resin glue can be chemically dissolved by organic solvents such as acetone, acetic acid, and methanol to clean the resin glue. Before degumming, the target PTH hole needs to be drilled in the PCB multilayer board. The previous drilling process can be mechanical drilling or laser drilling based on the drilling data.

[0068] In some optional embodiments, after the second copper reduction and before the third copper production, the process further includes:

[0069] Drill a through hole a second time to create a second through hole in the PCB multilayer board. This step is used to create a through hole that does not require a cover hole. The second through hole can be created by mechanical drilling or laser drilling.

[0070] The second plasma degumming is used to remove the excess resin in the second through-hole. The resin glue remaining after drilling the PCB multilayer board can be degummed by any of the following methods: vacuum plasma cleaning, chemical dissolution, mechanical removal, thermal stripping, and potassium permanganate. In this solution, the epoxy resin glue can be chemically dissolved by organic solvents such as acetone, acetic acid, and methanol to clean the resin glue. Before degumming, the target PTH hole needs to be drilled in the PCB multilayer board. The previous drilling process can be mechanical drilling or laser drilling based on the drilling data.

[0071] In some optional embodiments, the hole filling solution is composed of 9%-11% H2SO4, 5.75%-6.25% CU 2+ , 1.125%-1.575% leveling agent, 1.125%-1.575% brightener, 50-70PPM CL - In this embodiment, the hole filling electroplating solution ratio is H2SO4: 90-110g / L, CU 2+ :57.5—62.5 g / L,CL - : 50-70ppm, leveling agent: 11.25-15.75ml / L, brightener: 11.25-15.75ml / L. Among them, chloride ions stabilize the quality of the copper plating lattice and enhance the ductility of the copper plating.

[0072] In some optional embodiments, the non-hole filling solution is composed of 22.5%-27% H2SO4, 3.375%-4.15% CU 2+ , 0.85%-1.15% leveling agent, 0.055%-0.105% brightener, 0.75-1.25 leveling agent, 50-70PPM CL - In this embodiment, the non-hole filling solution is the through hole plating solution, H2SO4: 250-270g / L, CU 2+ :33.75—41.5 g / L、CL - : 50-70ppm, leveler: 8.5-11.5ml / L, brightener: 0.55-1.05ml / L, wetting agent: 7.5-12.5ml / L. The high acidity of H2SO4 provides a more evenly distributed current, and the low copper ratio reduces the copper plating speed in high-current areas, reduces uneven copper plating in high and low current areas, and cooperates with the reverse current in the pulse plating process to reduce the thicker copper in the high-potential area. Chloride ions stabilize the copper plating lattice quality and enhance the copper plating ductility.

[0073] In some optional embodiments, the second copper plating and the third copper plating pulse plating include 6 stages, among which the main function of PTH is to deposit a thin layer of metal copper on the non-conductive hole wall substrate of the drilled hole by chemical method, which serves as the base for subsequent copper electroplating. Flash copper plating is to plate a layer of base copper about 5~10μm thick on the surface of the copper deposited in the through hole, so that the VCP can be pre-treated with oil, micro-etching, and pickling to ensure that the deposited copper is intact. It specifically includes:

[0074] The first stage, which accounts for 15% of the entire pulse plating cycle, uses 100% positive current for pulse plating;

[0075] The second stage, which accounts for 30% of the entire pulse plating cycle, uses a forward and reverse current ratio of 1:3 and a forward and reverse current time ratio of 20:1;

[0076] The third stage accounts for 25% of the entire pulse plating cycle, with a positive and negative current ratio of 1:3 and a positive and negative current time ratio of 18:9;

[0077] The fourth stage accounts for 10% of the entire pulse plating cycle, with a positive and negative current ratio of 1:2 and a positive and negative current time ratio of 16:8;

[0078] The fifth stage accounts for 15% of the entire pulse plating cycle, with a positive and negative current ratio of 1:2 and a positive and negative current time ratio of 14:7;

[0079] The sixth stage, accounting for 15% of the entire pulse plating cycle, uses 100% positive current for pulse plating.

[0080] See Table 1 below. Table 1 shows pulse electroplating parameters, which can uniformly plate copper and ensure that the copper plating thickness meets the requirements in the second copper making or the third copper making.

[0081]

[0082] Table 1

[0083] Example 2:

[0084] According to another aspect of an embodiment of the present invention, an HDI circuit board manufacturing device is provided, which is used to execute the above-mentioned HDI circuit board manufacturing method to manufacture a printed circuit board.

[0085] The following steps can be performed by the device of this application:

[0086] Drilling blind holes, obtaining a PCB multilayer board and making blind holes in the PCB multilayer board;

[0087] The first copper production is to produce the first copper surface of the PCB multilayer board by copper deposition and copper plating in sequence, wherein the copper plating solution in the copper plating method is a hole filling solution;

[0088] The first copper reduction is to reduce the copper on the first surface;

[0089] Drilling a through hole for the first time to make a first through hole on the PCB multilayer board;

[0090] The second copper making process is to make the second copper surface of the PCB multilayer board by copper sinking, flash copper plating and pulse electroplating in sequence, wherein the copper plating solution in the flash copper plating and pulse electroplating methods is a non-hole filling solution;

[0091] Filling the first through hole with resin;

[0092] The second copper reduction is to reduce copper in the cover hole area of ​​the PCB multilayer board, wherein the cover hole area is the area connected to the first through hole;

[0093] The third copper making process is to sequentially make a hole-covering copper layer in the hole-covering area by copper deposition, copper flash plating and pulse electroplating. The copper plating solution in the copper flash plating and pulse electroplating methods is a non-hole-filling solution.

[0094] The present invention separates the blind via and through-hole production steps, performing copper plating of the blind vias and through-holes in separate steps using a hole-filling plating solution and a high-aspect-ratio copper plating solution using a pulse electroplating process. This avoids the problem of uneven copper thickness caused by insufficient deep plating capacity of the hole-filling copper plating and the through-hole plating. In addition, if the copper thickness of the board surface exceeds the control requirements after multiple copper plating processes, the excess surface copper is removed through a special grinding and micro-etching process to achieve a surface copper tolerance that is acceptable in the subsequent etching process.

[0095] Example 3:

[0096] According to another aspect of an embodiment of the present invention, a printed circuit board is provided. The printed circuit board is manufactured by executing an HDI circuit board manufacturing method as described above using the above-mentioned HDI circuit board manufacturing device. The HDI circuit board manufacturing method, device, and printed circuit board of the present invention have the following beneficial effects: the present invention sequentially performs the steps of blind hole drilling, first copper plating, first copper reduction, first through-hole drilling, second copper plating, resin plugging, second copper reduction, and third copper plating on a multilayer PCB, thereby manufacturing high-profile blind holes and through-holes on the multilayer PCB; achieving good hole filling effect and uniform copper plating through-holes with good deep-plating capability, effectively avoiding the problem of uneven copper thickness caused by insufficient deep-plating capability of hole filling and through-hole copper plating.

[0097] In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the present invention may be practiced without these specific details. Similarly, in order to streamline the present invention and aid in understanding one or more of the various inventive aspects, in the above description of exemplary embodiments of the present invention, various features of embodiments of the present invention are sometimes grouped together into a single embodiment, figure, or description thereof. The claims that follow the detailed description are hereby expressly incorporated into that detailed description, with each claim itself serving as a separate embodiment of the present invention.

[0098] Those skilled in the art will appreciate that the modules in the devices of the embodiments can be adaptively changed and installed in one or more devices different from the embodiments. The modules, units, or components in the embodiments can be combined into one module, unit, or component, and furthermore, they can be divided into multiple submodules, subunits, or subcomponents. Except that at least some of such features and / or processes or units are mutually exclusive.

[0099] It should be noted that the above embodiments illustrate rather than limit the invention, and that alternative embodiments may be devised by a person skilled in the art without departing from the scope of the appended claims. In the claims, any reference signs placed between brackets should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present invention may be implemented by means of hardware comprising several different elements and by means of appropriately programmed computers. In a unit claim enumerating several systems, several of these systems may be embodied by the same item of hardware. The use of the words first, second, and third etc. does not indicate any order. These words may be interpreted as names. The steps in the above embodiments should not be understood as limiting the order of execution unless otherwise specified.

Claims

1. A method for manufacturing an HDI circuit board, characterized in that: The method comprises: Drilling blind holes, obtaining a PCB multilayer board and making blind holes in the PCB multilayer board; The first copper production is to produce the first copper surface of the PCB multilayer board by copper deposition and copper plating in sequence, wherein the copper plating solution in the copper plating method is a hole filling solution; The first copper reduction is to reduce the copper on the first surface; Drilling a through hole for the first time to make a first through hole on the PCB multilayer board; The second copper making process is to make the second copper surface of the PCB multilayer board by copper sinking, flash copper plating and pulse electroplating in sequence, wherein the copper plating solution in the flash copper plating and pulse electroplating methods is a non-hole filling solution; Filling the first through hole with resin; The second copper reduction is to reduce copper in the cover hole area of ​​the PCB multilayer board, wherein the cover hole area is the area connected to the first through hole; The third copper making process is to sequentially make a hole-covering copper layer in the hole-covering area by copper deposition, copper flash plating and pulse electroplating. The copper plating solution in the copper flash plating and pulse electroplating methods is a non-hole-filling solution.

2. The HDI circuit board manufacturing method according to claim 1, characterized in that: The first copper reduction specifically includes: In the first grinding, the copper on the first side was ground down by 2μm-4μm, and the grinding was performed twice with a current of 1.8A, a grinding scar width of 5mm±2mm, and a brushing time of 2 seconds; The first micro-etching is to micro-etch the first copper surface to reduce the copper thickness by 22 μm.

3. The HDI circuit board manufacturing method according to claim 1, characterized in that: The second copper reduction specifically includes: The second grinding is to grind off the excess resin of the resin plug hole and grind off the copper on the second side of the cover hole area to reduce the copper thickness by 2μm-4μm. The grinding is performed three times with a current of 1.8A, a grinding scar width of 5mm±2mm, and a brushing time of 2 seconds. The second micro-etching is to micro-etch and reduce the copper in the cover hole area to a thickness of 10 μm to 20 μm; The third grinding is to grind flat the resin protruding after the second micro-etching, and the grinding is performed once with a current of 1.8 A, a grinding scar width of 5 mm ± 2 mm, and a brushing time of 2 seconds.

4. The HDI circuit board manufacturing method according to claim 2 or 3, characterized in that: The blind hole drilling specifically includes: Laser blind vias, laser-drilling blind vias in the PCB multilayer board; The first plasma debonding is used to remove excess resin in the blind hole.

5. The method for manufacturing an HDI circuit board according to claim 4, wherein: After the second copper reduction and before the third copper production, the method further comprises: Drilling a through hole a second time to form a second through hole in the PCB multilayer board; The second plasma debonding is performed to remove excess resin in the second through hole.

6. The HDI circuit board manufacturing method according to claim 1, characterized in that: The pore filling solution is composed of 9%-11% H2SO4, 5.75%-6.25% CU 2+ , 1.125%-1.575% leveling agent, 1.125%-1.575% brightener, 50-70PPM CL - composition.

7. The HDI circuit board manufacturing method according to claim 1, characterized in that: The non-hole filling solution is composed of 22.5%-27% H2SO4, 3.375%-4.15% CU 2+ , 0.85%-1.15% leveling agent, 0.055%-0.105% brightener, 0.75-1.25 leveling agent, 50-70PPM CL - composition.

8. The method for manufacturing an HDI circuit board according to claim 1, wherein: The second copper making and the third copper making pulse electroplating include 6 stages, specifically including: The first stage, which accounts for 15% of the entire pulse plating cycle, uses 100% positive current for pulse plating; The second stage, which accounts for 30% of the entire pulse plating cycle, uses a forward and reverse current ratio of 1:3 and a forward and reverse current time ratio of 20:1; The third stage accounts for 25% of the entire pulse plating cycle, with a positive and negative current ratio of 1:3 and a positive and negative current time ratio of 18:9; The fourth stage accounts for 10% of the entire pulse plating cycle, with a positive and negative current ratio of 1:2 and a positive and negative current time ratio of 16:8; The fifth stage accounts for 15% of the entire pulse plating cycle, with a positive and negative current ratio of 1:2 and a positive and negative current time ratio of 14:7; The sixth stage, accounting for 15% of the entire pulse plating cycle, uses 100% positive current for pulse plating.

9. An HDI circuit board manufacturing device, characterized in that: The device is used to execute the HDI circuit board manufacturing method according to any one of claims 1 to 8 to manufacture a printed circuit board.

10. A printed circuit board, characterized in that: The printed circuit board is manufactured by executing the HDI circuit board manufacturing method according to any one of claims 1 to 8 using the HDI circuit board manufacturing device according to claim 9.

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