Tracker circuit and tracking method

Abstract

A tracker circuit (1A) is provided with: a switched capacitor circuit (20) configured so as to generate a plurality of discrete voltages on the basis of a first input voltage; an output switching circuit (31) configured so as to selectively output at least one of the plurality of discrete voltages to the power amplifier (2A); a bypass path (BP1) configured so as to bypass the switched capacitor circuit (20) and the output switching circuit (31) and to output the first input voltage to the power amplifier (2A); and a switch (S66) configured to switch between connection and disconnection of the bypass path (BP1).

Description

Technical Field

[0001] The present invention relates to a tracker circuit and a tracking method. Background Art

[0002] In recent years, the power added efficiency has been improved by applying an envelope tracking (ET) mode to a power amplifier circuit. Patent Document 1 discloses a technology related to a digital ET mode for supplying a plurality of discrete voltages.

[0003] Patent Document 1: U.S. Patent No. 9755672

[0004] However, in the above-mentioned conventional technology, the power added efficiency may be reduced. Summary of the invention

[0005] Therefore, the present invention provides a tracker circuit and a tracking method capable of improving power added efficiency.

[0006] A tracker circuit of one embodiment of the present invention comprises: a converter circuit, configured to generate multiple discrete voltages based on a first input voltage; a first output switch circuit, configured to selectively output at least one of the multiple discrete voltages to a first power amplifier; a first bypass path, configured to bypass the converter circuit and the first output switch circuit and output the first input voltage to the first power amplifier; and a first switch, configured to switch the connection and disconnection of the first bypass path.

[0007] A tracker circuit of one embodiment of the present invention comprises: a first external connection terminal for receiving a first input voltage; a second external connection terminal connected to a first power amplifier; a switching capacitor circuit comprising a first input terminal and a plurality of first output terminals, wherein the first input terminal is connected to the first external connection terminal; a first output switching circuit comprising a plurality of second input terminals and a second output terminal, wherein the plurality of second input terminals are respectively connected to a plurality of first output terminals, and the second output terminal is connected to the second external connection terminal; a first bypass path connecting the first external connection terminal and the second external connection terminal without passing through the switching capacitor circuit and the first output switching circuit; and a first switch connected between the first external connection terminal and the second external connection terminal in the first bypass path.

[0008] A tracking method in one embodiment of the present invention comprises the following steps: (i) disconnecting a bypass path between a first external connection terminal and a second external connection terminal, (ii) generating a plurality of discrete voltages based on an input voltage received via the first external connection terminal, and (iii) selectively supplying at least one of the plurality of discrete voltages to the power amplifier via the second external connection terminal based on an envelope of a high-frequency signal amplified by the power amplifier. When the power amplifier is operated in an average power tracking mode, (i) connecting the bypass path, and (ii) supplying the input voltage received via the first external connection terminal to the power amplifier via the bypass path and the second external connection terminal.

[0009] According to a tracker circuit and the like according to one embodiment of the present invention, it is possible to improve power added efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1A This is a graph showing an example of transition of the power supply voltage in the average power tracking (APT: Average Power Tracking) mode.

[0011] Figure 1B This is a graph showing an example of the transition of the power supply voltage in the analog envelope tracking (A-ET: Analog Envelope Tracking) mode.

[0012] Figure 1C This is a graph showing an example of the transition of the power supply voltage in the digital envelope tracking (D-ET: Digital Envelope Tracking) mode.

[0013] Figure 2 This is a circuit configuration diagram of a communication device according to Embodiment 1.

[0014] Figure 3 This is a circuit configuration diagram of a switched capacitor circuit, an output switch circuit, a filter circuit, and a pre-regulator circuit included in the tracker circuit of the first embodiment.

[0015] Figure 4 This is a circuit configuration diagram of a digital control circuit included in the tracker circuit of the first embodiment.

[0016] Figure 5 This is a flowchart showing the tracking method of implementation mode 1.

[0017] Figure 6 This is a top view of the tracker module according to Embodiment 1.

[0018] Figure 7 This is a top view of the tracker module according to Embodiment 1.

[0019] Figure 8 This is a cross-sectional view of the tracker module according to Embodiment 1.

[0020] Fig. 9 This is a diagram showing the configuration of modules within the communication device of the first embodiment.

[0021] Fig.10 This is a circuit configuration diagram of a tracker circuit according to a variation of the first embodiment.

[0022] Fig.11 This is a circuit configuration diagram of a communication device according to the second embodiment.

[0023] Fig.12 This is a circuit configuration diagram of a tracker circuit according to the second embodiment.

[0024] Fig.13 This is a circuit configuration diagram of a tracker circuit according to a third embodiment.

[0025] Fig.14 This is a partial circuit structure diagram of a communication device according to Embodiment 4.

[0026] Fig.15 This is a partial circuit structure diagram of a tracker circuit in embodiment 4. DETAILED DESCRIPTION

[0027] Hereinafter, the embodiments of the present invention will be described in detail using the accompanying drawings. In addition, the embodiments described below all represent general or specific examples. The numerical values, shapes, materials, components, configurations of components, and connection methods shown in the following embodiments are examples and are not intended to limit the meaning of the present invention.

[0028] In addition, each figure is a schematic diagram that appropriately emphasizes, omits, or adjusts the ratio in order to illustrate the present invention, and is not necessarily a strictly illustrated figure, and may differ from the actual shape, positional relationship, and ratio. In each figure, the same reference numerals are used for substantially the same structure, and repeated descriptions are omitted or simplified.

[0029] In the following figures, the x-axis and the y-axis are axes that are orthogonal to each other on a plane parallel to the main surface of the module substrate. Specifically, when the module substrate has a rectangular shape in a plan view, the x-axis is parallel to the first side of the module substrate, and the y-axis is parallel to the second side of the module substrate, wherein the second side is orthogonal to the first side. In addition, the z-axis is an axis perpendicular to the main surface of the module substrate, and its positive direction indicates the upward direction, and its negative direction indicates the downward direction.

[0030] In the circuit structure of the present invention, the so-called "connection" includes not only the case of direct connection through connecting terminals and / or wiring conductors, but also the case of electrical connection through other circuit elements. The so-called "direct connection" refers to direct connection through connecting terminals and / or wiring conductors without passing through other circuit elements. The so-called "connection between A and B" refers to connection between A and B and both A and B, and refers to a path connected in series between A and B. The so-called "path between A and B" refers to a path composed of conductors that electrically connect A and B. The so-called "connection in series with the path" refers to connection in series on the path, and refers to connection between one end of the path and the other end of the path. The so-called "connection in a shunt with the path" refers to connection between the path and ground.

[0031] In the component configuration of the present invention, the so-called "components are configured on the substrate" includes components configured on the main surface of the substrate and components configured inside the substrate. The so-called "components are configured on the main surface of the substrate" includes not only the case where the components are configured in contact with the main surface of the substrate, but also the case where the components are not in contact with the main surface but are configured above the main surface (for example, the components are stacked on other components configured in contact with the main surface). In addition, "components are configured on the main surface of the substrate" may also include components configured in recesses formed on the main surface. The so-called "components are configured inside the substrate" includes not only the case where the components are encapsulated in the module substrate, but also the case where although all components are configured between the two main surfaces of the substrate, part of the components are not covered by the substrate, and only part of the components are configured inside the substrate.

[0032] In addition, in the component arrangement of the present invention, the so-called "a top view of the module substrate" means observing the object by orthogonally projecting it onto the xy plane from the positive side of the z-axis. The so-called "A overlaps with B when viewed from above" means that at least a part of the area of ​​A orthogonally projected onto the xy plane overlaps with at least a part of the area of ​​B orthogonally projected onto the xy plane. In addition, the so-called "A is arranged between B and C" means that at least one of the multiple line segments connecting an arbitrary point in B and an arbitrary point in C passes through A.

[0033] In addition, in the component configuration of the present invention, the so-called "A and B are adjacently configured" means that A and B are close to each other, specifically, it means that there are no other circuit components in the space opposite to A and B. In other words, the so-called "A and B are adjacently configured" means that any of the multiple line segments from any point on the surface of A opposite to B along the normal direction of the surface to B does not pass through circuit components other than A and B. Here, the so-called circuit components refer to components including active components and / or passive components. That is, circuit components include active components including transistors or diodes, and passive components including inductors, transformers, capacitors or resistors, but do not include electromechanical components including terminals, connectors or wiring. The distance between two objects refers to the shortest distance between the two objects. That is, the distance between two objects refers to the length of the shortest line segment among the multiple line segments connecting any point of one of the two objects with any point of the other of the two objects.

[0034] In the present invention, the so-called "terminal" refers to the point where the conductor in the element ends. In addition, when the impedance of the conductor between the elements is sufficiently low, the terminal can be interpreted not only as a single point, but also as an arbitrary point on the conductor between the elements or the conductor as a whole.

[0035] In addition, terms such as "parallel" and "perpendicular" that indicate the relationship between elements, terms such as "rectangular" that indicate the shape of elements, and numerical ranges do not have strict meanings but also include substantially equivalent ranges, such as errors of several %.

[0036] First, as a technique for efficiently amplifying high-frequency signals, a tracking mode for supplying a power amplifier with a power supply voltage that is dynamically adjusted over time based on the high-frequency signal will be described. The so-called tracking mode refers to a mode for dynamically adjusting the power supply voltage applied to the power amplifier circuit. There are several types of tracking modes, but here, reference is made to the following. Figure 1A to Figure 1C The APT mode and ET mode (including analog ET mode and digital ET mode) are explained. Figure 1A to Figure 1C In FIG. 1 , the horizontal axis represents time and the vertical axis represents voltage. In addition, the thick solid line represents the power supply voltage and the thin solid line (waveform) represents the modulation wave.

[0037] Figure 1A : is a graph showing an example of the transition of the power supply voltage in the APT mode. In the APT mode, the power supply voltage is changed to a plurality of discrete voltage levels in units of one frame based on the average power. As a result, the power supply voltage signal forms a rectangular wave.

[0038] The so-called frame refers to the unit that constitutes the high-frequency signal (modulated wave). For example, in 5GNR (5th Generation New Radio) and LTE (Long Term Evolution), a frame contains ten subframes, each subframe contains multiple time slots, and each time slot consists of multiple symbols. The subframe length is 1ms and the frame length is 10ms.

[0039] In addition, a mode in which the voltage level is varied in units of one frame or larger than one frame based on average power is called an APT mode, and is distinguished from a mode in which the voltage level is varied in units smaller than one frame (e.g., a subframe, a time slot, or a symbol). For example, a mode in which the voltage level is varied in units of a symbol is called a symbol power tracking (SPT: Symbol Power Tracking) mode, and is distinguished from the APT mode.

[0040] Figure 1B 1 is a graph showing an example of the transition of the power supply voltage in the analog ET mode. In the analog ET mode, the power supply voltage is continuously varied based on the envelope signal to track the envelope of the modulation wave.

[0041] The so-called envelope signal is a signal representing the envelope of the modulated wave. The envelope value is expressed, for example, by (I 2 +Q 2 ). Here, (I, Q) represents a constellation point. A constellation point is a point on a constellation diagram that represents a signal modulated by digital modulation. For example, (I, Q) is determined based on the transmission information, such as by a BBIC (Baseband Integrated Circuit).

[0042] Figure 1C This is a graph showing an example of the transition of the power supply voltage in the digital ET mode. In the digital ET mode, the power supply voltage is varied to a plurality of discrete voltage levels within one frame based on the envelope signal to track the envelope of the modulation wave. As a result, the power supply voltage signal forms a rectangular wave.

[0043] (Implementation Method 1)

[0044] Implementation 1 is described below. The communication device 7A of this implementation is an example of a high-frequency communication system, which is equivalent to a user terminal (UE: User Equipment) in a cellular network, typically a mobile phone, a smart phone, a tablet computer, a wearable device, etc. In addition, the communication device 7A can also be an IoT (Internet of Things) sensor device, a medical / health care device, a car, an unmanned aerial vehicle (UAV: Unmanned Aerial Vehicle) (so-called drone), an unmanned guided vehicle (AGV: Automated Guided Vehicle). In addition, the communication device 7A can also function as a BS (Base Station: base station) in a cellular network.

[0045] Reference Figure 2 The circuit configurations of the communication device 7A and the tracker circuit 1A according to the present embodiment will be described. Figure 2 It is a circuit configuration diagram of a communication device 7A according to the present embodiment.

[0046] also, Figure 2 The circuit structures are exemplary, and the communication device 7A and the tracker circuit 1A may be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 7A and the tracker circuit 1A provided below should not be interpreted in a limiting sense.

[0047] [1.1 Circuit Configuration of Communication Device 7A]

[0048] First, refer to Figure 2 The communication device 7A of the present embodiment is described below and includes a tracker circuit 1A, power amplifiers 2A to 2C, filters 3A to 3C, an RFIC (Radio Frequency Integrated Circuit) 5 , antennas 6A to 6C, a pre-regulator circuit 11 , and a DC power supply 50 .

[0049] The tracker circuit 1A can supply the power supply voltage V to the power amplifier 2A based on the digital ET mode or the APT mode. T1 In addition, a symbol power tracking (SPT: Symbol Power Tracking) mode or the like may be used instead of the digital ET mode.

[0050] like Figure 2 As shown, the tracker circuit 1A includes a switched capacitor circuit 20, an output switch circuit 31, a filter circuit 41, a digital control circuit 60, external connection terminals 101a to 101d, 102, and 103, a bypass path BP1, and a switch S66.

[0051] The external connection terminals 101a to 101d are each an example of a first external connection terminal, and are terminals for receiving an adjustment voltage (an example of a first input voltage) from the pre-regulator circuit 11. The external connection terminals 101a to 101d are respectively connected to the pre-regulator circuit 11 outside the tracker circuit 1A, and are connected to the switch capacitor circuit 20 inside the tracker circuit 1A. In addition, the tracker circuit 1A only needs to include at least one of the external connection terminals 101a to 101d, and may not necessarily include all of the external connection terminals 101a to 101d. In the following, if there is no need to distinguish between them, the external connection terminals 101a to 101d may also be recorded as the external connection terminal 101.

[0052] The external connection terminal 102 is an example of a second external connection terminal, and is connected to the power amplifier 2A outside the tracker circuit 1A, and is connected to the filter circuit 41 inside the tracker circuit 1A. The external connection terminal 102 is used to supply a power supply voltage V T1 Terminals.

[0053] The external connection terminal 103 is an example of a third external connection terminal, and is connected to the power amplifier 2B outside the tracker circuit 1A, and is connected to the filter circuit 41 inside the tracker circuit 1A. The external connection terminal 103 is used to supply a power supply voltage V T2 In addition, the external connection terminal 103 may not be included in the tracker circuit 1A.

[0054] The switched capacitor circuit 20 is an example of a second converter circuit, and includes a plurality of capacitors and a plurality of switches. The switched capacitor circuit 20 can generate a plurality of discrete voltages each having a plurality of discrete voltage levels based on an input voltage received from the pre-regulator circuit 11. The switched capacitor circuit 20 is also referred to as a switched-capacitor voltage balancer.

[0055] The output switch circuit 31 is an example of a first output switch circuit, and is configured to selectively output at least one discrete voltage from a plurality of discrete voltages generated by the switch capacitor circuit 20 to the power amplifier 2A and the power amplifier 2B. That is, the output switch circuit 31 can select at least one voltage from a plurality of discrete voltages, and output the selected at least one voltage to the power amplifier 2A and the power amplifier 2B. At this time, the output switch circuit 31 can change the level of the voltage output to the power amplifier 2A and the power amplifier 2B discretely over time by repeatedly selecting operations. Such an output switch circuit 31 is controlled based on a digital control signal.

[0056] The filter circuit 41 is an example of a first filter circuit, is connected between the output switch circuit 31 and the power amplifiers 2A and 2B (external connection terminals 102 and 103 ), and is configured to attenuate noise components from a signal (a plurality of discrete voltages) from the output switch circuit 31 .

[0057] The digital control circuit 60 can control the pre-regulator circuit 11 , the switched capacitor circuit 20 , the output switch circuit 31 , and the filter circuit 41 based on the digital control signal from the RFIC 5 .

[0058] In addition, the tracker circuit 1A may not include at least one of the switched capacitor circuit 20, the output switch circuit 31, the filter circuit 41, and the digital control circuit 60. For example, the tracker circuit 1A may not include the digital control circuit 60. In addition, any combination of the switched capacitor circuit 20, the output switch circuit 31, and the filter circuit 41 may be integrated into a single circuit.

[0059] The pre-regulator circuit 11 is an example of a first converter circuit, and is configured to convert a voltage from a DC power supply 50 into an adjusted voltage (an example of a first input voltage). Moreover, the pre-regulator circuit 11 can output the adjusted voltage to the tracker circuit 1A, and can also output the adjusted voltage to the power amplifier 2C without passing through the tracker circuit 1A. Specifically, the pre-regulator circuit 11 includes a power inductor and a switch. The so-called power inductor is an inductor used for stepping up and / or stepping down a DC (Direct Current) voltage. The power inductor is connected in series with the DC path. In addition, the power inductor can also be connected to a DC path in a shunt. Such a pre-regulator circuit 11 is also called a magnetic regulator or a DC / DC converter.

[0060] The DC power source 50 can supply a DC voltage to the pre-regulator circuit 11. As the DC power source 50, for example, a rechargeable battery can be used, but the present invention is not limited thereto.

[0061] The power amplifier 2A is an example of a first power amplifier, and is connected between the RFIC 5 and the filter 3A. The power amplifier 2A is connected to the tracker circuit 1A and can receive a power supply voltage V based on the digital ET mode or the APT mode. T1 The power amplifier 2A can use the power supply voltage V received from the tracker circuit 1A. T1 , for the high frequency signal RF of band A received from RFIC5 A That is, the power amplifier 2A can selectively operate in the digital ET mode and the APT mode.

[0062] The power amplifier 2B is an example of a second power amplifier, and is connected between the RFIC 5 and the filter 3B. The power amplifier 2B is connected to the tracker circuit 1A and can receive a power supply voltage V based on the digital ET mode or the APT mode. T2 The power amplifier 2B can use the power supply voltage V received from the tracker circuit 1A. T2 , the high frequency signal RF of band B received from RFIC5 B That is, the power amplifier 2B can selectively operate in the digital ET mode and the APT mode. In addition, the power amplifier 2B may not be included in the communication device 7A.

[0063] The power amplifier 2C is an example of a third power amplifier, and is connected between the RFIC 5 and the filter 3C. The power amplifier 2C is connected to the pre-regulator circuit 11, and can receive the power supply voltage V based on the APT mode from the pre-regulator circuit 11. T3 The power amplifier 2B can use the power supply voltage V received from the pre-regulator circuit 11. T3 , for the high frequency signal RF of band C received from RFIC5 C That is, the power amplifier 2C can operate in the APT mode. In addition, the power amplifier 2C may not be included in the communication device 7A.

[0064] The filter 3A is connected between the power amplifier 2A and the antenna 6A. The filter 3A is a bandpass filter having a passband including a transmission band of a band A. The filter 3A may not be included in the communication device 7A.

[0065] The filter 3B is connected between the power amplifier 2B and the antenna 6B. The filter 3B is a bandpass filter having a passband including a transmission band of the band B. The filter 3B may not be included in the communication device 7A.

[0066] The filter 3C is connected between the power amplifier 2C and the antenna 6C. The filter 3C is a bandpass filter having a passband including a transmission band of band C. The filter 3C may not be included in the communication device 7A.

[0067] Bands A to C are frequency bands used for communication systems built using radio access technology (RAT), and are predefined by standardization organizations such as 3GPP (registered trademark) (3rd Generation Partnership Project) and IEEE (Institute of Electrical and Electronics Engineers). Examples of communication systems include 5GNR (5th Generation New Radio) systems, 4GLTE (4th Generation Long Term Evolution) systems, 3G (3rd Generation) systems, 2G (2nd Generation) systems, and WLAN (Wireless Local Area Network) systems.

[0068] For example, a frequency band included in the ultra-high frequency band group (3300 to 5000 MHz) is used as the frequency band A. In addition, the frequency band A is not limited to the frequency band included in the ultra-high frequency band group.

[0069] For example, a frequency band included in the super high frequency band group is used as the frequency band B. In addition, the frequency band B is not limited to the frequency band included in the super high frequency band group.

[0070] As the frequency band C, for example, a frequency band included in the mid-high frequency band group (1427-2690 MHz) or the low frequency band group (698-960 MHz) is used. In addition, for example, as the frequency band C, a frequency band used in a 2G communication system may also be used. In addition, the frequency band C is not limited to the frequency band included in the mid-high frequency band group or the low frequency band group and the frequency band used in the 2G communication system.

[0071] In addition, the so-called transmission band refers to a frequency band used for transmission in a communication device. For example, in a frequency division duplex (FDD) band, a frequency band different from a receiving band is used as a transmission band. On the other hand, in a time division duplex (TDD) band, a frequency band same as a receiving band is used as a transmission band. In particular, in a case where the communication device functions as a UE of a cellular network, an uplink operation band is used as a transmission band in an FDD band. On the contrary, in a case where the communication device functions as a BS of a cellular network, a downlink operation band is used as a transmission band in an FDD band.

[0072] RFIC5 is an example of a signal processing circuit that processes a high-frequency signal. Specifically, RFIC5 performs signal processing on an input transmission signal by up-conversion, etc., and supplies the high-frequency transmission signal generated by the signal processing to the power amplifiers 2A to 2C. In addition, RFIC5 may also have a control unit that controls the tracker circuit 1A. In addition, part or all of the functions of the control unit of RFIC5 may also be installed outside RFIC5.

[0073] The antenna 6A outputs a transmission signal of the frequency band A input from the power amplifier 2A via the filter 3A. The antenna 6A may not be included in the communication device 7A.

[0074] The antenna 6B outputs a transmission signal of the frequency band B input from the power amplifier 2B via the filter 3B. The antenna 6B may not be included in the communication device 7A.

[0075] The antenna 6C outputs a transmission signal of the frequency band C input from the power amplifier 2C via the filter 3C. The antenna 6C may not be included in the communication device 7A.

[0076] The bypass path BP1 is an example of a first bypass path, and is configured to bypass the switched capacitor circuit 20 and the output switch circuit 31, and output the regulated voltage from the pre-regulator circuit 11 to the power amplifier 2A and the power amplifier 2B. Specifically, the bypass path BP1 connects the external connection terminal 101 and the external connection terminal 102 without passing through the switched capacitor circuit 20 and the output switch circuit 31, and connects the external connection terminal 101 and the external connection terminal 103 without passing through the switched capacitor circuit 20 and the output switch circuit 31.

[0077] The switch S66 is an example of a first switch, and is configured to switch the connection and disconnection of the bypass path BP1. Specifically, the switch S66 is connected between the external connection terminal 101 and the external connection terminal 102 in the bypass path BP1. Furthermore, the switch S66 is connected between the external connection terminal 101 and the external connection terminal 103 in the bypass path BP1. That is, one end of the switch S66 is connected to the external connection terminal 101, and the other end of the switch S66 is connected to the external connection terminal 102 and the external connection terminal 103 via the filter circuit 41.

[0078] In the switch S66 connected in this way, the switch S66 is switched on / off based on the control signal S4. For example, the switch S66 is controlled on / off as follows. (1) When the high frequency signal RF is transmitted at the first power level, A or RF B In the case of , switch S66 is turned off (Off). That is, the bypass path BP1 is cut off, and the adjustment voltage received via the external connection terminal 101 is supplied to the switch capacitor circuit 20. As a result, a plurality of discrete voltages are generated in the switch capacitor circuit 20, and at least one of the plurality of discrete voltages is selectively output to the external connection terminal 102 or the external connection terminal 103 in the output switch circuit 31. Thus, the power amplifier 2A or the power amplifier 2B operates in the digital ET mode. (2) When transmitting the high frequency signal RF at the second power level A or RF B In this case, the switch S66 is closed (On). That is, the bypass path BP1 is connected, and the adjustment voltage received via the external connection terminal 101 is output to the external connection terminal 102 or the external connection terminal 103 via the filter circuit 41. Thus, the power amplifier 2A or the power amplifier 2B operates in the APT mode.

[0079] Here, the first power level is a power level that allows a higher maximum output power than the second power level. That is, the maximum output power allowed at the first power level is higher than the maximum output power allowed at the second power level.

[0080] The so-called power class refers to the classification of the output power of the terminal specified by the maximum output power, etc. The smaller the power class value, the higher the maximum output power allowed. For example, in 3GPP, the maximum output power of power class 1 is 31dBm, the maximum output power of power class 1.5 is 29dBm, the maximum output power of power class 2 is 26dBm, and the maximum output power of power class 3 is 23dBm.

[0081] The maximum output power of the terminal is defined by the output power at the antenna end of the terminal. For example, the maximum output power of the terminal is measured by a method defined by 3GPP or the like. Figure 2 In the embodiment, the output power is measured by measuring the radiation power of the antennas 6A to 6C. In addition, instead of measuring the radiation power, the output power of the antennas 6A to 6C can be measured by providing a terminal near the antennas 6A to 6C and connecting a measuring instrument (such as a spectrum analyzer) to the terminal.

[0082] As the first power level and the second power level, for example, power level 2 and power level 3 are used respectively. In addition, the combination of the first power level and the second power level is not limited to the combination of power level 2 and power level 3. For example, as the combination of the first power level and the second power level, a combination of power level 1.5 and power level 2 may be used, or a combination of power level 1.5 and power level 3 may be used.

[0083] In addition, although the case where the switch S66 is controlled based on the power level is described here, the control of the switch S66 is not limited to the control based on the power level.

[0084] also, Figure 2 The circuit configuration of the communication device 7A shown is an example and is not limited thereto. For example, the communication device 7A may also include a circuit that uses a higher frequency signal RF A ~RF C The communication device 7A may also include a receiving path. In addition to the power amplifier 2A and the power amplifier 2B, the communication device 7A may also include one or more power amplifiers connected to the tracker circuit 1A. In addition to the power amplifier 2C, the communication device 7A may also include one or more power amplifiers connected to the pre-regulator circuit 11.

[0085] [1.2 Circuit Structures of Tracker Circuit 1A and Pre-regulator Circuit 11]

[0086] Next, refer to Figure 3 and Figure 4 The circuit configurations of the tracker circuit 1A and the pre-regulator circuit 11 will be described. Figure 3 1 is a circuit configuration diagram of the switched capacitor circuit 20 , the output switch circuit 31 , the filter circuit 41 , and the pre-regulator circuit 11 included in the tracker circuit 1A of the present embodiment. Figure 4 1 is a circuit configuration diagram of a digital control circuit 60 included in the tracker circuit 1A of the present embodiment.

[0087] also, Figure 3 and Figure 4The circuit configuration is exemplary, and the pre-regulator circuit 11, the switched capacitor circuit 20, the output switch circuit 31, the filter circuit 41, and the digital control circuit 60 may be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of each circuit provided below should not be interpreted in a limiting sense.

[0088] [1.2.1 Circuit Structure of Switched Capacitor Circuit 20]

[0089] First, the circuit structure of the switched capacitor circuit 20 is described. Figure 3 As shown, the switched capacitor circuit 20 includes capacitors C11 to C16 , capacitors C10 , C20 , C30 , and C40 , switches S11 to S14 , S21 to S24 , S31 to S34 , and S41 to S44 , input terminals 120 a to 120 d , and output terminals 121 to 124 .

[0090] Input terminals 120a to 120d are examples of first input terminals. Input terminals 120a to 120d are connected to external connection terminals 101a to 101d of the tracker circuit 1A outside the switched capacitor circuit 20, and are connected to nodes N4 to N1 inside the switched capacitor circuit 20. In addition, in the following, when a part or all of input terminals 120a to 120d are indicated, they are sometimes described as input terminals 120.

[0091] The output terminals 121 to 124 are examples of a plurality of first output terminals. The output terminals 121 to 124 are respectively connected to the input terminals 131 to 134 of the output switch circuit 31 outside the switched capacitor circuit 20 , and are respectively connected to the nodes N4 to N1 inside the switched capacitor circuit 20 .

[0092] Energy and charge are input from the pre-regulator circuit 11 to the switched capacitor circuit 20 via the input terminals 120 a to 120 d , and are taken out from the switched capacitor circuit 20 to the output switch circuit 31 via the output terminals 121 to 124 .

[0093] Capacitors C11 to C16 function as flying capacitors (also called cross-circuit capacitors). That is, capacitors C11 to C16 are used to step up or step down the adjustment voltage supplied from the pre-regulator circuit 11. More specifically, capacitors C11 to C16 move charges between capacitors C11 to C16 and nodes N1 to N4 so as to maintain voltages V1 to V4 (voltage relative to the ground potential) satisfying V1:V2:V3:V4=1:2:3:4 at the four nodes N1 to N4. The voltages V1 to V4 correspond to a plurality of discrete voltages each having a plurality of discrete voltage levels.

[0094] The capacitor C11 has two electrodes. One of the two electrodes of the capacitor C11 is connected to one end of the switch S11 and one end of the switch S12. The other of the two electrodes of the capacitor C11 is connected to one end of the switch S21 and one end of the switch S22.

[0095] The capacitor C12 has two electrodes. One of the two electrodes of the capacitor C12 is connected to one end of the switch S21 and one end of the switch S22. The other of the two electrodes of the capacitor C12 is connected to one end of the switch S31 and one end of the switch S32.

[0096] The capacitor C13 has two electrodes. One of the two electrodes of the capacitor C13 is connected to one end of the switch S31 and one end of the switch S32. The other of the two electrodes of the capacitor C13 is connected to one end of the switch S41 and one end of the switch S42.

[0097] The capacitor C14 has two electrodes. One of the two electrodes of the capacitor C14 is connected to one end of the switch S13 and one end of the switch S14. The other of the two electrodes of the capacitor C14 is connected to one end of the switch S23 and one end of the switch S24.

[0098] The capacitor C15 has two electrodes. One of the two electrodes of the capacitor C15 is connected to one end of the switch S23 and one end of the switch S24. The other of the two electrodes of the capacitor C15 is connected to one end of the switch S33 and one end of the switch S34.

[0099] The capacitor C16 has two electrodes. One of the two electrodes of the capacitor C16 is connected to one end of the switch S33 and one end of the switch S34. The other of the two electrodes of the capacitor C16 is connected to one end of the switch S43 and one end of the switch S44.

[0100] The group of capacitors C11 and C14 , the group of capacitors C12 and C15 , and the group of capacitors C13 and C16 can be complementarily charged and discharged by repeating the first phase and the second phase, respectively.

[0101] Specifically, in the first stage, switches S12, S13, S22, S23, S32, S33, S42, and S43 are turned on. Thus, for example, one of the two electrodes of capacitor C12 is connected to node N3, the other of the two electrodes of capacitor C12 and one of the two electrodes of capacitor C15 are connected to node N2, and the other of the two electrodes of capacitor C15 is connected to node N1.

[0102] On the other hand, in the second phase, switches S11, S14, S21, S24, S31, S34, S41, and S44 are turned on. Thus, for example, one of the two electrodes of capacitor C15 is connected to node N3, the other of the two electrodes of capacitor C15 and one of the two electrodes of capacitor C12 are connected to node N2, and the other of the two electrodes of capacitor C12 is connected to node N1.

[0103] By repeating the first and second stages, for example, when one of capacitor C12 and capacitor C15 is charged from node N2, the other of capacitor C12 and capacitor C15 can discharge capacitor C30. That is, capacitor C12 and capacitor C15 can be charged and discharged complementarily.

[0104] The group of capacitors C11 and C14 and the group of capacitors C13 and C16 can also be charged and discharged complementarily in the same manner as the group of capacitors C12 and C15 by repeating the first stage and the second stage.

[0105] The capacitors C10, C20, C30, and C40 function as smoothing capacitors, respectively. That is, the capacitors C10, C20, C30, and C40 are used to hold and smooth the voltages V1 to V4 at the nodes N1 to N4, respectively.

[0106] The capacitor C10 is connected between the node N1 and the ground. Specifically, one of the two electrodes of the capacitor C10 is connected to the node N1. On the other hand, the other of the two electrodes of the capacitor C10 is connected to the ground.

[0107] The capacitor C20 is connected between the node N2 and the node N1. Specifically, one of the two electrodes of the capacitor C20 is connected to the node N2. On the other hand, the other of the two electrodes of the capacitor C20 is connected to the node N1.

[0108] The capacitor C30 is connected between the node N3 and the node N2. Specifically, one of the two electrodes of the capacitor C30 is connected to the node N3. On the other hand, the other of the two electrodes of the capacitor C30 is connected to the node N2.

[0109] The capacitor C40 is connected between the node N4 and the node N3. Specifically, one of the two electrodes of the capacitor C40 is connected to the node N4. On the other hand, the other of the two electrodes of the capacitor C40 is connected to the node N3.

[0110] The switch S11 is connected between one of the two electrodes of the capacitor C11 and the node N3. Specifically, one end of the switch S11 is connected to one of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S11 is connected to the node N3.

[0111] The switch S12 is connected between one of the two electrodes of the capacitor C11 and the node N4. Specifically, one end of the switch S12 is connected to one of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S12 is connected to the node N4.

[0112] The switch S21 is connected between one of the two electrodes of the capacitor C12 and the node N2. Specifically, one end of the switch S21 is connected to one of the two electrodes of the capacitor C12 and the other of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S21 is connected to the node N2.

[0113] The switch S22 is connected between one of the two electrodes of the capacitor C12 and the node N3. Specifically, one end of the switch S22 is connected to one of the two electrodes of the capacitor C12 and the other of the two electrodes of the capacitor C11. On the other hand, the other end of the switch S22 is connected to the node N3.

[0114] The switch S31 is connected between the other electrode of the capacitor C12 and the node N1. Specifically, one end of the switch S31 is connected to the other electrode of the capacitor C12 and one electrode of the capacitor C13. On the other hand, the other end of the switch S31 is connected to the node N1.

[0115] The switch S32 is connected between the other electrode of the two electrodes of the capacitor C12 and the node N2. Specifically, one end of the switch S32 is connected to the other electrode of the two electrodes of the capacitor C12 and one electrode of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S32 is connected to the node N2. That is, the other end of the switch S32 is connected to the other end of the switch S21.

[0116] The switch S41 is connected between the other electrode of the two electrodes of the capacitor C13 and the ground. Specifically, one end of the switch S41 is connected to the other electrode of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S41 is connected to the ground.

[0117] The switch S42 is connected between the other electrode of the two electrodes of the capacitor C13 and the node N1. Specifically, one end of the switch S42 is connected to the other electrode of the two electrodes of the capacitor C13. On the other hand, the other end of the switch S42 is connected to the node N1. That is, the other end of the switch S42 is connected to the other end of the switch S31.

[0118] The switch S13 is connected between one of the two electrodes of the capacitor C14 and the node N3. Specifically, one end of the switch S13 is connected to one of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S13 is connected to the node N3. That is, the other end of the switch S13 is connected to the other end of the switch S11 and the other end of the switch S22.

[0119] The switch S14 is connected between one of the two electrodes of the capacitor C14 and the node N4. Specifically, one end of the switch S14 is connected to one of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S14 is connected to the node N4. That is, the other end of the switch S14 is connected to the other end of the switch S12.

[0120] The switch S23 is connected between one of the two electrodes of the capacitor C15 and the node N2. Specifically, one end of the switch S23 is connected to one of the two electrodes of the capacitor C15 and the other of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S23 is connected to the node N2. That is, the other end of the switch S23 is connected to the other end of the switch S21 and the other end of the switch S32.

[0121] The switch S24 is connected between one of the two electrodes of the capacitor C15 and the node N3. Specifically, one end of the switch S24 is connected to one of the two electrodes of the capacitor C15 and the other of the two electrodes of the capacitor C14. On the other hand, the other end of the switch S24 is connected to the node N3. That is, the other end of the switch S24 is connected to the other end of the switch S11, the other end of the switch S22, and the other end of the switch S13.

[0122] The switch S33 is connected between the other electrode of the two electrodes of the capacitor C15 and the node N1. Specifically, one end of the switch S33 is connected to the other electrode of the two electrodes of the capacitor C15 and one electrode of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S33 is connected to the node N1. That is, the other end of the switch S33 is connected to the other end of the switch S31 and the other end of the switch S42.

[0123] The switch S34 is connected between the other electrode of the two electrodes of the capacitor C15 and the node N2. Specifically, one end of the switch S34 is connected to the other electrode of the two electrodes of the capacitor C15 and one electrode of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S34 is connected to the node N2. That is, the other end of the switch S34 is connected to the other end of the switch S21, the other end of the switch S32, and the other end of the switch S23.

[0124] The switch S43 is connected between the other electrode of the two electrodes of the capacitor C16 and the ground. Specifically, one end of the switch S43 is connected to the other electrode of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S43 is connected to the ground.

[0125] The switch S44 is connected between the other electrode of the two electrodes of the capacitor C16 and the node N1. Specifically, one end of the switch S44 is connected to the other electrode of the two electrodes of the capacitor C16. On the other hand, the other end of the switch S44 is connected to the node N1. That is, the other end of the switch S44 is connected to the other end of the switch S31, the other end of the switch S42, and the other end of the switch S33.

[0126] The switches of the first group including switches S12, S13, S22, S23, S32, S33, S42 and S43 and the switches of the second group including switches S11, S14, S21, S24, S31, S34, S41 and S44 are switched on and off complementarily based on the control signal S2. Specifically, in the first stage, the switches of the first group are turned on and the switches of the second group are turned off. On the contrary, in the second stage, the switches of the first group are turned off and the switches of the second group are turned on.

[0127] For example, in one of the first stage and the second stage, the capacitors C10 to C40 are charged from the capacitors C11 to C13, and in the other of the first stage and the second stage, the capacitors C10 to C40 are charged from the capacitors C14 to C16. That is, since the capacitors C10 to C40 are always charged from the capacitors C11 to C13 or the capacitors C14 to C16, even if the current flows from the nodes N1 to N4 to the output switch circuit 31 at a high speed, the nodes N1 to N4 can be replenished with charges at a high speed, so the potential fluctuation of the nodes N1 to N4 can be suppressed.

[0128] By operating in this way, the switched capacitor circuit 20 can maintain approximately equal voltages at both ends of each of the capacitors C10, C20, C30, and C40. Specifically, at the four nodes labeled V1 to V4, voltages V1 to V4 (voltages relative to the ground potential) that satisfy V1:V2:V3:V4=1:2:3:4 are maintained. The voltage levels of the voltages V1 to V4 correspond to a plurality of discrete voltage levels that can be supplied to the output switch circuit 31 by the switched capacitor circuit 20.

[0129] In addition, the voltage ratio (V1:V2:V3:V4) is not limited to (1:2:3:4). For example, the voltage ratio (V1:V2:V3:V4) may be (1:2:4:8).

[0130] in addition, Figure 3 The structure of the switched capacitor circuit 20 shown is an example and is not limited thereto. Figure 3 In the embodiment, the switched capacitor circuit 20 is configured to supply voltages of four discrete voltage levels, but is not limited thereto. The switched capacitor circuit 20 may also be configured to supply voltages of any number of discrete voltage levels or more. For example, in the case of supplying voltages of two discrete voltage levels, the switched capacitor circuit 20 may include at least a capacitor C12, a capacitor C15, and switches S21 to S24 and S31 to S34.

[0131] [1.2.2 Circuit Structure of Output Switch Circuit 31]

[0132] Next, the circuit structure of the output switch circuit 31 is described. The output switch circuit 31 is connected to the digital control circuit 60. Figure 3 As shown, the output switch circuit 31 includes input terminals 131 to 134 , switches S51 to S54 , and an output terminal 130 .

[0133] Output terminal 130 is an example of a second output terminal, and is connected to external connection terminal 102 and external connection terminal 103 via filter circuit 41. Output terminal 130 is a terminal for supplying a power supply voltage selected from voltages V1 to V4 to power amplifier 2A via external connection terminal 102.

[0134] The input terminals 131 to 134 are examples of a plurality of second input terminals, and are respectively connected to the output terminals 121 to 124 of the switched capacitor circuit 20. The input terminals 131 to 134 are terminals for receiving the voltages V4 to V1 from the switched capacitor circuit 20.

[0135] The switch S51 is connected between the input terminal 131 and the output terminal 130. Specifically, the switch S51 has a terminal connected to the input terminal 131 and a terminal connected to the output terminal 130. In this connection structure, the switch S51 can switch the connection and non-connection between the input terminal 131 and the output terminal 130 by switching on / off (closed / opened) according to the control signal S3.

[0136] The switch S52 is connected between the input terminal 132 and the output terminal 130. Specifically, the switch S52 has a terminal connected to the input terminal 132 and a terminal connected to the output terminal 130. In this connection structure, the switch S52 can switch the connection and non-connection between the input terminal 132 and the output terminal 130 by switching on / off according to the control signal S3.

[0137] The switch S53 is connected between the input terminal 133 and the output terminal 130. Specifically, the switch S53 has a terminal connected to the input terminal 133 and a terminal connected to the output terminal 130. In this connection structure, the switch S53 can switch the connection and non-connection between the input terminal 133 and the output terminal 130 by switching on / off according to the control signal S3.

[0138] The switch S54 is connected between the input terminal 134 and the output terminal 130. Specifically, the switch S54 has a terminal connected to the input terminal 134 and a terminal connected to the output terminal 130. In this connection structure, the switch S54 can switch the connection and non-connection between the input terminal 134 and the output terminal 130 by switching on / off according to the control signal S3.

[0139] The switches S51 to S54 are controlled to be exclusively turned on. That is, only one of the switches S51 to S54 is turned on, and the rest of the switches S51 to S54 are turned off. Thus, the output switch circuit 31 can output one voltage selected from the voltages V1 to V4.

[0140] also, Figure 3 The structure of the output switch circuit 31 shown is an example and is not limited thereto. In particular, the switches S51 to S54 may have any structure as long as they can connect at least one of the four input terminals 131 to 134 to the output terminal 130. For example, the output switch circuit 31 may also include a switch connected between the switches S51 to S53 and the switch S54 and the output terminal 130. For another example, the output switch circuit 31 may also include a switch connected between the switches S51 and S52 and the switches S53 and S54 and the output terminal 130.

[0141] Furthermore, when voltages of two discrete voltage levels are supplied from the switched capacitor circuit 20 , the output switch circuit 31 only needs to include at least two switches among the switches S51 to S54 .

[0142] [1.2.3 Circuit Structure of Pre-regulator Circuit 11]

[0143] First, the structure of the pre-regulator circuit 11 will be described. Figure 3 As shown, the pre-regulator circuit 11 includes an input terminal 110, output terminals 111 to 114, inductor connection terminals 115 and 116, switches S61 to S63, S71 and S72, a power inductor L71 (an example of a first power inductor), and capacitors C61 to C64.

[0144] The input terminal 110 is an input terminal for a DC voltage. In other words, the input terminal 110 is connected to the DC power supply 50 and is used to receive an input voltage from the DC power supply 50 .

[0145] The output terminal 111 is an output terminal of the voltage V4. That is, the output terminal 111 is a terminal for supplying the voltage V4 to the switched capacitor circuit 20. The output terminal 111 is connected to the external connection terminal 101a of the tracker circuit 1A.

[0146] The output terminal 112 is an output terminal of the voltage V3. That is, the output terminal 112 is a terminal for the user to supply the voltage V3 to the switched capacitor circuit 20. The output terminal 112 is connected to the external connection terminal 101b of the tracker circuit 1A. And, the output terminal 112 is connected to the power amplifier 2C without passing through the tracker circuit 1A. That is, the pre-regulator circuit 11 is connected to the switched capacitor circuit 20, and is not connected to the power amplifier 2C through the tracker circuit 1A.

[0147] The output terminal 113 is an output terminal of the voltage V2. That is, the output terminal 113 is a terminal for supplying the voltage V2 to the switched capacitor circuit 20. The output terminal 113 is connected to the external connection terminal 101c of the tracker circuit 1A.

[0148] The output terminal 114 is an output terminal of the voltage V1. That is, the output terminal 114 is a terminal for supplying the voltage V1 to the switched capacitor circuit 20. The output terminal 114 is connected to the external connection terminal 101d of the tracker circuit 1A.

[0149] The inductor connection terminal 115 is connected to one end of the power inductor L71 , and the inductor connection terminal 116 is connected to the other end of the power inductor L71 .

[0150] The switch S71 is connected between the input terminal 110 and one end of the power inductor L71. Specifically, the switch S71 has a terminal connected to the input terminal 110 and a terminal connected to one end of the power inductor L71 via the inductor connection terminal 115. In this connection structure, the switch S71 can switch the connection and non-connection between the input terminal 110 and one end of the power inductor L71 by switching on / off.

[0151] The switch S72 is connected between one end of the power inductor L71 and the ground. Specifically, the switch S72 has a terminal connected to one end of the power inductor L71 via the inductor connection terminal 115 and a terminal connected to the ground. In this connection structure, the switch S72 can switch the connection and non-connection between one end of the power inductor L71 and the ground by switching on / off.

[0152] The switch S61 is connected between the other end of the power inductor L71 and the output terminal 111. Specifically, the switch S61 has a terminal connected to the other end of the power inductor L71 via the inductor connection terminal 116 and a terminal connected to the output terminal 111. In this connection structure, the switch S61 can switch the connection and non-connection between the other end of the power inductor L71 and the output terminal 111 by switching on / off.

[0153] The switch S62 is connected between the other end of the power inductor L71 and the output terminal 112. Specifically, the switch S62 has a terminal connected to the other end of the power inductor L71 via the inductor connection terminal 116 and a terminal connected to the output terminal 112. In this connection structure, the switch S62 can switch the connection and non-connection between the other end of the power inductor L71 and the output terminal 112 by switching on / off.

[0154] The switch S63 is connected between the other end of the power inductor L71 and the output terminal 113. Specifically, the switch S63 has a terminal connected to the other end of the power inductor L71 via the inductor connection terminal 116 and a terminal connected to the output terminal 113. In this connection structure, the switch S63 can switch the connection and non-connection between the other end of the power inductor L71 and the output terminal 113 by switching on / off.

[0155] One of the two electrodes of the capacitor C61 is connected to the switch S61 and the output terminal 111. The other of the two electrodes of the capacitor C61 is connected to the switch S62, the output terminal 112, and one of the two electrodes of the capacitor C62.

[0156] One of the two electrodes of capacitor C62 is connected to switch S62, output terminal 112 and the other of the two electrodes of capacitor C61, and the other of the two electrodes of capacitor C62 is connected to a path connecting switch S63, output terminal 113 and one of the two electrodes of capacitor C63.

[0157] One of the two electrodes of capacitor C63 is connected to switch S63, output terminal 113, and the other of the two electrodes of capacitor C62. The other of the two electrodes of capacitor C63 is connected to output terminal 114 and one of the two electrodes of capacitor C64.

[0158] One of the two electrodes of the capacitor C64 is connected to the output terminal 114 and the other of the two electrodes of the capacitor C63. The other of the two electrodes of the capacitor C64 is connected to the ground.

[0159] The switches S61 to S63 are controlled to be exclusively turned on. That is, only one of the switches S61 to S63 is turned on, and the remaining switches of the switches S61 to S63 are turned off. By turning on only one of the switches S61 to S63, the pre-regulator circuit 11 can change the voltage supplied to the switched capacitor circuit 20 to the voltage level of the voltage V2 to V4.

[0160] The pre-regulator circuit 11 configured in this manner can supply electric charge to the switched capacitor circuit 20 via at least one of the output terminals 111 to 113 .

[0161] Furthermore, when the input voltage is converted into a regulated voltage, the pre-regulator circuit 11 only needs to include at least the switches S71 and S72, the power inductor L71, the input terminal 110, and any one of the output terminals 111 to 114. In this case, the external connection terminals 101a to 101d of the tracker circuit 1A may be replaced with one external connection terminal.

[0162] [1.2.4 Circuit structure of filter circuit 41]

[0163] Next, a description will be given of a circuit configuration of the filter circuit 41. The filter circuit 41 includes an input terminal 140, output terminals 141 and 142, inductors L51 and L52, a capacitor C51, switches S55 and S56, and voltage supply paths P41 and P42.

[0164] The input terminal 140 is connected to the output terminal 130 of the output switch circuit 31 outside the filter circuit 41 , and is connected to the output terminal 141 inside the filter circuit 41 .

[0165] The output terminal 141 is connected to the external connection terminal 102 of the tracker circuit 1A outside the filter circuit 41 , and is connected to the input terminal 140 inside the filter circuit 41 .

[0166] The output terminal 142 is connected to the external connection terminal 103 of the tracker circuit 1A outside the filter circuit 41 , and is connected to the input terminal 140 inside the filter circuit 41 .

[0167] The voltage supply path P41 is an example of a first voltage supply path, and is a part of a path connecting the output switch circuit 31 and the power amplifier 2A. Here, the voltage supply path P41 is a path directly connecting the input terminal 140 and the output terminal 141. That is, in the present embodiment, in the voltage supply path P41, no circuit element (active element and passive element) is connected between the input terminal 140 and the output terminal 141. In addition, a circuit element may be connected between the input terminal 140 and the output terminal 141 in the voltage supply path P41.

[0168] The voltage supply path P42 is an example of a second voltage supply path, and is a part of the path connecting the output switch circuit 31 and the power amplifier 2B. Here, the voltage supply path P42 is a path connecting the input terminal 140 and the output terminal 142, and partially overlaps with the voltage supply path P41. In addition, the voltage supply path P42 may not necessarily overlap with the voltage supply path P41.

[0169] The inductor L51 is an example of a first inductor, and is connected in series with the capacitor C51. Specifically, one end of the inductor L51 is connected to a path between the switch S55 and the inductor L52 in the voltage supply path P42, and the other end of the inductor L51 is connected to the capacitor C51.

[0170] The capacitor C51 is an example of a first capacitor, and is connected between the inductor L51 and the ground. Specifically, one end of the capacitor C51 is connected to the inductor L51, and the other end of the capacitor C51 is connected to the ground.

[0171] Inductor L52 is an example of a second inductor, and is connected between input terminal 140 and output terminal 142 in voltage supply path P42. Specifically, one end of inductor L52 is connected to switch S55 and inductor L51, and the other end of inductor L52 is connected to switch S56 and output terminal 142.

[0172] The switch S55 is an example of a third switch, and is connected between the voltage supply path P41 and the inductors L51 and L52. Specifically, one end of the switch S55 is connected to the voltage supply path P41, and the other end of the switch S55 is connected to the inductors L51 and L52.

[0173] The switch S56 is an example of a fourth switch and is connected between the voltage supply path P41 and the voltage supply path P42. Specifically, one end of the switch S56 is connected to the voltage supply path P41, and the other end of the switch S56 is connected to the path between the inductor L52 and the output terminal 142 in the voltage supply path P42.

[0174] The switch S55 and the switch S56 connected in this way are switched on / off based on the control signal S4, and function as a variable band-stop filter. For example, the switch S55 is closed, and the switch S56 is opened, and the inductor L51 and the capacitor C51 are connected between the voltage supply path P41 and the ground. Thus, the filter circuit 41 can function as a band-stop filter having a first stop band in the voltage supply path P41. For another example, the switch S55 is opened, and the switch S56 is closed, and the inductors L51 and L52 and the capacitor C51 are connected between the voltage supply path P41 and the ground. Thus, the filter circuit 41 can function as a band-stop filter having a second stop band different from the first stop band in the voltage supply path P41. For example, the on / off of such a switch S55 and a switch S56 can be controlled based on the channel bandwidth (i.e., the modulation bandwidth) of the high-frequency signal.

[0175] In addition, the control of the switch S55 and the switch S56 is an example and is not limited to the above description. For example, when the power amplifier 2A and the power amplifier 2B selectively amplify transmission signals of multiple frequency bands, the switch S55 and the switch S56 can also be controlled to be turned on / off according to the frequency band of the amplified transmission signal.

[0176] [1.2.5 Circuit structure of digital control circuit 60]

[0177] Next, the circuit structure of the digital control circuit 60 included in the tracker circuit 1A will be described. Figure 4 As shown, the digital control circuit 60 includes a first controller 61 , a second controller 62 , capacitors C81 and C82 , and control terminals 601 to 604 .

[0178] The first controller 61 can generate a control signal S2 and a control signal S4 by processing a source synchronous digital control signal received from the RFIC5 via the control terminal 601 and the control terminal 602. The control signal S2 is a signal for controlling the on / off of switches S11 to S14, S21 to S24, S31 to S34, and S41 to S44 included in the switch capacitor circuit 20. The control signal S4 is a signal for controlling the on / off of the switch S55 included in the filter circuit 41.

[0179] In addition, the digital control signal processed in the first controller 61 is not limited to the source synchronous digital control signal. For example, the first controller 61 may also process the clock embedded digital control signal. In addition, the first controller 61 may also generate a control signal for controlling the output switch circuit 31.

[0180] In addition, although in the present embodiment, a set of clock signals and data signals are used as digital control signals for the pre-regulator circuit 11, the switched capacitor circuit 20, and the filter circuit 41, the present invention is not limited thereto. For example, a set of clock signals and data signals may be used independently as digital control signals for the pre-regulator circuit 11, the switched capacitor circuit 20, and the filter circuit 41.

[0181] The second controller 62 processes the digital control logic (DCL: Digital Control Logic / Line) signals (DCL1, DCL2) received from the RFIC5 via the control terminal 603 and the control terminal 604 to generate the control signal S3. The DCL signals (DCL1, DCL2) are generated based on the envelope signal of the high-frequency signal, etc., through the RFIC5. The control signal S3 is a signal for controlling the on / off of the switches S51 to S54 included in the output switch circuit 31.

[0182] The DCL signals (DCL1, DCL2) are each a one-bit signal. Voltages V1 to V4 are each represented by a combination of two one-bit signals. For example, V1, V2, V3, and V4 are represented by "00", "01", "10", and "11", respectively. Gray code can also be used to express voltage levels.

[0183] The capacitor C81 is connected between the first controller 61 and the ground. For example, the capacitor C81 is connected between a power supply line that supplies power to the first controller 61 and the ground, and functions as a bypass capacitor. The capacitor C82 is connected between the second controller 62 and the ground.

[0184] In addition, although in the present embodiment, two digital control logic signals are used for the control of the output switch circuit 31, the number of digital control logic signals is not limited thereto. For example, one or more than three digital control logic signals may be used according to the number of voltage levels selectable by each output switch circuit 31. In addition, the digital control signal used for the control of the output switch circuit 31 is not limited to the digital control logic signal.

[0185] [1.3 Tracking method]

[0186] Next, refer to Figure 5A method of supplying a plurality of discrete voltages, that is, a tracking method in the communication device 7A configured as described above will be described. Figure 5 is a flowchart showing the tracking method of this embodiment. Specifically, Figure 5 This is a flowchart showing a tracking method when communication uses frequency band A or frequency band B.

[0187] also, Figure 5 is an exemplary flowchart, and the tracking method is not limited to Figure 5 Therefore, the description of the tracking method provided below should not be interpreted in a limiting sense.

[0188] For example, RFIC5 determines whether the high frequency signal RF in band A or band B A Or high frequency signal RF B The amplification of the high frequency signal RF in band A or band B is performed in the digital ET mode or the APT mode (S101). A Or high frequency signal RF B When the first power level is applied, it is determined that the digital ET mode is used, and the high frequency signal RF in the frequency band A or the frequency band B A Or high frequency signal RF B When the second power level is applied, it is determined that the APT mode is used.

[0189] Here, when it is determined that the digital ET mode is used (S101: D-ET), the switch S66 is turned off and the bypass path BP1 is cut off (S103). The switched capacitor circuit 20 generates a plurality of discrete voltages based on the adjustment voltage received from the pre-regulator circuit 11 (S105). The output switch circuit 31 generates a plurality of discrete voltages based on the high frequency signal RF A Or high frequency signal RF B The envelope of the high frequency signal RF is selectively output to the power amplifier 2A or the power amplifier 2B (S107). A Or high frequency signal RF B The envelope of the power supply voltage V changes with time to multiple discrete levels T1 or power supply voltage V T2 As a result, the power amplifier 2A or the power amplifier 2B can use the high frequency signal RF A Or high frequency signal RF B The envelope curve corresponds to the power supply voltage V T1 or power supply voltage V T2 , amplify the high frequency signal RF A Or high frequency signal RF BThat is, the power amplifier 2A or the power amplifier 2B can amplify the high frequency signal RF in the digital ET mode. A Or high frequency signal RF B .

[0190] On the other hand, when it is determined that the APT mode is used (S101: APT), the switch S66 is closed and the bypass path BP1 is connected (S109). The tracker circuit 1A outputs the adjustment voltage received from the pre-regulator circuit 11 to the power amplifier 2A or the power amplifier 2B via the filter circuit 41 (S111). Thus, the power amplifier 2A or the power amplifier 2B is supplied with a power supply voltage V that changes to a plurality of discrete levels in units of, for example, frames according to the average power. T1 or power supply voltage V T2 As a result, the power amplifier 2A or the power amplifier 2B can use the high frequency signal RF A Or high frequency signal RF B The average power corresponding to the power supply voltage V T1 or power supply voltage V T2 , amplify the high frequency signal RF A Or high frequency signal RF B That is, the power amplifier 2A or the power amplifier 2B can amplify the high frequency signal RF in the APT mode. A Or high frequency signal RF B .

[0191] In addition, when the communication uses the frequency band C, the pre-conditioner circuit 11 is based on the high frequency signal RF C The input voltage is converted into an adjusted voltage according to the average power, and the adjusted voltage is output to the power amplifier 2C. Thus, the power amplifier 2C is supplied with a power supply voltage V that changes to a plurality of discrete levels in units of frames according to the average power. T3 As a result, the power amplifier 2C can use the high frequency signal RF C The average power corresponding to the power supply voltage V T3 , amplify the high frequency signal RF C That is, the power amplifier 2C can amplify the high frequency signal RF in APT mode. C .

[0192] [1.4 Example of installation of tracker circuit 1A]

[0193] Next, as an example of implementation of the tracker circuit 1A configured as above, refer to Figure 6 to Figure 8 The tracker module 100 will be described.

[0194] Figure 6 1 is a top view of tracker module 100 according to the present embodiment. Figure 7 1 is a plan view of the tracker module 100 according to the present embodiment, and is a view showing the main surface 90 b side of the module substrate 90 as viewed from the positive z-axis side. Figure 8 2 is a cross-sectional view of tracker module 100 according to the present embodiment. Figure 8 The cross sections of the tracker module 100 are Figure 6 and Figure 7 Section on line VIII-VIII.

[0195] In addition, Figure 6 to Figure 8 In FIG. 9 , a portion of wiring connecting a plurality of circuit components disposed on the module substrate 90 is omitted. Figure 6 and Figure 7 In FIG. 1 , the resin member 91 covering the plurality of circuit components and the surface shielding electrode layer 92 covering the resin member 91 are omitted. Figure 6 In FIG. 1 , shaded blocks represent arbitrary circuit components that are not essential to the present invention.

[0196] Tracker module 100 has Figure 3 and Figure 4 The illustrated switched capacitor circuit 20 , output switch circuit 31 , filter circuit 41 , and digital control circuit 60 include multiple circuit components such as active elements and passive elements, and further include a module substrate 90 , a resin component 91 , a shield electrode layer 92 , and multiple electrodes 150 .

[0197] The module substrate 90 has a main surface 90a and a main surface 90b facing each other. A ground electrode layer 90e and the like are formed in the module substrate 90 and on the main surface 90a. Figure 6 and Figure 7 In the embodiment, the module substrate 90 has a rectangular shape in a plan view, but is not limited to this shape.

[0198] As the module substrate 90, for example, a low temperature co-fired ceramic (LTCC: Low Temperature Co-fired Ceramics) substrate or a high temperature co-fired ceramic (HTCC: High Temperature Co-fired Ceramics) substrate having a stacked structure of multiple dielectric layers, a component-embedded substrate, a substrate having a redistribution layer (RDL: Redistribution Layer), or a printed circuit substrate can be used, but it is not limited to these substrates.

[0199] The integrated circuit 80 , capacitors C10 to C16 , C20 , C30 , C40 , C51 , C81 , and C82 , an inductor L51 , and a resin member 91 are arranged on the main surface 90 a .

[0200] The integrated circuit 80 includes an SC switch section 80b, an OS switch section 80c, and a filter switch section 80d. The SC switch section 80b includes switches S11 to S14, S21 to S24, S31 to S34, and S41 to S44. The OS switch section 80c includes switches S51 to S54. The filter switch section 80d includes a switch S55.

[0201] In addition, although Figure 6 In the embodiment, the SC switch section 80b, the OS switch section 80c, and the filter switch section 80d are included in a single integrated circuit 80, but the present invention is not limited thereto. For example, the SC switch section 80b may be included in one integrated circuit, and the OS switch section 80c and the filter switch section 80d may be included in another integrated circuit. For another example, the SC switch section 80b, the OS switch section 80c, and the filter switch section 80d may be included in three integrated circuits, respectively, independently.

[0202] In addition, although Figure 6 In FIG. 8 , the integrated circuit 80 has a rectangular shape when the module substrate 90 is viewed from above, but the shape is not limited to this.

[0203] The integrated circuit 80 can be formed using, for example, CMOS (Complementary Metal Oxide Semiconductor), and specifically, can be manufactured by an SOI (Silicon on Insulator) process. The integrated circuit 80 is not limited to CMOS.

[0204] Capacitors C10 to C16, C20, C30, C40, C51, C81, and C82 are mounted as chip capacitors, respectively. The so-called chip capacitor refers to a surface mount device (SMD: Surface Mount Device) constituting a capacitor. In addition, the mounting of multiple capacitors is not limited to chip capacitors. For example, part or all of the multiple capacitors may be included in an integrated passive device (IPD: Integrated Passive Device), or may be included in an integrated circuit 80.

[0205] The inductor L51 and the inductor L52 are mounted as chip inductors. The so-called chip inductor refers to an SMD that constitutes an inductor. In addition, the mounting of the inductor L51 and the inductor L52 is not limited to the chip inductor. For example, the inductor L51 and the inductor L52 may also be included in the IPD.

[0206] The plurality of capacitors and inductors arranged on the main surface 90 a are grouped for each circuit and arranged around the integrated circuit 80 .

[0207] When the module substrate 90 is viewed from above, the group of capacitors C10 to C16, C20, C30, and C40 included in the switched capacitor circuit 20 is arranged in an area on the main surface 90a sandwiched by a straight line along the upper side of the integrated circuit 80 and a straight line along the upper side of the module substrate 90, and an area on the main surface 90a sandwiched by a straight line along the right side of the integrated circuit 80 and a straight line along the right side of the module substrate 90. Thus, the group of circuit components included in the switched capacitor circuit 20 is arranged near the SC switch section 80b in the integrated circuit 80. That is, the SC switch section 80b is arranged at a position closer to the switched capacitor circuit 20 than the OS switch section 80c.

[0208] When the module substrate 90 is viewed from above, the capacitor C51 and the group of inductors L51 and L52 included in the filter circuit 41 are arranged in a region on the main surface 90a sandwiched between a straight line along the lower side of the integrated circuit 80 and a straight line along the lower side of the module substrate 90. Thus, the group of circuit components included in the filter circuit 41 is arranged near the filter switch section 80d in the integrated circuit 80. That is, the filter switch section 80d is arranged at a position closer to the capacitor C51 and the inductor L51 and L52 of the filter circuit 41 than the SC switch section 80b.

[0209] A plurality of electrodes 150 are arranged on the main surface 90b. A portion of the plurality of electrodes 150 is used as Figure 2 The external connection terminals 101a to 101d, 102, and 103 shown play a role. The plurality of electrodes 150 are electrically connected to the plurality of electronic components arranged on the main surface 90a via the conducting conductors formed in the module substrate 90. Copper electrodes can be used as the plurality of electrodes 150, but are not limited thereto. For example, solder electrodes can also be used as the plurality of electrodes.

[0210] Resin member 91 covers main surface 90a and at least a portion of the plurality of electronic components on main surface 90a. Resin member 91 has a function of ensuring reliability such as mechanical strength and moisture resistance of the plurality of electronic components on main surface 90a. Resin member 91 may not be included in tracker module 100.

[0211] The shielding electrode layer 92 is, for example, a metal thin film formed by a sputtering method. The shielding electrode layer 92 is formed to cover the surface (upper surface and side surface) of the resin member 91. The shielding electrode layer 92 is connected to the ground, and suppresses the intrusion of external noise into the electronic components constituting the tracker module 100 and the noise generated in the tracker module 100 from interfering with other modules or other devices. In addition, the shielding electrode layer 92 may not be included in the tracker module 100.

[0212] also, Figure 6 to Figure 8The structure of the tracker module 100 shown is an example and is not limited thereto. For example, a part of the capacitor and the inductor arranged on the main surface 90a may be formed in the module substrate 90. In addition, a part of the capacitor and the inductor arranged on the main surface 90a may not be included in the tracker module 100, and may not be arranged on the module substrate 90.

[0213] [1.5 Example of Configuration of Modules in Communication Device 7A]

[0214] Next, refer to Fig. 9 An example of implementing the communication device 7A will be described. Fig. 9 FIG. 7 is a diagram showing the configuration of modules in the communication device 7A of the present embodiment. Fig. 9 In order to easily understand the configuration relationship of each module, each module is labeled with an abbreviation indicating its function (such as "PA1"); however, the actual modules do not need to be labeled with such abbreviations.

[0215] A tracker module 100 (DET) including a tracker circuit 1A, PA modules ( PA1 to PA3 ) including power amplifiers 2A to 2C, RFIC 5 , and a PR module (PR) including a pre-regulator circuit 11 are arranged on a mother substrate 1000 .

[0216] The PA module (PA1) including the power amplifier 2A may include the filter 3A, the PA module (PA2) including the power amplifier 2B may include the filter 3B, and the PA module (PA3) including the power amplifier 2C may include the filter 3C.

[0217] When looking down on the mother substrate 1000, the tracker module 100 (DET) is configured between the PR module (PR) and the PA module (PA1). Furthermore, the tracker module 100 (DET) is configured near the PA modules (PA1 and PA2). That is, when looking down on the mother substrate 1000, the distance D1 between the tracker module 100 (DET) and the PA module (PA1) is shorter than the distance D3 between the tracker module 100 (DET) and the PA module (PA3). Furthermore, when looking down on the mother substrate 1000, the distance D2 between the tracker module 100 (DET) and the PA module (PA2) is shorter than the distance D3 between the tracker module 100 (DET) and the PA module (PA3).

[0218] Antenna 6A (ANT1) is arranged on the upper side of the mother substrate 1000, and is arranged near the PA module (PA1) including the power amplifier 2A. Antenna 6B (ANT2) is arranged on the left side of the mother substrate 1000, and is arranged near the PA module (PA2) including the power amplifier 2B. Antenna 6C (ANT3) is arranged on the lower side of the mother substrate 1000, and is arranged near the PA module (PA3) including the power amplifier 2C.

[0219] [1.6 Effects, etc.]

[0220] As described above, the tracker circuit 1A of this embodiment includes: a switching capacitor circuit 20, which is configured to generate multiple discrete voltages based on a first input voltage; an output switching circuit 31, which is configured to selectively output at least one of the multiple discrete voltages to the power amplifier 2A; a bypass path BP1, which is configured to bypass the switching capacitor circuit 20 and the output switching circuit 31 and output the first input voltage to the power amplifier 2A; and a switch S66, which is configured to switch the connection and disconnection of the bypass path BP1.

[0221] According to other viewpoints, the tracker circuit 1A of this embodiment comprises: an external connection terminal 101 for receiving a first input voltage; an external connection terminal 102 connected to a power amplifier 2A; a switching capacitor circuit 20 including an input terminal 120 and output terminals 121 to 124 connected to the external connection terminal 101; an output switching circuit 31 including input terminals 131 to 134 respectively connected to the output terminals 121 to 124 and an output terminal 130 connected to the external connection terminal 102; a bypass path BP1 connecting the external connection terminal 101 and the external connection terminal 102 without passing through the switching capacitor circuit 20 and the output switching circuit 31; and a switch S66 connected between the external connection terminal 101 and the external connection terminal 102 in the bypass path BP1.

[0222] Thus, by switching the connection and disconnection of the bypass path BP1 by using the switch S66, the power supply voltage supplied to the power amplifier 2A can be switched between a plurality of discrete voltages and the first input voltage. When a plurality of discrete voltages are supplied to the power amplifier 2A, the level of the power supply voltage can be changed discretely and relatively quickly by the switch capacitor circuit 20 and the output switch circuit 31. Therefore, the power supply voltage supplied to the power amplifier 2A can be finely adjusted according to the high-frequency signal, and the power added efficiency can be improved. On the other hand, when the first input voltage is supplied to the power amplifier 2A, the first input voltage can be supplied to the power amplifier 2A without passing through the switch capacitor circuit 20 and the output switch circuit 31. Therefore, the loss in the switch capacitor circuit 20 and the output switch circuit 31 can be reduced, and the power added efficiency can be improved. By switching the connection and disconnection of the bypass path BP1, the power supply voltage that can obtain higher power added efficiency can be supplied to the power amplifier 2A, and the power added efficiency can be improved more effectively.

[0223] In addition, for example, in the tracker circuit 1A of the present embodiment, when the first power level is applied to the high-frequency signal amplified by the power amplifier 2A, the switch S66 cuts off the bypass path BP1, and when the second power level is applied to the high-frequency signal amplified by the power amplifier 2A, the switch S66 connects the bypass path BP1. The first power level may also allow a maximum output power higher than the second power level.

[0224] Thus, at the first power level that allows a higher maximum output power, a greater improvement in power added efficiency can be achieved by supplying multiple discrete voltages to the power amplifier 2A. On the other hand, at the second power level that is limited to a lower maximum output power and cannot expect too much improvement in power added efficiency due to the supply of multiple discrete voltages, the loss in the switched capacitor circuit 20 and the output switch circuit 31 can be reduced by supplying the first input voltage to the power amplifier 2A.

[0225] For example, the tracker circuit 1A of the present embodiment may further include a filter circuit 41 connected between the output switch circuit 31 and the power amplifier 2A (external connection terminal 102 ).

[0226] Thus, the filter circuit 41 can reduce the noise component of the power supply voltage supplied to the power amplifier 2A, and can reduce the distortion in the power amplifier 2A.

[0227] For example, in the tracker circuit 1A of this embodiment, the output switch circuit 31 can also be configured to selectively output at least one discrete voltage among multiple discrete voltages to the power amplifier 2B, and the filter circuit 41 can also be connected between the output switch circuit 31 and the power amplifier 2B.

[0228] From another viewpoint, in the tracker circuit 1A of this embodiment, the output switch circuit 31 may further include an external connection terminal 103 connected to the power amplifier 2B, and the filter circuit 41 may further be connected between the output switch circuit 31 and the external connection terminal 103 .

[0229] Thus, the tracker circuit 1A can supply a plurality of discrete voltages to the plurality of power amplifiers 2A and 2B. Furthermore, the filter circuit 41 can also reduce noise components of the power supply voltage supplied to the power amplifier 2B, thereby reducing distortion in the power amplifier 2B.

[0230] For example, in the tracker circuit 1A of the present embodiment, the bypass path BP1 may be configured to output the first input voltage also to the power amplifier 2B.

[0231] From another viewpoint, in the tracker circuit 1A of the present embodiment, the bypass path BP1 may be connected between the external connection terminal 101 and the external connection terminal 103 without passing through the switched capacitor circuit 20 and the output switch circuit 31 .

[0232] Thus, the first input voltage can be supplied to the two power amplifiers 2A and 2B via the bypass path BP1 of the bypass switch capacitor circuit 20 and the output switch circuit 31. Therefore, compared with the case where a bypass path is provided for each power amplifier 2A and the power amplifier 2B, the bypass path and the switches on the bypass path can be reduced, which can contribute to the miniaturization of the tracker circuit 1A.

[0233] In the tracker circuit 1A of the present embodiment, the filter circuit 41 may include inductors L51 and L52, a capacitor C51, and switches S55 and S56. One end of the switch S55 may be connected to the voltage supply path P41 connecting the output switch circuit 31 and the power amplifier 2A (external connection terminal 102), and the other end of the switch S55 may be connected to the inductor L51 and the inductor L52. One end of the switch S56 may be connected to the voltage supply path P41, and the other end of the switch S56 may be connected to the voltage supply path P41 connecting the output switch circuit 31 and the power amplifier 2B (external connection terminal 103). The path between the inductor L52 in the voltage supply path P42 and the power amplifier 2B (external connection terminal 103), one end of the inductor L51 can be connected to the path between the switch S55 in the voltage supply path P42 and the inductor L52, the other end of the inductor L51 can be connected to the capacitor C51, one end of the capacitor C51 can be connected to the inductor L51, the other end of the capacitor C51 can be connected to the ground, one end of the inductor L52 can be connected to the switch S55 and the inductor L51, and the other end of the inductor L52 can be connected to the switch S56 and the power amplifier 2B (external connection terminal 103).

[0234] Thus, by switching the switches S55 and S56 on and off, the stopband can be changed, and the noise component can be reduced more effectively. In addition, since circuit elements (active elements and passive elements) do not need to be connected in series in the voltage supply path P41, the loss of the power supply voltage supplied to the power amplifier 2A can be suppressed.

[0235] In addition, in the tracker circuit 1A of the present embodiment, the switched capacitor circuit 20 may also be connected to the pre-regulator circuit 11, which is configured to convert the voltage from the DC power supply into a first input voltage. The pre-regulator circuit 11 may also be configured to output the first input voltage to the switched capacitor circuit 20, and to output the first input voltage to the power amplifier 2C without passing through the switched capacitor circuit 20.

[0236] Thus, the first input voltage is directly supplied to the power amplifier 2C from the pre-regulator circuit 11. Therefore, the loss in the tracker circuit 1A can be avoided, and the power added efficiency of the power amplifier 2C that does not need to supply a plurality of discrete voltages via the switched capacitor circuit 20 and the output switch circuit 31 can be improved.

[0237] In addition, the tracking method of the present embodiment comprises the following steps: (i) cutting off the bypass path BP1 connecting the external connection terminal 101 and the external connection terminal 102, (ii) generating a plurality of discrete voltages based on the input voltage received via the external connection terminal 101, and (iii) selectively supplying at least one of the plurality of discrete voltages to the power amplifier 2A or the power amplifier 2B via the external connection terminal 102 based on the envelope of the high-frequency signal amplified by the power amplifier 2A or the power amplifier 2B. When the power amplifier 2A or the power amplifier 2B is operated in the APT mode, (i) the bypass path BP1 is connected, and (ii) the input voltage received via the external connection terminal 101 is supplied to the power amplifier 2A or the power amplifier 2B via the bypass path BP1 and the external connection terminal 102.

[0238] Thus, the power amplifier 2A or the power amplifier 2B can be operated in the digital ET mode and the APT mode, and the power added efficiency can be improved more effectively. In addition, when operating in the APT mode, the bypass path BP1 can be connected, the generation of multiple discrete voltages and the selective supply of at least one of the multiple discrete voltages can be skipped, and the power loss caused by the switch capacitor circuit 20 and the output switch circuit 31 can be reduced.

[0239] (Variation of Implementation Example 1)

[0240] Next, a modification of the first embodiment will be described. A tracker circuit 1B of this modification is different from the tracker circuit 1A of the first embodiment mainly in the structure of the bypass path. Fig.10 The tracker circuit 1B of this embodiment will be described mainly focusing on the differences from the tracker circuit 1A of the first embodiment.

[0241] [1.7 Circuit structure of tracker circuit 1B]

[0242] Fig.10 1B is a circuit diagram of a tracker circuit 1B of this variation. Fig.10 is an exemplary circuit configuration, and the tracker circuit 1B may be implemented using any of a variety of circuit implementations and circuit techniques. Therefore, the description of the tracker circuit 1B provided below should not be interpreted in a limiting sense.

[0243] The tracker circuit 1B includes a switched capacitor circuit 20 , an output switch circuit 31 , a filter circuit 41 , a digital control circuit 60 , external connection terminals 101 to 103 , bypass paths BP1 and BP2 , and switches S66 and S67 .

[0244] The bypass path BP1 is an example of a first bypass path, and is configured to bypass the switched capacitor circuit 20 and the output switch circuit 31, and output the regulated voltage from the pre-regulator circuit 11 to the power amplifier 2A. Specifically, the bypass path BP1 connects between the external connection terminal 101 and the external connection terminal 102 without passing through the switched capacitor circuit 20, the output switch circuit 31, and the filter circuit 41.

[0245] The bypass path BP2 is an example of a second bypass path, and is configured to bypass the switched capacitor circuit 20 and the output switch circuit 31, and output the regulated voltage from the pre-regulator circuit 11 to the power amplifier 2B. Specifically, the bypass path BP2 is connected between the external connection terminal 101 and the external connection terminal 103 without passing through the switched capacitor circuit 20, the output switch circuit 31, and the filter circuit 41.

[0246] The switch S66 is an example of a first switch, and is configured to switch the connection and disconnection of the bypass path BP1. Specifically, the switch S66 is connected between the external connection terminal 101 and the external connection terminal 102 in the bypass path BP1. That is, one end of the switch S66 is connected to the external connection terminal 101, and the other end of the switch S66 is directly connected to the external connection terminal 102.

[0247] The switch S67 is an example of a second switch, and is configured to switch the connection and disconnection of the bypass path BP2. Specifically, the switch S67 is connected between the external connection terminal 101 and the external connection terminal 103 in the bypass path BP2. That is, one end of the switch S67 is connected to the external connection terminal 101, and the other end of the switch S67 is directly connected to the external connection terminal 103.

[0248] In the switch S66 and the switch S67 connected in this way, the on / off switching is performed based on the control signal S4. For example, the on / off switching of the switch S66 and the switch S67 is controlled as follows. (1) When the high frequency signal RF is transmitted at the first power level, A In the case of , switch S66 and switch S67 are turned off. That is, bypass path BP1 and bypass path BP2 are cut off, and the adjustment voltage received via external connection terminal 101 is supplied to switch capacitor circuit 20. As a result, multiple discrete voltages are generated in switch capacitor circuit 20, and at least one of the multiple discrete voltages is selectively output to external connection terminal 102 in output switch circuit 31. Thus, power amplifier 2A operates in digital ET mode. (2) When transmitting high frequency signal RF at the second power level AIn the case of , switch S66 is closed and switch S67 is opened. That is, bypass path BP1 is connected, and the adjustment voltage received via external connection terminal 101 is output to external connection terminal 102. Thus, power amplifier 2A operates in APT mode. (3) When transmitting high frequency signal RF at the first power level B In the case of , switch S66 and switch S67 are turned off. That is, bypass path BP1 and bypass path BP2 are cut off, and the adjustment voltage received via external connection terminal 101 is supplied to switch capacitor circuit 20. As a result, multiple discrete voltages are generated in switch capacitor circuit 20, and at least one of the multiple discrete voltages is selectively output to external connection terminal 103 in output switch circuit 31. Thus, power amplifier 2B operates in digital ET mode. (4) When transmitting high frequency signal RF at the second power level B In the case of , the switch S66 is opened and the switch S67 is closed. That is, the bypass path BP2 is connected, and the adjustment voltage received via the external connection terminal 101 is output to the external connection terminal 103. Thus, the power amplifier 2B operates in the APT mode.

[0249] [1.8 Effects, etc.]

[0250] As described above, the tracker circuit 1B of this variation may further include: a bypass path BP2 configured to bypass the switched capacitor circuit 20 and the output switch circuit 31 to output the first input voltage to the power amplifier 2B; and a switch S67 configured to switch between connection and disconnection of the bypass path BP2.

[0251] According to other viewpoints, the tracker circuit 1B of this variant may also further include: a bypass path BP2, which connects the external connection terminal 101 and the external connection terminal 103 without passing through the switch capacitor circuit 20 and the output switch circuit 31; and a switch S67, which is connected between the external connection terminal 101 and the external connection terminal 103 in the bypass path BP2.

[0252] Thus, the first input voltage is supplied to the power amplifier 2B via the bypass path BP2. At this time, by switching the bypass path BP2 on and off using the switch S67, the power supply voltage supplied to the power amplifier 2B can be switched between a plurality of discrete voltages and the first input voltage, which can more effectively improve the power added efficiency.

[0253] (Implementation Method 2)

[0254] Next, Embodiment 2 will be described. The tracker circuit 1C of this embodiment is different from the tracker circuit 1A of Embodiment 1 mainly in that it can be selectively connected to a plurality of pre-regulator circuits. Fig.11 and Fig.12 The tracker circuit 1C of this embodiment will be described mainly focusing on the differences from the tracker circuit 1A of the first embodiment. Fig.11 It is a circuit configuration diagram of a communication device 7C according to this embodiment. Fig.12 1 is a circuit configuration diagram of a tracker circuit 1C according to the present embodiment.

[0255] also, Fig.11 and Fig.12 are exemplary circuit configurations, and the communication device 7C and tracker circuit 1C may be implemented using any of a variety of circuit implementations and circuit techniques. Therefore, the description of the communication device 7C and tracker circuit 1C provided below should not be interpreted in a limiting sense.

[0256] [2.1 Circuit Configuration of Communication Device 7C]

[0257] First, refer to Fig.11 The circuit configuration of a communication device 7C according to the present embodiment will be described. The communication device 7C includes a tracker circuit 1C, power amplifiers 2A to 2D, filters 3A to 3D, an RFIC 5 , antennas 6A to 6D, pre-conditioner circuits 11 and 12 , and a DC power supply 50 .

[0258] The pre-regulator circuit 12 is an example of a third converter circuit, and is configured to convert the voltage from the DC power supply 50 into an adjustment voltage (an example of a second input voltage). In addition, the pre-regulator circuit 12 can output the adjustment voltage to the switched capacitor circuit 20, and can also output the adjustment voltage to the power amplifier 2D without passing through the switched capacitor circuit 20.

[0259] The power amplifier 2D is connected between the RFIC 5 and the filter 3D. The power amplifier 2D is also connected to the pre-regulator circuit 12 and can receive the power supply voltage V in the APT mode from the pre-regulator circuit 12. T4 The power amplifier 2D can use the power supply voltage V received from the pre-regulator circuit 12. T4 , amplifies the high frequency signal RF of band D received from RFIC5 D That is, the power amplifier 2D can operate in the APT mode. In addition, the power amplifier 2D may not be included in the communication device 7C.

[0260] The filter 3D is connected between the power amplifier 2D and the antenna 6D. The filter 3D is a bandpass filter having a passband including a transmission band of the band D. The filter 3D may not be included in the communication device 7C.

[0261] Band D is the same as bands A to C, and is a band used for a communication system constructed using RAT, and is predefined by a standardization organization or the like. In addition, as band D, for example, a band included in the mid-high band group (1427 to 2690 MHz) or the low band group (698 to 960 MHz) is used. In addition, band D is not limited to a band included in the mid-high band group or the low band group.

[0262] The antenna 6D outputs a transmission signal of the frequency band D input from the power amplifier 2D via the filter 3D. The antenna 6D may not be included in the communication device 7C.

[0263] [2.2 Circuit structure of tracker circuit 1C]

[0264] Next, refer to Fig.12 The circuit configuration of the tracker circuit 1C is described below. The tracker circuit 1C includes a switched capacitor circuit 20 , an output switch circuit 31 , a filter circuit 41 , a digital control circuit 60 , an input switch circuit 70 , external connection terminals 101 to 104 , a bypass path BP1 , and a switch S66 .

[0265] The external connection terminal 101 is an example of a first external connection terminal, and is connected to the pre-regulator circuit 11 outside the tracker circuit 1C, and is connected to the input switch circuit 70 inside the tracker circuit 1C.

[0266] The external connection terminal 102 is an example of a second external connection terminal, and is connected to the power amplifier 2A outside the tracker circuit 1C, and is connected to the filter circuit 41 inside the tracker circuit 1C. The external connection terminal 102 is used to supply a power supply voltage V T1 Terminals.

[0267] The external connection terminal 103 is an example of a third external connection terminal, and is connected to the power amplifier 2B outside the tracker circuit 1C, and is connected to the filter circuit 41 inside the tracker circuit 1C. The external connection terminal 103 is used to supply a power supply voltage V T2 In addition, the external connection terminal 103 may not be included in the tracker circuit 1C.

[0268] The external connection terminal 104 is a terminal representing a plurality of external connection terminals, similarly to the external connection terminal 101. The external connection terminal 104 is connected to the pre-regulator circuit 12 outside the tracker circuit 1C, and is connected to the input switch circuit 70 inside the tracker circuit 1C. The external connection terminal 104 is a terminal for receiving a regulation voltage (an example of a second input voltage) from the pre-regulator circuit 12.

[0269] The input switch circuit 70 is configured to switch the connection of the switched capacitor circuit 20 between the pre-regulator circuit 11 and the pre-regulator circuit 12. For example, the input switch circuit 70 may be configured as a SPDT (Single-Pole Double-Throw) type switch circuit. Specifically, the input switch circuit 70 includes a switch S76 and a switch S77.

[0270] The switch S76 is connected between the external connection terminal 101 and the input terminal of the switched capacitor circuit 20 . That is, one end of the switch S76 is connected to the external connection terminal 101 , and the other end of the switch S76 is connected to the input terminal of the switched capacitor circuit 20 .

[0271] The switch S77 is connected between the external connection terminal 104 and the input terminal of the switched capacitor circuit 20 . That is, one end of the switch S77 is connected to the external connection terminal 104 , and the other end of the switch S77 is connected to the input terminal of the switched capacitor circuit 20 .

[0272] [2.3 Effects, etc.]

[0273] As described above, in the tracker circuit 1C of the present embodiment, the switching capacitor circuit 20 may be configured to be connected to the pre-regulator circuit 12 configured to convert the voltage from the DC power supply 50 into a second input voltage, and generate a plurality of discrete voltages based on the second input voltage. The tracker circuit 1C may also further include an input switching circuit 70 configured to switch the connection of the switching capacitor circuit 20 between the pre-regulator circuit 11 and the pre-regulator circuit 12.

[0274] Thus, since the connection of the switched capacitor circuit 20 can be switched between the pre-regulator circuit 11 and the pre-regulator circuit 12, it is possible to switch the combination of the power amplifier 2C and the power amplifier 2D that operate simultaneously with the power amplifier 2A and the power amplifier 2B that are supplied with power supply voltage from the tracker circuit 1C. That is, when the pre-regulator circuit 11 is connected to the switched capacitor circuit 20, the power supply voltage can be supplied to the power amplifier 2A or the power amplifier 2B and the power amplifier 2D at the same time, and when the pre-regulator circuit 12 is connected to the switched capacitor circuit 20, the power supply voltage can be supplied to the power amplifier 2A or the power amplifier 2B and the power amplifier 2C at the same time.

[0275] (Implementation method 3)

[0276] Next, Embodiment 3 will be described. The tracker circuit 1D of this embodiment is different from the tracker circuit 1A of Embodiment 1 mainly in that it includes a plurality of output switch circuits and can supply a plurality of different discrete voltages to a plurality of power amplifiers at the same time. Fig.13This embodiment will be described focusing on the points different from the first embodiment. Fig.13 1 is a circuit configuration diagram of a tracker circuit 1D according to the present embodiment.

[0277] also, Fig.13 is an exemplary circuit configuration, and the tracker circuit 1D may be implemented using any of a variety of circuit implementations and circuit techniques. Therefore, the description of the tracker circuit 1D provided below should not be interpreted in a limiting sense.

[0278] The communication device 7D of this embodiment is the same as the communication device 7A of Embodiment 1 except that the tracker circuit 1A is replaced with the tracker circuit 1D, so its illustration and description are omitted. In addition, in the communication device 7D of this embodiment, the power amplifier 2B is an example of the fourth power amplifier, and the external connection terminal 103 is an example of the fourth external connection terminal.

[0279] [3.1 Circuit structure of tracker circuit 1D]

[0280] The tracker circuit 1D includes a switched capacitor circuit 20 , output switch circuits 31 and 32 , filter circuits 41 and 42 , a digital control circuit 60 , external connection terminals 101 to 103 , bypass paths BP1 and BP3 , and switches S66 and S68 .

[0281] The output switch circuit 32 is an example of a second output switch circuit, and is configured to selectively output at least one discrete voltage from a plurality of discrete voltages generated by the switch capacitor circuit 20 to the power amplifier 2B. That is, the output switch circuit 32 is capable of selecting at least one voltage from a plurality of discrete voltages and outputting the selected at least one voltage to the power amplifier 2B. At this time, the output switch circuit 32 is capable of discretely changing the level of the voltage output to the power amplifier 2B over time by repeatedly selecting operations. Such an output switch circuit 32 has the same circuit structure as the output switch circuit 31 and is controlled based on a digital control signal. In addition, in the output switch circuit 32, the input terminals 131 to 134 are an example of a plurality of third input terminals, and the output terminal 130 is an example of a third output terminal.

[0282] The filter circuit 42 is an example of a second filter circuit, and is connected between the output switch circuit 32 and the power amplifier 2B (external connection terminal 103). The filter circuit 42 is configured to attenuate noise components from the signal (a plurality of discrete voltages) from the output switch circuit 32. Such a filter circuit 42 has the same circuit configuration as the filter circuit 41.

[0283] The bypass path BP1 is an example of a first bypass path, and is configured to bypass the switched capacitor circuit 20 and the output switch circuit 31, and output the regulated voltage from the pre-regulator circuit 11 to the power amplifier 2A. Specifically, the bypass path BP1 connects between the external connection terminal 101 and the external connection terminal 102 without passing through the switched capacitor circuit 20 and the output switch circuit 31. Fig.13 In the embodiment, the bypass path BP1 is connected to the input terminal of the filter circuit 41 and connected to the external connection terminal 102 via the filter circuit 41 . However, the bypass path BP1 may be directly connected to the external connection terminal 102 without passing through the filter circuit 41 .

[0284] The bypass path BP3 is an example of a third bypass path, and is configured to bypass the switched capacitor circuit 20 and the output switch circuit 32, and output the regulated voltage from the pre-regulator circuit 11 to the power amplifier 2B. Specifically, the bypass path BP3 connects between the external connection terminal 101 and the external connection terminal 103 without passing through the switched capacitor circuit 20 and the output switch circuit 32. Fig.13 In the embodiment, the bypass path BP3 is connected to the input terminal of the filter circuit 42 and connected to the external connection terminal 103 via the filter circuit 42 , but may be directly connected to the external connection terminal 103 without passing through the filter circuit 42 .

[0285] The switch S66 is an example of a first switch, and is configured to switch the connection and disconnection of the bypass path BP1. Specifically, the switch S66 is connected between the external connection terminal 101 and the external connection terminal 102 in the bypass path BP1. That is, one end of the switch S66 is connected to the external connection terminal 101, and the other end of the switch S66 is connected to the external connection terminal 102 via the filter circuit 41.

[0286] The switch S68 is an example of a fifth switch, and is configured to switch the connection and disconnection of the bypass path BP3. Specifically, the switch S68 is connected between the external connection terminal 101 and the external connection terminal 103 in the bypass path BP3. That is, one end of the switch S68 is connected to the external connection terminal 101, and the other end of the switch S68 is connected to the external connection terminal 103 via the filter circuit 42.

[0287] [3.2 Effects, etc.]

[0288] As described above, the tracker circuit 1D of this embodiment may also further include: an output switch circuit 32, configured to selectively output at least one discrete voltage among a plurality of discrete voltages to the power amplifier 2B; a bypass path BP3, configured to bypass the switch capacitor circuit 20 and the output switch circuit 32 and output the first input voltage to the power amplifier 2B; and a switch S68, configured to switch the connection and non-connection of the bypass path BP3.

[0289] According to other viewpoints, the tracker circuit 1D of this embodiment may also further include: an external connection terminal 103, connected to the power amplifier 2B; an output switching circuit 32, including input terminals 131~134 respectively connected to the output terminals 121~124 and an output terminal 130 connected to the external connection terminal 103; a bypass path BP3, connecting the external connection terminal 101 and the external connection terminal 103 without passing through the switching capacitor circuit 20 and the output switching circuit 32; and a switch S68, connected between the external connection terminal 101 and the external connection terminal 103 in the bypass path BP3.

[0290] Thus, since the tracker circuit 1D includes the output switch circuit 31 and the output switch circuit 32, different power supply voltages V can be supplied from the tracker circuit 1D to the two power amplifiers 2A and 2B at the same time. T1 and the power supply voltage V T2 In this case, the pre-regulator circuit 11 and the switched capacitor circuit 20 can be shared by the two power amplifiers 2A and 2B, which can contribute to a reduction in the number of components and a reduction in the size of the communication device 7D.

[0291] For example, the tracker circuit 1D of this embodiment may further include: a filter circuit 41 connected between the output switch circuit 31 and the power amplifier 2A (external connection terminal 102); and a filter circuit 42 connected between the output switch circuit 32 and the power amplifier 2B.

[0292] Thus, the noise component of the power supply voltage supplied to the power amplifier 2A can be reduced by the filter circuit 41, and the noise component of the power supply voltage supplied to the power amplifier 2B can be reduced by the filter circuit 42. Therefore, the distortion in the power amplifier 2A and the power amplifier 2B can be reduced.

[0293] (Implementation 4)

[0294] Next, the fourth embodiment will be described. The tracker circuit 1E of this embodiment is different from the tracker circuit 1D of the third embodiment described above mainly in that the power supply voltage can be supplied to more power amplifiers. Fig.14 and Fig.15The tracker circuit 1E of this embodiment will be described mainly focusing on the differences from the tracker circuit 1D of the third embodiment.

[0295] Fig.14 It is a partial circuit configuration diagram of a communication device 7E according to this embodiment. Fig.15 1 is a partial circuit configuration diagram of a tracker circuit 1E according to the present embodiment.

[0296] also, Fig.14 and Fig.15 The circuit structures are exemplary, and the communication device 7E and the tracker circuit 1E may be implemented using any of a variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 7E and the tracker circuit 1E provided below should not be interpreted in a limiting sense.

[0297] [4.1 Circuit Structure of Communication Device 7E]

[0298] First, refer to Fig.14 A communication device 7E according to the present embodiment will be described. The communication device 7E includes a tracker circuit 1E, power amplifiers 2A to 2J, pre-regulator circuits 11 and 13 , and a DC power supply 50 .

[0299] The tracker circuit 1E includes a switched capacitor circuit 20, output switch circuits 31 and 32, filter circuits 43 and 44, a digital control circuit 60, external connection terminals 101 to 107, bypass paths BP1 and BP3, and switches S66 and S68. The structure of the tracker circuit 1E will be described later.

[0300] The power amplifiers 2A to 2H are connected to the tracker circuit 1E and can receive power supply voltages in the digital ET mode or the APT mode. The power amplifiers 2A to 2H can amplify high frequency signals of frequency bands A to H received from the RFIC 5 using the power supply voltages received from the tracker circuit 1E.

[0301] The power amplifier 2I and the power amplifier 2J are connected to the pre-regulator circuit 13 and can receive the power supply voltage in the APT mode. The power amplifier 2I and the power amplifier 2J can respectively amplify the high frequency signals of the band I and the band J received from the RFIC 5 using the power supply voltage received from the pre-regulator circuit 13.

[0302] Frequency bands A to J are frequency bands used for a communication system constructed using RAT, and are defined in advance by a standardization organization or the like.

[0303] For example, a frequency band included in the ultra-high frequency band group is used as frequency band A and frequency band B. Specifically, for example, n77 and n79 used for 5GNR can be used as frequency band A and frequency band B.

[0304] As frequency band C, for example, a frequency band included in the high frequency band group (2300-2690 MHz) is used. Specifically, as frequency band C, for example, Band 7, Band 30, Band 40, or Band 41 for LTE, or n7, n30, n40, or n41 for 5GNR, or any combination thereof can be used.

[0305] As the frequency band D, for example, a frequency band included in the mid-band group (1427-2200 MHz) is used. Specifically, as the frequency band D, for example, Band 1, Band 3, Band 25, Band 34, Band 39 or Band 66 for LTE, or n1, n3, n25, n34, n39 or n66 for 5GNR, or any combination thereof is used.

[0306] As frequency band E, for example, a frequency band included in the mid-band group is used. Specifically, as frequency band E, for example, Band 1, Band 3, Band 25, Band 34, Band 39, or Band 66 for LTE, or n1, n3, n25, n34, n39, or n66 for 5GNR, or any combination thereof can be used.

[0307] As frequency band F, for example, a frequency band included in the high frequency band group is used. Specifically, as frequency band F, for example, Band 7, Band 30, Band 40, or Band 41 for LTE, or n7, n30, n40, or n41 for 5GNR, or any combination thereof can be used.

[0308] As band G and band H, for example, bands included in the ultra-high frequency band group are used. Specifically, as band G and band H, for example, n77 and n79 used for 5GNR are used.

[0309] As frequency band I, for example, a frequency band included in the low frequency band group is used. Specifically, Band 5, Band 8, Band 26 or Band 28 for LTE, or n5, n8, n26 or n28 for 5GNR, or any combination thereof is used as frequency band I.

[0310] As the frequency band J, for example, a frequency band used for a 2G communication system is used.

[0311] The pre-regulator circuit 13 is configured to convert the voltage from the DC power supply 50 into an adjusted voltage. The pre-regulator circuit 13 can output the adjusted voltage to the power amplifier 2J and the power amplifier 2I. The circuit structure of the pre-regulator circuit 13 is the same as that of the pre-regulator circuit 11, so the description thereof is omitted.

[0312] [4.2 Circuit structure of tracker circuit 1E]

[0313] Next, refer to Fig.15 The circuit structure of the tracker circuit 1E will be described.

[0314] The tracker circuit 1E includes a switched capacitor circuit 20 (not shown), output switch circuits 31 and 32, filter circuits 43 and 44, a digital control circuit 60 (not shown), external connection terminals 101 to 107, bypass paths BP1 and BP3, and switches S66 and S68 (not shown).

[0315] The external connection terminals 102 to 107 are connected to the power amplifiers 2A to 2H outside the tracker circuit 1E, and are connected to the filter circuit 43 or the filter circuit 44 inside the tracker circuit 1E. The external connection terminals 102 to 107 are terminals for supplying power supply voltage to the power amplifiers 2A to 2H.

[0316] The filter circuit 43 is connected between the output switch circuit 31 and the power amplifiers 2A to 2D (external connection terminals 102 to 104 ), and is configured to attenuate noise components from the signal (a plurality of discrete voltages) from the output switch circuit 31 .

[0317] Specifically, the filter circuit 43 includes an input terminal 140 , output terminals 141 to 143 , inductors L51 to L53 , capacitors C51 and C52 , switches S55 to S58 , and voltage supply paths P41 to P43 .

[0318] The input terminal 140 is connected to the output terminal 130 of the output switch circuit 31 outside the filter circuit 43 , and is connected to the output terminal 141 inside the filter circuit 43 .

[0319] The output terminal 141 is connected to the external connection terminal 102 of the tracker circuit 1E outside the filter circuit 43 , and is connected to the input terminal 140 inside the filter circuit 43 .

[0320] The output terminal 142 is connected to the external connection terminal 103 of the tracker circuit 1E outside the filter circuit 43 , and is connected to the input terminal 140 inside the filter circuit 43 .

[0321] The output terminal 143 is connected to the external connection terminal 104 of the tracker circuit 1E outside the filter circuit 43 , and is connected to the input terminal 140 inside the filter circuit 43 .

[0322] The voltage supply path P41 is a part of the path connecting the output switch circuit 31 and the power amplifier 2A and the power amplifier 2B (external connection terminal 102). Here, the voltage supply path P41 is a path directly connecting the input terminal 140 and the output terminal 141. That is, in this embodiment, in the voltage supply path P41, no circuit element (active element and passive element) is connected between the input terminal 140 and the output terminal 141. In addition, a circuit element may be connected between the input terminal 140 and the output terminal 141 in the voltage supply path P41.

[0323] The voltage supply path P42 is a part of the path connecting the output switch circuit 31 and the power amplifier 2C (external connection terminal 103). Here, the voltage supply path P42 is a path connecting the input terminal 140 and the output terminal 142, and partially overlaps with the voltage supply path P41. In addition, the voltage supply path P42 may not necessarily overlap with the voltage supply path P41.

[0324] The voltage supply path P43 is a part of the path connecting the output switch circuit 31 and the power amplifier 2D (external connection terminal 104). Here, the voltage supply path P42 is a path connecting the input terminal 140 and the output terminal 143, and partially overlaps with the voltage supply path P41 and the voltage supply path P42. In addition, the voltage supply path P43 may not necessarily overlap with the voltage supply path P41 and the voltage supply path P42.

[0325] The inductor L51 is connected in series with the capacitor C51. Specifically, one end of the inductor L51 is connected to a path between the switch S55 and the inductor L52 in the voltage supply path P42, and the other end of the inductor L51 is connected to the capacitor C51.

[0326] The capacitor C51 is connected between the inductor L51 and the ground. Specifically, one end of the capacitor C51 is connected to the inductor L51, and the other end of the capacitor C51 is connected to the ground.

[0327] The inductor L52 is connected between the input terminal 140 and the output terminal 142 in the voltage supply path P42. Specifically, one end of the inductor L52 is connected to the switch S55 and the inductor L51, and the other end of the inductor L52 is connected to the switch S56 and the output terminal 142.

[0328] The inductor L53 is connected in series with the capacitor C52. Specifically, one end of the inductor L53 is connected to a path between the switch S57 and the output terminal 143 in the voltage supply path P43, and the other end of the inductor L53 is connected to the capacitor C52.

[0329] The capacitor C52 is connected between the inductor L53 and the ground. Specifically, one end of the capacitor C52 is connected to the inductor L53, and the other end of the capacitor C52 is connected to the ground.

[0330] The switch S55 is connected between the voltage supply path P41 and the inductor L51 and the inductor L52. Specifically, one end of the switch S55 is connected to the voltage supply path P41, and the other end of the switch S55 is connected to the inductor L51 and the inductor L52.

[0331] The switch S56 is connected between the voltage supply path P41 and the voltage supply path P42. Specifically, one end of the switch S56 is connected to the voltage supply path P41, and the other end of the switch S56 is connected to the path between the inductor L52 and the output terminal 142 in the voltage supply path P42.

[0332] The switch S57 is connected between the voltage supply path P42 and the inductor L53 and the output terminal 143. Specifically, one end of the switch S57 is connected to the path between the inductor L52 and the output terminal 142 in the voltage supply path P42, and the other end of the switch S57 is connected to the inductor L53 and the output terminal 143.

[0333] The switch S58 is connected between the voltage supply path P42 and the voltage supply path P43 of the filter circuit 44. Specifically, one end of the switch S58 is connected to the path between the inductor L52 and the output terminal 142 in the voltage supply path P42, and the other end of the switch S58 is connected to the path between the switch S57 and the output terminal 143 in the voltage supply path P43 of the filter circuit 44.

[0334] The switches S55 to S57 connected in this way can function as switching switches of the output terminals 141 to 143 by switching on / off based on the control signal S4, and can function as a variable band-stop filter. For example, by closing the switch S55 and opening the switch S56, the inductor L51 and the capacitor C51 are connected between the voltage supply path P41 and the ground. Thus, the filter circuit 43 can function as a band-stop filter having a first stop band in the voltage supply path P41. For another example, by opening the switch S55 and closing the switch S56, the inductor L51, the inductor L52 and the capacitor C51 are connected between the voltage supply path P41 and the ground. Thus, the filter circuit 43 can function as a band-stop filter having a second stop band different from the first stop band in the voltage supply path P41. For example, the on / off of such switches S55 to S57 can be controlled based on the channel bandwidth (i.e., modulation bandwidth) of the high-frequency signal.

[0335] Furthermore, by switching the switch S58 on and off based on the control signal S4 , it is also possible to switch the connection and disconnection of the output switch circuit 31 with the filter circuit 44 .

[0336] The filter circuit 44 is connected between the output switch circuit 32 and the power amplifiers 2E to 2H (external connection terminals 105 to 107), and is configured to attenuate noise components from the signal (a plurality of discrete voltages) from the output switch circuit 32. In addition, since the internal structure of the filter circuit 44 is the same as that of the filter circuit 43, its description is omitted.

[0337] [4.3 Effects, etc.]

[0338] As described above, according to the tracker circuit 1E of the present embodiment, it is possible to simultaneously supply a power supply voltage based on the digital ET mode to any one of the power amplifiers 2A and / or 2B, 2C, and 2D and any one of the power amplifiers 2E, 2F, 2G, and / or 2H. In addition, by closing the switch S58 of the filter circuit 43, it is also possible to simultaneously supply a power supply voltage based on the digital ET mode to any one of the power amplifiers 2A and / or 2B and 2C and the power amplifier 2D. Furthermore, by closing the switch S58 of the filter circuit 44, it is also possible to simultaneously supply a power supply voltage based on the digital ET mode to any one of the power amplifiers 2E, 2F, 2G, and / or 2H. That is, the tracker circuit 1E can simultaneously supply a power supply voltage to the combinations 1 to 8 of the power amplifiers 2A to 2H in the following Table 1.

[0339] [Table 1]

[0340] 2A 2B 2C 2D 2E 2F 2G 2H 1 √ √ 2 √ √ 3 √ √ 4 √ √ 5 √ √ 6 √ √ 7 √ √ 8 √ √

[0341] (Other embodiments)

[0342] The tracker circuit and tracking method of the present invention are described above based on the embodiments, but the tracker circuit and tracking method of the present invention are not limited to the above embodiments. Other embodiments implemented by combining any constituent elements in the above embodiments, modified examples obtained by implementing various modifications that can be conceived by those skilled in the art without departing from the gist of the present invention on the above embodiments, and various devices having the above tracker circuit built therein are also included in the present invention.

[0343] For example, in the circuit configurations of the various circuits of the above-described embodiments, other circuit elements and wirings may be inserted between the paths connecting the circuit elements and signal paths disclosed in the drawings. For example, an impedance matching circuit may be inserted between the power amplifier 2A and the filter 3A.

[0344] In addition, in each of the above embodiments, a plurality of discrete voltages are supplied from the switched capacitor circuit to the output switch circuit, but the present invention is not limited thereto. For example, a plurality of voltages may be supplied from a plurality of DCDC converters to the output switch circuit. In addition, when the voltage levels of the plurality of discrete voltages are equally spaced, it is preferred to use a switched capacitor circuit, which is effective for miniaturization of the tracker module.

[0345] In addition, in each of the above embodiments, four discrete voltages are supplied to the power amplifier, but the number of discrete voltages is not limited to 4. For example, as long as the plurality of discrete voltages include at least a voltage corresponding to the maximum output power and a voltage corresponding to the output power with the highest generation frequency, the power added efficiency can be improved.

[0346] In the first embodiment, the plurality of circuit components of the tracker circuit 1A are arranged on the main surface 90a of the module substrate 90, but they may be arranged separately on both the main surface 90a and the main surface 90b. In this case, for example, the integrated circuit 80 may also be arranged on the main surface 90b.

[0347] The following describes the features of the tracker circuit and the tracking method described in the above-mentioned embodiments.

[0348] <1> A tracker circuit comprising:

[0349] a converter circuit configured to generate a plurality of discrete voltages based on a first input voltage;

[0350] a first output switch circuit configured to selectively output at least one discrete voltage among the plurality of discrete voltages to a first power amplifier;

[0351] a first bypass path configured to bypass the converter circuit and the first output switch circuit to output the first input voltage to the first power amplifier; and

[0352] The first switch is configured to switch between connection and disconnection of the first bypass path.

[0353] <2> The tracker circuit according to <1>, wherein:

[0354] When a first power level is applied to the high frequency signal amplified by the first power amplifier, the first switch cuts off the first bypass path.

[0355] When a second power level is applied to the high frequency signal amplified by the first power amplifier, the first switch connects the first bypass path.

[0356] The first power level allows a higher maximum output power than the second power level.

[0357] <3> The tracker circuit according to <1> or <2>, wherein:

[0358] The tracker circuit further includes a first filter circuit connected between the first output switch circuit and the first power amplifier.

[0359] <4> The tracker circuit according to <3>, wherein:

[0360] The first output switch circuit is configured to selectively output at least one of the plurality of discrete voltages to the second power amplifier.

[0361] The first filter circuit is also connected between the first output switch circuit and the second power amplifier.

[0362] <5> The tracker circuit according to <4>, wherein:

[0363] The first bypass path is configured to output the first input voltage further to the second power amplifier.

[0364] <6> The tracker circuit according to <4>, wherein:

[0365] The above tracker circuit also has:

[0366] a second bypass path configured to bypass the converter circuit and the first output switch circuit to output the first input voltage to the second power amplifier; and

[0367] The second switch is configured to switch between connection and non-connection of the second bypass path.

[0368] <7> The tracker circuit according to any one of <4> to <6>, wherein:

[0369] The first filter circuit includes a first inductor, a second inductor, a first capacitor, a third switch and a fourth switch.

[0370] One end of the third switch is connected to a first voltage supply path, the first voltage supply path connects the first output switch circuit and the first power amplifier, and the other end of the third switch is connected to the first inductor and the second inductor.

[0371] One end of the fourth switch is connected to the first voltage supply path, and the other end of the fourth switch is connected to a path between the second inductor and the second power amplifier in a second voltage supply path, wherein the second voltage supply path connects the first output switch circuit and the second power amplifier.

[0372] One end of the first inductor is connected to a path between the third switch and the second inductor in the second voltage supply path, and the other end of the first inductor is connected to the first capacitor.

[0373] One end of the first capacitor is connected to the first inductor, and the other end of the first capacitor is connected to ground.

[0374] One end of the second inductor is connected to the third switch and the first inductor, and the other end of the second inductor is connected to the fourth switch and the second power amplifier.

[0375] <8> The tracker circuit according to any one of <1> to <7>, wherein:

[0376] The converter circuit is a second converter circuit connected to a first converter circuit, wherein the first converter circuit is configured to convert a voltage from a DC power supply into the first input voltage.

[0377] The first converter circuit is configured to output the first input voltage to the second converter circuit, and to output the first input voltage to the third power amplifier without passing through the second converter circuit.

[0378] <9> The tracker circuit according to <8>, wherein:

[0379] The second converter circuit is further connected to a third converter circuit configured to convert the voltage from the DC power supply into a second input voltage, and generates the plurality of discrete voltages based on the second input voltage.

[0380] The tracker circuit further includes an input switch circuit configured to switch connection of the second converter circuit between the first converter circuit and the third converter circuit.

[0381] <10> The tracker circuit according to any one of <1> to <9>, wherein:

[0382] The above tracker circuit also has:

[0383] a second output switch circuit configured to selectively output at least one discrete voltage among the plurality of discrete voltages to a fourth power amplifier;

[0384] a third bypass path configured to bypass the converter circuit and the second output switch circuit to output the first input voltage to the fourth power amplifier; and

[0385] The fifth switch is configured to switch between connection and non-connection of the third bypass path.

[0386] <11> The tracker circuit according to <10>, wherein:

[0387] The above tracker circuit also has:

[0388] A first filter circuit connected between the first output switch circuit and the first power amplifier; and

[0389] The second filter circuit is connected between the second output switch circuit and the fourth power amplifier.

[0390] <12> A tracker circuit comprising:

[0391] A first external connection terminal, used to receive a first input voltage;

[0392] a second external connection terminal connected to the first power amplifier;

[0393] A switched capacitor circuit, comprising a first input terminal and a plurality of first output terminals, wherein the first input terminal is connected to the first external connection terminal;

[0394] A first output switch circuit comprises a plurality of second input terminals and a second output terminal, wherein the plurality of second input terminals are respectively connected to the plurality of first output terminals, and the second output terminal is connected to the second external connection terminal;

[0395] a first bypass path connecting the first external connection terminal and the second external connection terminal without passing through the switch capacitor circuit and the first output switch circuit; and

[0396] The first switch is connected between the first external connection terminal and the second external connection terminal in the first bypass path.

[0397] <13> The tracker circuit according to <12>, wherein:

[0398] The tracker circuit further includes a first filter circuit connected between the first output switch circuit and the second external connection terminal.

[0399] <14> The tracker circuit according to <13>, wherein:

[0400] The first output switch circuit further includes a third external connection terminal, and the third external connection terminal is connected to the second power amplifier.

[0401] The first filter circuit is further connected between the first output switch circuit and the third external connection terminal.

[0402] <15> The tracker circuit according to <14>, wherein:

[0403] The first bypass path is connected between the first external connection terminal and the third external connection terminal without passing through the switched capacitor circuit and the first output switch circuit.

[0404] <16> The tracker circuit according to <14>, wherein:

[0405] The above tracker circuit also has:

[0406] a second bypass path connecting between the first external connection terminal and the third external connection terminal without passing through the switched capacitor circuit and the first output switch circuit; and

[0407] The second switch is connected between the first external connection terminal and the third external connection terminal in the second bypass path.

[0408] <17> The tracker circuit according to any one of <14> to <16>, wherein:

[0409] The first filter circuit includes a first inductor, a second inductor, a first capacitor, a third switch and a fourth switch.

[0410] One end of the third switch is connected to a first voltage supply path, the first voltage supply path connects the first output switch circuit and the second external connection terminal, and the other end of the third switch is connected to the first inductor and the second inductor.

[0411] One end of the fourth switch is connected to the first voltage supply path, and the other end of the fourth switch is connected to a path between the second inductor and the third external connection terminal in a second voltage supply path, wherein the second voltage supply path connects the first output switch circuit and the third external connection terminal.

[0412] One end of the first inductor is connected to a path between the third switch and the second inductor in the second voltage supply path, and the other end of the first inductor is connected to the first capacitor.

[0413] One end of the first capacitor is connected to the first inductor, and the other end of the first capacitor is connected to ground.

[0414] One end of the second inductor is connected to the third switch and the first inductor, and the other end of the second inductor is connected to the fourth switch and the third external connection terminal.

[0415] <18> The tracker circuit according to any one of <12> to <17>, wherein:

[0416] The above tracker circuit also has:

[0417] a fourth external connection terminal connected to a fourth power amplifier;

[0418] A second output switch circuit comprises a plurality of third input terminals and a third output terminal, wherein the plurality of the third input terminals are respectively connected to the plurality of the first output terminals, and the third output terminal is connected to the fourth external connection terminal;

[0419] a third bypass path connecting between the first external connection terminal and the fourth external connection terminal without passing through the switch capacitor circuit and the second output switch circuit; and

[0420] The fifth switch is connected between the first external connection terminal and the fourth external connection terminal in the third bypass path.

[0421] <19> The tracker circuit according to <18>, wherein:

[0422] The above tracker circuit also has:

[0423] a first filter circuit connected between the first output switch circuit and the first external connection terminal; and

[0424] The second filter circuit is connected between the second output switch circuit and the fourth external connection terminal.

[0425] <20> A tracking method, wherein:

[0426] When the power amplifier is operated in digital envelope tracking mode,

[0427] (i) cutting off the bypass path between the first external connection terminal and the second external connection terminal,

[0428] (ii) generating a plurality of discrete voltages based on an input voltage received via the first external connection terminal,

[0429] (iii) selectively supplying at least one of the plurality of discrete voltages to the power amplifier via the second external connection terminal based on an envelope of the high-frequency signal amplified by the power amplifier,

[0430] When the power amplifier is operated in the average power tracking mode,

[0431] (i) connecting the above bypass path,

[0432] (ii) The input voltage received via the first external connection terminal is supplied to the power amplifier via the bypass path and the second external connection terminal.

[0433] The present invention can be widely used in communication devices such as mobile phones as a tracker circuit for supplying voltage to a power amplifier.

[0434] Description of Reference Numerals

[0435] 1A, 1B, 1C, 1D, 1E…tracker circuit, 2A, 2B, 2C, 2D, 2E, 2F, 2G, 2H, 2I, 2J…power amplifier, 3A, 3B, 3C, 3D…filter, 5…RFIC, 6A, 6B, 6C, 6D…antenna, 7A, 7C, 7D, 7E…communication device, 11, 12, 13…pre-regulator circuit, 20…switched capacitor circuit, 31, 32…output switch circuit, 41, 42, 43, 44…filter circuit, 50…DC power supply, 60…digital control circuit, 61…first controller, 62…second controller, 70…input switch circuit, 80…integrated circuit, 80b…SC switch section, 80c…OS switch section, 80d…filter switch section, 90…analog block substrate, 90a, 90b…main surface, 90e…ground electrode layer, 91…resin component, 92…shielding electrode layer, 100…tracker module, 101, 101a, 101b, 101c, 101d, 102, 103, 104, 105, 106, 107…external connection terminal, 110, 120, 120a, 120b, 120c, 120d, 131, 132, 133, 134, 140…input terminal, 111, 112, 113, 114, 121, 122, 123, 124, 130, 141, 142, 143…output terminal, 150…electrode, 601, 602, 603, 604…control terminal, BP1, BP2, BP3…bypass path.

Claims

1. A tracker circuit, comprising: a converter circuit configured to generate a plurality of discrete voltages based on a first input voltage; a first output switch circuit configured to selectively output at least one discrete voltage among the plurality of discrete voltages to a first power amplifier; a first bypass path configured to bypass the converter circuit and the first output switch circuit to output the first input voltage to the first power amplifier; and The first switch is configured to switch between connection and disconnection of the first bypass path.

2. The tracker circuit according to claim 1, wherein: When a first power level is applied to the high frequency signal amplified by the first power amplifier, the first switch cuts off the first bypass path. When a second power level is applied to the high frequency signal amplified by the first power amplifier, the first switch connects the first bypass path. The first power level allows a higher maximum output power than the second power level.

3. The tracker circuit according to claim 1 or 2, wherein: The tracker circuit further includes a first filter circuit connected between the first output switch circuit and the first power amplifier.

4. The tracker circuit of claim 3, wherein: The first output switch circuit is configured to selectively output at least one of the plurality of discrete voltages to the second power amplifier. The first filter circuit is also connected between the first output switch circuit and the second power amplifier.

5. The tracker circuit of claim 4, wherein: The first bypass path is configured to output the first input voltage further to the second power amplifier.

6. The tracker circuit of claim 4, wherein: The above tracker circuit also has: a second bypass path configured to bypass the converter circuit and the first output switch circuit to output the first input voltage to the second power amplifier; and The second switch is configured to switch between connection and non-connection of the second bypass path.

7. The tracker circuit according to any one of claims 4 to 6, wherein: The first filter circuit includes a first inductor, a second inductor, a first capacitor, a third switch and a fourth switch. One end of the third switch is connected to a first voltage supply path, the first voltage supply path connects the first output switch circuit and the first power amplifier, and the other end of the third switch is connected to the first inductor and the second inductor. One end of the fourth switch is connected to the first voltage supply path, and the other end of the fourth switch is connected to a path between the second inductor and the second power amplifier in a second voltage supply path, wherein the second voltage supply path connects the first output switch circuit and the second power amplifier. One end of the first inductor is connected to a path between the third switch and the second inductor in the second voltage supply path, and the other end of the first inductor is connected to the first capacitor. One end of the first capacitor is connected to the first inductor, and the other end of the first capacitor is connected to ground. One end of the second inductor is connected to the third switch and the first inductor, and the other end of the second inductor is connected to the fourth switch and the second power amplifier.

8. The tracker circuit according to any one of claims 1 to 7, wherein: The converter circuit is a second converter circuit connected to a first converter circuit, wherein the first converter circuit is configured to convert a voltage from a DC power supply into the first input voltage. The first converter circuit is configured to output the first input voltage to the second converter circuit, and to output the first input voltage to the third power amplifier without passing through the second converter circuit.

9. The tracker circuit of claim 8, wherein: The second converter circuit is further connected to a third converter circuit configured to convert the voltage from the DC power supply into a second input voltage, and generates the plurality of discrete voltages based on the second input voltage. The tracker circuit further includes an input switch circuit configured to switch connection of the second converter circuit between the first converter circuit and the third converter circuit.

10. The tracker circuit according to any one of claims 1 to 9, wherein: The above tracker circuit also has: a second output switch circuit configured to selectively output at least one discrete voltage among the plurality of discrete voltages to a fourth power amplifier; a third bypass path configured to bypass the converter circuit and the second output switch circuit to output the first input voltage to the fourth power amplifier; and The fifth switch is configured to switch between connection and non-connection of the third bypass path.

11. The tracker circuit of claim 10, wherein: The above tracker circuit also has: A first filter circuit connected between the first output switch circuit and the first power amplifier; and The second filter circuit is connected between the second output switch circuit and the fourth power amplifier.

12. A tracker circuit comprising: A first external connection terminal, used to receive a first input voltage; a second external connection terminal connected to the first power amplifier; A switched capacitor circuit comprises a first input terminal and a plurality of first output terminals, wherein: The first input terminal is connected to the first external connection terminal; A first output switch circuit comprises a plurality of second input terminals and a second output terminal, wherein the plurality of second input terminals are respectively connected to the plurality of first output terminals, and the second output terminal is connected to the second external connection terminal; a first bypass path connecting the first external connection terminal and the second external connection terminal without passing through the switch capacitor circuit and the first output switch circuit; and The first switch is connected between the first external connection terminal and the second external connection terminal in the first bypass path.

13. The tracker circuit of claim 12, wherein: The tracker circuit further includes a first filter circuit connected between the first output switch circuit and the second external connection terminal.

14. The tracker circuit of claim 13, wherein: The first output switch circuit further includes a third external connection terminal, and the third external connection terminal is connected to the second power amplifier. The first filter circuit is further connected between the first output switch circuit and the third external connection terminal.

15. The tracker circuit of claim 14, wherein: The first bypass path is connected between the first external connection terminal and the third external connection terminal without passing through the switched capacitor circuit and the first output switch circuit.

16. The tracker circuit of claim 14, wherein: The above tracker circuit also has: a second bypass path connecting between the first external connection terminal and the third external connection terminal without passing through the switched capacitor circuit and the first output switch circuit; and The second switch is connected between the first external connection terminal and the third external connection terminal in the second bypass path.

17. The tracker circuit according to any one of claims 14 to 16, wherein: The first filter circuit includes a first inductor, a second inductor, a first capacitor, a third switch and a fourth switch. One end of the third switch is connected to a first voltage supply path, the first voltage supply path connects the first output switch circuit and the second external connection terminal, and the other end of the third switch is connected to the first inductor and the second inductor. One end of the fourth switch is connected to the first voltage supply path, and the other end of the fourth switch is connected to a path between the second inductor and the third external connection terminal in a second voltage supply path, wherein the second voltage supply path connects the first output switch circuit and the third external connection terminal. One end of the first inductor is connected to a path between the third switch and the second inductor in the second voltage supply path, and the other end of the first inductor is connected to the first capacitor. One end of the first capacitor is connected to the first inductor, and the other end of the first capacitor is connected to ground. One end of the second inductor is connected to the third switch and the first inductor, and the other end of the second inductor is connected to the fourth switch and the third external connection terminal.

18. The tracker circuit according to any one of claims 12 to 17, wherein: The above tracker circuit also has: a fourth external connection terminal connected to a fourth power amplifier; A second output switch circuit comprises a plurality of third input terminals and a third output terminal, wherein the plurality of the third input terminals are respectively connected to the plurality of the first output terminals, and the third output terminal is connected to the fourth external connection terminal; a third bypass path connecting between the first external connection terminal and the fourth external connection terminal without passing through the switch capacitor circuit and the second output switch circuit; and The fifth switch is connected between the first external connection terminal and the fourth external connection terminal in the third bypass path.

19. The tracker circuit of claim 18, wherein: The above tracker circuit also has: a first filter circuit connected between the first output switch circuit and the first external connection terminal; and The second filter circuit is connected between the second output switch circuit and the fourth external connection terminal.

20. A tracking method, wherein: When the power amplifier is operated in digital envelope tracking mode, (i) cutting off the bypass path between the first external connection terminal and the second external connection terminal, (ii) generating a plurality of discrete voltages based on an input voltage received via the first external connection terminal, (iii) selectively supplying at least one of the plurality of discrete voltages to the power amplifier via the second external connection terminal based on an envelope of the high-frequency signal amplified by the power amplifier, When the power amplifier is operated in the average power tracking mode, (i) connecting the above bypass path, (ii) The input voltage received via the first external connection terminal is supplied to the power amplifier via the bypass path and the second external connection terminal.

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