Wafer resistor

Abstract

A chip resistor mainly comprises a substrate, first and second conductive structures, first to third front electrodes, first to third back electrodes, first and second resistive layers, and first and second external electrode layers. The first and second conductive structures are disposed in the substrate. The first to third front electrodes and the first to third back electrodes are respectively disposed on the front and back sides of the substrate and are opposite to each other. The first back electrode and the first front electrode are bonded to the first conductive structure. The first resistive layer is disposed on the front side and is bonded to the second front electrode and the second conductive structure. The second resistive layer is disposed on the back side and is bonded to the first and third back electrodes, and the first and second conductive structures. The first external electrode layer connects the first front electrode and the first back electrode. The second external electrode layer connects the second front electrode and the second back electrode. This double-layer series resistor structure can increase the maximum resistance value of the chip resistor and enable the chip resistor to have higher power handling and a higher maximum operating voltage.

Description

Technical Field

[0001] This disclosure relates to a passive component, and more particularly to a chip resistor. Background Technology

[0002] Traditional wafer resistors primarily consist of a pair of electrodes and a resistive layer spanning between them. Traditional wafer resistors utilize laser cutting to alter the current path within the resistive layer. According to Ohm's law, the longer the current path, the greater the resistance. Currently, given the same resistive material, there are generally two methods to increase the resistance value of a wafer resistor. The first method is to reduce the thickness of the resistive layer, and the second is to increase the circuit pattern of the resistive layer. Using the first method to increase the resistance value may result in an excessively thin resistive layer, leading to a decrease in the product's power handling capability.

[0003] On the other hand, if the second method is used to increase the resistance of the wafer, the number of laser cuts needs to be increased to lengthen the current path of the resistive layer. Increasing the number of laser cuts requires thickening the resistive layer before using the laser to cut the winding pattern of the resistive layer. Furthermore, increasing the number of cuts causes the spacing between the lines of the resistive layer's winding pattern to become too close, for example, the line width is less than 7μm. In this case, the thermal effect of laser processing will affect the resistive layer itself, thus affecting the stability of the wafer resistor's electrical performance.

[0004] Furthermore, resistors are specified in their datasheets with rated power and maximum operating voltage. This specification means that when the resistance value exceeds a certain threshold, the product specification applies only to the maximum operating voltage, not the rated power. To increase the withstand voltage of a product at the same rated power, the current path of the resistor layer needs to be increased, requiring more bends in the resistor layer's circuitry to lower the potential on the resistor layer's lines, thereby reducing the voltage drop per unit length. However, according to Ohm's law, increasing the current path of the resistor layer shortens the cross-sectional area of ​​the current path, leading to a decrease in the product's power stability. Summary of the Invention

[0005] Therefore, one objective of this disclosure is to provide a chip resistor comprising a two-layer series resistor structure consisting of a front resistive layer and a back resistive layer. Thus, with the same resistive material, the maximum resistance value of the chip resistor can be increased by at least 1.5 times, and even approaching 2 times.

[0006] Another objective of this disclosure is to provide a chip resistor with a double-layer series resistor structure, which increases the resistor path and the cross-sectional area of ​​the path. Therefore, at a fixed voltage, the voltage gradient per unit length of the resistor can be reduced. In addition, this architecture allows the chip resistor to have a larger heat dissipation area, resulting in higher power consumption and a higher maximum operating voltage.

[0007] According to the above-mentioned objectives of this disclosure, a wafer resistor is provided, comprising a substrate, a first conductive structure, a second conductive structure, a first front electrode, a second front electrode, a third front electrode, a first back electrode, a second back electrode, a third back electrode, a first resistive layer, a second resistive layer, a first protective layer, a second protective layer, a first external electrode layer, and a second external electrode layer. The substrate has a front side and a back side, and a first through-hole and a second through-hole extend from the front side to the back side. The first conductive structure is disposed in the first through-hole. The second conductive structure is disposed in the second through-hole. The first front electrode, the second front electrode, and the third front electrode are disposed on the front side, spaced apart from each other. The first front electrode and the second front electrode are respectively located on opposite edge regions of the substrate, and the third front electrode is located between the first front electrode and the second front electrode. The first back electrode, the second back electrode, and the third back electrode are disposed on the back side and are respectively opposite to the first front electrode, the second front electrode, and the third front electrode. The first back electrode and the first front electrode are respectively bonded to opposite ends of the first conductive structure. The first resistive layer is disposed on the front side and is bonded to the second front electrode and the second conductive structure. A second resistive layer is disposed on the back side and bonded to the first back electrode, the third back electrode, the first conductive structure, and the second conductive structure. A first protective layer covers the first resistive layer, the third front electrode, a portion of the first front electrode, and a portion of the second front electrode. A second protective layer covers the second resistive layer, the third back electrode, a portion of the first back electrode, and a portion of the second back electrode. A first external electrode layer extends from the first front electrode through a first side of the substrate to the first back electrode. A second external electrode layer extends from the second front electrode through a second side of the substrate to the second back electrode.

[0008] According to one embodiment of the present disclosure, the substrate is a ceramic substrate, and the material of the substrate is alumina, aluminum nitride, boron nitride, silicon carbide, or a glass-containing material.

[0009] According to one embodiment of the present disclosure, the diameters of the first through hole and the second through hole are both about 0.1 mm to about 1.0 mm. The distance between the center of the second through hole and the short side of the adjacent substrate is 1 / 4 to 1 / 3 of the length of the substrate, and the distance between the center of the second through hole and the long side of the adjacent substrate is 1 / 5 to 1 / 2 of the width of the substrate.

[0010] According to one embodiment of the present disclosure, the first through hole and the second through hole are respectively filled with the materials of the first front electrode and the third front electrode, the materials of the first back electrode and the third back electrode, or the materials of the first front electrode and the first back electrode, and the materials of the third front electrode and the third back electrode.

[0011] According to one embodiment of the present disclosure, the first resistive layer and the second resistive layer are connected in series.

[0012] According to one embodiment of the present disclosure, the materials of the first front electrode, the second front electrode, the third front electrode, the first back electrode, the second back electrode, and the third back electrode are copper, copper-nickel alloy, nickel-phosphorus alloy, or sintered silver paste containing silver and glass.

[0013] According to one embodiment of the present disclosure, the materials of the first resistive layer and the second resistive layer are nickel-chromium alloy, copper-nickel alloy, nickel-chromium-silicon alloy, nickel-chromium-aluminum alloy, nickel-chromium-aluminum-silicon alloy, nickel-chromium-aluminum-yttrium alloy, nickel-chromium-tantalum-molybdenum alloy, tantalum nitride, copper-manganese-tin alloy, or copper-manganese-nickel alloy.

[0014] According to one embodiment of the present disclosure, the materials of the first protective layer and the second protective layer are epoxy resin, polyimide (PI), resin, or glass-containing materials.

[0015] According to one embodiment of the present disclosure, both the first external electrode layer and the second external electrode layer comprise sequentially stacked nickel-chromium layers, nickel layers, and tin layers, or sequentially stacked nickel-chromium layers, nickel layers, copper layers, another nickel layer, and tin layers.

[0016] According to one embodiment of the present disclosure, the first external electrode layer and the second external electrode layer are approximately 5 μm higher than the first protective layer and the second protective layer. Attached Figure Description

[0017] A better understanding of the features disclosed herein can be obtained from the following detailed description taken in conjunction with the accompanying drawings. It should be noted that, according to industry standard practice, the features are not drawn to scale. In fact, the dimensions of the features can be arbitrarily increased or decreased for clarity of discussion.

[0018] Figures 1A to 8 To illustrate a process diagram of a chip resistor according to one embodiment of the present disclosure, wherein... Figure 1A , Figure 2A , Figure 3A , Figure 4A , Figure 5A , Figure 6 and Figure 7A This is the top view. Figure 1B , Figure 2B , Figure 3B , Figure 4B , Figure 5B and Figure 7B The bottom view is shown below. Figure 8 This is a 3D image.

[0019] Figure 9 A schematic diagram of an equivalent circuit model of a chip resistor according to one embodiment of the present disclosure is provided. Detailed Implementation

[0020] The embodiments of this disclosure are discussed in detail below. However, it will be understood that the embodiments provide many applicable concepts that can be implemented in a wide variety of specific situations. The embodiments discussed and disclosed are for illustrative purposes only and are not intended to limit the scope of this disclosure. All embodiments of this disclosure reveal a variety of different features, but these features can be implemented individually or in combination as needed.

[0021] Furthermore, the terms "first," "second," etc., used in this article do not specifically refer to order or sequence; they are merely used to distinguish elements or operations described using the same technical terms.

[0022] The spatial relationship between the two elements described in this disclosure applies not only to the orientation shown in the accompanying drawings, but also to orientations not shown in the drawings, such as inverted orientations. Furthermore, the terms "connection," "electrical connection," or similar expressions used in this disclosure to refer to two components are not limited to a direct or electrical connection, but may also include indirect or electrical connections as needed.

[0023] Please refer to Figures 1A to 8 This is a schematic flowchart illustrating a wafer resistor 100 according to an embodiment of the present disclosure. The wafer resistor 100 may mainly include... Figure 1A and Figure 1B The substrate 110 shown, Figure 2A and Figure 2B The first conductive structure 120, the second conductive structure 122, the first front electrode 130, the second front electrode 132, the third front electrode 134, the first back electrode 140, the second back electrode 142, and the third back electrode 144 shown are... Figure 6 The first resistive layer 150 shown is... Figure 5B The second resistive layer 160 shown is... Figure 7A and Figure 7B The first protective layer 170 and the second protective layer 180 shown, and Figure 8 The first external electrode layer 190 and the second external electrode layer 200 are shown.

[0024] When fabricating the chip resistor 100, a substrate 110 can be provided first. The substrate 110 can be a ceramic substrate. For example, the material of the substrate 110 can be alumina, aluminum nitride, boron nitride, silicon carbide, or a glass-containing material. The substrate 110 can have a planar structure. For example, such as... Figure 1A As shown, the substrate 110 can be a rectangular flat plate structure with a length L and a width W. The substrate 110 has a front side 112 and a back side 114 that are opposite to each other, wherein the front side 112 and the back side 114 can both be planar.

[0025] exist Figure 1AIn the illustrated embodiment, the substrate 110 has two through holes, namely a first through hole 116 and a second through hole 118. In other embodiments, the substrate 110 may have more than two through holes depending on the architectural design requirements. Both the first through hole 116 and the second through hole 118 extend from the front side 112 to the back side 114 of the substrate 110. The first through hole 116 and the second through hole 118 are adjacent to the short side 110a of the substrate 110. In some embodiments, the first through hole 116 and the second through hole 118 can be formed in the substrate 110 using laser processing. Therefore, the first through hole 116 and the second through hole 118 can be circular through holes. For example, the diameter of the first through hole 116 and the diameter of the second through hole 118 can be from about 0.1 mm to about 1.0 mm. By designing the position of the second through hole 118 in the substrate 110, a better effective area utilization of the substrate 110 can be obtained. In some exemplary embodiments, the distance D1 between the center 118a of the second through hole 118 and the short side 110a of the adjacent substrate 110 is 1 / 4 to 1 / 3 of the length L of the substrate 110, and the distance D2 between the center 118a of the second through hole 118 and the long side 110b of the adjacent substrate 110 is 1 / 5 to 1 / 2 of the width W of the substrate 110.

[0026] Next, as Figure 2A As shown, a first front electrode 130, a second front electrode 132, and a third front electrode 134 can be formed on the front side 112 of a substrate 110 using printing, sputtering, or electroplating methods. The first front electrode 130, the second front electrode 132, and the third front electrode 134 are spaced apart from each other. Figure 2A In the illustrated embodiment, the first front electrode 130 and the second front electrode 132 are located on opposite edge regions 110c and 110d of the substrate 110, respectively, and the third front electrode 134 is located between the first front electrode 130 and the second front electrode 132. The third front electrode 134 may, for example, be adjacent to the first front electrode 130. The materials of the first front electrode 130, the second front electrode 132, and the third front electrode 134 may be low-resistivity materials, such as copper, copper-nickel alloys, nickel-phosphorus alloys, or sintered silver paste containing silver and glass.

[0027] Next, as Figure 2BAs shown, the first back electrode 140, the second back electrode 142, and the third back electrode 144 can be formed on the back side 114 of the substrate 110 using printing, sputtering, or electroplating methods. The first back electrode 140, the second back electrode 142, and the third back electrode 144 are respectively opposite to the first front electrode 130, the second front electrode 132, and the third front electrode 134. Therefore, the first back electrode 140, the second back electrode 142, and the third back electrode 144 are also separated from each other, with the third back electrode 144 positioned between the first back electrode 140 and the second back electrode 142. The materials of the first back electrode 140, the second back electrode 142, and the third back electrode 144 can be low-resistivity materials, such as copper, copper-nickel alloys, nickel-phosphorus alloys, or sintered silver paste containing silver and glass. The fabrication order of the front and back electrodes can be adjusted, or the back electrodes can be fabricated first.

[0028] The first through-hole 116 and the second through-hole 118 of the substrate 110 can be filled with the materials of the first front electrode 130 and the third front electrode 134, respectively, or with the materials of the first back electrode 140 and the third back electrode 144, respectively, or jointly with the materials of the first front electrode 130 and the first back electrode 140, and the third front electrode 134 and the third back electrode 144. The electrode material filled in the first through-hole 116 forms a first conductive structure 120. The electrode material filled in the second through-hole 118 forms a second conductive structure 122. The first front electrode 130 and the first back electrode 140 are respectively bonded to the opposite ends of the first conductive structure 120.

[0029] Next, the resistive layer of the wafer resistor 100 can be fabricated. In some embodiments, shielding layers 210 and 212 can be formed on the front side 112 and back side 114 of the substrate 110, respectively. The shielding layers 210 and 212 can respectively shield areas of the front side 112 and back side 114 that are not intended to have a resistive layer formed, and thus have their respective preset patterns. Figure 3A As shown, the shielding layer 210 shields the first front electrode 130, a portion of the second front electrode 132, a portion of the third front electrode 134, and a portion of the substrate 110, but exposes the third front electrode 134 on the second conductive structure 122 and the area between the first front electrode 130 and the second front electrode 132. Figure 3BAs shown, the shielding layer 212 shields a portion of the first back electrode 140, the second back electrode 142, a portion of the third back electrode 144, and a portion of the substrate 110, but exposes the third back electrode 144 on the second conductive structure 122 and a portion of the area between the first back electrode 140 and the second back electrode 142. For example, the shielding layers 210 and 212 are made of removable ink or photoresist. The shielding layers 210 and 212 can be formed by, for example, printing, laminating, or coating.

[0030] Next, as Figure 4A and Figure 4B As shown, resistive material layers 152 and 162 can be formed, for example, by sputtering, to cover the front side 112 and back side 114 of the substrate 110. Subsequently, the shielding layers 210 and 212 are removed by solvent or water washing. When removing the shielding layers 210 and 212, the resistive material layers 152 and 162 on the shielding layers 210 and 212 are also removed, and a first resistive layer 150 and a second resistive layer 160 with predetermined patterns are formed on the front side 112 and back side 114 of the substrate 110, respectively. Figure 5A and Figure 5B As shown. For example, the materials of the first resistive layer 150 and the second resistive layer 160 can be nickel-chromium alloy, copper-nickel alloy, nickel-chromium-silicon alloy, nickel-chromium-aluminum alloy, nickel-chromium-aluminum-silicon alloy, nickel-chromium-aluminum-yttrium alloy, nickel-chromium-tantalum-molybdenum alloy, tantalum nitride, copper-manganese-tin alloy, or copper-manganese-nickel alloy, etc. Other suitable resistive materials may be used in this disclosure, and are not limited thereto.

[0031] like Figure 5A and Figure 5B As shown, the first resistive layer 150 is directly bonded to the second front electrode 132, and the first resistive layer 150 is indirectly bonded to and electrically connected to the second conductive structure 122 through the second front electrode 132. The second resistive layer 160 is directly bonded to the first back electrode 140 and the third back electrode 144, and the second resistive layer 160 is indirectly bonded to and electrically connected to the first conductive structure 120 and the second conductive structure 122 through the first back electrode 140 and the third back electrode 144, respectively. Please refer to [reference needed]. Figure 9 This is a schematic diagram illustrating an equivalent circuit model of a wafer resistor 100 according to an embodiment of the present disclosure. The first resistive layer 150 on the front side 112 of the substrate 110 and the second resistive layer 160 on the back side 114 can be connected in series through the second conductive structure 122.

[0032] This double-layer series resistor structure can significantly increase the maximum resistance of the chip resistor 100, for example, by at least 1.5 times, using the same resistive material. Secondly, the double-layer series resistor design increases the resistor path and its cross-sectional area. This reduces the voltage gradient per unit length of the resistor at a fixed voltage. Furthermore, the double-layer series resistor architecture significantly increases the heat dissipation area of ​​the chip resistor 100, thereby improving its power consumption and maximum operating voltage.

[0033] Next, the resistance value can be selectively adjusted according to the product requirements of the chip resistor 100. In some embodiments, such as Figure 6 As shown, the first resistive layer 150 is patterned using laser or physical processing methods to adjust the resistance value of the wafer resistor 100. The resistance adjustment can also be performed by patterning the second resistive layer 160.

[0034] like Figure 7A and Figure 7B As shown, after the resistance adjustment of the wafer resistor 100 is completed, a first protective layer 170 and a second protective layer 180 are formed on the front side 112 and back side 114 of the substrate 110, respectively, using a printing method or a deposition and photolithography method. The first protective layer 170 covers the entire first resistive layer 150, the entire third front electrode 134, a portion of the first front electrode 130, and a portion of the second front electrode 132. The second protective layer 180 covers the entire second resistive layer 160, the entire third back electrode 144, a portion of the first back electrode 140, and a portion of the second back electrode 142. In some embodiments, the materials of the first protective layer 170 and the second protective layer 180 are epoxy resin, polyimide, resin, or a glass-containing material.

[0035] Subsequently, a first external electrode layer 190 and a second external electrode layer 200 of the wafer resistor 100 can be fabricated. The first external electrode layer 190 extends from the first front electrode 130 through the first side surface 110e of the substrate 110 to the first back electrode 140. The second external electrode layer 200 extends from the second front electrode 132 through the second side surface 110f of the substrate 110 to the second back electrode 142. The second side surface 110f of the substrate 110 and the first side surface 110e are opposite to each other. In some embodiments, the first external electrode layer 190 covers the first front electrode 130 and the first back electrode 140 to form a C-shaped structure; and the second external electrode layer 200 covers the second front electrode 132 and the second back electrode 142 to form an inverted C-shaped structure. In some exemplary embodiments, the first external electrode layer 190 and the second external electrode layer 200 are about 5 μm higher than the first protective layer 170 and the second protective layer 180.

[0036] In some embodiments, a nickel-chromium layer is first formed on the first side surface 110e and the second side surface 110f of the substrate 110 using, for example, sputtering, to serve as a side connection layer. Then, a nickel layer and a tin layer are formed sequentially using, for example, electroplating, or a nickel layer, a copper layer, another nickel layer, and a tin layer are formed sequentially. Therefore, the first external electrode layer 190 and the second external electrode layer 200 may include a nickel-chromium layer, a nickel layer, and a tin layer stacked sequentially, or a nickel-chromium layer, a nickel layer, a copper layer, another nickel layer, and a tin layer stacked sequentially.

[0037] As can be seen from the above embodiments, one advantage of this disclosure is that the chip resistor disclosed comprises a two-layer series resistor structure consisting of a front resistor layer and a back resistor layer. Therefore, the maximum resistance value of the chip resistor can be significantly increased.

[0038] Another advantage of this disclosure is that the chip resistor has a double-layer series resistor structure, which increases the resistor path and the cross-sectional area of ​​the path. Therefore, at a fixed voltage, the voltage gradient per unit length of the resistor can be reduced. In addition, this architecture allows the chip resistor to have a larger heat dissipation area, resulting in higher power consumption and a higher maximum operating voltage.

[0039] Although this disclosure has been illustrated above with reference to embodiments, it is not intended to limit this disclosure. Any person skilled in the art may make various modifications and refinements without departing from the spirit and scope of this disclosure. Therefore, the scope of protection of this disclosure shall be determined by the appended claims.

[0040] [Symbol Explanation]

[0041] 100: Chip Resistor

[0042] 110:Substrate

[0043] 110a: Short side

[0044] 110b: Long side

[0045] 110c: Edge region

[0046] 110d: Edge region

[0047] 110e: First side view

[0048] 110f: Second side view

[0049] 112: Front

[0050] 114: Back

[0051] 116: First through hole

[0052] 118: Second through hole

[0053] 118a: Center

[0054] 120: First conductive structure

[0055] 122: Second conductive structure

[0056] 130: First front electrode

[0057] 132: Second front electrode

[0058] 134: Third front electrode

[0059] 140: First back electrode

[0060] 142: Second back electrode

[0061] 144: Third back electrode

[0062] 150: First resistive layer

[0063] 152: Resistive material layer

[0064] 160: Second resistive layer

[0065] 162: Resistive material layer

[0066] 170: First protective layer

[0067] 180: Second protective layer

[0068] 190: First outer electrode layer

[0069] 200: Second outer electrode layer

[0070] 210: Shielding layer

[0071] 212: Shielding layer

[0072] D1: Distance

[0073] D2: Distance

[0074] L: Length

[0075] W: Width.

Claims

1. A wafer resistor, characterized by, The chip resistor comprises: a substrate having a front surface and a back surface, and a first via and a second via extending from the front surface to the back surface, wherein a diameter of each of the first via and the second via is 0.1 mm to 1.0 mm, a distance between a center of the second via and a short side of the substrate adjacent to the center is 1 / 4 to 1 / 3 of a length of the substrate, and a distance between the center of the second via and a long side of the substrate adjacent to the center is 1 / 5 to 1 / 2 of a width of the substrate; a first conductive structure disposed in the first via; a second conductive structure disposed in the second via; a first front surface electrode, a second front surface electrode, and a third front surface electrode disposed on the front surface and separated from each other, wherein the first front surface electrode and the second front surface electrode are respectively located on opposite edge regions of the substrate, and the third front surface electrode is interposed between the first front surface electrode and the second front surface electrode; a first back surface electrode, a second back surface electrode, and a third back surface electrode disposed on the back surface and respectively opposite to the first front surface electrode, the second front surface electrode, and the third front surface electrode, wherein the first back surface electrode and the first front surface electrode are respectively connected to opposite ends of the first conductive structure; a first resistance layer disposed on the front surface and connected to the second front surface electrode and the second conductive structure; a second resistance layer disposed on the back surface and connected to the first back surface electrode, the third back surface electrode, the first conductive structure, and the second conductive structure; a first protective layer covering the first resistance layer, the third front surface electrode, part of the first front surface electrode, and part of the second front surface electrode; a second protective layer covering the second resistance layer, the third back surface electrode, part of the first back surface electrode, and part of the second back surface electrode; a first external electrode layer extending from the first front surface electrode through a first side surface of the substrate to the first back surface electrode; and a second external electrode layer extending from the second front surface electrode through a second side surface of the substrate to the second back surface electrode. The substrate is a ceramic substrate, and a material of the substrate is alumina, aluminum nitride, boron nitride, silicon carbide, or a glass-containing material.

2. The wafer resistor of claim 1, wherein The first via and the second via are respectively filled with a material of the first front surface electrode and the third front surface electrode, a material of the first back surface electrode and the third back surface electrode, or a material of the first front surface electrode and the first back surface electrode and a material of the third front surface electrode and the third back surface electrode.

3. The wafer resistor of claim 1 wherein, The first resistance layer and the second resistance layer are connected in series.

4. The wafer resistor of claim 1 wherein, Materials of the first front surface electrode, the second front surface electrode, the third front surface electrode, the first back surface electrode, the second back surface electrode, and the third back surface electrode are copper, copper-nickel alloy, nickel-phosphorus alloy, or silver-containing and glass-containing sintered silver paste.

5. The wafer resistor of claim 1 wherein, Materials of the first resistance layer and the second resistance layer are nickel-chromium alloy, copper-nickel alloy, nickel-chromium-silicon alloy, nickel-chromium-aluminum alloy, nickel-chromium-aluminum-silicon alloy, nickel-chromium-aluminum-yttrium alloy, nickel-chromium-tantalum-molybdenum alloy, tantalum nitride, copper-manganese-tin alloy, or copper-manganese-nickel alloy.

6. The wafer resistor of claim 1, wherein Materials of the first protective layer and the second protective layer are epoxy resin, polyimide, resin, or glass-containing material.

7. The wafer resistor of claim 1 wherein, ​ 8. The wafer resistor of claim 1, wherein Each of the first and second external electrode layers includes a nickel-chromium layer, a nickel layer, and a tin layer stacked in sequence, or a nickel-chromium layer, a nickel layer, a copper layer, another nickel layer, and a tin layer stacked in sequence.

9. The wafer resistor of claim 1 wherein, The first and second external electrode layers are higher than the first and second protective layers by 5 μm or more.

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