Semiconductor substrate polishing method

The semiconductor substrate is polished by plasma etching method, which solves the problems of long polishing time, large thickness and surface damage in the CMP method, and achieves a more efficient and accurate polishing effect.

CN119943646APending Publication Date: 2025-05-06JIEFANG SEMICON (SHANGHAI) CO LTD
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Patent Information

Application Number
CN202410935133.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-07-12
Publication Date
2025-05-06

AI Technical Summary

Technical Problem

The existing CMP polishing methods have problems such as excessive polishing time, excessive polishing thickness and possible introduction of tiny surface damage.

Method used

The semiconductor substrate is polished by plasma etching method. By combining the etching gas and the plasma generator, defective parts on the substrate surface are removed and thinned by 2-5 μm.

Benefits of technology

Effectively reduces polishing time, reduces production time and waste rate, reduces surface damage, and improves polishing accuracy and efficiency.

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Abstract

The invention discloses a semiconductor substrate polishing method, and belongs to the technical field of semiconductors, the semiconductor substrate polishing method comprises the following steps: providing a ground semiconductor substrate, and placing the semiconductor substrate on a plasma etching machine base; purging and cleaning the pipeline and the chamber of the plasma etching machine; and introducing etching gas to etch the surface of the semiconductor substrate so as to remove the defect-containing part on the semiconductor substrate. The semiconductor substrate is polished through the plasma etching method, the polishing thickness is low, consumed time is short, and damage of polishing to the semiconductor substrate is reduced.
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Description

Technical Field

[0001] The invention relates to the field of semiconductor technology, and in particular to a semiconductor substrate polishing method. Background Art

[0002] After grinding, the silicon carbide substrate will be polished to further reduce the roughness of the substrate surface and eliminate the surface damage (cracks and scratches, etc.) that still exists after grinding. The commonly used silicon carbide polishing method is CMP (chemical mechanical polishing), which uses chemical corrosion and mechanical friction to polish the substrate. The CMP method can achieve a very high flatness, and can obtain atomically smooth silicon carbide wafers with a surface roughness of less than 0.1nm, and can also remove most of the surface damage after grinding. However, there are the following problems:

[0003] 1. The time required is too long. Currently, the time required for CMP polishing a piece of SiC is generally set at 6-12 hours.

[0004] 2. The polishing thickness is too high. In order to ensure the quality of SiC polishing, substrate manufacturers generally require CMP polishing of tens of microns (30-50μm), resulting in a high waste rate of SiC substrates. Figure 2 shown.

[0005] 3. Bringing tiny surface damage and reducing the quality of SiC substrate. CMP can effectively remove most of the surface damage after grinding, but the mechanical friction (hard particles in the polishing liquid) in the CMP method can easily cause tiny damage to the surface of the wafer, such as some smaller cracks and scratches.

[0006] It should be noted that the information disclosed in the background technology section of the invention is only intended to deepen the understanding of the general background technology of the invention, and should not be regarded as an admission or suggestion in any form that the information constitutes prior art already known to those skilled in the art. Summary of the invention

[0007] The object of the present invention is to provide a semiconductor substrate polishing method to solve the problems of high polishing thickness and long time consumption in CMP.

[0008] In order to solve the above technical problems, the present invention provides a semiconductor substrate polishing method, comprising the following steps:

[0009] Providing a ground semiconductor substrate, and placing the semiconductor substrate on a plasma etching machine base;

[0010] Purge and clean the pipes and chambers of the plasma etching machine;

[0011] An etching gas is introduced to etch the surface of the semiconductor substrate to remove the defective portion of the semiconductor substrate.

[0012] Preferably, the semiconductor substrate is made of silicon carbide.

[0013] Preferably, before purging and cleaning the pipes and chambers of the plasma etching machine, a mechanical pump is started to draw the vacuum degree in the chamber to below 1 Torr.

[0014] Preferably, argon gas is introduced to purge and clean the pipes and chambers of the plasma etching machine.

[0015] Preferably, the flow rate of the argon gas is 1-5 slm, and the duration of the introduction is 15-30 min.

[0016] Preferably, the etching gas is a fluorine-based gas.

[0017] Preferably, when the fluorine-based gas is introduced to a desired flow rate, the plasma generator power is turned on, the power is set to 300-2000 W, and the etching is performed for 15-30 minutes.

[0018] Preferably, when the fluorine-based gas is introduced to 200 sccm-1.5 slm, the plasma generator power is turned on to start etching.

[0019] Preferably, the surface of the semiconductor substrate is etched to thin the semiconductor substrate by 2-5 μm, so as to remove the defective portion of the semiconductor substrate.

[0020] Preferably, after etching the surface of the semiconductor substrate, the power supply of the plasma generator is turned off, the introduction of the fluorine-based gas is stopped, and the semiconductor substrate is taken out when the temperature drops to a desired temperature.

[0021] In the semiconductor substrate polishing method provided by the present invention, the ground semiconductor substrate is polished by a plasma etching method, which can effectively reduce the polishing time, greatly reduce the production time compared with CMP polishing, and improve the production efficiency; reduce the waste of semiconductor substrates. In addition, the use of the plasma etching method can more accurately control the etching time and etching thickness, and the etching error is small, which effectively reduces the waste of semiconductor substrates; reduce surface damage, and the exposed atoms at the scratches and cracks are more active, so they react with the crack defects first and drill from the crack defects, thereby effectively eliminating the original scratches, cracks, stress and other damages on the surface of the semiconductor substrate, without using mechanical friction for polishing, and will not introduce new surface damage. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.

[0023] Figure 1 is an execution flow chart of an embodiment of the present invention;

[0024] Figure 2 It is a schematic diagram of the process of two polishing methods, CMP and plasma etching disclosed in the present invention. DETAILED DESCRIPTION

[0025] In order to make the purpose, advantages and features of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the drawings is often a part of the actual structure. In particular, the emphasis of each drawing is different, and sometimes different scales are used.

[0026] As used in the present invention, the singular forms "a", "an" and "the" include plural objects, the term "or" is generally used in a sense including "and / or", the term "several" is generally used in a sense including "at least one", and the term "at least two" is generally used in a sense including "two or more". In addition, the terms "first", "second" and "third" are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first", "second", and "third" may explicitly or implicitly include one or at least two of the features. The term "proximal end" is usually the end close to the operator, and the term "distal end" is usually the end close to the patient. "One end" and "the other end" as well as "proximal end" and "distal end" usually refer to two corresponding parts, which include not only the endpoints. The terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral body; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the internal connection of the two elements or the interaction relationship between the two elements. In addition, as used in the present invention, an element is arranged on another element, which usually only means that there is a connection, coupling, matching or transmission relationship between the two elements, and the connection, coupling, matching or transmission between the two elements can be direct or indirect through an intermediate element, and it cannot be understood as indicating or implying the spatial position relationship between the two elements, that is, one element can be in any position such as inside, outside, above, below or on one side of another element, unless the content clearly indicates otherwise. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0027] The inventors have found that the CMP method for polishing the substrate surface has the disadvantages of high polishing thickness, long polishing time, and the introduction of smaller cracks and scratches.

[0028] Based on this, the core idea of ​​the present invention is to polish the semiconductor substrate by using a plasma etching method, with a low polishing thickness, short time consumption, and reduced damage to the semiconductor substrate caused by polishing.

[0029] For details, please refer to Figure 1-Figure 2 , which is a schematic diagram of an embodiment of the present invention. Figure 1 As shown, a method for polishing a semiconductor substrate comprises the following steps:

[0030] S1: Provide a ground semiconductor substrate, and place the semiconductor substrate on a plasma etching machine base. Exemplarily, the semiconductor substrate is made of silicon carbide (SiC). The material of the semiconductor substrate may include semiconductor material, insulating material, conductor material, or any combination thereof; and the semiconductor substrate may be a single-layer structure or a multi-layer structure. For example, the semiconductor substrate may be a semiconductor material such as Si, SiGe, SiGeC, GaAs, InAs, InP, and other III / V or II / VI compound semiconductors. And, the semiconductor substrate 1 is, for example, a layered substrate of Si / SiGe, Si / SiC, silicon on insulator (SOI), or silicon germanium on insulator.

[0031] Before purging and cleaning the pipes and chambers of the plasma etching machine, a mechanical pump is started to reduce the vacuum level in the chamber to below 1 Torr.

[0032] S2: Purge and clean the pipes and chambers of the plasma etching machine. Introduce argon gas to purge and clean the pipes and chambers of the plasma etching machine. The flow rate of the introduced argon gas is 1-5slm, and the introduction time is 15-30min.

[0033] S3: introducing etching gas to etch the surface of the semiconductor substrate to remove defective portions of the semiconductor substrate.

[0034] In one embodiment, the etching gas is a fluorine-based gas. When the fluorine-based gas is introduced to a desired flow rate, the plasma generator power is turned on, the power is set to 300-2000W, and the etching is performed for 15-30 minutes. When the fluorine-based gas is introduced to 200sccm-1.5slm, the plasma generator power is turned on and etching begins. However, the invention is not limited to fluorine-based gases.

[0035] Fluorine-based gas molecules enter the plasma generator and are injected with enough energy to ionize a large amount of F -Fluoride ions are highly chemically active substances, which react with the surface of the semiconductor substrate made of SiC. The atoms exposed at the scratches and cracks are more active, so they react with the crack defects first and drill from the crack defects, thereby effectively eliminating the original scratches, cracks, stress and other damages on the surface of the semiconductor substrate. Figure 2 As shown, plasma etching can more thoroughly eliminate the damage to the semiconductor substrate caused by grinding, and since no mechanical friction is used for polishing, no new surface damage will be caused.

[0036] Furthermore, compared with CMP technology, more precise control of polishing can be achieved by changing the etching time and the amount of etching gas.

[0037] Therefore, the surface of the semiconductor substrate is etched to thin the semiconductor substrate by 2-5 μm to remove the defective part of the semiconductor substrate. At present, the scratches, cracks and stresses of SiC wafers after grinding are mostly concentrated within 2 μm depth of the surface. On this basis, the time spent on plasma etching polishing is generally within 1 hour, which greatly saves production time and reduces the waste of SiC substrates compared with CMP polishing. As shown in Table 1 below, the results of the two polishing methods of CMP and plasma etching are compared.

[0038] Table 1 Comparison of CMP and plasma etching polishing methods

[0039] Polishing method Spend time Polishing thickness Surface damage Ra CMP 6-12h 30-50μm Minor scratches and cracks >0.06nm Plasma Etching Within 1h 2-5μm Almost no damage >0.12nm

[0040] S4: After etching the surface of the semiconductor substrate, turn off the power of the plasma generator, stop introducing the fluorine-based gas, and take out the semiconductor substrate when the temperature drops to a desired temperature.

[0041] In summary, the present invention proposes a semiconductor substrate polishing method, which polishes the ground semiconductor substrate by a plasma etching method, effectively reducing the polishing time. The time spent by plasma etching polishing is generally less than 1 hour, which greatly reduces the production time compared with CMP polishing, and improves production efficiency; reduces the waste of SiC substrates, and uses plasma etching polishing only to etch and polish with a thickness between 2-5 μm. In addition, the method of using plasma etching can more accurately control the etching time and etching thickness, and the etching error is small, which effectively reduces the waste of SiC substrates; reduces surface damage, and the exposed atoms at scratches and cracks are more active, so they react with crack defects first, and etch from the crack defects, thereby effectively eliminating the original scratches, cracks, stress and other damages on the surface of the semiconductor substrate, and no mechanical friction is used for polishing, so new surface damage will not be introduced.

[0042] The above description is only a description of the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the technical solution of the present invention.

Claims

1. A method for polishing a semiconductor substrate, characterized in that: The following steps are involved: Providing a ground semiconductor substrate, and placing the semiconductor substrate on a plasma etching machine base; Purge and clean the pipes and chambers of the plasma etching machine; An etching gas is introduced to etch the surface of the semiconductor substrate to remove the defective portion of the semiconductor substrate.

2. The semiconductor substrate polishing method according to claim 1, characterized in that: The semiconductor substrate is made of silicon carbide.

3. The semiconductor substrate polishing method according to claim 1, characterized in that: Before purging and cleaning the pipes and chambers of the plasma etching machine, a mechanical pump is started to reduce the vacuum level in the chamber to below 1 Torr.

4. The method for polishing a semiconductor substrate according to claim 1, wherein: Argon gas is introduced to purge and clean the pipes and chambers of the plasma etching machine.

5. The method for polishing a semiconductor substrate according to claim 1, wherein: The flow rate of argon gas is 1-5slm, and the duration of introduction is 15-30min.

6. The semiconductor substrate polishing method according to claim 1, characterized in that: The etching gas is a fluorine-based gas.

7. The method for polishing a semiconductor substrate according to claim 6, wherein: When the fluorine-based gas is introduced to a desired flow rate, the plasma generator is turned on, the power is set to 300-2000 W, and etching is performed for 15-30 minutes.

8. The method for polishing a semiconductor substrate according to claim 7, wherein: When the fluorine-based gas is introduced to 200 sccm-1.5 slm, the plasma generator power is turned on to start etching.

9. The method for polishing a semiconductor substrate according to claim 1, wherein: The surface of the semiconductor substrate is etched to thin the semiconductor substrate by 2-5 μm, so as to remove the defective portion of the semiconductor substrate.

10. The semiconductor substrate polishing method according to claim 8, characterized in that: After etching the surface of the semiconductor substrate, the power of the plasma generator is turned off, the introduction of the fluorine-based gas is stopped, and the semiconductor substrate is taken out when the temperature drops to a desired temperature.

Citation Information

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