Wafer etching method

Abstract

The invention relates to a wafer etching method, which comprises the following steps of: providing a wafer of which the front surface is provided with a tungsten material layer; performing plasma etching on the tungsten material layer from the front surface of the wafer; wherein etching gas used for the plasma etching comprises fluorine-containing gas and BCl3 (Boron Cl3); the surface of the wafer is further provided with aluminum, and / or aluminum is attached to the inner surface of the side wall and / or the top of the etching chamber used for plasma etching. According to the invention, pollution to the etching chamber and the wafer can be reduced, and the wafer production quality is improved.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor manufacturing, and in particular to a wafer etching method. Background Art

[0002] In the semiconductor manufacturing process, when the plasma in the etching chamber reacts with the wafer, residues are generated on the inner wall of the etching chamber and the surface of its components, which may affect the subsequent wafer quality.

[0003] When there is aluminum residue in the etching chamber or on the wafer surface, during the process of etching the wafer with fluorine-containing gas, the fluorine-containing gas will react with aluminum to generate by-products, which will fall on the wafer surface and be adsorbed on the side walls or top inner surface of the chamber, affecting the etching effect of the current wafer and subsequent wafers.

[0004] There is an urgent need for a wafer etching method that can effectively reduce the by-products that fall on the wafer surface and are adsorbed on the side walls or top inner surfaces of the chamber by removing the by-products generated by the reaction of the fluorine-containing gas with aluminum during the process of etching the wafer using the fluorine-containing gas, thereby reducing the contamination of the etching chamber and the wafer and improving the wafer production quality. Summary of the invention

[0005] The technical problem solved by the present invention is to provide a wafer etching method, which can reduce the pollution to the etching chamber and the wafer and improve the wafer production quality.

[0006] To solve the above technical problems, an embodiment of the present invention provides a wafer etching method, comprising: providing a wafer, the front side of the wafer having a tungsten material layer; performing plasma etching on the tungsten material layer from the front side of the wafer; wherein the etching gas used for the plasma etching comprises a fluorine-containing gas and BCl3; the surface of the wafer also has aluminum, and / or the side walls and / or the top inner surface of the etching chamber used for the plasma etching are attached with aluminum.

[0007] Optionally, the fluorine-containing gas comprises NF3.

[0008] Optionally, the etching gas further contains Cl2.

[0009] Optionally, the tungsten material layer is subjected to plasma etching, including: forming a patterned mask layer on the surface of the tungsten material layer; using the patterned mask layer as a mask, performing plasma etching on the tungsten material layer; wherein the ratio of the minimum width of the pattern to be etched in the patterned mask layer to the depth to be etched is greater than or equal to 10:1.

[0010] Optionally, after each wafer completes plasma etching and is moved out of the etching chamber, a waferless etching gas is input into the etching chamber to perform waferless etching on the etching chamber; wherein the waferless etching gas contains BCl3.

[0011] Optionally, the etching temperature of the waferless etching is greater than the upper limit of the process specification of the etching temperature of the plasma etching; and / or, the upper RF power of the waferless etching is greater than the upper limit of the process specification of the upper RF power of the plasma etching.

[0012] Optionally, the etching temperature of the waferless etching is greater than the upper limit of the process specification of the etching temperature of the plasma etching, and the upper RF power of the waferless etching is greater than the upper limit of the process specification of the upper RF power of the plasma etching; wherein, the over-temperature difference ΔT of the waferless etching is determined based on the excess difference ΔP of the upper RF power of the waferless etching, and the larger the excess difference ΔP, the smaller the over-temperature difference ΔT; the over-temperature difference ΔT is used to represent the temperature difference between the etching temperature of the waferless etching and the upper limit of the process specification of the etching temperature of the plasma etching, and the excess difference ΔP is used to represent the power difference between the upper RF power of the waferless etching and the upper limit of the process specification of the upper RF power of the plasma etching.

[0013] Optionally, the process specification of the upper RF power of the waferless etching is pre-divided into multiple levels, the higher the level, the larger the excess difference ΔP, and each level has a preset over-temperature difference ΔT; performing waferless etching on the etching chamber, including: determining the upper RF power to be adjusted for the waferless etching and the level to which it belongs; determining the over-temperature difference to be adjusted according to the level; according to the over-temperature difference to be adjusted, heating the etching chamber so that the temperature difference between the temperature of the etching chamber and the upper limit of the process specification of the etching temperature of the plasma etching is the over-temperature difference to be adjusted; adjusting the upper RF power of the etching chamber to the upper RF power to be adjusted for the waferless etching; and performing the waferless etching.

[0014] Optionally, the waferless etching gas further contains Cl2.

[0015] Optionally, one or more of the following are met: the process specification of the upper RF power of the plasma etching is: 600W to 1800W; the process specification of the etching temperature of the plasma etching is: 30℃ to 60℃; the process specification of the etching chamber pressure of the plasma etching is: 3mt to 12mt.

[0016] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0017] In an embodiment of the present invention, for byproducts formed by aluminum attached to the surface of the wafer and / or the sidewalls and / or top inner surfaces of the etching chamber, such as the compound Al2O3 obtained by the reaction of aluminum with air and the compound AlF3 obtained by the reaction of aluminum with fluorine-containing gas, when the tungsten material layer is subjected to plasma etching using fluorine-containing gas, by additionally adding BCl3, Cl ions can be used to react with it to remove the aluminum byproducts, thereby improving the problems caused by the aluminum byproducts without adding additional reaction steps, effectively reducing the byproducts that fall on the wafer surface and adsorb on the sidewalls or top inner surfaces of the chamber, thereby reducing the pollution of the etching chamber and the wafer, and improving the wafer production quality. In addition, compared with the use of other chlorides except BCl3, the characteristics of small B ion particles and high sputtering density can be used to further improve the reaction efficiency and wafer cleanliness.

[0018] Furthermore, the fluorine-containing gas includes NF3, which can effectively etch the tungsten material layer while avoiding the generation of more by-products, thereby laying a good foundation for reducing the pollution of the etching chamber and the wafer.

[0019] Furthermore, the etching gas also contains Cl2, which can increase the chloride ion concentration in the etching chamber compared to adding only BCl3, thereby increasing the speed of the reaction to form AlCl3, improving the etching efficiency and wafer cleanliness.

[0020] Furthermore, a patterned mask layer is formed on the surface of the tungsten material layer; the tungsten material layer is plasma etched using the patterned mask layer as a mask; wherein the ratio of the smallest width of the pattern to be etched in the patterned mask layer to the depth to be etched is greater than or equal to 10:1. When the etching requirement of the tungsten material layer is a very large aspect ratio (exceeding one order of magnitude), by adopting the solution of the embodiment of the present invention, aluminum by-products can be removed in time while etching the tungsten material layer, thereby effectively improving the etching defects caused by the aluminum by-products that accumulate and fall on the wafer surface and block etching.

[0021] Furthermore, after each wafer completes plasma etching and is moved out of the etching chamber, wafer-free etching gas is input into the etching chamber to perform wafer-free etching on the etching chamber, so that an additional step of performing wafer-free etching on the etching chamber can be achieved after the previous wafer completes plasma etching and before the next wafer undergoes plasma etching. Cl ions are used to remove aluminum byproducts on the side walls and / or top inner surfaces of the etching chamber for a second time, thereby further reducing contamination of the etching chamber and wafers and improving wafer production quality.

[0022] Furthermore, the etching temperature of the waferless etching is greater than the upper limit of the process specification of the etching temperature of the plasma etching; and / or, the upper RF power of the waferless etching is greater than the upper limit of the process specification of the upper RF power of the plasma etching, so that when two rounds of BCl3 are used to remove aluminum by-products, the etching temperature of the waferless etching can be reasonably arranged to be higher and / or the upper RF power can be larger, thereby better protecting the wafer in the plasma etching step and improving the device quality while meeting the removal requirements of aluminum by-products.

[0023] Furthermore, in the case where the etching temperature of waferless etching is higher and the upper RF power is larger, the over-temperature difference ΔT of waferless etching is determined based on the excess difference ΔP of the upper RF power of waferless etching, and the larger the excess difference ΔP, the smaller the over-temperature difference ΔT. Therefore, while adjusting the two parameters of waferless etching to improve the etching conditions, the degree to which the two parameters exceed the process specifications of plasma etching can be reasonably arranged, thereby achieving a better balance between improving parameter adjustment efficiency and protecting the wafer. Specifically, compared with adjusting the etching temperature, it is more convenient to adjust the upper RF power, but excessive upper RF power may damage the wafer. Therefore, on the basis of selecting a suitable upper RF power to protect the wafer, a larger excess difference ΔP can be used to reduce the over-temperature difference ΔT to improve the parameter adjustment efficiency.

[0024] Furthermore, the process specification of the upper RF power of the waferless etching is pre-divided into multiple levels, the higher the level, the larger the excess difference ΔP, and each level has a preset over-temperature difference ΔT; performing waferless etching on the etching chamber includes: determining the upper RF power to be adjusted for the waferless etching and the level to which it belongs; determining the over-temperature difference to be adjusted according to the level; according to the over-temperature difference to be adjusted, heating the etching chamber so that the temperature difference between the temperature of the etching chamber and the upper limit value of the process specification of the etching temperature of the plasma etching is the over-temperature difference to be adjusted; adjusting the upper RF power of the etching chamber to the upper RF power to be adjusted for the waferless etching; and performing the waferless etching. By pre-dividing the process specifications of the upper RF power of waferless etching into multiple levels, the accuracy of selecting the over-temperature difference value can be improved and the difficulty of selection can be reduced on the basis of determining the upper RF power. The degree to which the two parameters exceed the process specifications of plasma etching can be further reasonably arranged, thereby achieving a better balance between improving parameter adjustment efficiency and protecting wafers. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a schematic diagram of a wafer cross-sectional structure corresponding to a wafer etching method in the prior art;

[0026] Figure 2is a flow chart of a wafer etching method in an embodiment of the present invention;

[0027] Figure 3 to Figure 4 It is a schematic diagram of the device cross-sectional structure corresponding to each step in a wafer etching method in an embodiment of the present invention;

[0028] Figure 5 It is a schematic diagram of an etching chamber corresponding to a waferless etching step in an embodiment of the present invention.

[0029] Description of reference numerals:

[0030] Etching chamber 100 , aluminum byproduct 110 , wafer 120 , tungsten material layer 130 , mask layer 140 , etching chamber 200 , aluminum byproduct 210 , wafer 220 , tungsten material layer 230 , mask layer 240 . DETAILED DESCRIPTION

[0031] As mentioned above, when there is aluminum residue in the etching chamber or on the surface of the wafer, during the process of etching the wafer with fluorine-containing gas, the fluorine-containing gas will react with aluminum to generate aluminum by-products, which will fall on the wafer surface and be adsorbed on the side walls or top inner surface of the chamber, affecting the etching effect of the current wafer and subsequent wafers.

[0032] Specifically, taking NF3 as an example, Al reacts with NF3 to produce AlF3 via the following chemical reaction formula:

[0033] Al+3F - →ALF3↓

[0034] In addition, Al reacts with air to produce Al2O3 through the following chemical reaction formula:

[0035] 4Al+3O2=3Al2O3

[0036] Reference Figure 1 , Figure 1 It is a schematic diagram of a wafer cross-sectional structure corresponding to a wafer etching method in the prior art.

[0037] As shown in the figure, in the etching chamber 100 , the fluorine-containing gas reacts with aluminum to generate aluminum byproducts 110 , which fall on the surface of the wafer 120 and are adsorbed on the sidewalls or top inner surface of the etching chamber 100 .

[0038] During the process of etching the tungsten material layer 130 on the wafer 120 , the aluminum byproduct 110 falls on the surface of the mask layer 140 , which will affect the etching effect of the current wafer.

[0039] In an embodiment of the present invention, for byproducts formed by aluminum attached to the surface of the wafer and / or the sidewalls and / or top inner surfaces of the etching chamber, such as the compound Al2O3 obtained by the reaction of aluminum with air and the compound AlF3 obtained by the reaction of aluminum with fluorine-containing gas, when the tungsten material layer is subjected to plasma etching using fluorine-containing gas, by additionally adding BCl3, Cl ions can be used to react with it to remove the aluminum byproducts, thereby improving the problems caused by the aluminum byproducts without adding additional reaction steps, effectively reducing the byproducts that fall on the wafer surface and adsorb on the sidewalls or top inner surfaces of the chamber, thereby reducing the pollution of the etching chamber and the wafer, and improving the wafer production quality. In addition, compared with the use of other chlorides except BCl3, the characteristics of small B ion particles and high sputtering density can be used to further improve the reaction efficiency and wafer cleanliness.

[0040] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0041] Reference Figure 2 , Figure 2 1 is a flow chart of a wafer etching method in an embodiment of the present invention. The wafer etching method may include steps S21 to S22:

[0042] Step S21: providing a wafer, wherein the front side of the wafer has a tungsten material layer;

[0043] Step S22: Plasma etching is performed on the tungsten material layer from the front side of the wafer, wherein the etching gas used for the plasma etching comprises a fluorine-containing gas and BCl3, the surface of the wafer also has aluminum, and / or the sidewalls and / or the top inner surface of the etching chamber used for the plasma etching are attached with aluminum.

[0044] The above steps are described below.

[0045] Figure 3 to Figure 4 It is a schematic diagram of the device cross-sectional structure corresponding to each step in a wafer etching method in an embodiment of the present invention.

[0046] Reference Figure 3 In the etching chamber 200 , a wafer 220 is provided, and a tungsten material layer 230 is provided on the front side of the wafer 220 .

[0047] The wafer 220 may include a semiconductor substrate, and a material of the semiconductor substrate may include silicon, germanium, silicon germanium, silicon carbide, gallium arsenide, or indium gallium.

[0048] The wafer 220 may further include structures located on the surface of the semiconductor substrate, such as a gate structure, a metal interconnection structure, etc., and is not limited to the portion within the surface of the semiconductor substrate.

[0049] The surface of the wafer 220 also has aluminum, and / or the sidewall and / or top inner surface of the etching chamber 200 used for the plasma etching are attached with aluminum.

[0050] Specifically, aluminum formed in a previous process, such as metallic aluminum or aluminum compounds, may remain on the back surface or side surface of the wafer 220 .

[0051] Aluminum formed in a previous process, such as metallic aluminum or aluminum compounds, may remain on the sidewalls and / or the top inner surface of the etching chamber 200 .

[0052] The tungsten material layer 230 is plasma etched from the front side of the wafer 220 , wherein the etching gas used for the plasma etching includes a fluorine-containing gas and BCl 3 .

[0053] The fluorine-containing gas is used to perform plasma etching on the tungsten material layer 230 , and also reacts with aluminum (Al) to form aluminum byproducts 210 .

[0054] In a specific implementation, by additionally adding BCl 3 , chlorine (Cl) ions may be used to react with the aluminum by-product 210 to remove the aluminum by-product 210 .

[0055] Furthermore, the etching gas may also contain Cl2.

[0056] Specifically, Al2O3 can be removed by reacting chlorine (Cl) ions with Al2O3 through the following chemical reaction formula:

[0057] Al2O3+Cl - →AlCl3↑

[0058] AlF3 can also be removed by reacting chlorine (Cl) ions with AlF3 through the following chemical reaction formula:

[0059]

[0060] In an embodiment of the present invention, by additionally adding BCl3, Cl ions can be utilized to react therewith to remove the aluminum by-product 210, thereby improving the problems caused by the aluminum by-product 210 without adding additional reaction steps, effectively reducing the by-products falling on the surface of the wafer 220 and adsorbed on the side walls or top inner surface of the etching chamber 200, thereby reducing the contamination of the etching chamber 200 and the wafer 220, and improving the production quality of the wafer 220.

[0061] Furthermore, compared with the use of other chlorides except BCl 3 , in the embodiments of the present invention, the characteristics of small boron (B) ion particles and high sputtering density can be utilized to further improve the reaction efficiency and wafer cleanliness.

[0062] In an embodiment of the present invention, the etching gas may further contain Cl2, which can increase the Cl ion concentration in the etching chamber 200 compared to adding only BCl3, thereby increasing the speed of the reaction to form AlCl3, improving the etching efficiency and wafer cleanliness.

[0063] Furthermore, the fluorine-containing gas may also contain NF3.

[0064] In a specific implementation, NF3 can be used to react with tungsten (W) to remove W through the following chemical reaction formula:

[0065] 6F - +W→WF6↑

[0066] In the embodiment of the present invention, the fluorine-containing gas includes NF3, which can effectively etch the tungsten material layer 230 while avoiding the generation of more by-products, thereby establishing a good foundation for reducing the contamination of the etching chamber 200 and the wafer 220 .

[0067] Furthermore, the step of plasma etching the tungsten material layer 230 may include: forming a patterned mask layer 240 on the surface of the tungsten material layer 230; using the patterned mask layer 240 as a mask, plasma etching the tungsten material layer 230; wherein the ratio of the minimum width of the pattern to be etched in the patterned mask layer 240 to the depth to be etched is greater than or equal to 10:1.

[0068] It should be noted that the ratio of the smallest width of the pattern to be etched to the depth to be etched in the patterned mask layer 240 is greater than or equal to 10:1, which can be used to indicate that the etching requirement of the tungsten material layer 230 is a very large aspect ratio (exceeding one order of magnitude).

[0069] In a specific application scenario, the wafer 220 may be a complementary metal oxide semiconductor image sensor (CMOS Image Sensors, CIS) wafer, and the step of plasma etching the tungsten material layer 230 from the front side of the wafer 220 is used to form a metal grid to reduce optical crosstalk between adjacent pixel units in the image sensor.

[0070] In the above scenario, the density of the metal grid is often large, the etching depth is often deep, and the aspect ratio requirement is very high. For example, the ratio of the minimum width of the pattern to be etched to the depth to be etched can exceed an order of magnitude, such as dozens or hundreds of times.

[0071] In an embodiment of the present invention, a patterned mask layer 240 is formed to perform plasma etching on the tungsten material layer 230; wherein the ratio of the smallest width of the pattern to be etched to the depth to be etched in the patterned mask layer 240 is greater than or equal to 10:1. When the etching requirement of the tungsten material layer 230 is a very large aspect ratio (exceeding one order of magnitude), by adopting the solution of the embodiment of the present invention, the aluminum by-product 210 can be removed in time while etching the tungsten material layer 230, thereby effectively improving the etching defects caused by the aluminum by-product 210 that accumulates and falls on the surface of the wafer 220 and blocks etching.

[0072] Reference Figure 4 , obtaining a tungsten material layer 230 after plasma etching.

[0073] Since BCl 3 is additionally added when the fluorine-containing gas is used to perform plasma etching on the tungsten material layer, Cl ions can be used to react with it to remove the aluminum by-product 210 , thereby improving the problem caused by the aluminum by-product 210 .

[0074] Furthermore, the wafer etching method in the embodiment of the present invention may further include a step of performing waferless etching on the etching chamber 200 .

[0075] Reference Figure 5 , Figure 5 It is a schematic diagram of an etching chamber corresponding to a waferless etching step in an embodiment of the present invention.

[0076] As shown in the figure, after each wafer completes plasma etching and is moved out of the etching chamber 200 , waferless etching gas is input into the etching chamber 200 to perform waferless etching on the etching chamber 200 .

[0077] Wherein, the waferless etching gas may contain BCl3.

[0078] In an embodiment of the present invention, after each wafer completes plasma etching and is moved out of the etching chamber 200, wafer-free etching gas is input into the etching chamber 200 to perform wafer-free etching on the etching chamber 200, so that an additional step of performing wafer-free etching on the etching chamber 200 can be achieved every time after the previous wafer completes plasma etching and before the next wafer is subjected to plasma etching. Cl ions are used to remove aluminum byproducts on the side walls and / or top inner surfaces of the etching chamber 200 for a second time, thereby further reducing the contamination of the etching chamber 200 and the wafers subsequently entering the etching chamber 200, thereby improving the wafer production quality.

[0079] Furthermore, the waferless etching gas may further contain Cl2.

[0080] In an embodiment of the present invention, the waferless etching gas further comprises Cl2, which can increase the chloride ion concentration in the etching chamber compared to adding only BCl3, thereby increasing the speed of the reaction to form AlCl3, improving the etching efficiency and wafer cleanliness.

[0081] Further, the etching temperature of the waferless etching may be greater than the upper limit of the process specification of the etching temperature of the plasma etching; and / or the upper RF power of the waferless etching is greater than the upper limit of the process specification of the upper RF power of the plasma etching.

[0082] Specifically, it can be recorded that the etching temperature of the plasma etching has a preset process specification (spec), wherein the upper limit of the process specification is T1, and the etching temperature of the waferless etching is T2, then T2>T1 can be satisfied.

[0083] It can also be recorded that the upper RF power of plasma etching has a preset process specification, wherein the upper limit of the process specification is P1, and the upper RF power of wafer-free etching is P2, then P2>P1 can be satisfied.

[0084] In an embodiment of the present invention, the etching temperature T2 of the waferless etching is greater than the process specification upper limit value T1 of the etching temperature of the plasma etching; and / or the upper RF power P2 of the waferless etching is greater than the process specification upper limit value P1 of the upper RF power of the plasma etching. Therefore, when two rounds of BCl3 are used to remove aluminum by-products, the etching temperature of the waferless etching can be reasonably arranged to be higher and / or the upper RF power can be larger. Therefore, on the basis of meeting the removal requirements of aluminum by-products, the wafer in the plasma etching step can be better protected to improve the device quality.

[0085] Further, the etching temperature of the waferless etching is greater than the upper limit of the process specification of the etching temperature of the plasma etching, and the upper RF power of the waferless etching is greater than the upper limit of the process specification of the upper RF power of the plasma etching; wherein, the over-temperature difference ΔT of the waferless etching is determined according to the excess difference ΔP of the upper RF power of the waferless etching, and the larger the excess difference ΔP is, the smaller the over-temperature difference ΔT is; the over-temperature difference ΔT is used to represent the temperature difference between the etching temperature of the waferless etching and the upper limit of the process specification of the etching temperature of the plasma etching, and the excess difference ΔP is used to represent the power difference between the upper RF power of the waferless etching and the upper limit of the process specification of the upper RF power of the plasma etching.

[0086] Specifically, when the etching temperature of wafer-free etching is higher and the upper RF power is greater, the excess temperature difference ΔT can be used to represent T2-T1, and the excess difference ΔP can be used to represent P2-P1.

[0087] The over-temperature difference ΔT is determined according to the excess difference ΔP, and the larger the excess difference ΔP is, the smaller the over-temperature difference ΔT is.

[0088] It should be pointed out that when two rounds of BCl3 are used to remove aluminum byproducts, if too few aluminum byproducts are removed in the scenario of waferless etching, it will bring greater removal pressure to the plasma etching when there is a wafer, and it is not conducive to protecting the wafer; on the contrary, if too many aluminum byproducts are removed in the scenario of waferless etching, it is necessary to choose to remove less aluminum byproducts in the plasma etching when there is a wafer, which will result in the aluminum byproducts formed by the current plasma etching not being removed in time. Therefore, it is necessary to strike a proper balance between the two rounds of etching, rather than relying on only one.

[0089] In a specific implementation of an embodiment of the present invention, the plasma etching process can meet one or more of the following: the process specification of the upper RF power of the plasma etching is: 600W to 1800W; the process specification of the etching temperature of the plasma etching is: 30°C to 60°C; the process specification of the etching chamber pressure of the plasma etching is: 3mt to 12mt.

[0090] It is understandable that complying with the above-mentioned process specifications of plasma etching is helpful to protect the wafer. At this time, the process parameters of waferless etching can be set based on the process specifications of plasma etching to achieve a better balance in the two rounds of etching.

[0091] It should be particularly pointed out that, taking the application scenario described above as an example, the wafer may be a CIS wafer, and the step of plasma etching the tungsten material layer is used to form a metal grid to reduce optical crosstalk between adjacent pixel units in the image sensor.

[0092] Since a multi-layer structure has often been formed in the CIS wafer when the metal grid is formed, such as a gate structure, a metal interconnect structure, a high-K material layer, etc., it is necessary to control the parameters of the production process to protect the formed structure. For example, the etching temperature of plasma etching needs to be controlled. At this time, if the etching temperature of waferless etching is greatly increased, a longer temperature adjustment time will be required.

[0093] In addition, considering that every time after the plasma etching of the previous wafer is completed and before the plasma etching of the next wafer, an additional step of performing waferless etching on the etching chamber is added, that is, the opportunity of each wafer leaving the etching chamber is utilized to perform waferless etching at a higher frequency. At this time, using a longer temperature adjustment time will significantly reduce production efficiency and increase production costs, which is obviously unacceptable.

[0094] In an embodiment of the present invention, by setting the larger the excess difference ΔP and the smaller the over-temperature difference ΔT, the degree to which the two parameters exceed the process specifications of plasma etching can be reasonably arranged while adjusting the two parameters of waferless etching to improve the etching conditions, thereby achieving a better balance between improving parameter adjustment efficiency and protecting the wafer. Specifically, compared with adjusting the etching temperature, it is more convenient to adjust the upper RF power, but excessive upper RF power may damage the wafer. Therefore, on the basis of selecting a suitable upper RF power to protect the wafer, a larger excess difference ΔP can be used to reduce the over-temperature difference ΔT to improve the parameter adjustment efficiency.

[0095] Furthermore, the process specification of the upper RF power of the waferless etching is pre-divided into multiple levels, the higher the level, the larger the excess difference ΔP, and each level has a preset over-temperature difference ΔT; the step of performing waferless etching on the etching chamber may include: determining the upper RF power to be adjusted for the waferless etching and the level to which it belongs; determining the over-temperature difference to be adjusted according to the level; according to the over-temperature difference to be adjusted, heating the etching chamber so that the temperature difference between the temperature of the etching chamber and the upper limit value of the process specification of the etching temperature of the plasma etching is the over-temperature difference to be adjusted; adjusting the upper RF power of the etching chamber to the upper RF power to be adjusted for the waferless etching; and performing the waferless etching.

[0096] Referring to Table 1, Table 1 is a correspondence table between multi-level excess difference ΔP and excess temperature difference ΔT.

[0097] Table 1

[0098]

[0099] In a specific implementation, the range of the upper RF power within each level can be pre-set, as well as the selected value of the excess temperature difference ΔT corresponding to the excess difference ΔP of different sizes in each level can be pre-set. Then, after determining the excess difference ΔP, the table can be looked up to obtain the adoptable excess temperature difference ΔT, thereby effectively improving the determination efficiency and accuracy.

[0100] It should be noted that in Table 1, the number of levels is 3 and the number of divisions within the levels for distinguishing the magnitude of the difference ΔP is 2. In a specific implementation, the setting of the above number is not limited thereto.

[0101] In an embodiment of the present invention, the upper RF power to be adjusted for the waferless etching and the level to which it belongs are determined; the over-temperature difference to be adjusted is determined according to the level; according to the over-temperature difference to be adjusted, the etching chamber is heated up so that the temperature difference between the temperature of the etching chamber and the upper limit of the process specification of the etching temperature of the plasma etching is the over-temperature difference to be adjusted; the upper RF power of the etching chamber is adjusted to the upper RF power to be adjusted for the waferless etching, and the process specifications of the upper RF power of the waferless etching can be pre-divided into multiple levels. On the basis of determining the upper RF power, the accuracy of selecting the over-temperature difference can be improved and the difficulty of selecting can be reduced, and the degree to which the two parameters exceed the process specifications of the plasma etching can be further reasonably arranged, so as to achieve a better balance between improving the efficiency of parameter adjustment and protecting the wafer.

[0102] It should be understood that the term "and / or" in this article is only a description of the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article indicates that the associated objects before and after are in an "or" relationship.

[0103] The "plurality" appearing in the embodiments of the present application refers to two or more.

[0104] The first, second, etc. descriptions appearing in the embodiments of the present application are only used for illustration and distinction of the description objects. There is no order, nor do they indicate any special limitation on the number of devices in the embodiments of the present application, and cannot constitute any limitation on the embodiments of the present application.

[0105] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A wafer etching method, characterized in that: include: Providing a wafer, the front side of the wafer having a tungsten material layer; Performing plasma etching on the tungsten material layer from the front side of the wafer; Wherein, the etching gas used for the plasma etching comprises a fluorine-containing gas and BCl3; The surface of the wafer also has aluminum, and / or the sidewalls and / or top inner surface of the etching chamber used for the plasma etching are attached with aluminum.

2. The method according to claim 1, characterized in that: The fluorine-containing gas includes NF3 and SF6.

3. The method according to claim 1 or 2, characterized in that: The etching gas further contains Cl2.

4. The method according to claim 1, characterized in that: Plasma etching is performed on the tungsten material layer, comprising: forming a patterned mask layer on the surface of the tungsten material layer; Using the patterned mask layer as a mask, plasma etching the tungsten material layer; Wherein, the ratio of the smallest width of the pattern to be etched to the depth to be etched in the patterned mask layer is greater than or equal to 10:

1.

5. The method according to claim 1, characterized in that After each wafer completes plasma etching and is moved out of the etching chamber, a wafer-free etching gas is input into the etching chamber to perform wafer-free etching on the etching chamber; Wherein, the waferless etching gas contains BCl3.

6. The method according to claim 5, characterized in that The etching temperature of the waferless etching is greater than the upper limit of the process specification of the etching temperature of the plasma etching; And / or, the upper RF power of the waferless etching is greater than the upper limit of the process specification of the upper RF power of the plasma etching.

7. The method according to claim 6, characterized in that The etching temperature of the waferless etching is greater than the upper limit of the process specification of the etching temperature of the plasma etching, and the upper RF power of the waferless etching is greater than the upper limit of the process specification of the upper RF power of the plasma etching; wherein, the over-temperature difference ΔT of the waferless etching is determined according to the excess difference ΔP of the upper RF power of the waferless etching, and the larger the excess difference ΔP is, the smaller the over-temperature difference ΔT is; the over-temperature difference ΔT is used to represent the temperature difference between the etching temperature of the waferless etching and the upper limit of the process specification of the etching temperature of the plasma etching, and the excess difference ΔP is used to represent the power difference between the upper RF power of the waferless etching and the upper limit of the process specification of the upper RF power of the plasma etching.

8. The method according to claim 7, characterized in that The process specification of the upper RF power of the waferless etching is pre-divided into multiple levels, the higher the level, the larger the excess difference ΔP, and each level has a preset excess temperature difference ΔT; Performing waferless etching on the etching chamber, comprising: Determining the upper radio frequency power to be adjusted for the waferless etching and the level to which it belongs; Determining the over-temperature difference to be adjusted according to the level; According to the over-temperature difference to be adjusted, the etching chamber is heated up so that the temperature difference between the temperature of the etching chamber and the upper limit of the process specification of the etching temperature of the plasma etching is the over-temperature difference to be adjusted; Adjusting the upper radio frequency power of the etching chamber to the upper radio frequency power to be adjusted for the waferless etching; The waferless etching is performed.

9. The method according to any one of claims 5 to 8, characterized in that: The waferless etching gas further comprises Cl2.

10. The method according to any one of claims 5 to 8, characterized in that: Meet one or more of the following: The process specification of the upper radio frequency power of the plasma etching is: 600W to 1800W; The process specification of the etching temperature of the plasma etching is: 30°C to 60°C; The process specification of the etching chamber pressure of the plasma etching is: 3mt to 12mt.

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