Wafer processing method
By performing two laser processing on the predetermined line of the wafer, the shield tunnel and the modified layer are formed, which solves the problems of large load during division and inaccurate division lines, and achieves high-precision and high-quality device chip division.
Patent Information
- Application Number
- CN202411500537.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-11-01
- Filing Date
- 2024-10-25
- Publication Date
- 2025-05-06
AI Technical Summary
When the wafers divided by the crossed multiple predetermined segmentation lines are divided into each device chip, there is a problem of applying large external forces and the inability to accurately control the segmentation lines, resulting in a decrease in the quality of the device chip.
By performing two laser processing on the predetermined segmentation line of the wafer, a shield tunnel composed of fine pores and modification layers is first formed, and then a modified layer and crack are formed along the predetermined segmentation line, reducing the load during segmentation and ensuring high-precision segmentation.
This method can reduce the load during segmentation, avoid edge collapse of device chips, and achieve high-precision chip segmentation.
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Figure CN119943758A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a wafer processing method for dividing a wafer having a plurality of devices formed on a front surface thereof by being divided by a plurality of intersecting planned dividing lines into individual device chips. Background Art
[0002] A wafer having a plurality of devices such as ICs and LSIs formed on the front side thereof divided by a plurality of intersecting predetermined dividing lines is divided into individual device chips using a laser processing apparatus, and the divided device chips are used in electronic devices such as mobile phones and personal computers.
[0003] The laser processing device is constructed to include: a chuck worktable that holds a chip; a laser beam irradiation unit that positions the focal point of a laser beam of a wavelength that is transmissive to the chip held by the chuck worktable to the inside of the chip corresponding to the predetermined splitting line and irradiates the laser beam; and a feeding mechanism that performs processing and feeding of the chuck worktable and the laser beam irradiation unit relative to each other. By appropriately setting the laser processing conditions, the laser processing device can form a shield tunnel consisting of a pore and a modified layer surrounding the pore inside the chip corresponding to the predetermined splitting line with high precision, which serves as the starting point of splitting (for example, refer to patent document 1).
[0004] Wafers on which LEDs, power devices, etc. are formed use hard SiC, GaN, diamond, sapphire, etc. as substrates, and therefore, in order to form a modified layer that serves as a starting point for division, it is necessary to irradiate with a relatively strong output laser beam.
[0005] Patent Document 1: Japanese Patent Application Publication No. 2014-221483
[0006] However, even if a modified layer serving as the starting point of division is formed inside the wafer corresponding to the predetermined division line, not only is it necessary to apply a large external force (load) when dividing the wafer into individual device chips, but there is also a problem that the division line during actual division cannot be accurately controlled, and sometimes edge collapse (defects) occur on the periphery of the device chip, thereby reducing the quality of the device chip. Summary of the invention
[0007] Therefore, an object of the present invention is to provide a wafer processing method that can reduce the load when dividing a wafer into individual device chips and prevent edge chipping from occurring at the periphery of the device chips.
[0008] According to one aspect of the present invention, a method for processing a wafer is provided, which divides a wafer divided by a plurality of intersecting predetermined splitting lines and having a plurality of devices formed on the front side into individual device chips, wherein the method for processing the wafer has the following steps: a first processing step, positioning the focal point of a first laser beam having a wavelength that is transparent to the wafer at an interior of the wafer corresponding to the predetermined splitting line and irradiating the wafer with the first laser beam to form a shield tunnel consisting of pores and a modified layer surrounding the pores; a second processing step, positioning the focal point of a second laser beam having a wavelength that is transparent to the wafer and having an output stronger than that of the first laser beam at an interior of the wafer corresponding to the predetermined splitting line, irradiating the wafer with the second laser beam at intervals narrower than the intervals of the shield tunnel to form a modified layer along the predetermined splitting line, thereby generating cracks on the front side of the wafer corresponding to the predetermined splitting line; and a splitting step, applying an external force to the wafer to split the wafer into individual device chips.
[0009] Preferably, the first processing step causes a plurality of shield tunnels to be stacked in the thickness direction of the wafer corresponding to the predetermined division line. Preferably, in the first processing step and the second processing step, the laser beam is irradiated from the front side of the wafer. Preferably, the wafer is selected from the group consisting of a SiC wafer, a GaN wafer, a diamond wafer, and a sapphire wafer.
[0010] According to the chip processing method of the present invention, before the splitting process is implemented, a large straight crack is formed along the predetermined splitting line of the chip without bending, which can reduce the splitting load when implementing the above-mentioned splitting process and can accurately and appropriately split the chip into individual device chips without causing edge collapse. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Figure 1 This is an overall perspective view of the laser processing device.
[0012] Figure 2 It is included through Figure 1 The illustrated laser processing apparatus is a perspective view of a frame unit for processing a wafer.
[0013] Figure 3 It is a perspective view showing the manner of carrying out the first processing step.
[0014] Figure 4 (a) is a partially enlarged cross-sectional view of a wafer having a shield tunnel formed thereon by performing the first processing step. Figure 4 (b) is in Figure 4 A conceptual diagram of a shield tunnel formed in the first processing step shown in (a).
[0015] Figure 5 (a) is a perspective view showing a method of implementing the second processing step, Figure 5(b) is the implementation Figure 5 A partially enlarged cross-sectional view of a wafer having a modified layer and cracks formed by the second processing step shown in (a), Figure 5 (c) is a perspective view of a frame unit including a wafer having cracks formed therein through the second processing step.
[0016] Figure 6 (a) is a partially enlarged cross-sectional view of a wafer having a second layer of shield tunnel formed in a modified example of the first processing step, Figure 6 (b) is in Figure 6 (a) is a partially enlarged cross-sectional view of a wafer having a third layer of shield tunnels formed thereafter after the second layer of shield tunnels, Figure 6 (c) is in Figure 6 (b) is a partially enlarged cross-sectional view of a wafer in which a fourth layer of shield tunnels is formed after the third layer of shield tunnels and cracks are exposed on the front side.
[0017] Figure 7 (a) is a cross-sectional view showing a method of performing a second processing step after a plurality of shield tunnels are stacked by a modification of the first processing step. Figure 7 (b) is a perspective view of a frame unit including a wafer having cracks formed therein through the second processing step.
[0018] Figure 8 It is a cross-sectional view showing an embodiment of the dividing step.
[0019] Description of symbols
[0020] 1: laser processing device; 2: base; 2A: guide rail; 3: holding unit; 31: movable plate in X-axis direction; 32: movable plate in Y-axis direction; 33: support column; 34: cover plate; 35: chuck table; 36: suction chuck; 37: fixture; 4: moving mechanism; 4a: X-axis moving mechanism; 42a: motor; 42b: ball screw; 4b: Y-axis moving mechanism; 44a: motor; 44b: ball screw; 5: frame; 5a: vertical wall; 5b: horizontal wall; 6: alignment unit; 7: laser beam irradiation unit; 71: condenser; 10: wafer; 12: device; 12': device chip; 14: predetermined dividing line; 20a~20d: shield tunnel; 50: controller; 60: dividing device; 62: expansion unit; 62a: expansion drum; 62b: cylinder; 62c: holding component; 62d: clamp; 100:, 100': modified layer; 110, 112, 114: cracks. DETAILED DESCRIPTION
[0021] Hereinafter, a wafer processing method according to an embodiment of the present invention will be described in detail with reference to the drawings.
[0022] exist Figure 1 FIG. 1 shows a laser processing device 1 suitable for implementing the wafer processing method of the present embodiment. The laser processing device 1 comprises at least: a holding unit 3, which is arranged on a base 2 and holds a wafer 10 as a workpiece; and a laser beam irradiation unit 7, which irradiates a laser beam to the wafer 10 held by the holding unit 3. In addition, the wafer 10 divided by the wafer processing method of the present embodiment is, for example, Figure 2 As shown, a SiC wafer having a thickness of about 500 μm is formed on the front surface 10a and divided by a plurality of intersecting predetermined dividing lines 14. Adhesive tape T is attached to the annular frame F and the back surface 10b of the wafer 10 to form a frame unit 15, and the wafer 10 is supported on the annular frame F via the adhesive tape T.
[0023] The laser processing device 1 includes: an alignment unit 6, which performs alignment by photographing the chip 10 held by the holding unit 3; a moving mechanism 4, which moves the holding unit 3; a frame 5, which is composed of a vertical wall portion 5a erected on the side of the moving mechanism 4 on the base 2 and a horizontal wall portion 5b extending in a horizontal direction from the upper end of the vertical wall portion 5a; a controller 50; and a display unit not shown in the figure.
[0024] like Figure 1 As shown in the figure, the holding unit 3 includes: a rectangular X-axis movable plate 31, which is mounted on the base 2 so as to be movable in the X-axis direction; a rectangular Y-axis movable plate 32, which is mounted on the X-axis movable plate 31 so as to be movable in the Y-axis direction; a cylindrical support 33, which is fixed to the upper surface of the Y-axis movable plate 32; and a rectangular cover plate 34, which is fixed to the upper end of the support 33. A chuck table 35 extending upward through a long hole formed in the cover plate 34 is arranged on the cover plate 34. A circular adsorption chuck 36 is arranged on the upper surface of the chuck table 35, and the adsorption chuck 36 is formed of a porous material with air permeability, and uses the XY plane determined by the X coordinate and the Y coordinate as a holding surface. The suction chuck 36 is connected to a suction unit (not shown) via a flow path passing through the support 33, and four clamps 37 for holding the annular frame F and used when holding the wafer 10 on the chuck table 35 are arranged at equal intervals around the suction chuck 36. By operating the suction unit, the wafer 10 can be held by suction using the suction chuck 36.
[0025] The moving mechanism 4 includes an X-axis moving mechanism 4a that moves the chuck table 35 in the X-axis direction, a Y-axis moving mechanism 4b that moves the chuck table 35 in the Y-axis direction, and a rotation drive mechanism (not shown) housed in the support column 33 that rotates the chuck table 35. The X-axis moving mechanism 4a converts the rotational motion of the motor 42a into linear motion via a ball screw 42b and transmits the linear motion to the X-axis movable plate 31, so that the X-axis movable plate 31 moves in the X-axis direction along a pair of guide rails 2A, 2A arranged in the X-axis direction on the base 2. In addition, the Y-axis moving mechanism 4b converts the rotational motion of the motor 44a into linear motion via a ball screw 44b and transmits the linear motion to the Y-axis movable plate 32, so that the Y-axis movable plate 32 moves in the Y-axis direction along a pair of guide rails 31a, 31a arranged in the Y-axis direction on the X-axis movable plate 31.
[0026] The optical system and the alignment unit 6 constituting the above-mentioned laser beam irradiation unit 7 are housed inside the horizontal wall portion 5b of the frame 5. A condenser 71 constituting a part of the laser beam irradiation unit 7 and including a condenser lens (not shown) for converging the laser beam and irradiating the wafer 10 is arranged on the lower surface side of the front end portion of the horizontal wall portion 5b.
[0027] The alignment unit 6 is a photographing unit that photographs the chip 10 held by the holding unit 3 and detects the position where the laser light should be irradiated. It can detect the height of the front side 10a of the chip 10, that is, the thickness of the chip 10, with the adsorption chuck 36 constituting the holding surface of the chuck worktable 35 as a reference. The alignment unit 6 is arranged at a position adjacent to the above-mentioned condenser 71 in the X-axis direction indicated by the arrow X in the figure.
[0028] The controller 50 is composed of a computer and has a central processing unit (CPU) for performing calculations according to a control program, a read-only memory (ROM) for storing the control program, etc., a random access memory (RAM) for temporarily storing detected values and calculation results, etc., which can be read and written, an input interface, and an output interface (detailed illustration omitted). The controller 50 is connected to the moving mechanism 4, the alignment unit 6, the laser beam irradiation unit 7, and a display unit (not shown) and the like. The repetition frequency and average output of the laser beam irradiated from the laser beam irradiation unit 7 are appropriately adjusted by the controller 50. The image data captured by the alignment unit 6 is stored in an appropriate memory of the controller 50, and the detected image data, laser processing conditions, etc. are displayed on the display unit.
[0029] The laser processing apparatus 1 of the present embodiment has a configuration roughly as described above, and a processing method for dividing a wafer 10 into individual device chips using the laser processing apparatus 1 will be described below.
[0030] (First processing step)
[0031] In the chip processing method of the present embodiment, the following first processing step is implemented: the focal point of the first laser light LB1 with a wavelength that is transmissive to the chip 10 is positioned inside the chip 10 corresponding to the predetermined dividing line 14 and the first laser light LB1 is irradiated to the chip 10 to form a shield tunnel consisting of a pore and an amorphous modified layer surrounding the pore.
[0032] When the first processing step is performed, the wafer 10 before processing is taken out from a cassette (not shown) storing a plurality of wafers 10, mounted on the suction chuck 36 of the chuck table 35 and held by suction, and the annular frame F is gripped and fixed by the clamp 37.
[0033] Next, the moving mechanism 4 is operated to move the wafer 10 to the position directly below the alignment unit 6 for imaging, and the predetermined splitting line 14 formed in the first direction on the front surface 10a of the wafer 10 is aligned with the X-axis direction. The position of the predetermined splitting line 14 processed on the front surface 10a of the wafer 10 is determined by the X-coordinate and the Y-coordinate, and the height of the front surface 10a of the predetermined splitting line 14 is detected and stored in an appropriate memory of the controller 50.
[0034] Next, based on the information detected by the alignment unit 6, the X-axis moving mechanism 4a and the Y-axis moving mechanism 4b are operated, so that Figure 3 As shown, the predetermined dividing line 14 in the first direction of the wafer 10 is moved to the right below the condenser 71 of the laser beam irradiation unit 7. Then, the focusing point position adjustment unit (not shown) is operated to position the focusing point of the first laser beam LB1 having a wavelength that is transparent to the wafer 10 at a predetermined position in the thickness direction of the wafer 10 inside the predetermined dividing line 14. Figure 4 As shown in (a) of FIG. 1 , in the first processing step of the present embodiment, the predetermined position at which the focusing point of the first laser beam LB1 is positioned is the vicinity of the front surface 10a on which the first laser beam LB1 is incident.
[0035] After the focal point of the first laser beam LB1 is positioned as described above, Figure 3 As shown, the laser beam irradiation unit 7 is operated to irradiate the first laser beam LB1 from the condenser 71, and the X-axis moving mechanism 4a is operated as shown. Figure 3 and Figure 4 As shown in (a), a shield tunnel 20a consisting of a pore and a modified layer for shielding the pore is formed along the predetermined dividing line 14 of the wafer 10. Figure 4As shown in (b), the shield tunnel 20a is composed of a modified layer 24, and the modified layer 24 is composed of a pore 22 with a diameter of about 1 μm formed in the center and an amorphous material with a diameter of 10 μm surrounding the pore 22. A predetermined gap (for example, about 50 μm) is formed between the upper end of the shield tunnel 20a formed at this time and the front surface 10a of the wafer 10, and the shield tunnel 20a is not exposed on the front surface 10a side of the wafer 10, and cracks starting from the shield tunnel 20a will not be exposed on the front surface 10a.
[0036] In order to properly form the above-mentioned shield tunnel 20a, as described in the above-mentioned patent document 1, it is important to set the value (NA / N) obtained by dividing the numerical aperture (NA) of the focusing lens (not shown) provided in the concentrator 71 by the refractive index (N) of the substrate (SiC in this embodiment) constituting the chip 10 to fall within the range of 0.05 to 0.2.
[0037] If the above-mentioned first layer of shield tunnels 20a is formed along the predetermined dividing lines 14 in the first direction, the Y-axis moving mechanism 4b is operated. The wafer 10 is indexed and fed in the Y-axis direction according to the intervals of the predetermined dividing lines 14, and the unprocessed predetermined dividing lines 14 adjacent in the Y-axis direction are positioned directly below the condenser 71. Then, as described above, the focal point of the first laser beam LB1 is positioned inside the wafer 10 near the front face 10a of the wafer 10 in the predetermined dividing lines 14 of the wafer 10 and irradiated, and the wafer 10 is processed and fed in the X-axis direction to form the above-mentioned shield tunnels 20a. Similarly, the wafer 10 is processed and fed in the X-axis direction and the first layer of shield tunnels 20a is formed inside all the predetermined dividing lines 14 along the first direction.
[0038] Next, the above-mentioned rotation drive mechanism is operated to rotate the wafer 10 by 90 degrees, so that the unprocessed predetermined dividing lines 14 in the second direction perpendicular to the predetermined dividing lines 14 in the first direction on which the shield tunnels 20a have been formed are aligned with the X-axis direction. Then, the focal point of the first laser beam LB1 is positioned and irradiated inside each of the remaining predetermined dividing lines 14 by the same steps as above, and the X-axis moving mechanism 4a and the Y-axis moving mechanism 4b are operated to form the shield tunnels 20a along the inside of the wafer 10 corresponding to all the predetermined dividing lines 14 formed on the front surface 10a of the wafer 10.
[0039] Here, in the first processing step of the present embodiment, laser processing conditions (hereinafter referred to as "first processing conditions") when forming the first layer of the shield tunnel 20a near the front surface 10a are set, for example, as follows.
[0040] Wavelength: 1064nm
[0041] Repetition frequency: 1kHz
[0042] Average output: 0.25W
[0043] Processing feed speed: 25mm / sec
[0044] When the first layer of shield tunnels 20a is formed by irradiating the first laser beam LB1 near the front surface 10a of the wafer 10 according to the above-mentioned first processing condition, the height of the shield tunnel 20a in the thickness direction is about 100μm. In addition, according to the above-mentioned repetition frequency and processing feed speed, the distance between the centers of adjacent shield tunnels 20a in the X-axis direction is 25μm, so a gap of about 15μm is formed between adjacent shield tunnels 20a. In addition, under the first processing condition, the average output is set to be relatively weak (for example, 0.25W), so no cracks (crazing) are formed on the front surface 10a of the wafer 10 along the predetermined dividing line 14. The first processing step is thus completed.
[0045] The first processing step of the present invention is not limited to the above-mentioned embodiment, and also includes stacking a plurality of shield tunnels in the thickness direction of the planned dividing line 14. Another aspect of the first processing step of stacking a plurality of shield tunnels in the thickness direction will be described in detail later.
[0046] (Second processing step)
[0047] After the first processing step is performed, the following second processing step is performed: the focal point of the second laser beam LB2 having a wavelength that is transparent to the wafer 10 and having a stronger output than the first laser beam LB1 is positioned inside the wafer 10 corresponding to the predetermined dividing line 14, and the second laser beam LB2 is irradiated to the wafer 10 at intervals narrower than the intervals of the shield tunnels 20a formed by the first processing step, so as to form a modified layer 100 inside the wafer 10 along the predetermined dividing line 14. The second processing step will be described in more detail.
[0048] When implementing the second processing step, Figure 5 As shown in (a), the predetermined dividing line 14 in the first direction of the shield tunnel 20a is positioned directly below the condenser 71 of the laser beam irradiation unit 7. Here, the laser beam irradiation unit 7 is set by the controller 50 to irradiate the second laser beam LB2 having a wavelength that is transparent to the wafer 10 and having a stronger output than the first laser beam LB1. In the second processing step, as Figure 5 As shown in (b), the focal point of the second laser beam LB2 is positioned deeper than the first layer shield tunnel 20a formed by the above-mentioned first processing step, for example, approximately at the center in the thickness direction of the wafer 10.
[0049] Next, the laser beam irradiation unit 7 is operated to irradiate the second laser beam LB2 from the condenser 71, and the X-axis moving mechanism 4a is operated as shown in FIG. Figure 5 As shown in (b), a modified layer 100 is formed inside the wafer 10 along the predetermined dividing line 14 where the shield tunnel 20a was previously formed. Here, the second laser light LB2 is irradiated at an interval narrower than the interval of the shield tunnel 20a formed in the first layer, for example, 1 μm, and the modified layer 100 is formed at a denser interval than the shield tunnel 20a.
[0050] Then, the laser beam irradiation unit 7 set as described above is operated to irradiate the second laser beam LB2, and the X-axis moving mechanism 4a, the Y-axis moving mechanism 4b and the rotation drive mechanism are operated to form a modified layer 100 inside the chip 10 along all the predetermined dividing lines 14 of the chip 10.
[0051] In addition, the laser processing conditions in the second processing step of irradiating the second laser beam LB2 (hereinafter referred to as "second processing conditions") are set, for example, as follows.
[0052] Wavelength: 1064nm
[0053] Repetition frequency: 25kHz
[0054] Average output: 7.3W
[0055] Processing feed speed: 25mm / sec
[0056] As described above, under the second processing condition, the processing feed speed is maintained at 25 mm / sec, which is the same as that of the first processing step, and the repetition frequency is set to a value greater than that of the first processing step. In addition, compared with the first laser light LB1 irradiated in the first processing step, the average output is increased, more specifically, to 7.3 W. Thus, Figure 5 As shown in (b), by continuously forming the modified layer 100 inside the wafer 10 along the predetermined dividing line 14, the shield tunnel 20a of the first layer expands, as shown in FIG. Figure 5 As shown in (c), the crack 110 is induced along the predetermined splitting line 14 and exposed on the front side 10a. The crack 110 does not bend relative to the predetermined splitting line 14 but is linear, and becomes a relatively large crack starting from the modified layer 100 through the shield tunnel 20a to the front side 10a.
[0057] In addition, in the second processing step, the method of irradiating the second laser beam LB2 at an interval narrower than the interval of the shield tunnel 20a to form the modified layer 100 inside the wafer 10 along the predetermined dividing line 14 is not limited to being implemented by only setting the repetition frequency to a large value as described above, and can also be implemented by adjusting the processing feed speed when moving with the help of the X-axis moving mechanism 4a to a low speed or adjusting both the processing feed speed and the repetition frequency. In addition, when irradiating the second laser beam LB2, it is also not necessary to set the value (NA / N) obtained by dividing the numerical aperture (NA) of the condenser lens of the condenser 71 by the refractive index (N) of SiC constituting the wafer 10 to be in the range of 0.05 to 0.2 as when irradiating the first laser beam LB1. Therefore, the second processing step can also be implemented by other laser processing devices having a condenser different from the above-mentioned laser processing device 1.
[0058] The present invention is not limited to the above-described embodiment. The first processing step of the present invention also includes, for example, the following modified examples.
[0059] In the first processing step in this modification, in addition to forming the first processing step performed under the first processing conditions described above, Figure 4 In addition to the first shield tunnel 20 a shown in (a), another shield tunnel is formed and stacked at a position deeper than the first shield tunnel 20 a in the thickness direction of the inside of the wafer 10 corresponding to the planned dividing line 14 .
[0060] More specifically, in the first processing step described above, a first layer of shield tunnels 20a is formed near the front surface 10a of the wafer 10, and then Figure 6 As shown in (a), the position of the focal point when irradiating the first laser light LB1' that meets the first processing condition is positioned inside the back side 10b of the wafer 10 and irradiated, and the X-axis moving mechanism 4a is operated to form a second layer of shield tunnels 20b consisting of fine holes and a modified layer for shielding the fine holes near the back side 10b of the wafer 10 along the predetermined dividing line 14 in the first direction of the wafer 10. In addition, a predetermined interval (for example, about 50 μm) is formed between the lower end of the second layer of shield tunnels 20b and the back side 10b of the wafer 10.
[0061] Next, the moving mechanism 4 is operated in the same manner as the movement of the moving mechanism 4 when forming the first layer of the shield tunnel 20a, and the first laser beam LB1' is irradiated to form the second layer of the shield tunnel 20b along all the planned division lines 14 of the wafer 10. In addition, the focusing lens when forming the second layer of the shield tunnel 20b is selected to satisfy the same conditions as the focusing lens when forming the first layer of the shield tunnel 20a.
[0062] The laser processing conditions for forming the second layer of the shield tunnel 20b may be the same as the first processing conditions, but are preferably processing conditions (hereinafter referred to as "third processing conditions") that slightly enhance the average output relative to the first processing conditions, for example, as set as follows.
[0063] Wavelength: 1064nm
[0064] Repetition frequency: 1kHz
[0065] Average output: 0.5W
[0066] Processing feed speed: 25mm / sec
[0067] The repetition frequency and processing feed speed under the third processing condition are set according to the same conditions as the first processing condition, so that the intervals between adjacent shield tunnels 20b when forming the second layer of shield tunnels 20b are equal to the intervals when forming the first layer of shield tunnels 20a. Even in the case where the second layer of shield tunnels 20b are formed, the intervals between adjacent shield tunnels 20b are separated, and the intervals between the first layer of shield tunnels 20a and the second layer of shield tunnels 20b are separated in the thickness direction of the wafer 10. In addition, the output is suppressed to be weaker than the second laser light LB2 irradiated in the second processing step described later, so that cracks will not be exposed on the front surface 10a and the back surface 10b of the wafer 10 due to the formation of the second layer of shield tunnels 20b.
[0068] In this modification, after the second layer of the shield tunnel 20b is formed, Figure 6 As shown in (b), the focal point of the first laser beam LB1' is positioned above the second-layer shield tunnel 20b and irradiated, and the X-axis moving mechanism 4a, the Y-axis moving mechanism 4b and the above-mentioned rotation drive mechanism are operated to form a third-layer shield tunnel 20c consisting of a pore and a modified layer for shielding the pore along the predetermined dividing line 14 in the first direction of the wafer 10, and stacked on the second-layer shield tunnel 20b. The laser processing conditions when forming the third-layer shield tunnel 20c are set to the same conditions as the processing conditions (third processing conditions) when forming the second-layer shield tunnel 20b.
[0069] Furthermore, in this modification, after the third layer of the shield tunnel 20c is formed, Figure 6As shown in (c), the focal point of the first laser light LB1' is positioned above the third-layer shield tunnel 20c and irradiated, and the X-axis moving mechanism 4a, the Y-axis moving mechanism 4b and the above-mentioned rotation drive mechanism are operated to form a fourth-layer shield tunnel 20d consisting of a pore and a modified layer for shielding the pore along the inside of the predetermined dividing line 14 of the chip 10, in a manner above the third-layer shield tunnel 20c and below the first-layer shield tunnel 20a, that is, sandwiched between the first-layer shield tunnel 20a and the third-layer shield tunnel 20c.
[0070] The laser processing conditions when forming the fourth layer of shield tunnel 20d are also set according to the processing conditions (third processing conditions) when forming the second layer of shield tunnel 20b and the third layer of shield tunnel 20c. In addition, in this modified example, by forming the fourth layer of shield tunnel 20c directly below the first layer of shield tunnel 20a, the first layer of shield tunnel 20a expands, such as Figure 6 As shown in (c), a crack 112 is formed and exposed on the front surface 10a side of the wafer 10. The crack 112 is induced by the first layer of the shield tunnel 20a and formed on the front surface 10a side, so it does not bend but is straight along the planned dividing line 14.
[0071] In addition, in the first processing step, after the shield tunnel 20a of the first layer is formed, the number and order of stacking a plurality of shield tunnels in the thickness direction of the chip 10 corresponding to the predetermined dividing line 14 of the chip 10 are not limited to the number of shield tunnels and the order of stacking mentioned above, and are arbitrary. Therefore, for example, after the shield tunnel 20a of the first layer is formed, the shield tunnel 20d of the fourth layer mentioned above may be formed first, and then the shield tunnel 20c of the third layer and the shield tunnel 20b of the second layer may be formed in sequence. In addition, after the shield tunnel 20a of the first layer is formed, for example, only the shield tunnel 20d of the fourth layer may be formed and stacked to end the first processing step. However, when viewed from the thickness direction of the predetermined dividing line 14, the method of forming the shield tunnel from the lower layer can reduce the energy loss when the shield tunnel is formed by irradiating the first laser beam LB1', and therefore it is preferred as according to Figure 6 (a)~ Figure 6 As described in (c), a shield tunnel is formed sequentially starting from the lower layer.
[0072] Furthermore, by changing the third processing condition (for example, increasing the average output), the height of the shield tunnels stacked in the first processing step can also be adjusted. That is, in the above-mentioned modified example, four shield tunnels 20a to 20d are stacked and connected in the thickness direction of the wafer 10, but the laser processing conditions can be set in such a way that the height of each shield tunnel stacked below the first layer of shield tunnel 20a becomes higher (for example, increasing the average output), so that a small number of shield tunnels are connected in the thickness direction of the wafer 10.
[0073] If a plurality of shield tunnels 20a to 20d are formed and stacked in the thickness direction of the predetermined dividing line 14 in the first processing step of the above-mentioned modified example, then according to the above-mentioned second processing condition, as Figure 7 As shown in (a), the focal point of the second laser beam LB2 having a wavelength that is transparent to the wafer 10 and having a stronger output than the first laser beams LB1 and LB1' irradiated in the first processing step is positioned inside the wafer 10 corresponding to the predetermined dividing line 14 (for example, a position approximately in the center when viewed in the thickness direction of the wafer 10). Then, the second laser beam LB2 is irradiated, and the moving mechanism 4 that moves the wafer 10 is actuated to form a modified layer 100' along all the predetermined dividing lines 14 at intervals narrower than the intervals of the above-mentioned shield tunnels 20a to 20d. As a result, the shield tunnels 20a to 20d expand, as shown in FIG. Figure 7 (a) and Figure 7 As shown in (b), cracks 114 are formed along the planned dividing line 14. At this time, the cracks 114 are induced and formed in the shield tunnels 20a to 20d starting from the reformed layer 100', and therefore, they do not bend along the planned dividing line 14 but are formed in a straight line.
[0074] Furthermore, in this modification, after the plurality of shield tunnels 20a to 20d are stacked in the thickness direction of the dividing line 14 in the first processing step, the second processing step is performed, so the crack 114 is Figure 5 Compared with the crack 110 described in (b), the crack 110 becomes a larger crack that spreads to the front side 10a and the back side 10b of the wafer 10.
[0075] (Separation process)
[0076] If the crack 110 (or crack 114) is formed by the first and second processing steps, a separation step is performed to separate the wafer 10 into individual device chips by applying an external force to the wafer 10. The method of applying the external force to the wafer 10 is not particularly limited, and for example, Figure 8 The dividing device 60 shown is implemented.
[0077] exist Figure 8The splitting device 60 shown in the figure has an expansion unit 62. The expansion unit 62 includes: a cylindrical expansion drum 62a; a plurality of cylinders 62b adjacent to the expansion drum 62a and extending upward at intervals in the circumferential direction; an annular holding member 62c connected to the upper end of each cylinder 62b; and a plurality of clamps 62d arranged at intervals in the circumferential direction on the outer peripheral edge of the holding member 62c. The inner diameter of the expansion drum 62a is larger than the diameter of the wafer 10, and the outer diameter of the expansion drum 62a is smaller than the inner diameter of the annular frame F. In addition, the holding member 62c corresponds to the diameter size of the annular frame F, and the annular frame F is placed on the flat upper surface of the holding member 62c.
[0078] like Figure 8 As shown, the plurality of air cylinders 62b raise and lower the holding member 62c between a reference position where the upper surface of the holding member 62c is at substantially the same height as the upper end of the expansion drum 62a and an expansion position where the upper surface of the holding member 62c is located below the upper end of the expansion drum 62a. Figure 8 In the figure, for the sake of convenience, the wafer 10 held on the adhesive tape T is shown as being raised and lowered together with the expansion drum 62a (shown by solid lines and two-dot chain lines), but in fact, it is the holding member 62c that is raised and lowered.
[0079] When the adhesive tape T supporting the wafer 10 is expanded by the above-mentioned splitting device 60 to apply external force to the wafer 10, first, the front side 10a of the wafer 10 subjected to the first processing step and the second processing step is facing upward, and the annular frame F is placed on the upper surface of the holding member 62c positioned at the reference position, and the annular frame F is fixed by a plurality of clamps 62d. Then, by lowering the holding member 62c to the expanded position, as shown in FIG. Figure 8 As shown by the double-dashed line in the middle, the wafer 10 is expanded together with the adhesive tape T to apply radial external force to the wafer 10. As a result, the wafer 10 attached to the adhesive tape T is divided into individual device chips 12'. As a result, the device chips 12' divided from the wafer 10 can be picked up by an appropriate pickup unit (not shown), and the picked up device chips 12' can be transported to the next process or stored in an appropriate storage box.
[0080] As described above, before the splitting process is implemented, a relatively large straight crack 110 (or 114) is formed along the predetermined splitting line 14 of the chip 10 without bending, thereby reducing the splitting load when implementing the above-mentioned splitting process, and the chip 10 can be split into individual device chips 12' with high precision without causing edge collapse.
[0081] In the dividing step of the present invention, the method of applying external force to the wafer 10 to divide it into individual device chips is not limited to the method using the above-mentioned dividing apparatus 60. For example, the wafer 10 may be placed on a pad having elastic force, and an external force may be applied while a hard roller is pressed from above the wafer 10 along the dividing line 14 to rotate the roller, or an external force may be applied by pressing a wedge-shaped pressing member along the dividing line 14 of the wafer 10 placed on the pad, thereby dividing the wafer 10 into individual device chips 12'.
[0082] In the above embodiment, an example in which the wafer 10 is composed of a SiC substrate is described, but the present invention is not limited thereto, and a wafer formed of other materials may also be used. For example, even a GaN substrate, a diamond substrate, or a sapphire substrate can also be applied to the above embodiment to achieve the same function and effect. At this time, the laser processing conditions when performing the first processing step and the second processing step are appropriately adjusted according to the raw material and thickness of the wafer to be processed.
Claims
1. A method for processing a wafer, wherein a wafer having a plurality of devices formed on a front surface thereof is divided by a plurality of intersecting predetermined dividing lines into individual device chips, wherein: The wafer processing method has the following steps: In a first processing step, a focal point of a first laser beam having a wavelength that is transparent to the wafer is positioned inside the wafer corresponding to a predetermined dividing line, and the first laser beam is irradiated onto the wafer to form a shield tunnel consisting of a fine hole and a modified layer surrounding the fine hole; a second processing step of positioning a focal point of a second laser beam having a wavelength that is transmissive to the wafer and having a stronger output than the first laser beam inside the wafer corresponding to the predetermined splitting line, and irradiating the wafer with the second laser beam at intervals narrower than the intervals of the shield tunnel to form a modified layer along the predetermined splitting line, thereby causing a crack to be generated on the front surface of the wafer corresponding to the predetermined splitting line; and In the separation process, external force is applied to the wafer to separate the wafer into individual device chips.
2. The wafer processing method according to claim 1, wherein: In the first processing step, a plurality of shield tunnels are stacked in a thickness direction of the wafer corresponding to the planned dividing line.
3. The wafer processing method according to claim 1, wherein: In the first processing step and the second processing step, the laser beam is irradiated from the front surface of the wafer.
4. The wafer processing method according to claim 1, wherein: The wafer is selected from the group consisting of a SiC wafer, a GaN wafer, a diamond wafer, and a sapphire wafer.
Citation Information
Patent Citations
Laser processing method
JP2014221483A