Encapsulation layer, display device including encapsulation layer, and method of manufacturing display device

Abstract

Thin encapsulation layers capable of blocking external moisture and / or oxygen, display devices including the encapsulation layers, and methods of manufacturing the display devices are described. The encapsulation layer includes a first layer including a polysilazane and a second layer disposed on the first layer and including a cured product of a silicon-based vinyl monomer.

Description

[0001] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0151939 filed in the Korean Intellectual Property Office on November 6, 2023, the disclosure of which is incorporated herein in its entirety by reference. Technical Field

[0002] One or more embodiments relate to an encapsulation layer, a display device including the encapsulation layer, and a method for manufacturing the display device. For example, one or more embodiments relate to an encapsulation layer that is thin and can block external moisture and / or oxygen, a display device including the encapsulation layer, and a method for manufacturing the display device. Background Art

[0003] The display device may include an organic light emitting diode as a display element. The organic light emitting diode includes a pixel electrode, a counter electrode, and an intermediate layer therebetween, and includes an emission layer. Because such an organic light emitting diode may be easily damaged by external moisture and / or oxygen, an encapsulation layer is used to cover the organic light emitting diode to protect the organic light emitting diode. Summary of the invention

[0004] In the display device of the related art, the encapsulation layer must be thick enough to block or reduce external moisture and / or oxygen. However, when the encapsulation layer is too thick, it may be difficult to fold or bend the display device (eg, it may be inconvenient to fold or bend), and the aesthetics of the display device may be reduced.

[0005] Aspects according to one or more embodiments relate to an encapsulation layer that is relatively thin and capable of blocking external moisture and / or oxygen, a display device including the encapsulation layer, and a method of manufacturing the display device. However, this is merely an example, and the scope of the disclosure is not limited thereto.

[0006] Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the disclosed presented embodiments.

[0007] According to one or more embodiments, an encapsulation layer includes: a first layer including polysilazane; and a second layer on the first layer and including a cured product of a silicon-based vinyl monomer.

[0008] The polysilazane may include perhydropolysilazane (PHPS).

[0009] The silicon-based vinyl monomer may include at least one of vinyltrimethylsilane, vinyltriethylsilane, vinyltrimethoxysilane, vinyltriethoxysilane, vinyltri(2-methoxyethoxy)silane, vinyltriisopropoxysilane, vinyltri(tert-butylperoxy)silane, vinyldimethylethoxysilane, vinylmethyldimethoxysilane, vinylmethyldiethoxysilane, 1,1,3,3-tetramethyl-1,3-divinyldisiloxane, 2,4,6,8-tetramethyl-2,4,6,8-tetravinyl-cyclotetrasiloxane and 1,3,5-trivinyl-1,3,5-trimethylcyclotrisiloxane.

[0010] A portion of the polysilazane in the first layer may form a covalent bond with the silicon-based vinyl monomer.

[0011] The second layer may be in direct contact with the first layer.

[0012] The encapsulation layer may have a thickness of about 0.3 μm to about 1.0 μm.

[0013] The encapsulation layer may further include a third layer on the second layer and including polysilazane.

[0014] According to one or more embodiments, a display device includes: a substrate; a display element on the substrate; and an encapsulation layer covering the display element, the encapsulation layer including: a first layer including polysilazane; and a second layer on the first layer and including a cured product of a silicon-based vinyl monomer.

[0015] The polysilazane may include perhydropolysilazane (PHPS).

[0016] The silicon-based vinyl monomer may include at least one of vinyltrimethylsilane, vinyltriethylsilane, vinyltrimethoxysilane, vinyltriethoxysilane, vinyltri(2-methoxyethoxy)silane, vinyltriisopropoxysilane, vinyltri(tert-butylperoxy)silane, vinyldimethylethoxysilane, vinylmethyldimethoxysilane, vinylmethyldiethoxysilane, 1,1,3,3-tetramethyl-1,3-divinyldisiloxane, 2,4,6,8-tetramethyl-2,4,6,8-tetravinyl-cyclotetrasiloxane and 1,3,5-trivinyl-1,3,5-trimethylcyclotrisiloxane.

[0017] A portion of the polysilazane in the first layer may form a covalent bond with the silicon-based vinyl monomer.

[0018] The second layer may be in direct contact with the first layer.

[0019] The encapsulation layer may have a thickness of about 0.3 μm to about 1.0 μm.

[0020] The encapsulation layer may further include a third layer on the second layer, the third layer including at least one of polysilazane, silicon nitride, silicon oxide, and silicon oxynitride.

[0021] According to one or more embodiments, a method for manufacturing a display device includes the following steps: forming a display element on a substrate; forming a first preliminary layer by coating a material including polysilazane to cover the display element; forming a first layer by emitting ultraviolet light to the first preliminary layer; forming a second preliminary layer by coating a material including a silicon-based vinyl monomer on the first layer; and forming a second layer by emitting ultraviolet light to the second preliminary layer.

[0022] The polysilazane may include perhydropolysilazane (PHPS).

[0023] The silicon-based vinyl monomer may include at least one of vinyltrimethylsilane, vinyltriethylsilane, vinyltrimethoxysilane, vinyltriethoxysilane, vinyltri(2-methoxyethoxy)silane, vinyltriisopropoxysilane, vinyltri(tert-butylperoxy)silane, vinyldimethylethoxysilane, vinylmethyldimethoxysilane, vinylmethyldiethoxysilane, 1,1,3,3-tetramethyl-1,3-divinyldisiloxane, 2,4,6,8-tetramethyl-2,4,6,8-tetravinyl-cyclotetrasiloxane and 1,3,5-trivinyl-1,3,5-trimethylcyclotrisiloxane.

[0024] In the step of forming the second layer, a portion of the polysilazane of the first layer may form a covalent bond with the silicon-based vinyl monomer.

[0025] The sum of the thickness of the first layer and the thickness of the second layer may be about 0.3 μm to about 1.0 μm.

[0026] The method may further include the steps of: forming a third preliminary layer by coating a material including polysilazane to cover the second layer; and forming the third layer by emitting ultraviolet light to the third preliminary layer.

[0027] Other aspects, features and improvements of the disclosure will become better understood through the detailed description, claims and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated into and constitute a part of the present disclosure. The accompanying drawings illustrate embodiments of the present disclosure and, together with the specification, are used to explain the principles of the present disclosure. The above and other aspects, features and improvements of certain embodiments of the disclosure will become more apparent from the following description in conjunction with the accompanying drawings, in which: Figure 1 is a plan view schematically showing a display device according to an embodiment; Figure 2 is an equivalent circuit diagram of a pixel circuit included in a display device according to an embodiment; Figure 3 is schematically shown along Figure 1 The line I-I' intercepts Figure 1 A cross-sectional view of a display device; Figure 4 is a cross-sectional view schematically showing a display device according to another embodiment; Figure 5 is a cross-sectional view schematically showing a display device according to a comparative example; Figures 6 to 10 is a schematic diagram showing the manufacturing Figure 3 A cross-sectional view of a process of manufacturing a portion of a display device; and Fig.11 and Fig.12 is a schematic diagram showing the manufacturing Figure 4 A cross-sectional view of a process of displaying a portion of a device. DETAILED DESCRIPTION

[0029] Now will be referred to in more detail one or more embodiments, examples of which are shown in the accompanying drawings, wherein the same reference numerals always represent the same elements, and their repeated description may not be provided. In this regard, the embodiments presented may have different forms and should not be construed as being limited to the descriptions set forth herein. Therefore, the embodiments are described only by reference to the accompanying drawings to explain the aspects of this specification. As used herein, the term "and / or" includes any combination and all combinations of one or more of the related listed items. Throughout the disclosure, the expression "at least one (kind / person) of a, b, and c" means only a, only b, only c, (e.g., simultaneously) both a and b, (e.g., simultaneously) both a and c, (e.g., simultaneously) both b and c, all of a, b, and c, or their variations.

[0030] Since this specification allows one or more suitable changes and many embodiments, certain embodiments will be shown in the drawings and described in more detail in the written description. The disclosed effects and features and methods for achieving these effects and features will be explained with reference to one or more embodiments described in more detail below with reference to the drawings. However, the disclosure is not limited to the following embodiments and can be implemented in one or more suitable forms.

[0031] In the present specification, it will be understood that although the terms "first", "second", etc. may be used herein to describe one or more suitable elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element.

[0032] Unless the context clearly indicates otherwise, the singular forms used herein are intended to include the plural forms as well.

[0033] In the present specification, it will be understood that the terms “include” and / or “comprises” as used herein specify the presence of stated features or elements, but do not preclude the presence or addition of one or more other features or elements.

[0034] In the present specification, the expression "A and / or B" means only A, only B, or both (e.g., simultaneously) A and B. In the present specification, the expression "at least one of A and B" means only A, only B, or both (e.g., simultaneously) A and B.

[0035] In the present specification, it will be understood that when a layer, film, region, panel or element is referred to as being “on” another element, it can be “directly on” the other element but intervening elements may also be present therebetween.

[0036] It will also be understood that when layers, regions, or elements are referred to as being connected to each other, they may be directly connected to each other or indirectly connected to each other with intervening layers, regions, or elements therebetween. For example, when layers, regions, or elements are referred to as being electrically connected to each other, they may be directly electrically connected to each other, or indirectly electrically connected to each other with intervening layers, regions, or elements therebetween.

[0037] In this specification, the x direction, the y direction, and the z direction are not limited to the three directions of the rectangular coordinate system and can be interpreted more broadly. For example, the x direction, the y direction, and the z direction may be orthogonal to each other (e.g., vertical), or may represent different directions that are not orthogonal to each other (e.g., not vertical).

[0038] When some embodiments may be implemented differently, a specific process order may be performed differently from the order described. For example, two processes described in succession may be performed substantially simultaneously or in an order opposite to the order described.

[0039] As used herein, the term "in a plan view" refers to viewing the target portion from above. For example, in this specification, as used herein, the term "in a plan view" may refer to "when viewed from a direction orthogonal (eg, vertical) to the substrate".

[0040] Hereinafter, the embodiments will be described in more detail with reference to the accompanying drawings. When describing the embodiments with reference to the accompanying drawings, the same or corresponding elements are represented by the same reference numerals, and their redundant description will not be provided. For ease of explanation, the size of the elements in the accompanying drawings may be exaggerated or reduced. For example, because the size and thickness of the elements in the accompanying drawings are arbitrarily shown for ease of explanation, the disclosure is not limited thereto.

[0041] Figure 1 is a plan view schematically showing a display device 1 according to the embodiment.

[0042] like Figure 1 As shown in FIG. 1 , the display device 1 may include a display area DA in which a plurality of pixels PX are arranged and a peripheral area PA outside the display area DA. For example, the peripheral area PA may completely surround the display area DA. It is understood that the substrate (see FIG. 1 ) included in the display device 1 Figure 4 100 ) has a display area DA and a peripheral area PA.

[0043] The pixel PX of the display device 1 is a region where light of certain colors (e.g., multiple beams of light) is emitted, and the display device 1 can provide an image by using the light (e.g., multiple beams of light) emitted from the pixel PX. The pixel PX can emit, for example, red light, green light, or blue light to the outside (e.g., to the exterior).

[0044] like Figure 1 As shown in , the display area DA may have a polygonal shape including a rectangular shape. For example, the display area DA may have a rectangular shape with a horizontal length longer than a vertical length, a rectangular shape with a horizontal length shorter than a vertical length, or a square shape. In one or more embodiments, the display area DA may have various suitable shapes such as an elliptical shape or a circular shape.

[0045] The peripheral area PA may be a non-display area in which pixels PX are not arranged. A driver configured to provide an electrical signal or power to the pixel PX, etc. may be arranged in the peripheral area PA. Pads (also called "pads" or "pads") to which one or more suitable electronic devices or printed circuit boards may be electrically connected may be arranged in the peripheral area PA. The pads may be spaced apart from each other in the peripheral area PA and may be electrically connected to a printed circuit board or an integrated circuit device.

[0046] Figure 2 According to an embodiment, the Figure 1 1 is an equivalent circuit diagram of a pixel circuit PC in a display device 1. The pixel circuit PC can be electrically connected to a display element. One display element can correspond to one pixel PX. Figure 2 In the figure, an organic light emitting diode OLED is shown as a display element.

[0047] The pixel circuit PC may include a first transistor T1, a second transistor T2, and a storage capacitor Cst. The second transistor T2 used as a switching transistor may be connected to a scan line SL and a data line DL, and may be configured to be turned on in response to a switching signal input from the scan line SL, and to transmit a data signal input from the data line DL to the first transistor T1. The storage capacitor Cst may have one end electrically connected to the second transistor T2 and the other end electrically connected to the driving voltage line PL, and may store a voltage corresponding to a difference between a voltage received from the second transistor T2 and a driving power supply voltage ELVDD supplied to the driving voltage line PL.

[0048] The first transistor T1 used as a driving thin film transistor can be connected to the driving voltage line PL and the storage capacitor Cst, and can be configured to control the amount of driving current flowing from the driving voltage line PL to the organic light emitting diode OLED according to the voltage value stored in the storage capacitor Cst. The organic light emitting diode OLED can be configured to emit light with a specific brightness according to the driving current. The counter electrode of the organic light emitting diode OLED can be configured to receive the electrode power supply voltage ELVSS.

[0049] although Figure 2 The pixel circuit PC is shown to include two thin film transistors and one storage capacitor, but the disclosure is not limited thereto. For example, the number of transistors or the number of storage capacitors may be appropriately changed differently according to the design of the pixel circuit PC.

[0050] Figure 3 It is schematically shown Figure 1 The display device 1 is along Figure 1 A cross-sectional view taken along line II'. Figure 3 As shown in , the display device 1 may include a substrate 100 , a pixel circuit layer 200 , a display element layer 300 , and an encapsulation layer 400 .

[0051] The substrate 100 may include glass, metal, or a polymer resin. In some embodiments, the substrate 100 may be flexible and / or bendable. In this case, for example, the substrate 100 may include a polymer resin such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, and / or cellulose acetate propionate. Various suitable modifications are possible. In some embodiments, the substrate 100 may have a multilayer structure including two layers (each layer including a polymer resin) and an inorganic material (e.g., silicon oxide (SiO x )、Silicon Nitride(SiN x ), silicon oxynitride (SiO x N y) etc.) barrier layer.

[0052] The pixel circuit layer 200 may be arranged on the substrate 100. The pixel circuit layer 200 may include a thin film transistor TFT, an inorganic insulating layer IIL, and an organic insulating layer OIL. The thin film transistor TFT may include a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE. The inorganic insulating layer IIL may include a gate insulating layer IIL1, a first interlayer insulating layer IIL2, and a second interlayer insulating layer IIL3. For ease of explanation, Figure 3 A thin film transistor TFT is shown in FIG. 1 , and the thin film transistor TFT can be connected with the above-mentioned Figure 2 corresponds to the first transistor T1.

[0053] The semiconductor layer Act may be arranged on the substrate 100. The semiconductor layer Act may include polycrystalline silicon. In one or more embodiments, the semiconductor layer Act may include amorphous silicon, an oxide semiconductor, or an organic semiconductor. In an embodiment, the semiconductor layer Act may include a channel region and a source region and a drain region respectively on both sides (eg, opposite sides) of the channel region.

[0054] The gate insulating layer IIL1 may be disposed on the semiconductor layer Act and the substrate 100. The gate insulating layer IIL1 may include silicon oxide (SiO x )、Silicon Nitride(SiN x ), silicon oxynitride (SiO x N y )、Alumina(Al 2 O 3 ), titanium oxide (TiO 2 )、Tantalum oxide(Ta 2 O 5 )、HfO 2 ) and / or zinc oxide (ZnO x ) inorganic insulating material. Zinc oxide (ZnO x ) may include ZnO and / or ZnO 2 .

[0055] The gate electrode GE may be arranged on the gate insulating layer IIL1. For example, since the gate insulating layer IIL1 is between the semiconductor layer Act and the gate electrode GE, the insulation between the semiconductor layer Act and the gate electrode GE may be ensured. The gate electrode GE may overlap the channel region of the semiconductor layer Act. The gate electrode GE may include a low-resistance metal material. In an embodiment, the gate electrode GE may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may have a single-layer or multi-layer structure including the above conductive materials.

[0056] The first interlayer insulating layer IIL2 may be disposed on the gate electrode GE and the gate insulating layer IIL1. The first interlayer insulating layer IIL2 may include a silicon oxide (SiO x )、Silicon Nitride(SiN x ), silicon oxynitride (SiO x N y )、Alumina(Al 2 O 3 ), titanium oxide (TiO 2 )、Tantalum oxide(Ta 2 O 5 )、HfO 2 ) and / or zinc oxide (ZnO x ) of inorganic insulating materials.

[0057] The source electrode SE and the drain electrode DE may be arranged on the first interlayer insulating layer IIL2. Each of the source electrode SE and the drain electrode DE may be connected to the semiconductor layer Act through a contact hole formed in the gate insulating layer IIL1 and the first interlayer insulating layer IIL2. At least one of the source electrode SE and the drain electrode DE may include a conductive material (e.g., a conductor) including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may have a single-layer or multi-layer structure including the above conductive materials. In an embodiment, at least one of the source electrode SE and the drain electrode DE may have a multi-layer structure of Ti / Al / Ti.

[0058] The second interlayer insulating layer IIL3 may be disposed on the source electrode SE, the drain electrode DE, and the first interlayer insulating layer IIL2. The second interlayer insulating layer IIL3 may include silicon oxide (SiO x )、Silicon Nitride(SiN x ), silicon oxynitride (SiO x N y )、Alumina(Al 2 O 3 ), titanium oxide (TiO 2 )、Tantalum oxide(Ta 2 O 5 )、HfO 2 ) and / or zinc oxide (ZnO x ) of inorganic insulating materials.

[0059] The organic insulating layer OIL may be disposed on the second interlayer insulating layer IIL3. The organic insulating layer OIL may be used to substantially planarize the upper portion of the pixel circuit layer 200. For example, the organic insulating layer OIL may include an organic material such as an acryl-based material, benzocyclobutene (BCB) and / or hexamethyldisiloxane (HMDSO). Figure 3The organic insulating layer OIL is shown as a single layer, but the disclosure is not limited thereto, and various suitable modifications are possible. For example, the organic insulating layer OIL may have a multi-layer structure.

[0060] The display element layer 300 may be arranged on the pixel circuit layer 200. The display element layer 300 may include a display element 310 and a pixel defining layer 320. The display element 310 may be electrically connected to a thin film transistor TFT. For example, the display element 310 may be an organic light emitting diode having a pixel electrode 311, a counter electrode 313, and an intermediate layer 312 between the pixel electrode 311 and the counter electrode 313 and including an emission layer. The expression "the display element 310 is electrically connected to the thin film transistor TFT" may mean that the pixel electrode 311 of the organic light emitting diode is electrically connected to the thin film transistor TFT.

[0061] The pixel electrode 311 may be electrically connected to the thin film transistor TFT and may contact one of the source electrode SE and the drain electrode DE through a contact hole formed in the second interlayer insulating layer IIL3 and the organic insulating layer OIL. The pixel electrode 311 may include an indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), indium gallium oxide (IGO) and / or aluminum zinc oxide (AZO). In another embodiment, the pixel electrode 311 may include a reflective layer containing silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr) or their (e.g., any) compound or mixture. In another embodiment, the pixel electrode 311 may also include a reflective layer containing ITO, IZO, ZnO or In on and / or below the reflective layer. 2 O 3 layer.

[0062] The pixel defining layer 320 may cover the edge of the pixel electrode 311. The pixel defining layer 320 may include a pixel opening. The pixel opening may overlap the pixel electrode 311. The pixel opening may define an emission area of ​​light emitted from the display element 310. The pixel defining layer 320 may include an organic insulating material and / or an inorganic insulating material. In some embodiments, the pixel defining layer 320 may include a light blocking material.

[0063] The intermediate layer 312 may be arranged on the pixel electrode 311 and the pixel defining layer 320. The intermediate layer 312 may include a relatively low molecular weight material or a relatively high molecular weight material. When the intermediate layer 312 includes a relatively low molecular weight material, the intermediate layer 312 may have a single layer or a composite stacked structure including a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL). The intermediate layer 312 may be formed by vacuum deposition. When the intermediate layer 312 includes a relatively high molecular weight material, the intermediate layer 312 may have a structure including an HTL and an EML. In this case, the HTL may include poly (3,4-ethylenedioxythiophene) (PEDOT), and the EML may include a polymer material such as polyphenylene vinylene (PPV) and / or polyfluorene. The intermediate layer 312 may be formed by screen printing, inkjet printing, laser induced thermal imaging (LITI), etc. The intermediate layer 312 is not necessarily limited thereto and may have various suitable structures. The intermediate layer 312 may include an integral layer extending over the plurality of pixel electrodes 311 , or may include a layer patterned to correspond to the pixel electrode 311 .

[0064] The counter electrode 313 may be disposed on the intermediate layer 312 and the pixel defining layer 320. The counter electrode 313 may be integrally formed as a single body in the organic light emitting diode and may correspond to the pixel electrode 311. The counter electrode 313 may include a substrate including ITO, In 2 O 3 The counter electrode 313 may include a transmissive conductive layer of Mg or IZO, and may further include a semi-transmissive layer including a metal such as Al and / or Ag. For example, the counter electrode 313 may be a semi-transmissive layer including Mg and / or Ag.

[0065] Since the display element 310 may be easily damaged by external moisture and / or oxygen, the encapsulation layer 400 may cover the display element 310 to protect the display element 310. Figure 3 As shown in , the encapsulation layer 400 may include a first layer 410 and a second layer 420 .

[0066] The first layer 410 may be arranged on the counter electrode 313. For example, the first layer 410 may cover the counter electrode 313. For example, the first layer 410 may cover the display element 310. The first layer 410 may include polysilazane. The polysilazane may be perhydropolysilazane (PHPS). In some embodiments, the first layer 410 may be a layer formed by curing (e.g., cross-linking) the polysilazane. For example, the first layer 410 may include a high molecular weight polysilazane formed by curing a low molecular weight polysilazane. For example, the unphotocured polysilazane may have a structure represented by Formula 1. However, the disclosure is not limited thereto.

[0067] Formula 1

[0068] The second layer 420 may be arranged on the first layer 410. For example, the second layer 420 may cover the first layer 410. The second layer 420 may be in direct contact with the first layer 410. For example, the second layer 420 may be in surface contact with the first layer 410. The second layer 420 may include a cured (e.g., cross-linked) product of a silicon-based vinyl monomer. For example, the second layer 420 may be a layer formed by curing a silicon-based vinyl monomer. In this specification, a silicon-based vinyl monomer refers to a monomer including a silicon-containing functional group and a vinyl group. The silicon-containing functional group may be a silane group or a siloxane group.

[0069] For example, the silicon-based vinyl monomer may include vinyl trimethyl silane, vinyl triethyl silane, vinyl trimethoxy silane, vinyl triethoxy silane, vinyl tri (2-methoxyethoxy) silane, vinyl triisopropoxy silane, vinyl tri (tert-butyl peroxy) silane, vinyl dimethyl ethoxy silane, vinyl methyl dimethoxy silane, vinyl methyl diethoxy silane, 1,1,3,3-tetramethyl-1,3-divinyl disiloxane, 2,4,6,8-tetramethyl-2,4,6,8-tetravinyl-cyclotetrasiloxane and 1,3,5-trivinyl-1,3,5-trimethylcyclotrisiloxane at least one. In some embodiments, the silicon-based vinyl monomer may be vinyl trimethyl silane. For example, vinyl trimethyl silane may have a structure represented by Formula 2. However, the disclosure is not limited thereto.

[0070] Formula 2

[0071] In some embodiments, a first preliminary layer may be formed by spraying a solution formed by dissolving polysilazane in a solvent onto the display element 310 using inkjet printing and removing the solvent. Then, the first layer 410 is formed by photocuring the first preliminary layer. A second preliminary layer may be formed by applying a solution formed by dissolving a silicon-based vinyl monomer in a solvent onto the first layer 410 using inkjet printing and removing the solvent. Then, the second layer 420 is formed by photocuring the second preliminary layer. Fine cracks existing on the surface of the first layer 410 may be removed (e.g., filled) by the silicon-based vinyl monomer used to form (or set) the second layer 420.

[0072] For example, when forming (or setting) the first layer 410, fine cracks may exist on the surface of the first layer 410 due to processes such as solvent removal and / or photocuring. Such cracks may become a path for external moisture and / or oxygen to penetrate into the interior of the display device 1. However, a portion of the silicon-based vinyl monomer used to form (or set) the second layer 420 may react with the polysilazane of the first layer 410 during the formation of the second layer 420 (as shown in reaction scheme 1). Reaction scheme 1 only shows a portion of the polysilazane that reacts with the silicon-based vinyl monomer. For example, a portion of the polysilazane of the first layer 410 may form a covalent bond with the silicon-based vinyl monomer (e.g., a portion thereof). Silicon (Si) of a portion of the polysilazane of the first layer 410 and carbon (C) of the silicon-based vinyl monomer may form a covalent bond. For example, the polysilazane of the first layer 410 may form a Si-C bond with the silicon-based vinyl monomer. Therefore, the film quality of the first layer 410 may become denser. For example, the density of the first layer 410 may be further increased. Therefore, fine cracks existing on the surface of the first layer 410 may be removed.

[0073] Reaction Scheme 1

[0074] Therefore, the encapsulation layer 400 may be thin. In some embodiments, the thickness d400 of the encapsulation layer 400 may be about 0.3 micrometers (μm) to about 1.0 μm. The thickness d400 of the encapsulation layer 400 may be the sum of the thickness d410 of the first layer 410 and the thickness d420 of the second layer 420. For example, the thickness d410 of the first layer 410 may be about 0.1 μm to about 0.4 μm, the thickness d420 of the second layer 420 may be about 0.2 μm to about 0.6 μm, and the thickness d400 of the encapsulation layer 400 may be about 0.3 μm to about 1.0 μm. In some embodiments, the thickness d410 of the first layer 410 may be about 0.1 μm to about 0.3 μm, the thickness d420 of the second layer 420 may be about 0.2 μm to about 0.4 μm, and the thickness d400 of the encapsulation layer 400 may be about 0.3 μm to about 0.7 μm. For example, the thickness d410 of the first layer 410 may be about 0.15 μm, the thickness d420 of the second layer 420 may be about 0.22 μm, and the thickness d400 of the encapsulation layer 400 may be about 0.37 μm.

[0075] In some embodiments, when the thickness d400 of the encapsulation layer 400 is less than the above value (e.g., less than about 0.3 μm), the thickness d400 of the encapsulation layer 400 may not be sufficient to block or reduce external moisture and / or oxygen. In some embodiments, when the thickness d400 of the encapsulation layer 400 is greater than the above value (e.g., greater than about 1.0 μm), the flexibility of the encapsulation layer 400 may be reduced, making it difficult to fold or bend the display device 1. In addition, when the thickness d400 of the encapsulation layer 400 is greater than the above value (e.g., greater than about 1.0 μm), the thickness of the display device 1 may be increased, and thus, the aesthetics of the display device 1 may be reduced.

[0076] although Figure 3 The encapsulation layer 400 is shown to include only the first layer 410 and the second layer 420 , but the disclosure is not limited thereto. For example, the encapsulation layer 400 may further include a third layer 430 .

[0077] Figure 4 2 is a cross-sectional view schematically showing a display device 2 according to another embodiment. Figures 1 to 3 The display device 1 described is similar, so the main description is the same as above with reference to Figures 1 to 3 The differences in the display device 1 are described.

[0078] like Figure 4 As shown in FIG. 4 , the encapsulation layer 400 may include a first layer 410, a second layer 420, and a third layer 430. Figure 3 The encapsulation layer 400 included in the display device 1 described in the embodiment may include a first layer 410 and a second layer 420. The encapsulation layer 400 included in the display device 2 according to the present embodiment also includes a first layer 410 and a second layer 420. However, in the display device 2 according to the present embodiment, the encapsulation layer 400 may further include a third layer 430. The third layer 430 may be arranged on the second layer 420. For example, the third layer 430 may cover the second layer 420. The third layer 430 may contact the first layer 410 (for example, contact the first layer 410) at its edge located outside the display area DA so that the second layer 420 is not exposed to the outside.

[0079] The encapsulation layer 400 included in the display device 2 according to the present embodiment may also be thin. In some embodiments, the thickness of the first layer 410 may be about 0.1 μm to about 0.4 μm, the thickness of the second layer 420 may be about 0.2 μm to about 0.6 μm, and the thickness of the third layer 430 may be about 0.1 μm to about 0.4 μm. In some embodiments, the thickness of the first layer 410 may be about 0.1 μm to about 0.3 μm, the thickness of the second layer 420 may be about 0.2 μm to about 0.4 μm, and the thickness of the third layer 430 may be about 0.1 μm to about 0.3 μm. For example, the thickness of the first layer 410 may be about 0.15 μm, the thickness of the second layer 420 may be about 0.22 μm, and the thickness of the third layer 430 may be about 0.16 μm. Therefore, because the encapsulation layer 400 of the display device 2 is also flexible, the folding or bending of the display device 2 can be facilitated.

[0080] In an embodiment, the third layer 430 may include polysilazane. The polysilazane may be perhydropolysilazane (PHPS). However, the disclosure is not limited thereto. In another embodiment, the third layer 430 may include silicon oxide (SiO x )、Silicon Nitride(SiN x ) and silicon oxynitride (SiO x N y Since the encapsulation layer 400 of the display device 2 according to the present embodiment further includes the third layer 430, external moisture and / or oxygen may be more effectively blocked.

[0081] Figure 5 2 is a cross-sectional view schematically showing a display device 3 according to a comparative example. Since the display device 3 according to the comparative example is similar to the display device 1 according to the embodiment, the difference from the display device 1 according to the embodiment will be mainly described.

[0082] like Figure 5 As shown in FIG. 1 , the display device 3 according to the comparative example may include a substrate 100, a pixel circuit layer 200, and a display element layer 300. However, the encapsulation layer 400′ included in the display device 3 may include a first layer 410′, a second layer 420′, and a third layer 430′. The first layer 410′ may cover the counter electrode 313, and may include silicon oxide (SiO x )、Silicon Nitride(SiN x ) and / or silicon oxynitride (SiO x N yThe second layer 420' may be disposed on the first layer 410' and may include at least one material selected from polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, polyarylate, and hexamethyldisiloxane. The third layer 430' may be disposed on the second layer 420' and may include silicon oxide (SiO x )、Silicon Nitride(SiN x ) and / or silicon oxynitride (SiO x N y ). Even when cracks are generated in the first layer 410' and the third layer 430', the second layer 420' can prevent or reduce the cracks generated in the first layer 410' from being connected to the cracks generated in the third layer 430'. For example, the second layer 420' can prevent or reduce such cracks from being connected to each other between the first layer 410' and the second layer 420' or between the second layer 420' and the third layer 430'.

[0083] The thickness of the encapsulation layer 400' included in the display device 3 may be about 10 μm. The thickness of the encapsulation layer 400' may be the sum of the thickness of the first layer 410', the thickness of the second layer 420', and the thickness of the third layer 430'. For example, the thickness of the first layer 410' may be about 1.3 μm, the thickness of the second layer 420' may be about 8 μm, and the thickness of the third layer 430' may be about 0.7 μm. When the thickness of the first layer 410', the thickness of the second layer 420', and the thickness of the third layer 430' are less than corresponding values, the encapsulation layer 400' may not be thick enough to block or reduce external moisture and / or oxygen.

[0084] Table 1 shows the thickness and water vapor transmission rate (WVTR) of the encapsulation layer of the comparative example and the example. The unit of thickness is μm, and the unit of WVTR is g / m 2 · days. Comparative Example 1 includes Figure 5 The encapsulation layer 400' shown in FIG. 1 includes a first layer 410', a second layer 420' and a third layer 430', and the comparative example 2 includes an encapsulation layer that does not include the second layer 420 and the third layer 430. That is, the comparative example 2 includes Figure 4 The encapsulation layer 400 shown in FIG. 4 includes only the first layer 410 but not the second layer 420 and the third layer 430. Example 1 includes Figure 3 The encapsulation layer 400 shown in FIG. 1 includes a first layer 410 and a second layer 420, and Example 2 includes Figure 4 The encapsulation layer 400 shown in FIG. 4 includes a first layer 410 , a second layer 420 and a third layer 430 .

[0085] Table 1

[0086] Referring to Table 1, the thickness of the encapsulation layer 400' of Comparative Example 1 is 10 μm. Specifically, the thickness of the first layer 410' of Comparative Example 1 is 1.3 μm, the thickness of the second layer 420' of Comparative Example 1 is 8 μm, and the thickness of the third layer 430' of Comparative Example 1 is 0.7 μm. The encapsulation layer 400' of Comparative Example 1 has a thickness of less than 10 μm. -4 g / m 2 That is, the encapsulation layer 400 ′ of Comparative Example 1 can block or reduce external moisture and / or oxygen, and is relatively thick.

[0087] The thickness of the encapsulation layer of Comparative Example 2 is 0.1541 μm. Specifically, the thickness of the first layer 410 of Comparative Example 2 is 0.1541 μm. The encapsulation layer of Comparative Example 2 has a thickness greater than 1.3×10 -1 g / m 2 That is, the encapsulation layer of Comparative Example 2 is relatively thin, but cannot sufficiently block or reduce external moisture and / or oxygen.

[0088] The thickness of the encapsulation layer 400 of Example 2 is 0.5329 μm. Specifically, the thickness of the first layer 410 of Example 2 is 0.1541 μm, the thickness of the second layer 420 of Example 2 is 0.2215 μm, and the thickness of the third layer 430 of Example 2 is 0.1573 μm. The encapsulation layer 400 of Example 2 is thinner than the encapsulation layer 400 'of Comparative Example 1. The encapsulation layer 400 of Example 2 has a thickness of less than 10 -4 g / m 2 · days WVTR. That is, the encapsulation layer 400 of Example 2 is thinner than the encapsulation layer 400' of Comparative Example 1, and is capable of sufficiently blocking or reducing external moisture and / or oxygen. Therefore, when the encapsulation layer 400 includes the first layer 410, the second layer 420, and the third layer 430, the encapsulation layer 400 can sufficiently block external moisture and oxygen and is also flexible. Therefore, the folding or bending of the display device 2 can be facilitated (e.g., achieved).

[0089] The thickness of the encapsulation layer 400 of Example 1 is 0.3756 μm. Specifically, the thickness of the first layer 410 of Example 1 is 0.1541 μm, and the thickness of the second layer 420 of Example 1 is 0.2215 μm. Compared with the encapsulation layer 400 of Example 2, the encapsulation layer 400 of Example 1 does not include the third layer 430, so the encapsulation layer 400 of Example 1 is thinner than the encapsulation layer 400 'of the comparative example 1 and the encapsulation layer 400 of Example 2. The encapsulation layer 400 of Example 1 has a thickness of less than 10 -4 g / m 2· days WVTR. That is, the encapsulation layer 400 of Example 1 is much thinner than the encapsulation layer 400' of Comparative Example 1, and is able to sufficiently block or reduce external moisture and / or oxygen. Therefore, even when the encapsulation layer 400 includes only the first layer 410 and the second layer 420, the encapsulation layer 400 sufficiently blocks external moisture and oxygen and is flexible. Therefore, the folding or bending of the display device 1 can be facilitated (e.g., achieved).

[0090] The display device has been described above, but the disclosure is not limited thereto. It will be noted that a method of manufacturing a display device also falls within the scope of the disclosure. Hereinafter, a method of manufacturing a display device will be described.

[0091] Figures 6 to 10 is a schematic diagram showing the manufacturing Figure 3 1 is a cross-sectional view of a process of a portion of the display device 1. For example, Figures 6 to 10 is a schematic diagram showing the manufacturing Figure 3 4 is a cross-sectional view of a process of forming an encapsulation layer 400 of a display device 1. Figures 6 to 10 For the sake of convenience, based on Figure 3 The display device 1 is along Figure 1 The process of manufacturing the encapsulation layer 400 is described by referring to the cross section taken along the line II'. Figures 6 to 10 When describing the process of manufacturing the encapsulation layer 400, Figures 1 to 3 The same reference numerals in the figure denote the same components, and thus their redundant descriptions will be omitted (not repeated). Here, listing the processes in a particular order should not necessarily mean that the invention or claims require that particular order. That is, unless the steps, tasks, or actions of a process (e.g., a method claim) actually recite an order, the steps, tasks, or actions should not be interpreted as requiring that order.

[0092] First, if Figure 6As shown in , a display element 310 may be formed on a substrate 100. A pixel circuit layer 200 may be arranged on the substrate 100. For example, before forming the display element 310 on the substrate 100, a semiconductor layer Act may be formed on the substrate 100, a gate insulating layer IIL1 may be formed on the semiconductor layer Act, and a gate electrode GE may be formed on the gate insulating layer IIL1. A first interlayer insulating layer IIL2 may be formed on the gate electrode GE, and a source electrode SE and a drain electrode DE may be formed on the first interlayer insulating layer IIL2. A second interlayer insulating layer IIL3 may be formed on the source electrode SE and the drain electrode DE, and an organic insulating layer OIL may be formed on the second interlayer insulating layer IIL3. A pixel electrode 311 may be formed on the organic insulating layer OIL, and a pixel defining layer 320 having a pixel opening may be formed to cover the edge of the pixel electrode 311. An intermediate layer 312 may be formed on the pixel electrode 311 and the pixel defining layer 320, and a counter electrode 313 may be formed on the intermediate layer 312 and the pixel defining layer 320. For example, the display element 310 may be formed on the substrate 100 , and the display element 310 may include a pixel electrode 311 , an intermediate layer 312 , and a counter electrode 313 .

[0093] In other words, before forming the display element 310 on the substrate 100, the above-referenced Figure 3 The pixel circuit layer 200 described above. For example, a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE included in a thin film transistor TFT may be formed on a substrate 100. A gate insulating layer IIL1 may be formed between the semiconductor layer Act and the gate electrode GE, and a first interlayer insulating layer IIL2 may be formed between the gate electrode GE and the source electrode SE and the drain electrode DE. A second interlayer insulating layer IIL3 may be formed on the thin film transistor TFT, and an organic insulating layer OIL may be formed on the second interlayer insulating layer IIL3. A display element 310 may be formed on the organic insulating layer OIL. Because the formation of the pixel circuit layer 200, the pixel defining layer 320, and the display element 310 is common when manufacturing a display device, a detailed description thereof is omitted (not repeated).

[0094] like Figure 7As shown in , a first preliminary layer P410 may be formed to cover the display element 310. For example, the first preliminary layer P410 may be formed by coating a material (including polysilazane) for forming (or setting) the first layer to cover the display element 310. For example, the material for forming (or setting) the first layer may be sprayed onto the display element 310 by inkjet printing. The material for forming (or setting) the first layer may include polysilazane. The material for forming (or setting) the first layer may be a solution prepared by mixing polysilazane with a first solvent. The first solvent may be removed by drying the material for forming (or setting) the first layer sprayed onto the display element 310, and thus, the first preliminary layer P410 may be formed to cover the display element 310.

[0095] The polysilazane may be PHPS. The first solvent may include at least one of xylene, toluene, ethylbenzene, diethylbenzene, mesitylene, propylbenzene, cyclohexylbenzene, dimethoxybenzene, anisole, ethoxytoluene, phenoxytoluene, isopropylbiphenyl, dimethylanisole, propylanisole, 1-ethylnaphthalene, 2-ethylnaphthalene, 2-ethylbiphenyl and octylbenzene. However, the disclosure is not limited thereto. In some embodiments, the material for forming (or providing) the first layer may further include a photocuring agent. As long as the photocuring agent photocures the polysilazane, the photocuring agent may be included, and the photocuring agent is not particularly limited. For example, the material for forming (or providing) the first layer may be a solution in which the polysilazane and the photocuring agent are dissolved in the first solvent. In another embodiment, the first preparatory layer P410 may be formed by slit coating or spin coating.

[0096] like Figure 8 As shown in FIG. 1 , the first layer 410 can be formed by emitting ultraviolet light to the first preliminary layer P410. For example, the first layer 410 can be a photocured first preliminary layer P410. For example, a UV light having a curing rate of about 1000 mJ / cm 2 About 3000mJ / cm 2 Ultraviolet light with a light intensity of about 2000 mJ / cm 2 Ultraviolet light with a light intensity of about 100 nm is emitted to the first preliminary layer P410. Ultraviolet light with a wavelength of about 300 nm to about 400 nm may be used for photocuring. A light emitting diode (LED) or a metal halide may be used as an ultraviolet light source. When ultraviolet light is emitted to the first preliminary layer P410, the first preliminary layer P410 may be photocured. In the case where the first layer 410 is formed (or provided) by curing polysilazane, it is similar to forming (or providing) a silicon oxide (SiO x )、Silicon Nitride(SiN x ) and / or silicon oxynitride (SiO x Ny ) can reduce process time and manufacturing cost compared with inorganic insulating layers.

[0097] like Fig. 9 As shown in , a second preliminary layer P420 can be formed on the first layer 410. For example, the second preliminary layer P420 can be formed by applying a material (including a silicon-based vinyl monomer) for forming (or setting) the second layer to the first layer 410. For example, the material for forming (or setting) the second layer can be sprayed onto the first layer 410 by inkjet printing. The material for forming (or setting) the second layer can include a silicon-based vinyl monomer. The material for forming (or setting) the second layer can be a solution prepared by mixing a silicon-based vinyl monomer with a second solvent. The second solvent can be removed by drying the material for forming (or setting) the second layer sprayed onto the first layer 410, and thus, the second preliminary layer P420 can be formed on the first layer 410.

[0098] Silicon-based vinyl monomers may include vinyl trimethyl silane, vinyl triethyl silane, vinyl trimethoxy silane, vinyl triethoxy silane, vinyl tri(2-methoxyethoxy) silane, vinyl triisopropoxy silane, vinyl tri(tert-butylperoxy) silane, vinyl dimethyl ethoxy silane, vinyl methyl dimethoxy silane, vinyl methyl diethoxy silane, 1,1,3,3-tetramethyl-1,3-divinyl disiloxane, 2,4,6,8-tetramethyl-2,4,6,8-tetravinyl-cyclotetrasiloxane and 1,3,5-trivinyl-1,3,5-trimethylcyclotrisiloxane at least one. In some embodiments, the silicon-based vinyl monomer may be vinyl trimethyl silane. However, the disclosure is not limited thereto.

[0099] The second solvent may include at least one of xylene, toluene, ethylbenzene, diethylbenzene, mesitylene, propylbenzene, cyclohexylbenzene, dimethoxybenzene, anisole, ethoxytoluene, phenoxytoluene, isopropylbiphenyl, dimethylanisole, propylanisole, 2-ethylnaphthalene, 1-ethylnaphthalene, 2-ethylbiphenyl and octylbenzene. However, the disclosure is not limited thereto. In some embodiments, the material for forming (or setting) the second layer may further include a photocuring agent. As long as the photocuring agent photocures the silicon-based vinyl monomer, the photocuring agent may be included, and the photocuring agent is not particularly limited. For example, the material for forming (or setting) the second layer may be a solution in which the silicon-based vinyl monomer and the photocuring agent are dissolved in the second solvent. In another embodiment, the second preparatory layer P420 may be formed by slit coating or spin coating.

[0100] like Fig.10As shown in FIG. 4 , the second layer 420 can be formed by emitting ultraviolet light to the second preliminary layer P420. For example, the second layer 420 can be a photocured second preliminary layer P420. For example, a photocured second preliminary layer P420 having an ultraviolet light of about 1000 mJ / cm 2 About 3000mJ / cm 2 Ultraviolet light with a light intensity of about 2000 mJ / cm 2 Ultraviolet light with a light intensity of about 100 nm to about 100 nm is emitted to the second preliminary layer P420. Ultraviolet light with a wavelength of about 300 nm to about 400 nm can be used for photocuring. LED or metal halide can be used as an ultraviolet light source. When ultraviolet light is emitted to the second preliminary layer P420, the second preliminary layer P420 can be photocured.

[0101] The encapsulation layer 400 including the first layer 410 and the second layer 420 may be thin. For example, the thickness of the encapsulation layer 400, which is the sum of the thickness of the first layer 410 and the thickness of the second layer 420, may be about 0.3 μm to about 1.0 μm. Figure 3 The thickness of the encapsulation layer 400 including the first layer 410 and the second layer 420 is described, and thus a redundant description thereof is omitted (not repeated).

[0102] In some embodiments, a portion of the silicon-based vinyl monomer used to form (or set) the second layer 420 may react with the polysilazane of the first layer 410 during the formation of the second layer 420 (as shown in the reaction scheme 1 above). For example, a portion of the polysilazane of the first layer 410 may form a covalent bond with the silicon-based vinyl monomer. Silicon (Si) of a portion of the polysilazane of the first layer 410 and carbon (C) of the silicon-based vinyl monomer may form a covalent bond. For example, the polysilazane of the first layer 410 may form a Si-C bond with the silicon-based vinyl monomer. For example, when the material for forming (or setting) the second layer is sprayed onto the first layer 410 by inkjet printing, a portion of the material for forming (or setting) the second layer may contact the surface of the first layer 410. In one or more embodiments, another portion of the material for forming (or setting) the second layer may also penetrate into the first layer 410. The silicon-based vinyl monomer included in a portion of the material for forming (or providing) the second layer or another portion of the material for forming (or providing) the second layer may react with the polysilazane of the first layer 410 due to a certain amount of heat generated when emitting ultraviolet light (as shown in Reaction Scheme 1). Therefore, the film quality of the first layer 410 may become denser. For example, the density of the first layer 410 may be further increased. Therefore, fine cracks existing on the surface of the first layer 410 may be removed.

[0103] Fig.11 and Fig.12 is a schematic diagram showing the manufacturing Figure 4 2 is a cross-sectional view of a process of a portion of the display device 2. For example, Fig.11 and Fig.12 is a schematic diagram showing the manufacturing Figure 4 FIG. 2 is a cross-sectional view of a portion of a process of forming an encapsulation layer 400 of a display device 2. Fig.11 and Fig.12 For the sake of convenience, based on Figure 4 The display device 2 is along Figure 1 The section taken along the line II' of FIG. 1 is used to describe a part of the process of manufacturing the encapsulation layer 400. Because the process of manufacturing a part of the display device 2 according to the present embodiment is similar to the process described above with reference to FIG. Figures 6 to 10 The process of manufacturing a portion of the display device 1 described is similar, so the main description is the same as above with reference to Figures 6 to 10 The differences in the process of manufacturing the display device 1 are described. Fig.11 and Fig.12 Because Figure 4 and Figures 6 to 10 The same reference numerals as those in the drawings denote the same components, and thus a redundant description thereof is omitted (not repeated).

[0104] Refer to above Figures 6 to 10 In the case of manufacturing a portion of the display device 1 described above, a display element 310 may be formed on a substrate 100, and a first preliminary layer P410 may be formed to cover the display element 310. The first layer 410 may be formed by emitting ultraviolet light to the first preliminary layer P410. A second preliminary layer P420 may be formed on the first layer 410. The second layer 420 may be formed by emitting ultraviolet light to the second preliminary layer P420. In the case of manufacturing a portion of the display device 2, a display element 310 may be formed on a substrate 100, and a first preliminary layer P410 may be formed to cover the display element 310. The first layer 410 may be formed by emitting ultraviolet light to the first preliminary layer P410. The second preliminary layer P420 may be formed on the first layer 410. The second layer 420 may be formed by emitting ultraviolet light to the second preliminary layer P420.

[0105] After forming the second layer 420, as Fig.11As shown in , a third preliminary layer P430 may be formed to cover the second layer 420. For example, the third preliminary layer P430 may be formed by coating a material (including polysilazane) for forming (or setting) the third layer to cover the second layer 420. For example, the material for forming (or setting) the third layer may be sprayed onto the second layer 420 by inkjet printing. The material for forming (or setting) the third layer may include polysilazane. The material for forming (or setting) the third layer may be a solution prepared by mixing polysilazane with a third solvent. The third solvent may be removed by drying the material for forming (or setting) the third layer sprayed onto the second layer 420, and thus, the third preliminary layer P430 may be formed on the second layer 420.

[0106] The polysilazane may be PHPS. The third solvent may include at least one of xylene, toluene, ethylbenzene, diethylbenzene, mesitylene, propylbenzene, cyclohexylbenzene, dimethoxybenzene, anisole, ethoxytoluene, phenoxytoluene, isopropylbiphenyl, dimethylanisole, propylanisole, 1-ethylnaphthalene, 2-ethylnaphthalene, 2-ethylbiphenyl and octylbenzene. However, the disclosure is not limited thereto. In some embodiments, the material for forming (or setting) the third layer may further include a photocuring agent. As long as the photocuring agent is used to photocure the polysilazane, the photocuring agent may be included, and the photocuring agent is not particularly limited. For example, the material for forming (or setting) the third layer may be a solution in which the polysilazane and the photocuring agent are dissolved in the third solvent. In another embodiment, the third preparatory layer P430 may be formed by slit coating or spin coating.

[0107] like Fig.12 As shown in FIG. 4 , the third layer 430 can be formed by emitting ultraviolet light to the third preliminary layer P430. For example, the third layer 430 can be a photocured third preliminary layer P430. For example, a photocured third preliminary layer P430 having a UV radiation of about 1000 mJ / cm 2 About 3000mJ / cm 2 Ultraviolet light with a light intensity of about 2000 mJ / cm 2 The ultraviolet light with a light intensity of about 100 nm is emitted to the third preliminary layer P430. The ultraviolet light with a wavelength of about 300 nm to about 400 nm can be used for photocuring. LED or metal halide can be used as the ultraviolet light source. When the ultraviolet light is emitted to the third preliminary layer P430, the third preliminary layer P430 can be photocured. In the case where the third layer 430 is formed (or arranged) by curing polysilazane, it is similar to the case where a silicon oxide (SiO x )、Silicon Nitride(SiN x ) and / or silicon oxynitride (SiO x N y) can reduce process time and manufacturing cost compared with inorganic insulating layers.

[0108] The encapsulation layer 400 including the first layer 410, the second layer 420 and the third layer 430 may be thin. Figure 4 The thickness of the encapsulation layer 400 including the first layer 410 , the second layer 420 , and the third layer 430 is described, and thus a redundant description thereof is omitted (not repeated).

[0109] According to one or more embodiments, an encapsulation layer that is thin and capable of blocking external moisture and / or oxygen, a display device including the encapsulation layer, and a method of manufacturing the display device may be realized. The scope of the disclosure is not limited in this regard.

[0110] When describing embodiments of the present disclosure, the use of “may” refers to “one or more embodiments of the present disclosure.”

[0111] As used herein, the terms "substantially", "about", and similar terms are used as approximate terms rather than terms of degree, and are intended to account for the inherent deviations in measured or calculated values ​​that one of ordinary skill in the art would recognize. As used herein, "about" or "approximately" includes the stated value and means within an acceptable range of deviation for a particular value determined by one of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0112] Any numerical range described herein is intended to include all sub-ranges of the same numerical precision contained within the range. For example, the range of "1.0 to 10.0" is intended to include all sub-ranges between the minimum value 1.0 and the maximum value 10.0 (and including the minimum value 1.0 and the maximum value 10.0), that is, a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, such as 2.4 to 7.6. Any maximum numerical limit described herein is intended to include all lower numerical limits contained therein, and any minimum numerical limit described in this specification is intended to include all higher numerical limits contained therein. Therefore, the applicant reserves the right to modify this specification (including claims) to explicitly state any sub-ranges contained within the explicitly stated range herein.

[0113] The electronic device, display device and / or any other related device or component according to the embodiments of the present invention described herein can be implemented using any suitable hardware, firmware (e.g., a dedicated integrated circuit), software, or a combination of software, firmware and hardware. For example, the various components of the device can be formed on an integrated circuit (IC) chip or on a separate IC chip. In addition, the various components of the device can be implemented on a flexible printed circuit film, a tape carrier package (TCP), a printed circuit board (PCB), or formed on a substrate. In addition, the various components of the device can be processes or threads running on one or more processors in one or more computing devices, executing computer program instructions and interacting with other system components to perform the various functions described here. The computer program instructions are stored in a memory, which can be implemented in a computing device using a standard memory device (such as, for example, a random access memory (RAM)). The computer program instructions can also be stored in other non-temporary computer-readable media (such as, for example, a CD-ROM, a flash drive, etc.). In addition, it should be recognized by those skilled in the art that, without departing from the scope of the embodiments of the present disclosure, the functions of various computing devices can be combined or integrated into a single computing device, or the functions of a specific computing device can be distributed across one or more other computing devices.

[0114] It should be understood that the embodiments described herein should be considered to be descriptive only and not for limiting purposes. The description of features or aspects within each embodiment should generally be considered to be applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those of ordinary skill in the art that one or more suitable changes in form and detail may be made therein without departing from the spirit and scope as defined by the claims and their equivalents.

Claims

1. An encapsulation layer, comprising: A first layer including polysilazane; as well as The second layer is on the first layer and includes a cured product of a silicon-based vinyl monomer.

2. The encapsulation layer according to claim 1, wherein: The polysilazane includes perhydropolysilazane.

3. The encapsulation layer according to claim 1, wherein: The silicon-based vinyl monomer includes at least one of vinyltrimethylsilane, vinyltriethylsilane, vinyltrimethoxysilane, vinyltriethoxysilane, vinyltri(2-methoxyethoxy)silane, vinyltriisopropoxysilane, vinyltri(tert-butylperoxy)silane, vinyldimethylethoxysilane, vinylmethyldimethoxysilane, vinylmethyldiethoxysilane, 1,1,3,3-tetramethyl-1,3-divinyldisiloxane, 2,4,6,8-tetramethyl-2,4,6,8-tetravinyl-cyclotetrasiloxane and 1,3,5-trivinyl-1,3,5-trimethylcyclotrisiloxane.

4. The encapsulation layer according to claim 1, wherein: A portion of the polysilazane of the first layer forms a covalent bond with the silicon-based vinyl monomer.

5. The encapsulation layer according to claim 1, wherein: The second layer is in direct contact with the first layer.

6. The encapsulation layer according to claim 1, wherein: The encapsulation layer has a thickness of 0.3 μm to 1.0 μm. 7 . The encapsulation layer according to claim 1 , further comprising a third layer on the second layer and comprising polysilazane.

8. A display device, comprising: substrate; a display element on the substrate; as well as An encapsulation layer, covering the display element, the encapsulation layer comprising: A first layer including polysilazane; as well as The second layer is on the first layer and includes a cured product of a silicon-based vinyl monomer.

9. The display device according to claim 8, wherein: The polysilazane includes perhydropolysilazane.

10. The display device according to claim 8, wherein: The silicon-based vinyl monomer includes at least one of vinyltrimethylsilane, vinyltriethylsilane, vinyltrimethoxysilane, vinyltriethoxysilane, vinyltri(2-methoxyethoxy)silane, vinyltriisopropoxysilane, vinyltri(tert-butylperoxy)silane, vinyldimethylethoxysilane, vinylmethyldimethoxysilane, vinylmethyldiethoxysilane, 1,1,3,3-tetramethyl-1,3-divinyldisiloxane, 2,4,6,8-tetramethyl-2,4,6,8-tetravinyl-cyclotetrasiloxane and 1,3,5-trivinyl-1,3,5-trimethylcyclotrisiloxane.

11. The display device according to claim 8, wherein: A portion of the polysilazane of the first layer forms a covalent bond with the silicon-based vinyl monomer.

12. The display device according to claim 8, wherein: The second layer is in direct contact with the first layer.

13. The display device according to claim 8, wherein: The encapsulation layer has a thickness of 0.3 μm to 1.0 μm.

14. The display device according to claim 8, wherein: The encapsulation layer further includes a third layer on the second layer, the third layer including at least one of polysilazane, silicon nitride, silicon oxide, and silicon oxynitride.

15. A method for manufacturing a display device, the method comprising the following steps: forming a display element on a substrate; forming a first preliminary layer by coating a material including polysilazane to cover the display element; forming a first layer by emitting ultraviolet light to the first preliminary layer; forming a second preliminary layer by coating a material including a silicon-based vinyl monomer on the first layer; as well as The second layer is formed by emitting ultraviolet light to the second preliminary layer.

16. The method according to claim 15, wherein: The polysilazane includes perhydropolysilazane.

17. The method according to claim 15, wherein: The silicon-based vinyl monomer includes at least one of vinyltrimethylsilane, vinyltriethylsilane, vinyltrimethoxysilane, vinyltriethoxysilane, vinyltri(2-methoxyethoxy)silane, vinyltriisopropoxysilane, vinyltri(tert-butylperoxy)silane, vinyldimethylethoxysilane, vinylmethyldimethoxysilane, vinylmethyldiethoxysilane, 1,1,3,3-tetramethyl-1,3-divinyldisiloxane, 2,4,6,8-tetramethyl-2,4,6,8-tetravinyl-cyclotetrasiloxane and 1,3,5-trivinyl-1,3,5-trimethylcyclotrisiloxane.

18. The method according to claim 15, wherein: In the step of forming the second layer, a portion of the polysilazane of the first layer forms a covalent bond with the silicon-based vinyl monomer.

19. The method according to claim 15, wherein: The sum of the thickness of the first layer and the thickness of the second layer is 0.3 μm to 1.0 μm.

20. The method according to claim 15, further comprising the steps of: forming a third preliminary layer by coating a material including polysilazane to cover the second layer; as well as The third layer is formed by emitting ultraviolet light to the third preliminary layer.

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