Method for forming silicon carbide layer

Abstract

The invention relates to a method of forming respective silicon carbide layers (20) on a plurality of silicon substrates, the method comprising in sequence:-placing a plurality of vertically stacked silicon base substrates (10) in a furnace, with a vertical gap between two adjacent base substrates (10); introducing a carbonaceous gas stream into the furnace; raising the temperature to a temperature (TF) at which the silicon carbide layers (20) are formed so as to simultaneously form a silicon carbide layer (20) on the surface of each base substrate (10) and a carbon layer (30) on each silicon carbide layer (20) by reaction of the carbon-containing gas with silicon; and removing each carbon layer (30).

Description

Technical Field

[0001] The present invention relates to a method of manufacturing a semiconductor-on-insulator or piezoelectric-on-insulator substrate for radio frequency applications. Background Art

[0002] Radio frequency (RF) devices, which process signals with frequencies between about 10 MHz and 300 GHz, are particularly useful in the telecommunications field.

[0003] Such a device may be formed from a semiconductor-on-insulator or piezoelectric-on-insulator substrate, comprising, in sequence, a base substrate, a charge trapping layer (referred to as a trap-rich layer), a dielectric layer on the trap-rich layer, and a semiconductor or piezoelectric active layer on the dielectric layer. Active and / or passive components are formed in and / or on the active layer.

[0004] The trap-rich layer prevents the appearance of a conductive plane beneath the electrically insulating layer and a decrease in the resistivity of the underlying substrate. In addition, such a layer eliminates charge carriers in the substrate that could generate harmonics that tend to interfere with signals propagating in radio frequency devices and degrade their quality.

[0005] The trap-rich layer can be made of silicon carbide (SiC). The formation of this layer is usually performed by epitaxy on a base substrate in order to obtain the crystal quality required for effective harmonic suppression in RF components. This step is followed by chemical mechanical polishing (CMP) in order to obtain a uniform thickness and a sufficiently smooth surface of the silicon carbide layer.

[0006] Epitaxial deposition of sufficiently thick SiC layers is slow and therefore expensive. Furthermore, epitaxy chambers receive a single substrate or a reduced number of substrates.

[0007] Furthermore, during the epitaxy process, the base substrate is heated via its backside. This technology does not allow precise control of the temperature of the front side. This can lead to the disappearance of the deposited silicon carbide layer if the front side temperature is too high. Summary of the invention

[0008] It is an object of the present invention to devise a method for producing a SiC layer on a silicon substrate, in particular a method for forming a substrate for radio frequency applications, which method is faster and cheaper than known methods.

[0009] To this end, the present invention proposes a method for forming a silicon carbide layer on a silicon substrate, the method sequentially comprising:

[0010] ● Place the silicon base substrate in the furnace,

[0011] - introducing a mixed stream of carbon-containing gases into the furnace,

[0012] • raising to a temperature for forming a silicon carbide layer so as to form a silicon carbide layer on the base substrate and a carbon layer on the silicon carbide layer by reaction of propane with silicon,

[0013] ●Remove each carbon layer.

[0014] Preferably, the carbon-containing gas is propane or acetylene.

[0015] Advantageously, the carrier gas is argon or a mixture of argon and hydrogen.

[0016] Advantageously, the temperature for forming the silicon carbide layer is between 750°C and 1100°C.

[0017] Typically, the temperature used to remove the carbon layer is between 600°C and 950°C.

[0018] Preferably, the silicon substrate has a resistivity greater than 500 ohm.cm.

[0019] Advantageously, the thickness of the silicon carbide layer is between 2 nm and 5 nm.

[0020] Advantageously, prior to introducing the propane stream, the method further comprises:

[0021] - heating the furnace to a temperature for decomposing native silicon oxide,

[0022] - removing the native silicon oxide layer from the base substrate by thermally decomposing the oxide, and

[0023] - Cooling the furnace to the temperature for introducing the propane stream.

[0024] Advantageously, a plurality of vertically stacked base substrates are placed in a furnace with a vertical space formed between two adjacent base substrates, so as to simultaneously form a silicon carbide layer and a carbon layer on a surface of each of the base substrates.

[0025] Preferably, the formation of the silicon carbide layer and the removal of the carbon layer are performed in the same furnace.

[0026] In certain embodiments, the removal of the carbon layer is performed by introducing a stream of oxygen into the furnace and reacting the carbon layer with the stream of oxygen.

[0027] In other embodiments, the removal of the carbon layer is performed by an oxygen plasma etching process.

[0028] The present invention also relates to a method for manufacturing a semiconductor-on-insulator or piezoelectric-on-insulator substrate for radio frequency applications, the method comprising the following steps:

[0029] ● forming a silicon carbide layer on a silicon substrate as described above to form a carrier substrate,

[0030] ● The weakened zone is formed by implanting atomic species in a donor substrate made of semiconductor or piezoelectric material,

[0031] bonding the donor substrate to the front side of a carrier substrate, with a dielectric layer arranged between the silicon carbide layer and the donor substrate,

[0032] • Separating the donor substrate along the weakened area in order to transfer the layer of semiconductor or piezoelectric material to the carrier substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Other features and advantages of the present invention will become apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0034] Figure 1A and 1B is a schematic representation of a base substrate prior to the method according to the invention.

[0035] Figure 2 is a schematic diagram of a base substrate including a silicon carbide layer and a carbon layer.

[0036] Figure 3 is a schematic diagram of a base substrate including a silicon carbide trap-rich layer.

[0037] Figure 4 A thermal curve for the method according to the invention is shown.

[0038] FIG. 5A to FIG. 5D Steps for fabricating a semiconductor-on-insulator or piezoelectric-on-insulator substrate are shown.

[0039] Figure 6 An annealing furnace suitable for forming a silicon carbide layer on a base substrate and a carbon layer on the silicon carbide layer according to a preferred embodiment of the present invention is shown. DETAILED DESCRIPTION

[0040] Formation of silicon carbide layer:

[0041] Figure 1A A silicon base substrate 10 is shown which is intended for the manufacture of a semiconductor-on-insulator or piezoelectric-on-insulator substrate. The resistivity of such a base substrate is advantageously greater than 500 ohm.cm. The base substrate has a back side 110 and a front side 130. Typically, in its starting state, the base substrate has a native silicon oxide layer 13 on its surface.

[0042] In order to prepare the front side for the subsequent steps, the native oxide layer is first removed. This step is typically carried out in an oven at a temperature between 950° C. and 1150° C., preferably close to 1100° C., under an inert atmosphere. At the end of this step, reference Figure 1B , the substrate has a front side 120 made of silicon.

[0043] A silicon carbide layer 20 is then formed on the front side 120 of the base substrate. The silicon carbide layer is formed in a furnace described later. Advantageously, the removal of the native oxide layer is carried out in the same furnace to avoid a transfer step which results in time and energy losses for subsequent cooling and heating and the need for additional labor.

[0044] The silicon carbide layer is formed in the gas phase, i.e., carbon is present in the furnace in the form of a carbon-containing gas, such as propane (C3H8) or acetylene (C2H4) gas. The carbon-containing gas is mixed with a carrier gas, such as argon or a mixture of argon and hydrogen.

[0045] The substrate is heated in a furnace to a temperature for forming a silicon carbide layer. The carbon gas phase is converted into silicon carbide by reacting with the silicon on the substrate surface. The reaction is self-limiting, i.e. the carburization reaction stops when all the surface silicon on the front side of the base substrate is consumed. No additional silicon source is provided. The final thickness of the silicon carbide layer 20 is between 2 nm and 5 nm. At the same time, reference Figure 2 , a carbon layer 30 is formed on the silicon carbide layer 20. At the end of this step, the substrate has a front side 320 made of carbon.

[0046] Next, refer to Figure 3 , removing the carbon layer. Advantageously, this removal is performed by supplying oxygen to the front side of the base substrate.

[0047] In certain embodiments, the removal of the carbon layer is performed by introducing an oxygen flow into the furnace and reacting the carbon layer with said oxygen flow. In this case, the removal of the oxygen layer is advantageously performed in the same furnace as the deposition of the silicon carbide layer. Thus, the treatment is performed in situ and does not require any steps of cooling in another chamber or transfer to another chamber. The removal by the oxygen flow in the same furnace makes it possible to obtain a roughness of the front side 220 that is low enough for the subsequent steps to form a semiconductor-on-insulator or piezoelectric-on-insulator material substrate for radio frequency applications.

[0048] In other embodiments, the removal of the carbon layer is performed by an oxygen plasma etching process. This removal is effective; however, it requires a step of transferring the substrate to another chamber. In addition, the plasma treatment may degrade the roughness of the front side 220 of the base substrate, which involves subsequent treatment to improve the surface quality.

[0049] Figure 4 An example of a temperature profile for a process of forming a silicon carbide layer on a silicon substrate in an annealing furnace as a function of elapsed time is shown. In this case, all steps from removing the native oxide layer to removing the carbon layer are performed in the same furnace.

[0050] Eight steps of the process can be distinguished:

[0051] The first step E1 starts at time t0. The base substrate including the native oxide layer is at a temperature for introduction into a furnace, which temperature is generally lower than or equal to 500° C. The substrate is introduced into the furnace. The base substrate is initially heated to a temperature T O To remove the native oxide layer. In an illustrative and non-limiting manner, the heating may include increasing the temperature to 900°C at 5°C / min, then increasing the temperature to 1000°C at 2°C / min, and increasing the temperature to 1100°C at 1°C / min. At time t1, the temperature T for removing the native oxide is reached. O .

[0052] Temperature T for removing native oxide O Between 1000° C. and 1200° C., preferably close to 1100° C. This temperature is maintained during step E2 which generally lasts about 20 minutes until t2. The duration of this step E2 may vary depending on the thickness of the native oxide layer.

[0053] It is then cooled to a temperature T during step E3 I , to inject carbon-containing gas into the furnace at time t3. For example, cooling can be performed at a rate of 5°C / min, and the gas injection temperature T I It is about 750°C.

[0054] After the carbon-containing gas and the carrier gas are injected, the substrate is heated to a temperature T for forming a silicon carbide layer in step E4. F The temperature T for forming the silicon carbide layer 30 is F Advantageously between 750° C. and 1100° C. The nucleation of silicon carbide on the substrate surface starts during the temperature increase between t3 and t4 during step E4 and stops when the silicon on the base substrate surface has been converted into silicon carbide. When all the silicon has been consumed, the SiC formation reaction stops during the temperature increase. Next, a carbon layer is formed, which is associated with the pyrolysis of the carbon-containing gas. The temperature T is maintained during step E5. F During this step, the carbon-containing gas is discharged from the furnace under a carrier gas flow within about 10 minutes. Subsequently, still at temperature T F The silicon carbide layer is annealed, for example, for a period of 2 hours until t5.

[0055] Then cool down to temperature T R To remove the carbon layer. Temperature T R At time t6 a temperature between 600° C. and 950° C. is reached. In an illustrative and non-limiting manner, this temperature may be in the region of 800° C. In the removal step E7 , the removal temperature T ROxygen O2 is injected into the furnace. For example, for an injection of 2 to 20 slm, the duration of the removal of the carbon layer is about 5 minutes, until t7. Next, in a final step E8, the temperature is lowered in order to remove the substrate from the furnace.

[0056] Fabrication of semiconductor-on-insulator or piezoelectric-on-insulator substrates:

[0057] Base substrates including trap-rich layers made of silicon carbide can now be used to fabricate semiconductor-on-insulator or piezoelectric-on-insulator substrates for radio frequency applications.

[0058] Steps for producing such a substrate including a base substrate having a trap-rich layer produced according to the above process, a semiconductor layer on its surface, and an electrical insulating layer arranged at the interface between the trap-rich layer and the semiconductor surface layer will now be described.

[0059] refer to Figure 5A The first step is to provide a semiconductor or piezoelectric donor substrate 500 from which the semiconductor or piezoelectric layer will be transferred onto the base substrate and the trap-rich layer. An electrical insulating layer 40 is formed on the surface of the donor substrate 500.

[0060] refer to Figure 5B As schematically indicated by arrows, ion species implantation is performed using, for example, hydrogen and / or helium ions through the electrically insulating layer 40 to form a weakened zone 51 in the donor substrate 500. The weakened zone 51 defines the semiconductor or piezoelectric layer 50 to be transferred.

[0061] refer to Figure 5C , whereby the implanted donor substrate 500 is bonded to the trap-rich layer 20 on the base substrate 10 by means of the electrically insulating layer 40. The latter then becomes the buried oxide layer 40.

[0062] Alternatively, the electrical insulating layer ( 40 ) may be formed on the trap rich layer on the base substrate, and the donor substrate 50 including the weakened region 51 may be bonded to the base substrate 10 including the trap rich layer 20 and the electrical insulating layer 40 .

[0063] refer to Figure 5D , the donor substrate 500 is separated along the weakened zone 51, resulting in the semiconductor or piezoelectric layer 50 being transferred to the carrier substrate 100. An electrically insulating layer 40 is arranged between the trap-rich layer 20 and the semiconductor or piezoelectric layer 50. A finishing treatment may subsequently be performed on the transferred layer 50 in order to correct implantation-related defects and smooth the free surface of the layer 50. The semiconductor-on-insulator or piezoelectric-on-insulator structure is now complete and can be used to manufacture components for radio frequency applications.

[0064] Furnace Overview:

[0065] In order to make the method for processing multiple substrates efficient and fast, it is preferred to use an annealing furnace that can process as many substrates as possible at the same time under the same conditions. Such furnaces are generally called batch annealing furnaces in the field of microelectronics.

[0066] Figure 6 A furnace suitable for receiving a quantity of 120 to 150 substrates in the annealing chamber is shown. The substrates 10 are positioned horizontally in the furnace and stacked vertically in order to process as many substrates as possible in the same hot gas flow 73. A gap is maintained between each substrate 10 and the adjacent substrate 10 to optimize the gas flow and promote the formation of the silicon carbide layer.

[0067] This furnace uses a "top flow" configuration, that is, the gas flow is delivered to the furnace through the top 71 and, after passing through the furnace, is discharged through an outlet 79 at the bottom of the furnace. Typically, one gas flow delivers a carrier gas and a second gas flow supplies a carbon-containing gas such as propane or acetylene.

[0068] All parts of the annealing chamber within the furnace, i.e. the inner wall 75, the substrate holders for holding the substrates in a horizontal and vertical stacked position, and the gas contained in the annealing chamber, are at the same temperature during use of the furnace, except for external parts such as the outer wall 76 and the end of the gas inlet pipe. The same temperature is understood to mean that the temperature difference between the top end 74 of the furnace and the bottom end 78 of the furnace is minimal, typically a few degrees °C, for example less than 3 degrees for furnace temperatures between 800°C and 1200°C.

[0069] The substrate is heated primarily by conduction from the furnace walls. The gas flow is injected at the same temperature as the furnace interior.

[0070] Such a furnace makes it possible to process a large number of substrates simultaneously by means of a vertically stacked arrangement. Moreover, such a furnace makes it possible to carry out in the same chamber the steps of removing the native oxide layer, depositing the silicon carbide layer and removing the carbon layer, which avoids the risk of contamination during the transfer between two different chambers. The steps of transfer between different chambers suitable for the respective steps are avoided, thus avoiding cooling between the steps, the need for labour for the transfer and therefore the loss of time and efficiency.

Claims

1. A method for forming corresponding silicon carbide layers (20) on a plurality of silicon substrates, the method comprising: o placing a plurality of vertically stacked silicon base substrates (10) in a furnace, forming a vertical space between two adjacent base substrates (10), o introducing a stream of carbon-containing gas into the furnace, o is raised to a temperature (T) for forming the silicon carbide layer (20) F ), so as to simultaneously form a silicon carbide layer (20) on the surface of each base substrate (10) and a carbon layer (30) on each silicon carbide layer (20) by reaction of the carbon-containing gas with silicon, o Removing each carbon layer (30).

2. The method according to claim 1, wherein: The carbon-containing gas is propane or acetylene.

3. The method according to claim 1 or claim 2, wherein: The carbon-containing gas is mixed with argon or a mixture of argon and hydrogen.

4. The method according to any one of claims 1 to 3, wherein: The temperature (T F ) is 750℃ to 1100℃.

5. The method according to any one of claims 1 to 4, wherein: The temperature for removing the carbon layer (T R ) is 600℃ to 950℃.

6. A method according to any one of the preceding claims, wherein: The silicon substrate has a resistivity greater than 500 ohm.cm.

7. A method according to any one of the preceding claims, wherein: The thickness of the silicon carbide layer (20) is 2 nm to 5 nm.

8. The method according to any one of the preceding claims, further comprising, before introducing the carbon-containing gas stream: o The furnace is heated to a temperature (T) for decomposing native silicon oxide. O ), o removing a native silicon oxide layer (13) from the base substrate (100) by thermally decomposing the silicon oxide, and o Cool the furnace to a temperature (T) for introducing the propane stream I ).

9. A method according to any one of the preceding claims, wherein: The formation of the silicon carbide layer (20) and the removal of the carbon layer (30) are performed in the same furnace (70).

10. The method according to claim 9, wherein: The removal of the carbon layer (30) is performed by introducing an oxygen flow into the furnace and allowing the carbon layer to react with the oxygen flow.

11. The method according to any one of claims 1 to 9, wherein: The removal of the carbon layer (30) is performed by an oxygen plasma etching process.

12. A method of manufacturing a semiconductor-on-insulator or piezoelectric-on-insulator substrate for radio frequency applications, the method comprising the following steps: o forming a silicon carbide layer (20) on a silicon substrate according to any of the preceding claims to form a carrier substrate (100), o forming a weakened zone (51) by implanting atomic species in a donor substrate (500) made of a semiconductor or piezoelectric material, o bonding the donor substrate (500) to the front side of the carrier substrate (100), a dielectric layer (40) being arranged between the silicon carbide layer (20) and the donor substrate (500), o separating the donor substrate (500) along the weakened area (51) in order to transfer the layer (50) of semiconductor or piezoelectric material to the carrier substrate (100).

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