Diode structure

Abstract

The application provides a diode structure, comprising: a substrate layer body, the substrate layer body comprising oppositely arranged top and bottom surfaces; a filling groove arranged on the substrate layer body, the filling groove extending along the length direction or the width direction of the substrate layer body, and the opening of the filling groove gradually increases from the bottom surface to the top surface; a filling layer body arranged in the filling groove, the filling layer body being provided with a first ohmic contact region in the filling groove; and a first metal layer body arranged on the top surface of the substrate layer body and forming a Schottky contact with the substrate layer body, at least part of the first metal layer body being embedded in the filling groove. The application solves the problem of low high-voltage resistance of the SIC diode device in the prior art.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more specifically, to a diode structure. Background Technology

[0002] Power diodes are key components of circuit systems and are widely used in high-frequency inverters, digital products, generators, televisions, and other products. Power diodes are expanding in two important directions: (1) towards tens of millions or even tens of thousands of amperes, which can be applied to high-temperature arc wind tunnels, resistance welding machines, and other applications; (2) towards shorter and shorter reverse recovery times, exhibiting a trend towards ultra-fast, ultra-soft, and ultra-durable characteristics, enabling them to play different roles not only in rectification applications but also in various switching circuits. In order to meet the application requirements of low power consumption, high frequency, high temperature, and miniaturization, their withstand voltage, on-resistance, turn-on voltage drop, reverse recovery characteristics, and high-temperature characteristics are becoming increasingly demanding.

[0003] Commonly used rectifier diodes include ordinary rectifier diodes, Schottky diodes, and PIN diodes. Each has its own characteristics: Schottky rectifier diodes have a lower on-state voltage drop, a larger leakage current, and a near-zero reverse recovery time. PIN fast recovery rectifier diodes, on the other hand, have a faster reverse recovery time, but their on-state voltage drop is very high.

[0004] Currently, with the development of microelectronic devices towards low power consumption, high voltage resistance, and high reliability, the requirements for semiconductor materials are also gradually increasing. Microelectronic devices are increasingly used in special environments such as high temperature, high radiation, high frequency, and high power. To meet the application requirements of microelectronic devices in areas such as high temperature resistance and radiation resistance, it is necessary to develop new semiconductor materials to maximize the performance of microelectronic devices. Traditional silicon and gallium arsenide devices limit the improvement of device and system performance. Third-generation semiconductor materials, represented by silicon carbide (SiC) and gallium nitride (GaN), have become ideal semiconductor materials for fabricating high-temperature, high-power, and radiation-resistant electronic devices due to their wide bandgap and high critical breakdown electric field. Currently, SiC-based devices under research include high-temperature and power SiC devices, microwave and high-frequency SiC devices, SiC optoelectronic devices, and radiation-resistant devices. The critical breakdown field strength of SiC is 10 times that of Si, the bandgap and thermal conductivity of SiC are both 3 times that of Si, and the intrinsic carrier concentration is only one-tenth that of silicon. These superior physical properties give SiC semiconductor power devices significant advantages in environments with high frequency, high temperature, high power, and high radiation. SiC can form different crystal structures under different environments; the three most commonly used crystal structures are 3C-SiC, 4H-SiC, and 6H-SiC. 4H-SiC, with its high bandgap, high hole mobility, and low intrinsic carrier concentration, has become the mainstream material for manufacturing semiconductor devices.

[0005] However, the current SiC diode device structure has not been optimized to take into account the material characteristics of SiC, resulting in no significant performance advantage over Si devices in some parameters. In terms of manufacturing process, SiC diodes follow the traditional process of Si diodes. Due to the influence of SiC material characteristics, the process is complex, the production cost is high, and the high voltage resistance is low. Summary of the Invention

[0006] The main objective of this invention is to provide a diode structure to solve the problem of low high voltage withstand capability of existing SiC diode devices.

[0007] To achieve the above objectives, according to one aspect of the present invention, a diode structure is provided, comprising: a substrate body including a top surface and a bottom surface disposed opposite to each other; a filling groove disposed on the substrate body, the filling groove extending along the length or width direction of the substrate body, and the opening of the filling groove gradually increasing from the bottom surface to the top surface; a filling layer disposed within the filling groove, the filling layer having a first ohmic contact region disposed within the filling groove; and a first metal layer disposed on the top surface of the substrate body and forming a Schottky contact with the substrate body, at least a portion of the first metal layer being embedded within the filling groove.

[0008] Furthermore, the filling groove includes: a first groove body disposed on the base layer; a second groove body disposed on the base layer body and communicating with the first groove body, the second groove body being located at one end of the first groove body near the top surface; the depth of the first groove body is greater than that of the second groove body, and the width of the first groove body is less than that of the second groove body.

[0009] Furthermore, the filling layer includes: a P-type epitaxial layer disposed in the first groove, wherein the P-type epitaxial layer is in contact with the groove wall of the first groove; and a P-type injection layer disposed in the second groove, wherein the P-type injection layer is connected to the first metal layer.

[0010] Furthermore, the diode structure also includes: a second metal layer, a first end of which is disposed in a first trench, a second end of which is disposed in a second trench, and the first end is connected to a P-type epitaxial layer to form a first ohmic contact region.

[0011] Furthermore, the doping concentration of the P-type epitaxial layer in the P-type epitaxial layer is greater than the doping concentration of the P-type implantation in the P-type implantation layer.

[0012] Furthermore, the P-type injection layer has a connecting end face that fits with the first metal layer, and the second metal layer has a second end face that fits with the first metal layer. The second end face and the connecting end face are located in the same plane.

[0013] Furthermore, a protruding layer is provided on the first metal layer, the protruding layer protruding relative to the first metal layer in a direction close to the base layer, and the protruding layer is embedded in the second groove.

[0014] Furthermore, the thickness of the P-type epitaxial layer is greater than the thickness of the P-type injection layer; and / or, the thickness of the protruding layer is greater than the thickness of the P-type injection layer.

[0015] Furthermore, the diode structure also includes: a third metal layer disposed on the bottom surface of the substrate, and a second ohmic contact region disposed between the third metal layer and the substrate.

[0016] Furthermore, there are at least two filling grooves, which are spaced apart along the length or width direction of the substrate; and / or, the substrate includes an N-type substrate and an N-type epitaxial layer, the N-type epitaxial layer is disposed on the N-type substrate, the filling grooves are disposed on the N-type epitaxial layer, and the first metal layer is bonded to the N-type epitaxial layer to form a Schottky contact.

[0017] According to the technical solution of this invention, the diode structure includes a substrate, a filling groove, a filling layer, and a first metal layer. The substrate includes a top surface and a bottom surface disposed opposite to each other. The filling groove is disposed on the substrate and extends along the length or width direction of the substrate, with the opening of the filling groove gradually increasing from the bottom surface to the top surface. The filling layer is disposed within the filling groove, and a first ohmic contact region is provided within the filling groove. The first metal layer is disposed on the top surface of the substrate and forms a Schottky contact with the substrate, with at least a portion of the first metal layer embedded within the filling groove. The opening of the filling groove is designed to gradually increase from the bottom surface to the top surface. This structure can increase the width of the depletion region, effectively preventing breakdown caused by excessive local electric field, thereby significantly enhancing the high voltage withstand performance of the diode. The first ohmic contact region integrated in the filling layer, by forming an ohmic contact with a specific area within the filling groove, ensures continuous current flow under high voltage, enhancing the device's voltage withstand capability and surge resistance. Attached Figure Description

[0018] The accompanying drawings, which form part of this application, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings:

[0019] Figure 1 A schematic diagram of an embodiment of the diode structure according to the present invention is shown;

[0020] Figure 2 A schematic diagram of the formation of the first groove in the diode structure according to the present invention is shown;

[0021] Figure 3A schematic diagram of the second groove formed in the diode structure according to the present invention is shown;

[0022] Figure 4 A schematic diagram of the formation of a P-type epitaxial layer in a diode structure according to the present invention is shown;

[0023] Figure 5 A schematic diagram of the formation of the second metal layer in the diode structure according to the present invention is shown;

[0024] Figure 6 A schematic diagram of the formation of a P-type injection layer in a diode structure according to the present invention is shown;

[0025] Figure 7 A schematic diagram of the formation of the first metal layer in the diode structure according to the present invention is shown.

[0026] The above figures include the following reference numerals:

[0027] 100, Substrate layer; 110, N-type substrate; 120, N-type epitaxial layer; 130, Top surface; 140, Bottom surface; 200, Filler trench; 300, Filler layer; 400, First metal layer; 210, First trench; 220, Second trench; 310, P-type epitaxial layer; 320, P-type implantation layer; 500, Second metal layer; 321, Connecting end face; 410, Protruding layer; 600, Third metal layer. Detailed Implementation

[0028] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0029] Please refer to Figures 1 to 7 This application provides a diode structure, including: a substrate 100, the substrate 100 including a top surface and a bottom surface disposed opposite to each other; a filling groove 200 disposed on the substrate 100, the filling groove 200 extending along the length or width direction of the substrate 100, and the opening of the filling groove 200 gradually increasing from the bottom surface to the top surface; a filling layer 300 disposed within the filling groove 200, the filling layer 300 having a first ohmic contact region within the filling groove 200; and a first metal layer 400 disposed on the top surface of the substrate 100 and forming a Schottky contact with the substrate 100, at least a portion of the first metal layer 400 being embedded within the filling groove 200.

[0030] The diode structure provided in this application includes a substrate 100, a filling trench 200, a filling layer 300, and a first metal layer 400. The substrate 100 includes a top surface 130 and a bottom surface 140 disposed opposite to each other. The filling trench 200 is disposed on the substrate 100 and extends along the length or width direction of the substrate 100, with the opening of the filling trench 200 gradually increasing from the bottom surface to the top surface. The filling layer 300 is disposed within the filling trench 200 and has a first ohmic contact region within it. The first metal layer 400 is disposed on the top surface of the substrate 100 and forms a Schottky contact with the substrate 100, with at least a portion of the first metal layer 400 embedded within the filling trench 200. The opening of the filling trench 200 is designed to gradually increase from the bottom surface to the top surface. This structure can increase the width of the depletion region, effectively preventing breakdown caused by excessive local electric field, thereby significantly enhancing the high voltage withstand performance of the diode. The first ohmic contact area integrated in the filler layer 300 forms an ohmic contact with a specific area within the filler groove 200, ensuring continuous current flow under high voltage and enhancing the device's withstand voltage and surge protection capabilities.

[0031] The first metal layer 400 forms a Schottky contact with the base layer 100. This contact type has the characteristics of low forward voltage drop and fast reverse recovery time, which can significantly reduce the forward conduction voltage drop of the diode and shorten the reverse recovery time. It is suitable for high-frequency and high-efficiency switching applications.

[0032] In this application, the direction from the bottom surface 140 to the top surface 130 is the depth direction, and the direction perpendicular to the depth direction is the width direction.

[0033] Specifically, such as Figure 3 As shown, the filling groove 200 includes: a first groove 210 disposed on the substrate 100; and a second groove 220 disposed on the substrate 100 and communicating with the first groove 210, the second groove 220 being located at the end of the first groove 210 near its top surface. The first groove 210 has a greater depth than the second groove 220, and a smaller width than the second groove 220. The greater depth and narrower width of the first groove 210 help to form more effective charge accumulation in high electric field regions, thereby improving the electric field distribution, reducing the local electric field intensity inside the device, and enhancing the device's ability to withstand high voltages. The greater width and shallower depth of the second groove 220 can effectively disperse the top electric field, reduce electric field concentration, avoid breakdown caused by excessively high local electric fields, and improve the electrical stability of the device.

[0034] By introducing a composite trench design into SiC MPS devices, not only are the electrical performance of the devices, such as withstand voltage and on-resistance, effectively improved, but the manufacturing process is also simplified, production costs are reduced, and the reliability and service life of the devices are further improved by improving stress distribution and thermal stability.

[0035] In the specific implementation, the filling layer 300 includes: a P-type epitaxial layer 310 disposed within the first trench 210, with the P-type epitaxial layer 310 adhering to the trench wall of the first trench 210; and a P-type implanted layer 320 disposed within the second trench 220, connected to the first metal layer 400. The adhering of the P-type epitaxial layer 310 to the trench wall of the first trench 210 ensures close contact between the P-type epitaxial layer 310 and the N-type SiC epitaxial layer, thus forming a highly efficient first ohmic contact region. The formation of this contact region not only reduces the forward conduction resistance of the device but also improves the uniformity of current distribution, enhancing the device's withstand voltage capability. The P-type implanted layer 320 has a low implantation concentration and connects to the first metal layer 400 to form a Schottky contact. Since the doping concentration of the P-type implanted layer 320 can be precisely controlled, this design helps reduce the voltage drop of the device under forward bias while maintaining sufficient withstand voltage performance. Compared to high-concentration P-type epitaxial layers, low-concentration P-type implanted layers offer faster switching speeds and lower reverse recovery losses. The first metal layer 400 forms a Schottky contact with the P-type implanted layer 320: the formation of the Schottky contact significantly reduces the forward voltage drop of the diode. Simultaneously, due to the low doping concentration of the P-type implanted layer 320, a faster reverse recovery time can be achieved.

[0036] Furthermore, the diode structure also includes a second metal layer 500. The first end of the second metal layer 500 is disposed within the first trench 210, and the second end is disposed within the second trench 220. The first end is connected to the P-type epitaxial layer 310 to form a first ohmic contact region. The introduction of the second metal layer 500, particularly its connection to the P-type epitaxial layer 310 within the first and second trenches 210, significantly reduces contact resistance and improves current transmission efficiency, resulting in more stable diode performance under high-current applications. The connection of the second metal layer 500 within multiple trenches disperses current and heat, improving the thermal stability of the device. Especially in high-power applications, this design helps extend the device's lifespan and improve reliability. The increased contact area and optimized current path allow the diode to more quickly disperse surge energy when subjected to instantaneous high-voltage or high-current surges, reducing the risk of device damage.

[0037] By providing a second metal layer 500 between the first tank 210 and the second tank 220, the current flowing through the device can be effectively dispersed, avoiding hotspot effects caused by excessively high local current density. This uniform current distribution helps improve the device's withstand voltage and operational stability. Preferably, the second metal layer 500 is made of nickel and undergoes heat annealing treatment at a temperature greater than 900°C to form an ohmic contact with the P-type epitaxial layer 310.

[0038] In the embodiments provided in this application, the doping concentration of the P-type epitaxial layer 310 is greater than the doping concentration of the P-type implantation layer 320. The lower doping concentration of the P-type implantation layer 320 helps to form a higher quality Schottky interface, thereby significantly reducing the leakage current of the diode under reverse bias conditions. Simultaneously, due to the optimization of the Schottky interface, the reverse recovery characteristics are improved, and the reverse recovery time is shortened, which is particularly important in high-frequency switching applications, improving the overall system efficiency.

[0039] The relatively low concentration of the P-type implanted layer 320 creates a thinner, high-resistivity region, which facilitates rapid charge removal, optimizes the electric field distribution, and thus improves the diode's breakdown voltage. Under high-voltage conditions, this design can better withstand voltage surges, avoid the risk of breakdown, and improve device reliability.

[0040] The high doping concentration of the P-type epitaxial layer 310 forms a low-impedance ohmic contact with the N-type epitaxial layer, reducing the contact resistance during forward conduction, thereby improving forward conduction performance, reducing forward voltage drop, reducing energy consumption under forward bias conditions, and improving efficiency.

[0041] The ohmic contacts of the high-concentration P-type epitaxial layer 310 can effectively disperse current, reduce the possibility of charge accumulation, and enhance the device's performance when subjected to instantaneous high current (surge).

[0042] In practical implementation, the P-type injection layer 320 has a connection end face 321 that adheres to the first metal layer 400, and the second metal layer 500 has a second end face that adheres to the first metal layer 400. The second end face and the connection end face 321 are located in the same plane. By ensuring that the second end face and the connection end face 321 are in the same plane, a flat and continuous contact interface can be formed. This helps to improve the contact quality between the metal layer and the semiconductor material, reduce contact resistance, thereby reducing energy consumption and improving efficiency when the device is turned on. The contact end faces in the same plane help to form a more uniform current distribution, avoid current accumulation at certain contact points, reduce local overheating and electrical stress concentration, and improve the thermal stability and electrical performance stability of the device.

[0043] In this application, as Figure 1As shown, a protruding layer 410 is provided on the first metal layer 400. The protruding layer 410 protrudes relative to the first metal layer 400 towards the substrate layer 100 and is embedded in the second groove 220. Specifically, the protruding layer 410 is attached to the P-type injection layer 320. The protruding layer 410 embedded in the second groove 220 significantly increases the surface area of ​​contact between the metal and the semiconductor material. This helps to improve the current conduction capability of the device, reduce contact resistance, thereby reducing voltage drop and improving efficiency during forward conduction. The width of the second groove 220 is greater than its depth. Combined with the embedding of the protruding layer 410, the electric field distribution can be further optimized, so that the charge can be more evenly distributed when the device is subjected to high voltage, avoiding excessively high local electric field strength, reducing the risk of breakdown, and thus improving the high voltage withstand performance of the device. The design of the protruding layer 410 helps improve the contact stability between the metal layer and the silicon carbide (SiC) material, maintaining good contact quality and electrical performance even under prolonged high-temperature, high-power operation, thus enhancing the reliability and durability of the device. The embedding of the protruding layer 410 improves the device's thermal performance; the increased contact area facilitates rapid heat dissipation, reducing heat accumulation under high-power conditions and improving the device's thermal stability and high-temperature operating capability. By forming the protruding layer 410 and embedding it in the second groove 220 in a single process step, several process steps in device manufacturing can be simplified, such as reducing the number of subsequent metal depositions, thereby reducing production costs and improving production efficiency.

[0044] The thickness of the P-type epitaxial layer 310 is greater than the thickness of the P-type implanted layer 320; and / or, the thickness of the protruding layer 410 is greater than the thickness of the P-type implanted layer 320. The increased thickness of the P-type epitaxial layer 310 helps to form a wider PN junction, thereby improving the device's breakdown voltage. In high-voltage applications, the thicker P-type epitaxial layer 310 can better distribute the electric field, avoiding breakdown caused by excessively high local electric fields. The P-type epitaxial layer 310 provides a low-resistance current path, especially under forward bias; the thicker P-type epitaxial layer can reduce the forward voltage drop and increase the current density, thereby reducing the device's power consumption during operation.

[0045] Thicker P-type epitaxial layers 310 and 410 provide a larger heat diffusion path, helping to reduce hot spots during device operation and improve heat dissipation. This is crucial for high-frequency and high-power applications, as it improves device stability and reliability, and extends device lifespan. The increased thickness contributes to device stability at high temperatures, as the electrical properties of the material change less at high temperatures, thus maintaining more stable performance. The thinner P-type injection layer 320 reduces the direct path from N-type to P-type material, thereby reducing leakage current and improving device switching performance. The greater thickness of the 410 compared to the P-type injection layer 320 optimizes the formation of the Schottky contact. This design helps reduce forward voltage drop and improve contact stability while maintaining breakdown voltage performance.

[0046] In a specific implementation, the diode structure further includes a third metal layer 600 disposed on the bottom surface of the substrate 100, with a second ohmic contact region between the third metal layer 600 and the substrate 100. The placement of the third metal layer 600 on the bottom surface of the substrate 100 not only provides good contact with the packaging material but also significantly increases the heat conduction path, helping to quickly dissipate heat generated during device operation from the bottom, thereby significantly improving the device's heat dissipation performance. The formation of the second ohmic contact region ensures a low-resistance connection between the third metal layer 600 and the N-type SiC substrate. This can further reduce the power consumption of the device in the on-state and improve the overall energy efficiency of the system.

[0047] At least two filler trenches 200 are provided, spaced apart along the length or width of the substrate 100; and / or, the substrate 100 includes an N-type substrate 110 and an N-type epitaxial layer 120, the N-type epitaxial layer 120 being disposed on the N-type substrate 110, the filler trenches 200 being disposed on the N-type epitaxial layer 120, and a first metal layer 400 being bonded to the N-type epitaxial layer 120 to form a Schottky contact. The design of multiple filler trenches 200 allows the device to more effectively disperse charge, optimizes the electric field distribution, and thus improves the device's withstand voltage and surge resistance. Especially in high-voltage applications, this design can significantly reduce local electric field strength, reduce the risk of breakdown, and enhance the electrical stability of the device. By providing multiple filler trenches 200 on the N-type epitaxial layer 120 and forming a first ohmic contact region therein, the effective area for current transport can be significantly increased, thereby increasing the current density. This helps to reduce resistance during forward conduction, reduce energy consumption, and improve device efficiency. The first metal layer 400 forms a Schottky contact with the N-type epitaxial layer 120. This contact type has the characteristics of low forward voltage drop and fast reverse recovery time, which is very suitable for use in high-frequency switching circuits. It can significantly improve switching speed, reduce reverse recovery loss, and improve system efficiency.

[0048] In the specific manufacturing process, such as Figure 2 As shown, firstly, using an N-type SiC substrate, N-type epitaxy is performed, and the first trench 210 is formed on the surface by dry etching, as follows. Figure 3 As shown, a second trench 220 is formed by dry etching. The width of the second etching trench is greater than that of the first etching trench, and the depth is less than that of the first etching trench, forming a composite trench after etching. The bottom of the first trench 210 is filled with P-type epitaxy, and a second metal layer 500 (which can be nickel) is filled inside the first trench 210. Thermal annealing (temperature greater than 900℃) is performed to form an ohmic contact. Ion implantation is performed at the bottom of the second trench 220 to form a P-type implantation region. The doping concentration of the P-type implantation region is less than that of the P-type epitaxy. A first metal layer 400 (which can be aluminum / titanium) is prepared. The first metal layer 400 is prepared at high temperature (temperature greater than 400℃). Thermal annealing is performed simultaneously during the preparation of the first metal layer 400. A Schottky contact is formed between the first metal layer 400 and the SiC surface. A back metal layer is prepared (using conventional process, such as a TI / NI / Ag three-layer structure) to form an ohmic contact.

[0049] The diode structure of this application, based on the traditional SiC JBS structure, adopts a composite trench scheme to improve the high voltage withstand capability of the device. The combination of a low-concentration P-type injection region and a high-concentration P-type epitaxial region significantly reduces the leakage current of the device; the second metal layer and the P-type epitaxial region form an ohmic contact, improving the device's surge resistance. The first metal layer and the P-type injection region form a Schottky contact, reducing the forward voltage drop while ensuring the withstand voltage performance. The first metal layer and the N-type epitaxial region form a Schottky contact, formed through a filler trench 200. Schottky contacts are formed on the sidewalls of the filler trench 200 and the surface of the first metal layer 400, increasing the contact area and reducing the forward voltage drop.

[0050] As can be seen from the above description, the embodiments of the present invention achieve the following technical effects:

[0051] The diode structure provided in this application includes a substrate 100, a filling trench 200, a filling layer 300, and a first metal layer 400. The substrate 100 includes a top surface 130 and a bottom surface 140 disposed opposite to each other. The filling trench 200 is disposed on the substrate 100 and extends along the length or width direction of the substrate 100, with the opening of the filling trench 200 gradually increasing from the bottom surface to the top surface. The filling layer 300 is disposed within the filling trench 200 and has a first ohmic contact region within it. The first metal layer 400 is disposed on the top surface of the substrate 100 and forms a Schottky contact with the substrate 100, with at least a portion of the first metal layer 400 embedded within the filling trench 200. The opening of the filling trench 200 is designed to gradually increase from the bottom surface to the top surface. This structure can increase the width of the depletion region, effectively preventing breakdown caused by excessive local electric field, thereby significantly enhancing the high voltage withstand performance of the diode. The first ohmic contact area integrated in the filler layer 300 forms an ohmic contact with a specific area within the filler groove 200, ensuring continuous current flow under high voltage and enhancing the device's withstand voltage and surge protection capabilities.

[0052] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0053] Unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps described in these embodiments do not limit the scope of this application. It should also be understood that, for ease of description, the dimensions of the various parts shown in the drawings are not drawn to actual scale. Techniques, methods, and devices known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and devices should be considered part of the specification. In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters in the following drawings denote similar items; therefore, once an item is defined in one drawing, it need not be further discussed in subsequent drawings.

[0054] For ease of description, spatial relative terms such as "above," "on top of," "on the upper surface of," "above," etc., are used herein to describe the spatial positional relationship of a device or feature as shown in the figures to other devices or features. It should be understood that spatial relative terms are intended to encompass different orientations in use or operation beyond the orientation of the device as described in the figures. For example, if the device in the figures were inverted, a device described as "above" or "on top of" other devices or structures would subsequently be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein will be interpreted accordingly.

[0055] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0056] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in sequences other than those illustrated or described herein.

[0057] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A diode structure, characterized in that, include: A base layer (100) includes a top surface and a bottom surface disposed opposite to each other; A filling groove (200) is disposed on the substrate (100). The filling groove (200) extends along the length or width direction of the substrate (100) from the bottom surface to the top surface, and the opening of the filling groove (200) gradually increases. A filling layer (300) is disposed within the filling groove (200), and the filling layer (300) has a first ohmic contact area within the filling groove (200); A first metal layer (400) is disposed on the top surface of the base layer (100) and forms a Schottky contact with the base layer (100), and at least a portion of the first metal layer (400) is embedded in the filling groove (200); The filling groove (200) includes: a first groove body (210) disposed on the base layer body (100); The second groove (220) is disposed on the base layer (100) and communicates with the first groove (210). The second groove (220) is located at the end of the first groove (210) near the top surface. The depth of the first groove (210) is greater than that of the second groove (220), and the width of the first groove (210) is smaller than that of the second groove (220). The filling layer (300) includes: a P-type epitaxial layer (310) disposed in the first groove (210), wherein the P-type epitaxial layer (310) is in contact with the groove wall of the first groove (210); A P-type implanted layer (320) is disposed within the second trench (220), and the P-type implanted layer (320) is connected to the first metal layer (400); the doping concentration of the P-type epitaxial layer (310) is greater than the doping concentration of the P-type implanted layer (320); The diode structure further includes: a second metal layer (500), a first end of the second metal layer (500) disposed in the first trench (210), a second end of the second metal layer (500) disposed in the second trench (220), and the first end being connected to the P-type epitaxial layer (310) to form the first ohmic contact region; The P-type injection layer (320) has a connecting end face (321) that fits with the first metal layer (400), and the second metal layer (500) has a second end face that fits with the first metal layer (400). The second end face and the connecting end face (321) are located in the same plane.

2. The diode structure according to claim 1, characterized in that, The first metal layer (400) is provided with a protruding layer (410), which protrudes relative to the first metal layer (400) toward the base layer (100) and is embedded in the second groove (220).

3. The diode structure according to claim 2, characterized in that, The thickness of the P-type epitaxial layer (310) is greater than the thickness of the P-type implanted layer (320); and / or, The thickness of the protruding layer (410) is greater than the thickness of the P-type injection layer (320).

4. The diode structure according to claim 1, characterized in that, The diode structure also includes: A third metal layer (600) is disposed on the bottom surface of the base layer (100), and a second ohmic contact area is provided between the third metal layer (600) and the base layer (100).

5. The diode structure according to claim 1, characterized in that, The filling groove (200) is at least two, and the at least two filling grooves (200) are spaced apart along the length or width direction of the base layer (100); and / or, The substrate (100) includes an N-type substrate (110) and an N-type epitaxial layer (120), the N-type epitaxial layer (120) being disposed on the N-type substrate (110), the filling groove (200) being disposed on the N-type epitaxial layer (120), and the first metal layer (400) being bonded to the N-type epitaxial layer (120) to form a Schottky contact.

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