A power management system

Abstract

This application relates to a power management system, including a wake-up module, a super capacitor, an MCU module, and a power supply module; the input end of the wake-up module is connected to the positive terminal of the super capacitor, and the output end of the wake-up module is respectively connected to the enable input end of the MCU module and the enable input end of the power supply module; the wake-up output end of the MCU module is connected to the wake-up input end of the power supply module; the super capacitor is connected in parallel with the load end; the super capacitor is used to discharge when a load is connected to the load end, and the voltage at the positive terminal changes from a high level to a low level; the wake-up module is used to output an enable signal to wake up the MCU module and activate the power supply module when it detects that the voltage at the positive terminal of the super capacitor is at a low level; the MCU module is used to output a wake-up signal to the power supply module after waking up to wake up the activated power supply module. This application can reduce the energy consumption of the power management system.

Description

Technical Field

[0001] This application relates to the technical field of automotive power supplies, and particularly to a power management system. Background Art

[0002] At present, in order to obtain a large current that can quickly respond to an external load at the moment of starting the power supply, there are two types of battery management systems (Battery Management System, BMS) applied to lithium-ion starting power supplies: a BMS using a low-side MOS switch and a BMS using a high-side MOS switch. Both of these solutions use the method of connecting a supercapacitor in parallel at the battery end to provide the large current required for battery startup.

[0003] However, in the BMS using a low-side MOS switch, the load end and the battery end are not grounded together, which will cause the problem of too large a voltage difference between the supercapacitor voltage and the battery voltage, resulting in the risk of overcurrent in the system loop. Charging the supercapacitor with an additional capacitor charging circuit instead of charging the supercapacitor through the battery can reduce this risk, but it will increase the cost and circuit complexity. The BMS using a high-side MOS switch adopts the scheme of connecting a supercapacitor in parallel at the load end, and there is also the problem of too large a voltage difference between the supercapacitor voltage and the battery voltage, and it is necessary to monitor the voltage of the supercapacitor, resulting in too high system power consumption of the entire BMS. Summary of the Invention

[0004] In order to solve the deficiencies existing in the related technologies, the purpose of this application is to provide a power management system, which can reduce the energy consumption of the power management system and improve the safety of the power management system.

[0005] This application provides a power management system, including a wake-up module, a supercapacitor, an MCU module, and a power supply module;

[0006] The input end of the wake-up module is connected to the positive extreme of the supercapacitor, and the output end of the wake-up module is respectively connected to the enable input end of the MCU module and the enable input end of the power supply module; the wake-up output end of the MCU module is connected to the wake-up input end of the power supply module; the supercapacitor is connected in parallel with the load end;

[0007] The supercapacitor is used to discharge when a load is connected to the load end, and the voltage at the positive extreme changes from a high level to a low level;

[0008] The wake-up module is used to output an enable signal to wake up the MCU module and activate the power supply module when it detects that the voltage at the positive extreme of the supercapacitor is at a low level;

[0009] The MCU module is used to output a wake-up signal to the power supply module after waking up to wake up the activated power supply module.

[0010] Through the above technical solution, the voltage detection of the super capacitor can be realized when the system is in the sleep state, without the need for the system to continuously monitor the voltage of the super capacitor, which can reduce the energy consumption of the system. By connecting the super capacitor in parallel with the load terminal, the risk of excessive voltage difference between the super capacitor and the power supply module can be reduced, and the system safety can be improved.

[0011] Preferably, the wake-up module includes a comparison operator, a first voltage dividing circuit, a second voltage dividing circuit, and a third voltage dividing circuit;

[0012] The first end of the first voltage dividing circuit is connected to the positive terminal of the super capacitor, the second end of the first voltage dividing circuit is connected to the target input terminal of the comparison operator, and the third end of the first voltage dividing circuit is grounded; the first end of the second voltage dividing circuit is connected to a reference voltage, the second end of the second voltage dividing circuit is connected to the reference input terminal of the comparison operator, and the third end of the second voltage dividing circuit is grounded; the first end of the third voltage dividing circuit is connected to the operating voltage of the comparison operator, the second end of the third voltage dividing circuit is connected to the enable input terminal of the MCU module and the enable input terminal of the power supply module, and the third end of the third voltage dividing circuit is connected to the output terminal of the comparison operator.

[0013] Through the above technical solution, the voltage detection of the super capacitor can be realized by using a wake-up module with a simple circuit structure, which can reduce the circuit complexity of the system.

[0014] Preferably, the first voltage dividing circuit includes a first resistor and a second resistor;

[0015] One end of the first resistor is connected to the positive terminal of the super capacitor, and the other end of the first resistor is respectively connected to one end of the second resistor and the target input terminal of the comparison operator; the other end of the second resistor is grounded.

[0016] Through the above technical solution, the first voltage dividing circuit can be simply realized, reducing the circuit complexity of the system.

[0017] Preferably, the second voltage dividing circuit includes a third resistor and a fourth resistor;

[0018] One end of the third resistor is connected to the reference voltage, and the other end of the third resistor is respectively connected to one end of the fourth resistor and the reference input terminal of the comparison operator; the other end of the fourth resistor is grounded.

[0019] Through the above technical solution, the second voltage dividing circuit can be simply realized, reducing the circuit complexity of the system.

[0020] Preferably, the third voltage dividing circuit includes a fifth resistor and a sixth resistor;

[0021] One end of the fifth resistor is connected to the operating voltage of the comparison arithmetic unit, and the other end of the fifth resistor is respectively connected to the output end of the comparison arithmetic unit and one end of the sixth resistor; the other end of the sixth resistor is respectively connected to the enable input end of the MCU module and the enable input end of the power supply module.

[0022] Through the above technical solution, the third voltage dividing circuit can be simply realized, and the complexity of the system circuit is reduced.

[0023] Preferably, the system further includes an electric switch module;

[0024] The positive end of the electric switch module is connected to the positive end of the super capacitor, the negative end of the electric switch module is connected to the positive end of the power supply module, and the input end of the electric switch module is connected to the switch signal output end of the MCU module;

[0025] The MCU module is further configured to send a switch closing signal to the electric switch module after waking up;

[0026] The electric switch module is configured to control the electric switch to close when receiving the switch closing signal, so that the charging circuit of the power supply module and the super capacitor forms a path, and the system circuit of the power supply module and the load forms a path;

[0027] The power supply module is configured to charge the super capacitor after the charging circuit is in a path, and supply power to the load after the system circuit forms a path.

[0028] Through the above technical solution, the on-off of the system circuit and the charging circuit can be controlled by controlling the electric switch, and the effective management of the power management system can be realized.

[0029] Preferably, the system further includes a voltage detection module:

[0030] The input end of the voltage detection module is connected to the positive end of the super capacitor, and the output end of the voltage detection module is connected to the first voltage input end of the MCU module;

[0031] The voltage detection module is configured to detect the voltage at the positive end of the super capacitor, convert the voltage at the positive end of the super capacitor into a first voltage, and transmit the first voltage to the MCU module;

[0032] The MCU module is configured to restore the first voltage to the voltage at the positive end of the super capacitor.

[0033] Through the above technical solution, the voltage detection of the super capacitor can be realized, so as to reduce the excessive voltage difference between the super capacitor and the power supply module and improve the safety of the power management system.

[0034] Preferably, the voltage detection module includes a seventh resistor, an eighth resistor, and a ninth resistor;

[0035] One end of the seventh resistor is connected to the positive terminal of the super capacitor, and the other end of the seventh resistor is respectively connected to one end of the eighth resistor and one end of the ninth resistor; the other end of the eighth resistor is connected to the first voltage input terminal, and the other end of the ninth resistor is grounded.

[0036] Through the above technical solution, the voltage detection module can be simply realized, reducing the complexity of the system circuit.

[0037] Preferably, the system includes a tenth resistor;

[0038] The tenth resistor is connected in series between the negative terminal of the super capacitor and the negative terminal of the load terminal; one end of the tenth resistor is connected to the second voltage input terminal of the MCU module, and the other end of the tenth resistor is connected to the third voltage input terminal of the MCU module;

[0039] The tenth resistor is used to generate a second voltage and a third voltage at both ends respectively when a load is connected to the load terminal and the system loop is conducting;

[0040] The MCU module is further configured to detect the second voltage and the third voltage, calculate the difference between the two, calculate the current of the system loop according to the resistance value of the tenth resistor and the difference, and switch the wake-up signal to a sleep signal and transmit the sleep signal to the power supply module to make the power supply module sleep when the current of the system loop is less than a preset target current value.

[0041] Detecting the circuit of the system loop through the voltages at both ends of the tenth resistor not only has a simple circuit implementation but also can reduce the risk of overcurrent in the system loop and improve the safety of the power management system.

[0042] Preferably, when the wake-up module detects that the voltage at the positive terminal of the super capacitor is at a high level, it switches the enable signal to a disable signal and transmits the disable signal to the MCU module;

[0043] The MCU module is further configured to send a switch-off signal to the electrical switch module when the current of the system loop is less than a preset target current value and it receives the disable signal, and go to sleep after receiving the confirmation signal returned by the electrical switch module;

[0044] The electric switch module is further configured to control the disconnection of the electric switch when receiving the switch disconnection signal.

[0045] Through the above technical solution, when no load is connected, the MCU module and the power supply module inside the power management system can be controlled to enter the sleep state, reducing the system power consumption.

[0046] In summary, the beneficial effects of the present application are as follows:

[0047] 1. When the MCU module and the power supply module of the power management system are in the sleep state, the detection of the supercapacitor voltage is realized, reducing the system energy consumption;

[0048] 2. The circuit structures of the wake-up module, the voltage detection module and the system loop current detection are simple and feasible, reducing the circuit complexity of the system;

[0049] 3. The voltage of the supercapacitor and the current of the system loop can be effectively detected, improving the system safety. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 FIG. is a schematic diagram of the system structure of a power management system provided by the present application.

[0051] Figure 2 FIG. is a schematic diagram of the module structure of a wake-up module provided by the present application.

[0052] Figure 3 FIG. is a schematic diagram of the circuit structure of a wake-up module provided by the present application.

[0053] Figure 4 FIG. is a schematic diagram of the system structure of another power management system provided by the present application.

[0054] Figure 5 FIG. is a schematic diagram of the system structure of yet another power management system provided by the present application.

[0055] Figure 6 FIG. is a schematic diagram of the circuit structure of a voltage detection module provided by the present application.

[0056] Figure 7 FIG. is a schematic diagram of the system structure of still another power management system provided by the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0057] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.

[0058] Refer to Figure 1, which is a schematic diagram of the system structure of a power management system disclosed in this application, including a super capacitor 101, a wake-up module 102, an MCU module 103, and a power supply module 104;

[0059] The input end of the wake-up module 102 is connected to the positive extreme of the super capacitor 101, and the output end of the wake-up module 102 is respectively connected to the enable input end of the MCU module 103 and the enable input end of the power supply module 104; the wake-up output end of the MCU module 103 is connected to the wake-up input end of the power supply module 104; the super capacitor 101 is connected in parallel with the load end;

[0060] The super capacitor 101 is used to discharge when the load is connected to the load end, and the voltage at the positive extreme changes from a high level to a low level;

[0061] The wake-up module 102 is used to output an enable signal to wake up the MCU module 103 and activate the power supply module 104 when it detects that the voltage at the positive extreme of the super capacitor 101 is at a low level;

[0062] The MCU module 103 is used to output a wake-up signal to the power supply module 104 after waking up to wake up the activated power supply module 104.

[0063] In the embodiment of this application, the super capacitor 101, the power supply module 104, and the load end share the same ground. In this way, the voltage at the positive extreme of the super capacitor (positive voltage) is the voltage of the super capacitor, which can improve the accuracy and convenience of detecting the voltage of the super capacitor.

[0064] In the embodiment of this application, the wake-up module 102 detects the voltage of the super capacitor 101, specifically, detects which level the voltage of the super capacitor 101 is at. When the voltage of the super capacitor 101 is at a high level, since the super capacitor 101 is connected in parallel with the load end, it means that the load end of the power management system is not connected to the load at this time, and the signal output by the wake-up module 102 is at a low level, that is, a cut-off signal. The cut-off signal at a low level cannot wake up the MCU module 103 and activate the power supply module 104.

[0065] In the embodiment of this application, the wake-up module 102 is used to wake up the MCU module 103 and, together with the awakened MCU module 103, wake up the power supply module 104. Since the MCU module 103 and the power supply module 104 are the main modules of the power management system and also important modules of the power management system, it can be said that the wake-up module 102 is used to wake up the power management system.

[0066] In an embodiment of the present application, the working modes of the MCU module 103 include a working state and a sleep state. When the MCU module 103 is in the working state, most or all of the electronic units in the MCU module 103 are in the running state, capable of implementing basic or all MCU functions and working normally. When the MCU module 103 is in the sleep state, very few electronic units in the MCU module 103 are in the running state, implementing very few MCU functions. It can be understood that the energy consumption of the MCU module 103 when working in the working state is higher than that when working in the sleep state. When no load is connected to the load end, the MCU module 103 is in the low-power sleep state, which is beneficial to reducing the energy consumption of the power management system. The MCU module 103 includes a plurality of general-purpose input / output ports (General-Purpose Input / Output, GPIO), and these GPIO ports are used to communicate with external devices, modules or circuits. It can be understood that the enable input terminal of the MCU module 103 is a GPIO port, and the wake-up output terminal of the MCU module 103 is another GPIO port.

[0067] In an embodiment of the present application, the power supply module 104 includes a DC power supply and a power supply circuit. Among them, the DC power supply can be a battery or a battery pack, and is used to provide electrical energy for the load when a load is connected to the load end. The voltage of the DC power supply often does not meet the working voltage of the load, and it is necessary for the power supply circuit to convert the voltage of the battery to obtain the working voltage for the load to work. The working states of the power supply module 104 include three types: working state, activation state, and sleep state. It can be understood that the power supply module 104 can work normally and has a high power consumption when in the working state. The power supply module 104 cannot work normally and has a low power consumption when in the sleep state. The activation state is a preparation stage during the process of the power supply module 104 switching from the sleep state to the working state, and its power consumption is greater than that in the sleep state and less than that in the working state.

[0068] The working principle of the above technical solution is as follows: The super capacitor 101 stores electrical energy. When no load is connected to the load terminal, the voltage of the super capacitor 101 is at a high level. The wake-up module 102 detects the high-level voltage of the super capacitor and outputs a low-level cut-off signal. When a load is connected to the load terminal, since the super capacitor 101 and the load are connected in parallel, a path is formed between the super capacitor 101 and the load, and the super capacitor 101 discharges the load. After the super capacitor 101 discharges, the voltage of the super capacitor 101 changes from high level to low level. The wake-up module 102 detects the low-level voltage of the super capacitor and outputs a high-level enable signal. The enable signal can enable the MCU module 103 to wake up the MCU module 103, and can also enable the power supply module 104 to activate the power supply module 104. The woken-up MCU module 103 outputs the wake-up signal. The wake-up signal can wake up the activated power supply module 104.

[0069] Through the above technical solution, the voltage detection of the super capacitor 101 can be realized when the system is in a sleep state, without the system continuously monitoring the voltage of the super capacitor 101, which can reduce the energy consumption of the system. By connecting the super capacitor 101 in parallel with the load terminal, the risk of excessive voltage difference between the super capacitor 101 and the power supply module 104 can be reduced, and the system safety can be improved.

[0070] In a specific embodiment, refer to Figure 2 , which is a schematic diagram of the module structure of a wake-up module provided by an embodiment of the present application. The wake-up module 102 includes a comparison arithmetic unit 201, a first voltage division circuit 202, a second voltage division circuit 203, and a third voltage division circuit 204;

[0071] The first end of the first voltage division circuit 202 is connected to the positive terminal of the super capacitor 101, the second end of the first voltage division circuit 202 is connected to the target input terminal of the comparison arithmetic unit 201, and the third end of the first voltage division circuit 202 is grounded; the first end of the second voltage division circuit 203 is connected to a reference voltage, the second end of the second voltage division circuit 203 is connected to the reference input terminal of the comparison arithmetic unit 201, and the third end of the second voltage division circuit 203 is grounded; the first end of the third voltage division circuit 204 is connected to the operating voltage of the comparison arithmetic unit 201, the second end of the third voltage division circuit 204 is connected to the enable input terminal of the MCU module 103 and the enable input terminal of the power supply module 104, and the third end of the third voltage division circuit 204 is connected to the output terminal of the comparison arithmetic unit.

[0072] In a specific embodiment, the reference input terminal of the comparison arithmetic unit 201 may be its non-inverting amplification input terminal, and the target input terminal may be its inverting amplification input terminal.

[0073] In a specific embodiment, the first voltage dividing circuit 202, the second voltage dividing circuit 203, and the third voltage dividing circuit 204 may be mutually different resistor circuits.

[0074] In a specific embodiment, they may also be mutually different impedance circuits including capacitors and inductors.

[0075] Through the above technical solution, a wake-up module with a simple circuit structure can be used to implement voltage detection of the super capacitor, which can reduce the circuit complexity of the system.

[0076] In a specific embodiment, refer to Figure 3 , which is a schematic circuit diagram of a wake-up module provided by an embodiment of the present application. The first voltage dividing circuit 202 includes a first resistor 301 and a second resistor 302;

[0077] One end of the first resistor 301 is connected to the positive terminal of the super capacitor 101, and the other end of the first resistor 301 is respectively connected to one end of the second resistor 302 and the target input terminal of the comparison arithmetic unit 201; the other end of the second resistor 302 is grounded.

[0078] It can be understood that using a resistor circuit can achieve the voltage dividing function of the first voltage dividing circuit 202, and the circuit complexity is also simpler than that of an impedance circuit. Among them, the voltage dividing function is beneficial to protecting the system circuit and improving system safety.

[0079] Specifically, the voltage of the super capacitor detected at the first end of the first voltage dividing circuit 202 is denoted as , the resistance value of the first resistor 301 is denoted as , the output of the second end is denoted as , then The calculation formula of is as shown in Formula 1.

[0080] Formula 1

[0081] Through the above technical solution, the first voltage dividing circuit 202 can be simply implemented, reducing the circuit complexity of the system.

[0082] As Figure 3 shown, the second voltage dividing circuit 203 includes a third resistor 303 and a fourth resistor 304;

[0083] One end of the third resistor 303 is connected to the reference voltage, and the other end of the third resistor 303 is respectively connected to one end of the fourth resistor 304 and the reference input terminal of the comparison operator 201; the other end of the fourth resistor 304 is grounded.

[0084] Specifically, the reference voltage is determined based on actual application requirements, such as 3.3V.

[0085] It can be understood that the voltage division function of the second voltage division circuit 203 can be realized by using a resistor circuit, and the circuit complexity is also simpler than that of an impedance circuit. Among them, the voltage division function is beneficial to protecting the system circuit and improving system safety.

[0086] Specifically, the reference voltage is denoted as The resistance value of the third resistor 303 is denoted as The resistance value of the fourth resistor 304 is denoted as The output of the second end of the second voltage division circuit 203 is denoted as Then The calculation formula of is shown in Formula 2.

[0087] Formula 2

[0088] Through the above technical solution, the second voltage division circuit 203 can be simply realized, and the complexity of the system circuit is reduced.

[0089] As Figure 3 shown, the third voltage division circuit 204 includes a fifth resistor 305 and a sixth resistor 306;

[0090] One end of the fifth resistor 305 is connected to the operating voltage of the comparison operator 201, and the other end of the fifth resistor 305 is respectively connected to the output terminal of the comparison operator 201 and one end of the sixth resistor 306; the other end of the sixth resistor 306 is respectively connected to the enable input terminal of the MCU module 103 and the enable input terminal of the power supply module 104.

[0091] It can be understood that the voltage division function of the third voltage division circuit 204 can be realized by using a resistor circuit, and the circuit complexity is also simpler than that of an impedance circuit. Among them, the voltage division function is beneficial to protecting the system circuit and improving system safety.

[0092] Specifically, the output of the comparison operator 201 is denoted as The amplification factor is denoted as Then The calculation formula of can refer to Formula 3.

[0093] Formula 3

[0094] Specifically, the operating voltage of the comparison arithmetic unit 201 is denoted as , the resistance value of the fifth resistor 305 is denoted as , the resistance value of the sixth resistor 306 is denoted as , the enable signal output from the second terminal of the third voltage dividing circuit 204 is denoted as , then The calculation formula of is shown in Formula 4.

[0095] Formula 4

[0096] Specifically, the reduction coefficient can be derived according to the foregoing Formulas 1 to 4, and the positive electrode voltage can be restored according to the reduction coefficient and the voltage of the enable signal.

[0097] It can be understood that the process of deriving the reduction coefficient will increase the complexity, so the voltage detection module 106 is subsequently used to detect the positive electrode voltage.

[0098] In a specific embodiment, it is not necessary to restore the positive electrode voltage, and it is only necessary to ensure that the enable signal is a high-level signal.

[0099] Through the above technical solution, the third voltage dividing circuit 204 can be simply implemented, and the complexity of the system circuit is reduced.

[0100] In a specific embodiment, referring to Figure 4 , which is a schematic structural diagram of another power management system provided by this application, the system further includes an electric switch module 105;

[0101] The positive electrode end of the electric switch module 105 is connected to the positive electrode end of the super capacitor 101, the negative electrode end of the electric switch module 105 is connected to the positive electrode end of the power supply module 104, and the input end of the electric switch module 105 is connected to the switch signal output end of the MCU module 103;

[0102] The MCU module 103 is further configured to send a switch closing signal to the electric switch module 105 after waking up;

[0103] The electric switch module 105 is configured to control the electric switch to close when receiving the switch closing signal, so that a charging circuit of the power supply module 104 and the super capacitor 101 forms a path, and a system circuit of the power supply module 104 and the load forms a path;

[0104] The power supply module 104 is configured to charge the super capacitor 101 after the charging circuit is in a path state, and supply power to the load after the system circuit forms a path.

[0105] In the embodiments of the present application, the electrical switch module 105 may be a high-side MOS switch module, and the switch closing signal may be a high-level PWM signal. The electrical switch module 105 is used to control the on / off of the system loop and the charging loop. Among them, the system loop includes the power supply module 104, the electrical switch module 105, and the load. The charging loop includes the power supply module 104, the electrical switch module 105, and the super capacitor 101.

[0106] Through the above technical solution, the on / off of the system loop and the charging loop can be controlled by using the electrical switch module 105, so as to realize the effective management of the power management system.

[0107] In a specific embodiment, referring to Figure 5 , which is a schematic structural diagram of another power management system provided by the present application, the system further includes a voltage detection module 106:

[0108] The input end of the voltage detection module 106 is connected to the positive terminal of the super capacitor 101, and the output end of the voltage detection module 106 is connected to the first voltage input end of the MCU module 103;

[0109] The voltage detection module 106 is used to detect the voltage at the positive terminal of the super capacitor 101, convert the voltage at the positive terminal of the super capacitor 101 into a first voltage, and transmit the first voltage to the MCU module 103;

[0110] The MCU module 103 is used to restore the first voltage to the voltage at the positive terminal of the super capacitor 101.

[0111] Specifically, the voltage detection module 106 can be implemented by a voltage dividing circuit.

[0112] Through the above technical solution, the voltage detection of the super capacitor can be realized, so as to avoid too large a voltage difference between the super capacitor 101 and the power supply module 104, and improve the safety of the power management system.

[0113] In a specific embodiment, referring to Figure 6 , which is a schematic circuit diagram of a voltage detection module provided by an embodiment of the present application, the voltage detection module 106 includes a seventh resistor 307, an eighth resistor 308, and a ninth resistor 309;

[0114] One end of the seventh resistor 307 is connected to the positive terminal of the super capacitor 101, and the other end of the seventh resistor 307 is respectively connected to one end of the eighth resistor 308 and one end of the ninth resistor 309; the other end of the eighth resistor 308 is connected to the first voltage input end, and the other end of the ninth resistor 309 is grounded.

[0115] Specifically, the resistance value of the seventh resistor 307 is denoted as , the resistance value of the eighth resistor 308 is denoted as , the resistance value of the ninth resistor 309 is denoted as , the first voltage is denoted as , then the positive electrode voltage can be calculated by Formula 5.

[0116] Formula 5

[0117] Through the above technical solution, the voltage detection module 106 can be simply implemented, reducing the complexity of the system circuit.

[0118] In a specific embodiment, referring to Figure 7 , which is a schematic structural diagram of another power management system provided by the embodiment of the present application. The system includes a tenth resistor 310;

[0119] The tenth resistor 310 is connected in series between the negative electrode end of the super capacitor 101 and the negative electrode end of the load end; one end of the tenth resistor 310 is connected to the second voltage input end of the MCU module 103, and the other end of the tenth resistor 310 is connected to the third voltage input end of the MCU module 103;

[0120] The tenth resistor 310 is configured to generate a second voltage and a third voltage at both ends respectively when a load is connected to the load end and the system loop is in a conducting state;

[0121] The MCU module 103 is further configured to detect the second voltage and the third voltage, calculate the difference between the two, calculate the current of the system loop according to the resistance value of the tenth resistor 310 and the difference, and switch the wake-up signal to a sleep signal and transmit the sleep signal to the power supply module 104 to make the power supply module 104 enter a sleep state when the current of the system loop is less than a preset target current value.

[0122] In the embodiment of the present application, the sleep signal can be a voltage signal with a low level.

[0123] Specifically, the preset target current value can be determined based on actual requirements.

[0124] Specifically, the second voltage is denoted as , the third voltage is denoted as , the resistance value of the tenth resistor 310 is denoted as , the current of the system loop is denoted as , then The calculation of is shown in Formula 6.

[0125] Formula 6

[0126] Detect the circuit of the system loop through the voltage across the tenth resistor. Not only is the circuit implementation simple, but it can also reduce the risk of overcurrent in the system loop and improve the safety of the power management system.

[0127] In a specific embodiment:

[0128] The wake-up module 102 is further configured to switch the enable signal to a disable signal and transmit the disable signal to the MCU module 103 when detecting that the voltage at the positive terminal of the super capacitor 101 is at a high level;

[0129] The MCU module 103 is further configured to send a switch-off signal to the electric switch module 105 when the current in the system loop is less than a preset target current value and the disable signal is received, and enter the sleep state after receiving the confirmation signal returned by the electric switch module 105;

[0130] The electric switch module 105 is further configured to control the electric switch to open when receiving the switch-off signal.

[0131] Specifically, the switch-off signal may be a PWM signal with a low level.

[0132] Specifically, the principle of the above technical solution may be: when no load is connected to the load end, the voltage of the super capacitor 101 is at a high level, and the loop current is less than the preset target current value. The wake-up module 102 detects the high-level voltage of the super capacitor and outputs a low-level cut-off signal. When the MCU module 103 receives the cut-off signal and detects that the loop current is too small, it can determine that no load is connected to the load end, and can send a sleep signal to the power supply module 104 and send the switch-off signal to the electric switch module 105, so that the power supply module 104 enters the sleep state and the electric switch of the electric switch module 105 opens, thereby opening the system loop and the charging loop.

[0133] Through the above technical solution, the MCU module and the power supply module inside the power management system can be controlled to enter the sleep state when no load is connected, reducing the system power consumption.

[0134] The implementation principle of the embodiments of this application is as follows: In the BMS based on a high-side MOS, a wake-up module 102, a voltage detection module 106, and a current detection circuit (tenth resistor 310) are adopted. The wake-up module 102 is used to detect the voltage of the supercapacitor, and it is determined whether there is a load connected to the load end of the system according to the voltage of the supercapacitor 101. When the voltage of the supercapacitor 101 is at a high level, it is determined that there is a load connected, and thus a high-level enable signal is output to enable the MCU module 103 and activate the power supply module 104. After the MCU module 103 wakes up, it outputs a wake-up signal to wake up the power supply module 104. The voltage detection module 106 uses its voltage division characteristic to detect the voltage of the supercapacitor 101, which can avoid damaging the MCU module 103 due to excessive voltage. The current of the system loop is obtained through simple calculation using the voltage across both ends of the tenth resistor 310 and its resistance value.

[0135] The embodiments of this specific implementation manner are all preferred embodiments of the present invention, and do not limit the protection scope of the present invention accordingly. Therefore, all equivalent changes made according to the structure, shape, and principle of the present invention should be covered within the protection scope of the present invention.

[0136] Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the protection scope of this application.

[0137] It should be noted that the terms "first", "second", etc. in the specification, claims, and the above-mentioned drawings of this application are used to distinguish similar objects, and do not necessarily need to be used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances, so that the embodiments of this application described here can be implemented in an order other than those illustrated or described here. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, including a series of steps or units means that other steps or units not clearly listed or inherent to these processes, methods, products, or devices may be included.

Claims

1. A power management system, characterized in that, It includes a wake-up module, a super capacitor, an MCU module, and a power supply module; The input end of the wake-up module is connected to the positive terminal of the super capacitor, and the output end of the wake-up module is respectively connected to the enable input end of the MCU module and the enable input end of the power supply module; the wake-up output end of the MCU module is connected to the wake-up input end of the power supply module; the super capacitor is connected in parallel with the load terminal; The super capacitor is used to discharge when the load terminal accesses a load, and the voltage at the positive terminal changes from a high level to a low level; The wake-up module is used to output an enable signal to wake up the MCU module and activate the power supply module when detecting that the voltage at the positive terminal of the super capacitor is at a low level; The wake-up module includes a comparison operator, a first voltage division circuit, and a second voltage division circuit. The first end of the first voltage division circuit is connected to the positive terminal of the super capacitor, the second end of the first voltage division circuit is connected to the target input end of the comparison operator, the first end of the second voltage division circuit accesses a reference voltage, and the second end of the second voltage division circuit is connected to the reference input end of the comparison operator; The MCU module is used to output a wake-up signal to the power supply module after waking up to wake up the activated power supply module; The system includes a tenth resistor, and the tenth resistor is connected in series between the negative terminal of the super capacitor and the negative terminal of the load terminal. The tenth resistor is used to generate a second voltage and a third voltage at both ends respectively when the load terminal accesses a load and the system loop of the load is in a conducting state. The MCU module is further used to detect the second voltage and the third voltage, calculate the difference between the two, calculate the current of the system loop of the load according to the resistance value of the tenth resistor and the difference, and make the power supply module go into sleep when the current of the system loop of the load is less than a preset target current value.

2. The power management system according to claim 1, wherein The third end of the first voltage division circuit is grounded; the third end of the second voltage division circuit is grounded; The wake-up module further includes a third voltage division circuit. The first end of the third voltage division circuit accesses the operating voltage of the comparison operator, the second end of the third voltage division circuit is connected to the enable input end of the MCU module and the enable input end of the power supply module, and the third end of the third voltage division circuit is connected to the output end of the comparison operator.

3. The power management system according to claim 2, wherein The first voltage division circuit includes a first resistor and a second resistor; One end of the first resistor is connected to the positive terminal of the super capacitor, and the other end of the first resistor is respectively connected to one end of the second resistor and the target input end of the comparison operator; the other end of the second resistor is grounded.

4. The power management system according to claim 2, characterized in that, The second voltage division circuit includes a third resistor and a fourth resistor; One end of the third resistor accesses the reference voltage, and the other end of the third resistor is respectively connected to one end of the fourth resistor and the reference input end of the comparison operator; the other end of the fourth resistor is grounded.

5. The power management system according to claim 2, characterized in that, The third voltage division circuit includes a fifth resistor and a sixth resistor; One end of the fifth resistor is connected to the operating voltage of the comparison and operation unit, and the other end of the fifth resistor is respectively connected to the output end of the comparison and operation unit and one end of the sixth resistor; the other end of the sixth resistor is respectively connected to the enable input end of the MCU module and the enable input end of the power supply module.

6. The power management system according to claim 1, wherein The system further includes an electric switch module; The positive end of the electric switch module is connected to the positive end of the super capacitor, the negative end of the electric switch module is connected to the positive end of the power supply module, and the input end of the electric switch module is connected to the switch signal output end of the MCU module; The MCU module is further configured to send a switch closing signal to the electric switch module after waking up; The electric switch module is configured to control the electric switch to close when receiving the switch closing signal, so that a charging circuit of the power supply module and the super capacitor forms a path, and a system circuit of the power supply module and the load forms a path; The power supply module is configured to charge the super capacitor after the charging circuit forms a path, and supply power to the load after the system circuit of the load forms a path.

7. The power management system according to claim 1, characterized in that, The system further includes a voltage detection module: The input end of the voltage detection module is connected to the positive end of the super capacitor, and the output end of the voltage detection module is connected to the first voltage input end of the MCU module; The voltage detection module is configured to detect the voltage at the positive end of the super capacitor, convert the voltage at the positive end of the super capacitor into a first voltage, and transmit the first voltage to the MCU module; The MCU module is configured to restore the first voltage to the voltage at the positive end of the super capacitor.

8. The power management system according to claim 7, wherein The voltage detection module includes a seventh resistor, an eighth resistor, and a ninth resistor; One end of the seventh resistor is connected to the positive end of the super capacitor, and the other end of the seventh resistor is respectively connected to one end of the eighth resistor and one end of the ninth resistor; The other end of the eighth resistor is connected to the first voltage input end, and the other end of the ninth resistor is grounded.

9. The power management system according to claim 6, wherein One end of the tenth resistor is connected to the second voltage input end of the MCU module, and the other end of the tenth resistor is connected to the third voltage input end of the MCU module; When the current in the system circuit of the load is less than a preset target current value, switch the wake-up signal to a sleep signal, and transmit the sleep signal to the power supply module to make the power supply module sleep.

10. The power management system according to claim 9, wherein The wake-up module is further configured to switch the enable signal to a disable signal and transmit the disable signal to the MCU module when detecting that the voltage at the positive end of the super capacitor is at a high level; The MCU module is further configured to send a switch opening signal to the electric switch module when the current in the system circuit of the load is less than a preset target current value and the disable signal is received, and enter the sleep state after receiving the confirmation signal returned by the electric switch module; The electric switch module is further configured to control the electric switch to open when receiving the switch opening signal.

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