Manufacturing method of multi-layer metasurface optical device and multi-layer metasurface optical device
By exposing and using engraving marks for positioning during the processing of multi-layer metasurface optical devices, the accuracy error problem caused by engraving marks is solved, and the accuracy and optical performance of the device are significantly improved.
Patent Information
- Application Number
- CN202311501168.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-13
- Publication Date
- 2025-05-13
AI Technical Summary
During the processing process, the existing multi-layer metasurface optical devices accumulate accuracy errors due to multiple machining and engraving marks, which seriously affects the optical performance.
After processing the first layer of pattern, a second dielectric layer is provided and etched with the first protective layer to expose the engraving mark, and then positioning and processing the second layer of pattern through the engraving mark to reduce accuracy error.
Through this method, the error caused by subsequent repeated processing of the engraving mark is reduced, and the error is reduced to 500nm, greatly improving the accuracy and optical performance of the multi-layer metasurface optical device.
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Figure CN119987144A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of metasurface devices, and in particular to a method for manufacturing a multi-layer metasurface optical device and a multi-layer metasurface optical device. Background Art
[0002] A metasurface is an artificial layered material with a subwavelength nanostructure. In the visible light band, the basic structural unit of the metasurface is a nanostructure unit, with a size ranging from tens of nanometers to hundreds of nanometers, and its size is smaller than the working wavelength.
[0003] Metasurfaces are ultra-light and ultra-thin. Compared with traditional optical devices, metasurface optical devices made based on metasurfaces have the advantages of excellent optical performance, small size, and high integration. They have broad applications in future portable miniaturized devices, such as augmented reality wearable devices, virtual reality wearable devices, and mobile terminal lenses.
[0004] Metasurface optical devices can be designed as single-layer metasurfaces or multi-layer metasurfaces as needed. For multi-layer metasurface optical devices, the current production and processing is to first process the overlay mark, use the overlay mark for positioning and exposure, and after processing the first layer of metasurface structure, a new overlay mark is processed again corresponding to the position of the previous overlay mark, and the new overlay mark is used for positioning and exposure to process the second layer of metasurface structure. When processing the new overlay mark, an error has already occurred between the original overlay mark, plus the positioning error, resulting in a precision error of 2-3μm between the two layers of metasurface structure. As the number of layers of the metasurface structure increases, after repeated processing of multiple layers of overlay marks, the precision error gradually accumulates, which will eventually seriously affect the optical performance of the multi-layer metasurface optical device. Summary of the invention
[0005] The purpose of the present invention is to provide a method for manufacturing a multi-layer metasurface optical device. After the first layer of graphics is processed and the second dielectric layer is set, the second dielectric layer and the first protective layer that protects the first layer of graphics are first etched to expose the overlay mark, so that in the subsequent graphics processing process, the overlay mark is always used for positioning, which greatly reduces the precision error and solves the problem of the influence of multiple processing of overlay marks on the performance of the multi-layer metasurface optical device in the prior art.
[0006] In order to achieve one of the above-mentioned purposes of the invention, an embodiment of the present invention provides a method for manufacturing a multilayer metasurface optical device, comprising the following steps:
[0007] Arranging an overlay mark and a first dielectric layer on the substrate surface, or, after arranging the first dielectric layer on the substrate surface, forming an overlay mark on the first dielectric layer;
[0008] Positioning is performed by overlay marking, and the first dielectric layer is etched to form a first layer pattern in the first dielectric layer;
[0009] Filling the first layer of graphics to form a first protective layer;
[0010] Disposing a second dielectric layer on the surface of the first protective layer, and performing a first etching on the second dielectric layer and the first protective layer to expose the aforementioned overlay mark;
[0011] Positioning is performed again by using the aforementioned overlay marks, and the second dielectric layer is etched a second time to form a second layer pattern on the second dielectric layer.
[0012] As a further improvement of one embodiment of the present invention, the manufacturing method also includes: before the second dielectric layer and the first protective layer are etched for the first time, a mask is set on the surface of the second dielectric layer, and the mask is exposed to retain the mask above the first layer pattern, and an etching area without a mask is formed above the overlay mark, thereby etching the second dielectric layer and the first protective layer in the etching area to expose the aforementioned overlay mark.
[0013] As a further improvement of an embodiment of the present invention, the material of the mask is a photoresist or a metal.
[0014] As a further improvement of an embodiment of the present invention, when the material of the mask is a photoresist, the manufacturing method further includes: before etching the second dielectric layer for the second time, using N-methylpyrrolidone solvent heated to 80-120° C. to dissolve and remove the mask.
[0015] As a further improvement of an embodiment of the present invention, the first dielectric layer and / or the second dielectric layer is selected from amorphous silicon, titanium dioxide, silicon nitride, and the first protective layer is silicon dioxide or PMMA.
[0016] As a further improvement of an embodiment of the present invention, when the second dielectric layer and the first protective layer are etched for the first time, fluorine-based gas is used to dry etch and remove the second dielectric layer and the first protective layer in the etched area.
[0017] As a further improvement of one embodiment of the present invention, the fluorine-based gas is a mixed gas of trifluoromethane and sulfur hexafluoride.
[0018] As a further improvement of an embodiment of the present invention, the height of the first protective layer is higher than the height of the first dielectric layer, so that the second dielectric layer and the first dielectric layer are spaced apart in a direction perpendicular to the substrate.
[0019] As a further improvement of one embodiment of the present invention, the process of setting the first dielectric layer on the substrate surface and setting the second dielectric layer on the first protective layer surface includes magnetron sputtering, electron beam evaporation, chemical vapor deposition and atomic layer deposition.
[0020] As a further improvement of an embodiment of the present invention, the overlay mark is formed by metal plating on the first dielectric layer using a lift-off process.
[0021] One embodiment of the present invention further provides a multilayer metasurface optical device, comprising:
[0022] substrate;
[0023] A first supersurface structure layer is arranged on the surface of the substrate, wherein the first supersurface structure layer is formed with an overlay mark, a plurality of first supersurface units, and a first protective layer covering the plurality of first supersurface units, wherein the overlay mark is not covered by the first protective layer;
[0024] The second super surface structure layer comprises a plurality of second super surface units arranged on the side of the first super surface structure layer away from the substrate, and a second protective layer covering the second super surface units and the overlay marks.
[0025] One or more technical solutions provided by the present invention have at least the following technical effects or advantages:
[0026] In the manufacturing method of the multi-layer metasurface optical device provided by the present invention, after processing the first layer of graphics and setting the second dielectric layer, before starting to process the second layer of graphics, the second dielectric layer and the first protective layer protecting the first layer of graphics are first etched to expose the overlay mark, and then the overlay mark is used for positioning to start processing the second layer of graphics, thereby reducing the error caused by subsequent repeated processing of the overlay mark, so that the error can be reduced to 500nm, thereby greatly improving the accuracy of the multi-layer metasurface optical device. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] FIG. 1( a ) is a schematic diagram of the structure after the first dielectric layer is provided on the surface of the substrate in step S1 .
[0028] FIG. 1( b ) is a schematic diagram of the structure after photoresist is coated on the surface of the first dielectric layer in step S11 .
[0029] FIG. 1( c ) is a schematic diagram of the structure after the photoresist is exposed in step S12 .
[0030] FIG. 1( d ) is a schematic diagram of the structure after metal plating in step S13 .
[0031] FIG. 1( e ) is a schematic diagram of the structure after the photoresist is dissolved in step S14 .
[0032] FIG. 1( a ′) is a schematic diagram of the structure after photoresist is coated on the surface of the substrate in step S11 ′.
[0033] FIG. 1( b ′) is a schematic structural diagram of the photoresist after exposure in step S12 ′.
[0034] FIG. 1( c ′) is a schematic diagram of the structure after metal plating in step S13 ′.
[0035] FIG. 1( d ′) is a schematic diagram of the structure after the photoresist is dissolved in step S14 ′.
[0036] FIG. 1( e ′) is a schematic structural diagram of the process after photoresist is coated on the surface of the substrate provided with the overlay mark in step S15 ′.
[0037] FIG. 1( f ′) is a schematic structural diagram of the photoresist after exposure in step S16 ′.
[0038] FIG. 1( g ′) is a schematic structural diagram of the step S17 ′ after the first dielectric layer is disposed on the surface of the substrate on which the photoresist is disposed.
[0039] FIG. 1( h ′) is a schematic diagram of the structure after the photoresist is dissolved in step S18 ′.
[0040] FIG. 2( a ) is a schematic diagram of the structure after a first photoresist layer is provided on the first dielectric layer in step S21 .
[0041] FIG. 2( b ) is a schematic diagram of the structure after the first photoresist layer is exposed in step S22 .
[0042] FIG. 2( c ) is a schematic diagram of the structure after the first dielectric layer is etched in step S23 .
[0043] FIG. 2( d ) is a schematic diagram of the structure after the first photoresist layer is dissolved in step S24 .
[0044] Figure 3 It is a schematic diagram of the structure after the first protective layer is arranged on the surface of the first dielectric layer.
[0045] FIG. 4( a ) is a schematic diagram of the structure after the second dielectric layer is disposed on the surface of the first protective layer in step S41 .
[0046] FIG. 4( b ) is a schematic diagram of the structure after a mask is provided on the surface of the second dielectric layer in step S42 .
[0047] FIG4( c ) is a schematic diagram of the structure after the mask is exposed in step S43 .
[0048] FIG4(d) is a schematic diagram of the structure after the second dielectric layer and the first protective layer are etched for the first time in step S44.
[0049] FIG. 4( e ) is a schematic diagram of the structure after the mask is dissolved in step S45 .
[0050] Figures 5(a) to 5(d) For reference Figure 2(a) to Figure 2(d) Schematic diagram of the structure after processing the second layer of graphics in each step.
[0051] Figure 6 It is a schematic diagram of the structure of a multi-layer metasurface optical device in an embodiment of the present invention.
[0052] 1. Substrate; 2. First dielectric layer; 3. Overlay mark; 4. First photoresist layer; 5. First protective layer; 6. Second dielectric layer; 7. Mask; 8. Second photoresist layer; 9. Second protective layer. DETAILED DESCRIPTION
[0053] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0054] Terms such as "center", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like used herein to indicate spatial relative positions are used for the purpose of convenience to describe the relationship of one unit or feature relative to another unit or feature as shown in the accompanying drawings. Terms of spatial relative positions may be intended to include different orientations of the device in use or operation other than the orientation shown in the drawings.
[0055] For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below" can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
[0056] Furthermore, it should be understood that although the terms first, second, etc. may be used to describe various elements or structures in this article, these described objects should not be limited by these terms. These terms are only used to distinguish these described objects from each other. For example, the first dielectric layer may be referred to as the second dielectric layer, and similarly the second dielectric layer may also be referred to as the first dielectric layer, which does not deviate from the scope of protection of this application.
[0057] An embodiment of the present invention provides a method for manufacturing a multi-layer metasurface optical device, as shown in FIG1 , comprising the following steps:
[0058] S1, providing an overlay mark 3 and a first dielectric layer 2 on the surface of the substrate 1, or providing the first dielectric layer 2 on the surface of the substrate 1 and then forming an overlay mark 3 on the first dielectric layer 2;
[0059] S2, positioning by overlaying the mark 3, etching the first dielectric layer 2, and forming a first layer pattern in the first dielectric layer 2;
[0060] S3, filling the first layer of graphics to form a first protective layer 5;
[0061] S4, disposing a second dielectric layer 6 on the surface of the first protective layer 5, and performing a first etching on the second dielectric layer 6 and the first protective layer 5 to expose the aforementioned overlay mark 3;
[0062] S5 , positioning is performed again by using the aforementioned overlay mark 3 , etching the second dielectric layer 6 for the second time, and forming a second layer pattern on the second dielectric layer 6 .
[0063] It should be noted that the above numbers S1, S2, S3, S4, S5 and the numbers used below are all numbers made for the convenience of description and do not limit the sequence of the steps.
[0064] In the present invention, before etching the second dielectric layer 6 for the second time to obtain the second layer of patterns, the second dielectric layer 6 and the first protective layer 5 are etched to expose the overlay mark 3, so that the positioning mark used for etching the second dielectric layer 6 for the second time to obtain the second layer of patterns and the positioning mark used for producing the first layer of patterns are the same as the overlay mark 3 on the first dielectric layer 2, so that the error between the two layers of patterns is as low as 500nm, which greatly improves the optical performance of the final product.
[0065] When producing multi-layer metasurface optical devices, it is usually necessary to select materials for forming the metasurface structure, and the corresponding materials are selected to be formed on the surface of the substrate 1 through processes such as magnetron sputtering, electron beam evaporation, chemical vapor deposition and atomic layer deposition. Step S1 is the first dielectric layer 2, wherein the material of the first dielectric layer 2 forming the metasurface structure is preferably amorphous silicon, titanium dioxide, silicon nitride, etc.
[0066] After the first dielectric layer 2 is formed, a photoresist needs to be coated on the surface of the first dielectric layer 2, and the photoresist is exposed to form a pre-designed pattern on the photoresist. However, before exposure, an overlay mark 3 needs to be formed on the first dielectric layer 2 so as to be positioned with the mask having the desired pattern formed during exposure through the overlay mark 3 on the first dielectric layer 2. In this embodiment, step 1 forms the overlay mark 3 by metallizing the first dielectric layer 2 through a lift-off process.
[0067] Specifically, the lift-off process in step 1 includes:
[0068] S11, using a pipette gun to drop photoresist on the surface of the first dielectric layer 2, and starting a photoresist coating machine to start spin coating;
[0069] S12, after the photoresist coating is completed, the photoresist is exposed and developed;
[0070] S13, metal plating;
[0071] S14, removing the remaining photoresist using a solvent.
[0072] like Figure 1(b) to 1(e) , is a schematic diagram of the structure obtained after steps S11 to S14 are completed. In step S11, after the photoresist is spin-coated, the photoresist is pre-baked. On the one hand, the solvent in the photoresist is dried to improve the adhesion between the photoresist and the first dielectric layer 2. On the other hand, the photoresist is prevented from adhering to the mask having the overlay mark 3 pattern formed in step S12, resulting in contamination of the mask having the overlay mark 3 pattern. In step S12, the photoresist is exposed using the mask having the overlay mark 3 pattern formed, so that the overlay mark 3 pattern on the mask is formed on the photoresist; in step S13, when metal is plated, a part of the metal is attached to the surface of the photoresist, and another part of the metal is attached to the surface of the first dielectric layer 2. In step S14, when the solvent dissolves the photoresist, the metal on the surface of the photoresist is peeled off as the photoresist is dissolved, and finally the overlay mark 3 directly attached to the first dielectric layer 2 is left.
[0073] The metal plated by the lift-off process is preferably chromium, that is, the overlay mark 3 is made of metal chromium, and the overlay mark 3 made of metal chromium provides positioning for subsequent exposure.
[0074] The aforementioned steps S11 to S14 are specific steps of setting an overlay mark 3 on the first dielectric layer 2 after setting the first dielectric layer 2 on the surface of the substrate 1. In addition, the first dielectric layer 2 and the overlay mark 3 may be set on the surface of the substrate 1 respectively. The steps are as follows:
[0075] S11', using a pipette gun to drop photoresist on the surface of substrate 1, and starting a photoresist machine to start spin coating;
[0076] S12', after the photoresist coating is completed, the photoresist is exposed and developed;
[0077] S13', metallization;
[0078] S14', removing the remaining photoresist with a solvent to obtain an overlay mark 3;
[0079] S15', using a pipette gun to drop photoresist on the substrate surface with the overlay mark 3, and starting the photoresist machine to start spin coating;
[0080] S16', after the photoresist coating is completed, the photoresist is exposed and developed, and the photoresist above the overlay mark 3 is retained;
[0081] S17', setting a first dielectric layer 2;
[0082] S18 ′, removing the remaining photoresist with a solvent to obtain a first dielectric layer 2 .
[0083] Steps S11' to S14' are basically the same as steps S11 to S14, except that step S11' directly coats photoresist on substrate 1, after step S14' obtains overlay mark 3, step S15' coats photoresist again on the surface of substrate 1 with overlay mark 3, step S16' is for covering overlay mark 3 to avoid direct contact between first dielectric layer 2 and overlay mark 3 when setting first dielectric layer 2 in step S17', and step S18' removes photoresist above overlay mark 3 and removes excess first dielectric layer 2 above photoresist at the same time, so that overlay mark 3 is exposed and not covered by first dielectric layer 2.
[0084] An overlay mark 3 is set on the surface of the first dielectric layer 2. Compared with setting the overlay mark 3 and the first dielectric layer 2 together on the surface of the substrate 1, when the first protective layer 5 and the second dielectric layer 6 are subsequently etched, there is a risk that the overlay mark 3 set on the surface of the first dielectric layer 2 will fall off.
[0085] Further, the subsequent steps are performed after the overlay mark 3 is set on the surface of the first dielectric layer 2. Specifically, step S2 includes:
[0086] S21, using a pipette gun to drop photoresist on the surface of the first dielectric layer 2, and starting a coating machine to start spin coating, and then heating to achieve pre-baking, to form the first photoresist layer 4 in FIG. 2(a);
[0087] S22, positioning with the overlay mark 3, exposing and developing the first photoresist layer 4, and forming a target pattern on the first photoresist layer 4;
[0088] S23, etching the first dielectric layer 2 through the target pattern on the first photoresist layer 4, so as to form a desired first layer pattern on the first dielectric layer 2;
[0089] S24, using a solvent to dissolve and remove the remaining photoresist of the first photoresist layer 4.
[0090] In step 22, the overlay mark 3 is positioned with the mark for positioning on the mask having the desired pattern, and then exposed and developed. The types of photoresists include positive photoresists and negative photoresists. When positive photoresists are used, the polymer molecular chains in the photoresist irradiated by light are cracked, and the exposed area is removed in the developer, leaving the unexposed part; when negative photoresists are used, the polymers in the photoresist irradiated by light undergo cross-linking reactions, and the unexposed area is removed in the developer, leaving the exposed area, and finally forming the target pattern on the first photoresist layer 4.
[0091] In this embodiment, positive photoresist is taken as an example. After the first photoresist layer 4 is exposed, the photoresist in the exposed area is ablated and decomposed, and a pre-designed pattern is formed in the unexposed area; then a developer is used to remove the photoresist exposed to light, so that the pattern can be better displayed in the first photoresist layer 4.
[0092] In step S23 , when etching the first dielectric layer 2 , the first dielectric layer 2 other than the portion covered by the first photoresist layer 4 is etched away.
[0093] After steps S21 to S24 are completed, a pattern is formed on the first dielectric layer 2, the processing of the first layer pattern is completed, and the first layer super surface structure is obtained.
[0094] Before processing the second layer of graphics, the first layer of graphics needs to be covered to prevent the first layer of graphics from affecting the processing of the second layer of graphics. To this end, step 3 is required, such as Figure 3 As shown, the first protective layer 5 is filled on the surface of the first dielectric layer 2, so that the first protective layer 5 covers the first layer pattern, thereby preventing the first layer pattern from affecting subsequent processing.
[0095] Preferably, the height of the filled first protective layer 5 is higher than the height of the first dielectric layer 2, that is, the first protective layer 5 not only needs to fill the holes formed by etching the first dielectric layer 2, but also needs to cover the surface of the first dielectric layer 2, so that the first dielectric layer 2 is spaced apart from the second dielectric layer 6 set later, that is, the first layer pattern and the second layer pattern formed by subsequent processing are spaced apart. The material of the first protective layer 5 needs to have a large refractive index difference with the first dielectric layer 2, and preferably, the material of the first protective layer 5 is silicon dioxide or polymethyl methacrylate (PMMA).
[0096] After the first protective layer 5 covers the first layer of pattern, it is also necessary to select a material for forming a second layer of super surface structure. The corresponding material is selected and formed on the surface of the first protective layer 5 through processes such as magnetron sputtering, electron beam evaporation, chemical vapor deposition and atomic layer deposition. The second dielectric layer 6 in step S4 is formed. The second dielectric layer 6 forming the second layer of super surface structure is preferably amorphous silicon, titanium dioxide, silicon nitride, etc., and the material of the second dielectric layer 6 can be the same as the material of the first dielectric layer 2, or different from the material of the first dielectric layer 2.
[0097] After the second dielectric layer 6 is set, the second layer of graphic processing begins. At this time, the overlay mark 3 formed on the first dielectric layer 2 is covered by the first protective layer 5 and the second dielectric layer 6, and the positioning function cannot be achieved. In the traditional process, a new overlay mark 3 needs to be re-formed on the second dielectric layer 6 at the position corresponding to the overlay mark 3 on the first dielectric layer 2, and the new overlay mark 3 formed on the second dielectric layer 6 is used for positioning and exposure.
[0098] However, in this embodiment, step S4 is performed to expose the overlay mark 3. Specifically, step S4 includes:
[0099] S41, disposing a second dielectric layer 6 as shown in FIG. 4( a ) on the surface of the first protective layer 5;
[0100] S42, coating a mask 7 as shown in FIG. 4(b) on the surface of the second dielectric layer 6;
[0101] S43, exposing and developing the mask 7;
[0102] S44, performing a first etching on the second dielectric layer 6 and the first protective layer 5;
[0103] S45 , using a solvent to dissolve and remove the mask 7 .
[0104] In step S43, the mask 7 is exposed and developed, as shown in FIG4(c), so that the mask 7 above the first layer pattern is retained, and an etching area without the mask 7 is formed above the overlay mark 3. In step S44, the second dielectric layer 6 and the first protective layer 5 in the etching area are etched. The second dielectric layer 6 and the first protective layer 5 can be etched in sequence, first etching the second dielectric layer 6 in the etching area, and then etching the first protective layer 5 in the etching area; or etching can be completed at one time.
[0105] When the second dielectric layer 6 and the first protective layer 5 are made of the same material, etching can be completed in one step. When the second dielectric layer 6 and the first protective layer 5 are made of different materials, they can be etched in sequence using a method with better etching speed and etching accuracy. Of course, a better method can also be chosen as a compromise to etch in one step.
[0106] Preferably, when etching the second dielectric layer 6 and the first protective layer 5, a fluorine-based gas is used to dry etch and remove the second dielectric layer 6 and the first protective layer 5 in the etched area. Preferably, the fluorine-based gas is a mixed gas of trifluoromethane and sulfur hexafluoride.
[0107] After step S44, as shown in FIG4(d), the projection of the mask 7 retained after exposure and development does not overlap with the projection of the overlay mark 3 in the direction perpendicular to the substrate 1, that is, the mask 7 does not cover the overlay mark 3 at this time, and the two are spaced apart in the horizontal direction.
[0108] Preferably, the material of the mask 7 is a photoresist or a metal. In this embodiment, the mask 7 is a photoresist, so that the mask 7 can be exposed and developed. In step S45, the mask 7 can be removed by dissolving the mask 7 using N-methylpyrrolidone (NMP) solvent heated to 80-120°C.
[0109] It should be noted here that since the overlay mark 3 is usually set at the outer edge of the first dielectric layer 2, there is a certain distance between the first layer pattern and the overlay mark 3. The distance between the first layer pattern and the overlay mark 3 is much larger than the accuracy of processing the multi-layer supersurface structure. Therefore, when exposing and developing the mask 7, there is no need for precise positioning, only rough positioning is required.
[0110] After the overlay mark 3 is exposed, step S5 can be performed to produce the second layer pattern. The specific process of step S5 refers to the aforementioned steps S21 to S24. The difference is that Figures 5(a) to 5(d) In step S21, photoresist is dripped on the surface of the second dielectric layer 6. In step S23, the second photoresist layer 8 is exposed to form a target pattern. In step S24, the second dielectric layer 6 is etched for the second time through the second photoresist layer 8 to form a second layer pattern and obtain a second layer of super surface structure.
[0111] During the processing of the second layer of graphics, the overlay mark 3 used for exposure is the same as the overlay mark 3 used for exposure during the processing of the first layer of graphics, which can avoid the precision error caused by the secondary processing of the overlay mark 3.
[0112] Of course, the present invention does not limit the number of processing layers to two layers. After step S5 is completed, the second layer pattern can be filled with reference to step S3 and steps S41 to S45 to form a second protective layer 9, and a third dielectric layer is set on the second protective layer 9, and the third dielectric layer and the second protective layer 9 are etched to expose the overlay mark 3 again, and then the overlay mark 3 on the first dielectric layer 2 is used for positioning again to form a third layer pattern, and this cycle is repeated until the target number of layers of the super surface structure is obtained. After the target number of layers of the super surface structure is obtained, the substrate 1 can be thinned on the side away from the super surface structure by using chemical mechanical polishing (CMP) and other processes as needed.
[0113] An embodiment of the present invention also provides a multi-layer metasurface optical device, comprising a substrate 1, a first metasurface structure layer and a second metasurface structure layer, wherein the first metasurface structure layer is arranged on the surface of the substrate 1, and an overlay mark 3, a plurality of first metasurface units, and a first protective layer 5 covering the aforementioned plurality of first metasurface units are formed in the first metasurface structure layer, wherein the overlay mark 3 is not covered by the first protective layer 5; the second metasurface structure layer has a plurality of second metasurface units arranged on the side of the first metasurface structure layer away from the substrate 1, and a second protective layer 9 covering the second metasurface units and the overlay mark 3.
[0114] The metasurface structure of the multi-layer metasurface optical device is processed by the aforementioned manufacturing method of the multi-layer metasurface optical device. Figure 6That is, it is a schematic diagram of a metasurface optical device with a two-layer metasurface structure processed by the aforementioned manufacturing method of a multi-layer metasurface optical device.
[0115] It should be noted here that the second supersurface structure layer can be directly arranged on the first supersurface structure layer, or the second supersurface structure layer can be arranged after other structure layers are arranged on the first supersurface structure layer, and the present invention does not limit this.
[0116] It should be understood that although this specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each implementation mode may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.
[0117] The series of detailed descriptions listed above are only specific descriptions of feasible implementation methods of the present invention. They are not intended to limit the scope of protection of the present invention. Any equivalent implementation methods or changes that do not deviate from the technical spirit of the present invention should be included in the scope of protection of the present invention.
Claims
1. A method for manufacturing a multi-layer metasurface optical device, characterized in that: The steps include: Arranging an overlay mark and a first dielectric layer on the substrate surface, or, after arranging the first dielectric layer on the substrate surface, forming an overlay mark on the first dielectric layer; Positioning is performed by overlay marking, and the first dielectric layer is etched to form a first layer pattern in the first dielectric layer; Filling the first layer of graphics to form a first protective layer; Disposing a second dielectric layer on the surface of the first protective layer, and performing a first etching on the second dielectric layer and the first protective layer to expose the aforementioned overlay mark; Positioning is performed again by using the aforementioned overlay marks, and the second dielectric layer is etched a second time to form a second layer pattern on the second dielectric layer.
2. The method for manufacturing a multilayer metasurface optical device according to claim 1, characterized in that: The manufacturing method also includes: before the second dielectric layer and the first protective layer are etched for the first time, a mask is set on the surface of the second dielectric layer, and the mask is exposed to light so that the mask above the first layer pattern is retained, and an etching area without a mask is formed above the overlay mark, thereby etching the second dielectric layer and the first protective layer in the etching area to expose the aforementioned overlay mark.
3. The method for manufacturing a multilayer metasurface optical device according to claim 2, characterized in that: The material of the mask is a photoresist or metal.
4. The method for manufacturing a multilayer metasurface optical device according to claim 3, characterized in that: When the material of the mask is a photoresist, the manufacturing method further comprises: before etching the second dielectric layer for the second time, using N-methylpyrrolidone solvent heated to 80-120° C. to dissolve and remove the mask.
5. The method for manufacturing a multi-layer metasurface optical device according to claim 1, characterized in that: The first dielectric layer and / or the second dielectric layer are selected from amorphous silicon, titanium dioxide, and silicon nitride, and the first protective layer is silicon dioxide or PMMA.
6. The method for manufacturing a multilayer metasurface optical device according to claim 5, characterized in that: When the second dielectric layer and the first protective layer are etched for the first time, the second dielectric layer and the first protective layer in the etching area are removed by dry etching using fluorine-based gas.
7. The method for manufacturing a multi-layer metasurface optical device according to claim 6, characterized in that: The fluorine-based gas is a mixed gas of trifluoromethane and sulfur hexafluoride.
8. The method for manufacturing a multi-layer metasurface optical device according to claim 1, characterized in that: The height of the first protection layer is higher than that of the first dielectric layer, so that the second dielectric layer and the first dielectric layer are spaced apart from each other in a direction perpendicular to the substrate.
9. The method for manufacturing a multi-layer metasurface optical device according to claim 1, characterized in that: The process of arranging the first dielectric layer on the surface of the substrate and the second dielectric layer on the surface of the first protective layer includes magnetron sputtering, electron beam evaporation, chemical vapor deposition and atomic layer deposition.
10. The method for manufacturing a multi-layer metasurface optical device according to claim 1, characterized in that: The overlay mark is formed by metallizing the first dielectric layer using a lift-off process.
11. A multi-layer metasurface optical device, characterized in that: include: substrate; A first supersurface structure layer is arranged on the surface of the substrate, wherein the first supersurface structure layer is formed with an overlay mark, a plurality of first supersurface units, and a first protective layer covering the plurality of first supersurface units, wherein the overlay mark is not covered by the first protective layer; The second super surface structure layer comprises a plurality of second super surface units arranged on the side of the first super surface structure layer away from the substrate, and a second protective layer covering the second super surface units and the overlay marks.