A deep trench etching method

Abstract

The present invention discloses a deep trench etching method, belonging to the field of semiconductor technology. The deep trench etching method includes the following steps: providing a substrate and covering a mask layer on the substrate; etching the mask layer to form at least two first openings with a gap therebetween; performing ion implantation along the first openings into the substrate to form a first ion implantation region with a certain height; removing the mask layer between the first openings; performing ion implantation into the region between the first ion implantation regions to form a second ion implantation region; processing the first ion implantation region and the second ion implantation region to form an isolation layer different from the substrate material; removing the substrate and the isolation layer in the isolation layer to form a desired trench. By forming an isolation layer different from the substrate material, the substrate and the isolation layer in the isolation layer are sequentially removed, so as to form a high aspect ratio trench with a good morphology, preventing side etching and bottom micro trenches from occurring during the isotropic etching process.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly relates to a deep trench etching method. Background Art

[0002] In traditional semiconductor etching processes, wet etching technology is difficult to achieve precise etching of high aspect ratios due to its lack of anisotropy. Currently, the technology can generally only achieve deep groove processing with a depth of 100 - 200 µm. When attempting to achieve a deeper etching depth, hydrogen bubbles generated during the etching process will adsorb on the surface of the silicon wafer, forming a unique mask. This mask will cause conical protrusions to form on the inner side of the trench, significantly increasing the surface roughness, affecting the subsequent polysilicon filling effect, seriously affecting the performance of the device, and making it difficult to meet the strict requirements (5 - 500 µm) for etching depth in MEMS devices and special IGBT processes.

[0003] Especially when dealing with fine-size etching less than 3 µm, the applicability of wet etching is significantly reduced. Wet etching is unable to effectively control the morphology, especially in cases where precise control of line width or sidewall angle is required. The common side etching phenomenon will increase the etching deviation, making it more difficult to control the line width, and making it particularly difficult to precisely control the etching morphology. The side etching phenomenon may also cause a decline in device performance. The morphology of the trench will affect the area of the device's on-state current and the distribution of the electric field during breakdown, thereby affecting the specific on-resistance and breakdown voltage of the device. Micro-trenches are also likely to occur at the bottom of the trench. For deep trench structures, micro-trenches will cause an aggregation effect of potential lines, generating a high electric field that leads to premature breakdown of the device, thereby reducing the breakdown voltage of the device.

[0004] It should be noted that the information disclosed in the background art section of this invention is only intended to deepen the understanding of the general background technology of the present invention, and should not be regarded as an admission or any form of implication that this information constitutes prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of the present invention is to provide a deep trench etching method to solve the morphology problem during deep trench etching.

[0006] To solve the above technical problems, the present invention provides a deep trench etching method, including the following steps:

[0007] Provide a substrate and cover a mask layer on the substrate;

[0008] Etch the mask layer to form at least two first openings with a gap therebetween;

[0009] Perform ion implantation along the first openings into the substrate to form a first ion implantation region with a certain height;

[0010] Remove the mask layer between the first openings;

[0011] Perform ion implantation on the region between the first ion implantation regions to form second ion implantation regions;

[0012] Process the first ion implantation regions and the second ion implantation regions to form an isolation layer different from the substrate material;

[0013] Remove the substrate in the isolation layer and the isolation layer to form the required trench.

[0014] Preferably, the second ion implantation regions are adjacent to the first ion implantation regions.

[0015] Preferably, the ions implanted to form the first ion implantation regions and the second ion implantation regions are nitrogen ions, and the material of the isolation layer is silicon nitride.

[0016] Preferably, perform high-temperature annealing treatment on the substrate so that the first ion implantation regions and the second ion implantation regions form an isolation layer.

[0017] Preferably, use an ion implanter to perform multiple nitrogen ion implantations on the first openings, with an implantation energy of 0.1 keV to 1.2 MeV and an implantation dose of 1E16 cm -2 ~5E22 cm -2 .

[0018] Preferably, use an ion implanter to perform multiple nitrogen ion implantations on the region between the first ion implantation regions, with an implantation energy of 0.1 keV to 1.2 MeV and an implantation dose of 1E16 cm -2 ~5E22 cm -2 .

[0019] Preferably, use a mixed solution of HF and HNO3 to remove the substrate in the isolation layer.

[0020] Preferably, use H3PO4 to remove the isolation layer.

[0021] Preferably, the aspect ratio of the trench is 5:1 to 10:1.

[0022] Preferably, after forming the trench, remove the mask layer.

[0023] In the deep trench etching method provided by the present invention, an ion implantation region is formed in a desired area, and the ion implantation region is processed to form an isolation layer different from the substrate material. Then, the substrate and the isolation layer within the isolation layer are sequentially removed, which helps to form a trench with a good morphology, especially a trench with a high aspect ratio, effectively preventing side etching and bottom micro-trenches from occurring during the isotropic etching process, thereby reducing the on-resistance of the device and increasing the breakdown voltage, and thus significantly improving the overall performance of the product device. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Those of ordinary skill in the art will understand that the provided drawings are used to better understand the present invention and do not constitute any limitation to the scope of the present invention. Among them:

[0025] Figure 1 is a schematic structural diagram of a mask layer according to an embodiment of the present invention;

[0026] Figure 2 is a schematic structural diagram of a first opening according to an embodiment of the present invention;

[0027] Figure 3 is a schematic structural diagram of a first ion implantation region according to an embodiment of the present invention;

[0028] Figure 4 is a schematic structural diagram of a second opening according to an embodiment of the present invention;

[0029] Figure 5 is a schematic structural diagram of a second ion implantation region according to an embodiment of the present invention;

[0030] Figure 6 is a schematic structural diagram after forming the isolation layer according to an embodiment of the present invention;

[0031] Figure 7 is a schematic structural diagram of removing the substrate in the isolation layer according to an embodiment of the present invention;

[0032] Figure 8 is a schematic structural diagram after removing the isolation layer according to an embodiment of the present invention;

[0033] Figure 9 is a schematic structural diagram after removing the mask layer according to an embodiment of the present invention;

[0034] Figure 10 is a flowchart of the implementation according to an embodiment of the present invention.

[0035] In the drawings:

[0036] 100, substrate; 101, first ion implantation region; 102, second ion implantation region; 103, isolation layer; 104, trench; 200, mask layer; 201, first opening; 202, second opening. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0037] To make the objectives, advantages, and features of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the accompanying drawings are all in very simplified forms and not drawn to scale, and are only used to conveniently and clearly assist in explaining the objectives of the embodiments of the present invention.

[0038] As used in the present invention, the singular forms "a", "an", and "the" include plural objects. The term "or" is generally used in the sense of including "and / or". The term "several" is generally used in the sense of including "at least one". The term "at least two" is generally used in the sense of including "two or more". In addition, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first", "second", and "third" may explicitly or implicitly include one or at least two of such features. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0039] Among them, although the term "groove" is traditionally used to define a long and narrow ditch, the term "groove" used in this disclosure is not limited to a long and narrow ditch, but should be interpreted broadly to include rectangular holes, square holes, circular or round holes that are not long and narrow, and even holes with a meandering or polygonal geometry, any and all of which are regarded as "grooves" in this disclosure.

[0040] Research has found that, compared with dry etching, wet etching can provide a more uniform surface treatment and is widely used in etching processes with high requirements for the flatness of the wafer surface, such as in the deep groove etching process of certain dielectric layers (silicon oxide layer, silicon nitride layer, etc.). However, hydrogen bubbles generated during the wet etching process adhere to the inner wall of the groove, greatly affecting the morphology of the deep groove, and side etching and micro-groove phenomena will also occur during the etching process, affecting the area of the device's conduction current and the distribution of the electric field at breakdown, and further affecting the specific on-resistance and breakdown voltage of the device, especially when etching high aspect ratio grooves with a fine etching CD value less than 3 µm.

[0041] Based on this, the core idea of the present invention is to form an ion implantation region in the required area, process the ion implantation region to form an isolation layer different from the substrate material, and sequentially remove the substrate and the isolation layer in the isolation layer, thereby helping to form grooves with good morphology, especially high aspect ratio grooves; preventing side etching and bottom micro-grooves from occurring during the isotropic etching of the grooves, reducing the on-resistance of the device, and increasing the breakdown voltage, thereby significantly improving the overall performance of the product device.

[0042] Specifically, please refer to Figures 1 - 10 , which is a schematic diagram of an embodiment of the present invention. As Figure 10 shown, a deep trench etching method includes the following steps:

[0043] S1, providing a substrate 100 and covering a mask layer 200 on the substrate 100. As Figure 1 shown, a mask layer 200 is formed on the substrate 100. Here, the material of the mask layer 200 is not specifically limited, as long as it has certain corrosion resistance and can block the bombardment of subsequent ion implantation.

[0044] Among them, the material of the substrate 100 may include semiconductor materials, insulating materials, conductor materials, or any combination thereof; and the substrate 100 may be a single-layer structure or a multi-layer structure. For example, the substrate 100 may be a semiconductor material such as Si, SiGe, SiGeC, SiC, GaAs, InAs, InP, and other III / V or II / VI compound semiconductors. And, for example, the substrate 100 is a layered substrate such as Si / SiGe, Si / SiC, silicon on insulator (SOI), or silicon germanium on insulator.

[0045] S2, as Figure 2 shown, etching the mask layer 200 to form at least two first openings 201 with a gap therebetween, obtaining a specific mask pattern. It can be understood that the size of the first opening 201 is set according to the required size of the trench 104, but the CD value of the first opening 201 is not greater than the CD value of the required trench 104. In the case where the CD value of the required trench 104 is small, only one first opening 201 may be etched. After ion implantation and processing, a columnar isolation layer 103 is formed, and the isolation layer 103 is removed to obtain a trench 104 with the required size.

[0046] Exemplarily, the CD value of the trench 104 is, for example, 1 to 5 µm, the CD value of the first opening 201 is correspondingly set to 1 µm, and the aspect ratio of the trench 104 is 5:1 to 10:1.

[0047] S3, performing ion implantation along the first opening 201 into the substrate 100 to form a first ion implantation region 101 with a certain height, as Figure 3 shown. According to the theory of ion-matter interaction, since the ion implantation depth and implantation dose are controllable, the implantation depth of nitrogen ions varies with the implantation energy, and the concentration of implanted ions follows a Gaussian distribution. The ion implanter first performs multiple multi-energy implantations on the first opening 201 formed in the side region of the trench 104 to implant nitrogen ions as Figure 3The specified position on the sidewall of the substrate 100 shown. However, the implantation is not limited to nitrogen ions, and carbon ions or other ions that can form an isolation layer 103 made of a different material from the substrate 100 after secondary processing are acceptable.

[0048] In one embodiment, the ions implanted to form the first ion implantation region 101 and the second ion implantation region 102 are nitrogen ions, and the material of the isolation layer 103 is silicon nitride. Use an ion implanter to perform multiple nitrogen ion implantations into the first opening 201, with an implantation energy of 0.1 keV to 1.2 MeV and an implantation dose of 1E16 cm -2 ~5E22 cm -2 。

[0049] S4. Remove the mask layer 200 between the first openings 201. As Figure 4 shown, use dry or wet methods, such as spin coating and development, to remove the mask layer 200 between the first openings 201 to form a second opening 202.

[0050] S5. Perform ion implantation into the region between the first ion implantation regions 101 to form a second ion implantation region 102. According to the required depth of the trench 104 in the process, use the ion implanter to perform multiple nitrogen ion implantation processes with multiple energies again to form the second ion implantation region 102 at a specific depth. At this time, ion implantation can be directly performed in the second opening 202 without forming a photoresist pattern in the second opening 202. During the two ion implantation processes, only one mask layer 200 needs to be deposited to complete the subsequent ion implantation, simplifying the process flow.

[0051] Exemplarily, the second ion implantation region 102 and the first ion implantation region 101 are adjacent. As Figure 5 shown, the first ion implantation region 101 and the second ion implantation region 102 are connected to form a concave structure that matches the size of the trench 104. Further, for a trench 104 with a high aspect ratio, the second ion implantation region 102 can be formed by performing ion implantation from the back of the substrate 100 according to the thickness of the substrate 100, so as to obtain a trench 104 with a larger aspect ratio.

[0052] Specifically, use an ion implanter to perform multiple nitrogen ion implantations into the region between the first ion implantation regions 101, with an implantation energy of 0.1 keV to 1.2 MeV and an implantation dose of 1E16 cm -2 ~5E22 cm -2 。

[0053] S6. As Figure 6As shown, the first ion implantation region 101 and the second ion implantation region 102 are processed to form an isolation layer 103 made of a material different from that of the substrate 100. Specifically, the substrate 100 is subjected to a high-temperature annealing process so that the first ion implantation region 101 and the second ion implantation region 102 form the isolation layer 103.

[0054] In one embodiment, at a temperature of 1200 °C, the ion-implanted substrate 100 is subjected to a high-temperature annealing process, so that the implanted nitrogen element rearranges and distributes again with the silicon element inside the substrate 100 to form a dense silicon nitride isolation layer 103. After high-temperature annealing, a large amount of implantation damage is eliminated, and at the same time, the interface between the substrate 100 and the silicon nitride becomes steep, forming a good isolation layer 103.

[0055] S7, the substrate 100 and the isolation layer 103 in the isolation layer 103 are removed to form a required trench 104.

[0056] As Figure 7 shown, a mixed solution of HF and HNO3 is used to remove the substrate 100 in the isolation layer 103. At room temperature of 23 °C, the substrate 100 is etched using a mixed solution of HF and HNO3, or other chemical solutions to etch the substrate 100. The mixed solution of HF and HNO3 has a high etching selectivity for the substrate 100, and the silicon nitride isolation layer 103 has higher corrosion resistance compared to the undoped substrate 100, so that all the silicon in the isolation layer 103 can be removed to obtain a better morphology.

[0057] As Figure 8 shown, H3PO4 is used to remove the isolation layer 103. Wet chemical denitridation is used, and the silicon nitride isolation layer 103 is removed using a hot H3PO4 mixed solution with a concentration of 85% - 95%. Since the etching rate of hot H3PO4 on the substrate 100 is small, at a temperature of 160 - 200 °C, the etching rate is about 0.15 - 0.2 nm / min, and the etching rate for the isolation layer 103 is about 3 - 14 nm / min. Since the etching selectivity of H3PO4 for the substrate 100 is particularly small (the selectivity ratio is greater than 30:1), through the thickness of the isolation layer 103 after ion implantation, combined with the etching process time, the isolation layer 103 is etched, and finally the etching end point is detected by optical mass spectrometry. After the detection is completed, a complete trench 104 is obtained.

[0058] Since the uniformity of the isolation layer 103 formed by ion implantation is relatively good, less than 1%, the uniformity during the wet H3PO4 etching of the isolation layer 103 is correspondingly good, around 1% - 1.5%. Moreover, H3PO4 hardly corrodes the silicon substrate 100. Therefore, the morphology of the trench 104 obtained is good. This not only avoids the problem of poor surface uniformity (5% - 7%) of the trench 104 caused by dry etching but also overcomes the problems of rough surface of the trench 104 and uneven bottom of the trench 104 caused by traditional wet isotropic etching, thus preventing the performance of the device from degrading.

[0059] It can be understood that, compared with the limitations of the dry etching process, the plasma etching process chamber can only process one substrate 100 and has a narrow range of applicable materials or devices. By using the wet etching method to form the trench 104 with a high aspect ratio, batch processing of the substrate 100 can be achieved. For example, processing in batches of 50 substrates 100 has high efficiency and low cost, and a wide range of applicable materials or devices.

[0060] After the trench 104 is formed, the mask layer 200 is removed.

[0061] In the deep trench etching method provided by the present invention, for trenches 104 with an opening smaller than 3 µm, a good etching aspect ratio can be obtained. By forming a mask layer 200 on the substrate 100, forming an opening for ion implantation on the mask layer 200, performing ion implantation on the substrate 100, and then carrying out further processing, a layer of difficult-to-etch isolation layer 103 is formed in a specific area of the substrate 100. Subsequently, the corresponding area is removed by wet etching to obtain a trench 104 with a large aspect ratio and good morphology. This etching method improves the aspect ratio of the formed trench 104. During the subsequent fine etching of the trench 104, the isolation layer 103 prevents the side etching phenomenon and bottom micro-trenches caused by isotropic etching, making the morphology of the trench 104 tend to be perfect. As a result, the on-resistance is reduced and the breakdown voltage is increased, thus significantly improving the overall performance of the product device.

[0062] The above description is only a description of the preferred embodiments of the present invention and does not limit the scope of the present invention in any way. Any changes and modifications made by those of ordinary skill in the art of the present invention based on the above disclosure belong to the protection scope of the technical solution of the present invention.

Claims

1. A deep trench etching method, characterized in that: The following steps are involved: Providing a substrate, on which a mask layer is covered; Etching the mask layer to form at least two first openings, with a gap between the first openings; Performing ion implantation into the substrate along the first opening to form a first ion implantation region; removing the mask layer between the first openings; Performing ion implantation into the region between the first ion implantation regions to form a second ion implantation region; Processing the first ion implantation region and the second ion implantation region to form an isolation layer made of a material different from that of the substrate; Wet etching to remove the substrate in the isolation layer and the isolation layer to form a required groove; The first ion implantation region and the second ion implantation region are connected to form a concave structure matching the size of the groove.

2. The deep trench etching method according to claim 1, characterized in that: The second ion implantation region is connected to the first ion implantation region.

3. The deep trench etching method according to claim 1, characterized in that: The ions implanted to form the first ion implantation region and the second ion implantation region are nitrogen ions, and the material of the isolation layer is silicon nitride.

4. The deep trench etching method according to claim 3, characterized in that: The substrate is annealed so that the first ion implantation region and the second ion implantation region form an isolation layer.

5. The deep trench etching method according to claim 3, characterized in that: An ion implanter is used to implant nitrogen ions into the first opening multiple times, with an implantation energy of 0.1keV~1.2MeV and an implantation dose of 1E16cm -2 ~5E22 cm -2 .

6. The deep trench etching method according to claim 3, characterized in that: An ion implanter is used to perform multiple nitrogen ion implantations into the area between the first ion implantation areas, with an implantation energy of 0.1keV~1.2MeV and an implantation dose of 1E16cm -2 ~5E22 cm -2 .

7. The deep trench etching method according to claim 3, characterized in that: The substrate in the isolation layer is removed using a mixed solution of HF and HNO 3 .

8. The deep trench etching method according to claim 3, characterized in that: The isolation layer was removed using H3PO4.

9. The deep trench etching method according to claim 1, characterized in that: The depth-to-width ratio of the groove is 5:1-10:

1.

10. The deep trench etching method according to claim 1, characterized in that: After forming the trench, the mask layer is removed.

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