Method for manufacturing semiconductor substrate, method for manufacturing damascene wiring structure, semiconductor substrate, and damascene wiring structure

Abstract

A method for manufacturing a semiconductor substrate according to one embodiment includes: a first step of forming a groove portion having a bottom surface and side surfaces on which corrugations are formed by performing a process including isotropic etching on a main surface of a substrate; a second step for performing at least one of a hydrophilization treatment performed on a side surface of the groove part and a degassing treatment performed on the groove part; and a third step for removing corrugations formed on the side surfaces of the groove portion by performing anisotropic wet etching treatment in a state where the bottom surface of the groove portion is present, and planarizing the side surfaces.

Description

[0001] This application is filed on October 30, 2019 、Application No. 201980071653.X 、The name of the invention is Semiconductor Method for manufacturing bulk substrate, method for manufacturing damascene wiring structure, semiconductor substrate and damascene wiring structure A divisional application for a patent application. Technical Field

[0002] The present invention relates to a method for manufacturing a semiconductor substrate, a method for manufacturing a damascene wiring structure, a semiconductor substrate and a damascene wiring structure. Background Art

[0003] In the prior art, as a method for manufacturing a silicon substrate (semiconductor substrate) having a recess formed therein, there is known a method of forming the recess on the silicon substrate using a Bosch process and then removing the scallops (fine concave-convex structures) formed on the side of the recess by dry etching (see patent documents 1 to 5).

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Publication No. 2013-206991

[0007] Patent Document 2: Japanese Patent Publication No. 2014-13821

[0008] Patent Document 3: Japanese Patent Publication No. 2008-34508

[0009] Patent Document 4: U.S. Patent Publication No. 2008 / 0023846

[0010] Patent Document 5: U.S. Patent Publication No. 2007 / 0281474 Summary of the invention

[0011] Technical problem to be solved by the invention

[0012] For example, in an electromagnetically driven mirror (so-called MEMS mirror) to which MEMS technology is applied, in order to set a low-resistance driving coil in a limited space within the movable part, there is sometimes a tendency to provide a high-reliability recess (for example, a recess with a narrow pitch and a high aspect ratio, from which the ripples are removed). The inventors of the present invention have found that, in the above case, there are the following problems when dry etching is used to remove the ripples formed on the side of the recess. Specifically, when isotropic dry etching is used, the width of the opening side of the recess becomes wider, and wiring with a narrow pitch (wiring buried in the recess) cannot be achieved. In addition, since it is difficult for the etching gas to reach the bottom of the recess, it is difficult to remove the ripples near the bottom of the recess. In addition, when anisotropic dry etching is used, since only the bottom surface of the recess is easily etched, it is difficult to properly remove the ripples formed on the side of the recess.

[0013] An object of one aspect of the present disclosure is to provide a semiconductor substrate having a highly reliable recess and a method for manufacturing the same, and a damascene wiring structure using the semiconductor substrate and a method for manufacturing the same.

[0014] Technical means of solving problems

[0015] One aspect of the present disclosure relates to a method for manufacturing a semiconductor substrate, comprising: a first step of forming a recess having a bottom and a side surface by subjecting a main surface of the semiconductor substrate to a treatment including isotropic etching, wherein ripples are formed on the side surface; a second step of performing at least one of a hydrophilization treatment on the side surface of the recess and a degassing treatment on the recess; and a third step of removing the ripples formed on the side surface of the recess by anisotropic wet etching while the bottom surface of the recess remains, and flattening the side surface.

[0016] In the manufacturing method of the semiconductor substrate, after forming a concave portion having a bottom surface and a side surface formed with corrugations, the wettability of the etching solution on the side surface of the concave portion can be improved by hydrophilizing the side surface of the concave portion or degassing the concave portion. In addition, by performing anisotropic wet etching in a state where the bottom surface of the concave portion exists, the etching liquid (etchant) can be effectively filled into the concave portion. Therefore, the entire side surface of the concave portion can be wetted with the etching liquid, and the corrugations formed on the side surface can be effectively removed. In addition, by performing anisotropic etching, the etching speed of the side surface can be made roughly uniform between the opening side and the bottom side of the concave portion. Therefore, the problem of the width of the opening side of the concave portion widening in a conical shape can be suppressed. Therefore, according to the above-mentioned manufacturing method, a semiconductor substrate with a concave portion having high reliability can be manufactured. That is, a concave portion that maintains an appropriate shape and appropriately removes corrugations can be formed on the main surface of the semiconductor substrate.

[0017] One aspect of the present disclosure involves a method for manufacturing an embedded wiring structure, which includes: a first step, a second step, and a third step involved in the above-mentioned method for manufacturing a semiconductor substrate, and in the first step, a groove portion extending along the main surface of the semiconductor substrate is formed as a recessed portion; a fourth step, which is performed after the third step, to form an insulating layer having a first portion arranged on the inner surface of the groove portion and a second portion integrally formed with the first portion and arranged on the main surface; a fifth step, which is performed to form a metal layer on the first portion and the second portion of the insulating layer; a sixth step, which is performed to form a wiring portion on the metal layer buried in the groove portion; a seventh step, which is performed to remove the metal layer and the wiring portion on the second portion of the insulating layer in a manner that exposes the second portion of the insulating layer; and an eighth step, which is performed after the seventh step, to form a covering layer to cover the second portion of the insulating layer, an end portion of the metal layer, and the wiring portion.

[0018] If the insulating layer and the metal layer are formed without sufficiently removing the ripples formed on the side of the recess, a void will be generated between the insulating layer and the metal layer, or a crack (broken portion) will be generated in the insulating layer. The void may be a weak point in the structure. In addition, the crack may cause the current flowing through the wiring portion to leak to the semiconductor substrate. That is, the metal (metal layer and wiring portion) formed on the insulating layer may contact a portion of the semiconductor substrate through the above-mentioned crack. On the other hand, according to the manufacturing method of the inlaid wiring structure, the insulating layer and the metal layer are formed on the inner surface of the recess from which the ripples have been properly removed. Therefore, since the occurrence of the above-mentioned voids or cracks can be suppressed, a highly reliable inlaid wiring structure can be obtained.

[0019] The main surface of the semiconductor substrate is along the (100) plane, and in the first process, a groove extending in the direction along the (110) plane can be formed. According to the above structure, a bottom surface along the (100) plane and a side surface along the (110) plane are formed. In addition, by utilizing the difference in etching rate depending on the plane orientation, an inclined surface that can be along the (111) plane and inclined relative to the bottom surface and the side surface is formed between the bottom surface and the side surface. Therefore, when the inclined surface is formed, the angle of the corner between the bottom surface and the side surface (i.e., the angle formed by the bottom surface and the inclined surface or the angle formed by the side surface and the inclined surface) is greater than the angle of the corner when the inclined surface is not formed (i.e., the angle formed by the bottom surface and the side surface). That is, by forming the inclined surface, a more rounded corner (i.e., a gradually curved corner) is formed compared to the case where the inclined surface is not formed. According to such a corner, cracks in the insulating layer can be prevented from being generated at the corner. Therefore, according to the above structure, a more reliable damascene wiring structure can be obtained.

[0020] One aspect of the present disclosure relates to a semiconductor substrate having a main surface provided with a recess; the recess has a bottom surface, a side surface, and an inclined surface; and the inclined surface is connected to the bottom surface and the side surface between the bottom surface and the side surface, and is inclined relative to the bottom surface and the side surface in a manner forming an obtuse angle with the bottom surface and the side surface; the surface orientation of the bottom surface, the surface orientation of the side surface, and the surface orientation of the inclined surface are different from each other.

[0021] In the above-mentioned semiconductor substrate, the angle of the corner between the bottom surface and the side surface (i.e., the angle formed by the bottom surface and the inclined surface or the angle formed by the side surface and the inclined surface) is greater than the angle of the corner when the inclined surface is not provided (i.e., the angle formed by the bottom and the side surface). That is, by forming the inclined surface, a more rounded corner (i.e., a gradually gently curved corner) is formed compared to a case where the inclined surface is not formed. According to the recess having such a corner, for example, in the case where a prescribed material layer is provided on the inner surface of the recess, cracks in the material layer of the corner can be suppressed. As described above, in the above-mentioned semiconductor substrate, the reliability is improved by the above-mentioned recess. In addition, by utilizing the difference in etching rate depending on the surface orientation, the above-mentioned semiconductor substrate can be obtained relatively easily.

[0022] An aspect of the present disclosure relates to an inlaid wiring structure including the above-mentioned semiconductor substrate, an insulating layer, a metal layer, a wiring portion and a covering layer; and the recessed portion is a groove portion extending along the main surface; the insulating layer has a first portion arranged on the inner surface of the groove portion and a second portion integrally formed with the first portion and arranged on the main surface; the metal layer is arranged on the first portion of the insulating layer; the wiring portion is formed on the metal layer buried in the groove portion; and the covering layer is arranged to be able to cover the second portion of the insulating layer, the end of the metal layer and the wiring portion.

[0023] As described above, the above-mentioned damascene wiring structure is formed by embedding the wiring part and the like in a recess having a bottom surface, a side surface and an inclined surface. Therefore, cracks in the insulating layer are suppressed at the corner of the recess. Therefore, in the above-mentioned damascene wiring structure, reliability is improved by the recess.

[0024] The bottom surface may be a surface along the (100) plane, the side surface may be a surface along the (110) plane, and the inclined surface may be a surface along the (111) plane. According to the above configuration, by utilizing the difference in etching rate depending on the plane orientation, a damascene wiring structure having the above effect can be easily obtained.

[0025] The concave portion has a first groove portion extending in a first direction along the main surface and a second groove portion sharing a bottom surface with the first groove portion and extending in a second direction, the second direction being a direction along the main surface intersecting with the first direction; the first groove portion has a first side surface, and a first inclined surface connected to the bottom surface and the first side surface between the bottom surface and the first side surface and inclined relative to the bottom surface and the first side surface; the second groove portion has a second side surface, and a second inclined surface connected to the bottom surface and the second side surface between the bottom surface and the second side surface and inclined relative to the bottom surface and the second side surface; an intermediate surface is formed between the first side surface and the second side surface, and between the first inclined surface and the second inclined surface; the intermediate surface is connected to the first side surface, the second side surface, the first inclined surface and the second inclined surface, and the bottom surface, and the angles formed by the intermediate surface and the first side surface and the second side surface respectively can be obtuse angles. According to the above configuration, the angle of the corner (the corner when viewed from a direction perpendicular to the main surface) where the first groove portion and the second groove portion intersect (i.e., the angle formed by the intermediate surface and the first side surface or the angle formed by the intermediate surface and the second side surface) is greater than the angle of the corner when the intermediate surface is not formed (i.e., the angle formed by the first side surface and the second side surface). That is, by forming the intermediate surface, a more rounded corner (i.e., a gradually curved corner) is formed compared to a case where the intermediate surface is not formed. According to such a corner, the stress acting on the wiring portion at the corner when vibration is applied to the semiconductor substrate can be effectively reduced. Therefore, according to the above configuration, a damascene wiring structure with further improved reliability can be obtained.

[0026] Effects of the Invention

[0027] According to one aspect of the present disclosure, a semiconductor substrate having a highly reliable recessed portion and a method for manufacturing the same, and a damascene wiring structure using the semiconductor substrate and a method for manufacturing the same can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a plan view of a mirror device including a damascene wiring structure according to the first embodiment.

[0029] Figure 2 is along Figure 1 Cross-sectional view along line II-II.

[0030] Figure 3 yes Figure 2 Magnified image of .

[0031] Figure 4 yes Figure 3 Magnified image of .

[0032] Figure 5 This is a top view of an SOI wafer used in the manufacture of a damascene wiring structure.

[0033] Figure 6(a) is a diagram schematically showing the structure of a substrate before a groove portion is formed. Figure 6 (b) is a diagram showing the cross-sectional shape of the groove portion formed by the first step, Figure 6 (c) is a diagram showing the cross-sectional shape of the groove portion formed by the second step.

[0034] Figure 7 (a) is a SEM image of the bottom of the groove formed by the first step, Figure 7 (b) is a SEM image of the bottom of the groove portion formed in the third step.

[0035] Figure 8 (a) and 8(b) are cross-sectional views for explaining a method for manufacturing a damascene wiring structure.

[0036] Fig. 9 (a) and 9(b) are cross-sectional views for explaining a method for manufacturing a damascene wiring structure.

[0037] Fig.10 10(a) and 10(b) are cross-sectional views for explaining a method for manufacturing a damascene wiring structure.

[0038] Fig.11 It is a perspective view schematically showing a corner of a damascene wiring structure.

[0039] Fig.12 It is a cross-sectional view of a damascene wiring structure according to a first modification.

[0040] Fig.13 It is a cross-sectional view of a damascene wiring structure according to a second modification.

[0041] Fig.14 (a) is a cross-sectional view of a damascene wiring structure according to a third modification example. Fig.14 (b) is a cross-sectional view of a damascene wiring structure according to a fourth modification. DETAILED DESCRIPTION

[0042] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same or corresponding elements are denoted by the same reference numerals, and repeated descriptions are omitted.

[0043] [Configuration of mirror device]

[0044] Figure 1 The first embodiment includes a damascene wiring structure 100 (see Figure 2 ) is a plan view of a mirror device 1 (actuator). Figure 1As shown, the mirror device 1 includes a support portion 2, a first movable portion 3, a second movable portion 4, a pair of first connecting portions 5, 6, a pair of second connecting portions 7, 8, and a magnetic field generating portion 9. The support portion 2, the first movable portion 3, the second movable portion 4, the first connecting portions 5, 6, and the second connecting portions 7, 8 are integrally formed of, for example, a semiconductor substrate (substrate 30). That is, the mirror device 1 is configured as a MEMS (Micro Electro Mechanical Systems) device.

[0045] In the mirror device 1, the first movable part 3 having the mirror surface 10 can swing around the first axis X1 and the second axis X2 which are orthogonal to each other. The mirror device 1 can be used in, for example, an optical switch for optical communication, an optical scanner, etc. The magnetic field generating part 9 is composed of, for example, a permanent magnet having a Halbach array. The magnetic field generating part 9 generates a magnetic field acting on the coils 21 and 22 described later.

[0046] The support portion 2 has, for example, a quadrilateral shape when viewed from above and is formed in a frame shape. The support portion 2 is arranged on one side of the magnetic field generating portion 9 in a direction perpendicular to the mirror surface 10. The first movable portion 3 is arranged inside the support portion 2 in a state separated from the magnetic field generating portion 9. In addition, "viewed from above" refers to the situation of observing from a direction perpendicular to the mirror surface 10, in other words, the situation of observing from a direction perpendicular to the main surface 31 of the substrate 30 described later.

[0047] The first movable part 3 includes a configuration part 3a, a frame part 3b surrounding the configuration part 3a, and a plurality of (four in this example) connecting parts 3c connecting the configuration part 3a and the frame part 3b to each other. The configuration part 3a is formed into a circular shape when viewed from above, for example. On the surface of the configuration part 3a on the opposite side of the magnetic field generating part 9, for example, a circular mirror surface 10 is provided. The mirror surface 10 is composed of a reflective film made of, for example, aluminum, aluminum alloy, silver, silver alloy, gold, a dielectric multilayer film, etc.

[0048] The frame portion 3b has a quadrilateral shape when viewed from above, and is formed in a frame shape. A plurality of connecting portions 3c are arranged on both sides of the configuration portion 3a on the first axis X1 and on both sides of the configuration portion 3a on the second axis X2, connecting the configuration portion 3a and the frame portion 3b to each other on the first axis X1 or on the first axis X2.

[0049] The second movable portion 4 has a rectangular outer shape in a plan view and is formed in a frame shape. The second movable portion 4 is arranged inside the support portion 2 so as to surround the first movable portion 3 while being separated from the magnetic field generating portion 9 .

[0050] The first connecting parts 5 and 6 are arranged on both sides of the first movable part 3 on the first axis X1. Each of the first connecting parts 5 and 6 connects the first movable part 3 and the second movable part 4 on the first axis X1 so that the first movable part 3 can swing around the first axis X1. Each of the first connecting parts 5 and 6 extends linearly along the first axis X1, for example.

[0051] The second connection parts 7 and 8 are arranged on both sides of the second movable part 4 on the first axis X1. The second connection parts 7 and 8 connect the second movable part 4 and the support part 2 on the second axis X2 so that the second movable part 4 can swing around the second axis X2. Each of the second connection parts 7 and 8 extends linearly along the second axis X2, for example.

[0052] The mirror device 1 further includes coils 21 and 22, a plurality of wirings 12, 13, 14, and 15, and a plurality of electrode pads 25, 26, 27, and 28. The coil 21 is embedded in the frame portion 3b of the first movable portion 3, for example, and extends in a spiral shape when viewed from above. The coil 22 is embedded in the second movable portion 4, for example, and extends in a spiral shape when viewed from above. Each of the coils 21 and 22 is made of a metal material such as copper.

[0053] A plurality of electrode pads 25, 26, 27, and 28 are provided on the support portion 2. The wiring 12 electrically connects one end of the coil 21 to the electrode pad 25. The wiring 12 extends from one end of the coil 21 to the electrode pad 25 via the first connecting portion 5, the second movable portion 4, and the second connecting portion 7. The wiring 13 electrically connects the other end of the coil 21 to the electrode pad 26. The wiring 13 extends from the other end of the coil 21 to the electrode pad 26 via the first connecting portion 6, the second movable portion 4, and the second connecting portion 8.

[0054] Wiring 14 electrically connects one end of coil 22 to electrode pad 27. Wiring 14 extends from one end of coil 22 to electrode pad 27 via second connection portion 8. Wiring 15 electrically connects the other end of coil 22 to electrode pad 28. Wiring 15 extends from the other end of coil 22 to electrode pad 28 via second connection portion 7.

[0055] In the mirror device 1 having the above-described structure, when a driving signal for linear motion is input to the coil 22 via the electrode pads 27 and 28 and the wirings 14 and 15, a Lorentz force acts on the coil 22 due to interaction with the magnetic field generated by the magnetic field generating unit 9. By utilizing the balance between the Lorentz force and the elastic force of the second connecting portions 7 and 8, the mirror surface 10 (first movable portion 3) can be linearly moved together with the second movable portion 4 around the second axis X2.

[0056] On the other hand, when the drive signal for the resonant action is input to the coil 21 via the electrode pads 25, 26 and the wirings 12, 13, the Lorentz force acts on the coil 21 due to the interaction with the magnetic field generated by the magnetic field generating unit 9. By utilizing the Lorentz force and the resonance of the first movable unit 3 at the resonant frequency, the mirror 10 (first movable unit 3) can be made to resonate around the first axis X1.

[0057] [Inlay wiring structure]

[0058] Reference Figures 2 to 4 The following describes the inlaid wiring structure 100 of the coils 21 and 22. Since the coils 21 and 22 have the same structure, the coil 22 will be described below, and the description of the coil 21 will be omitted.

[0059] As described above, the coil 22 is provided in the second movable portion 4. The second movable portion 4 is constituted by, for example, the first silicon layer 81 of the substrate 30. The substrate 30 is, for example, a semiconductor substrate such as an SOI (Silicon On Insulator) substrate. The substrate 30 has, for example, the first silicon layer 81 and the second silicon layer 82, and the insulating layer 83 (refer to Figure 6 as well as Figures 8 to 10 ). The support portion 2 is composed of a first silicon layer 81, a second silicon layer 82 and an insulating layer 83, and the first movable portion 3, the second movable portion 4, the first connecting portions 5, 6 and the second connecting portions 7, 8 are composed of the first silicon layer 81. The substrate 30 has a main surface 31. In this example, the main surface 31 is a surface on the first silicon layer 81 opposite to the insulating layer 83.

[0060] A groove portion 33 (recessed portion) is provided on the main surface 31. The groove portion 33 has a shape corresponding to the coil 21, and in this example, the groove portion 33 extends in a spiral shape when viewed in a plane. In a cross section perpendicular to the extension direction of the groove portion 33, the groove portion 33 presents, for example, a rectangular shape. The inner surface of the groove portion 33 is composed of a bottom surface 33a, a side surface 33b, and an inclined surface 33c connected to the bottom surface 33a and the side surface 33b. The inclined surface 33c is between the bottom surface 33a and the side surface 33b, and is inclined relative to the bottom surface 33a and the side surface 33b, thereby forming an obtuse angle (approximately 135 degrees in this embodiment) with the bottom surface 33a and the side surface 33b. In addition, although in Figures 2 to 4 Only one cross section is shown in the figure, for example, the Damascene wiring structure 100 is uniformly configured with respect to the extending direction of the groove portion 33, and is also uniformly configured in a cross section perpendicular to the extending direction of the groove portion 33. However, the Damascene wiring structure 100 is not necessarily uniformly configured with respect to the extending direction of the groove portion 33.

[0061] The inlaid wiring structure 100 includes an insulating layer 40, a metal layer 50, a wiring portion 60, and a cover layer 70 in addition to a substrate 30 as a base. The insulating layer 40 is provided on the main surface 31 and the inner surface (bottom surface 33a, side surface 33b and inclined surface 33c; the same hereinafter) of the groove portion 33. More specifically, the insulating layer 40 includes a first portion 41 provided on the inner surface of the groove portion 33 and a second portion 42 integrally formed with the first portion 41 and provided on the main surface 31. A boundary portion 43 between the first portion 41 and the second portion 42 in the insulating layer 40 is located on the boundary portion between the main surface 31 and the groove portion 33 on the substrate 30.

[0062] The insulating layer 40 is composed of a first layer 44 and a second layer 45. The first layer 44 is made of an oxide film and is provided on the main surface 31 and the inner surface of the groove portion 33. The oxide film constituting the first layer 44 is, for example, a silicon oxide film (SiO2) formed by thermally oxidizing silicon. The second layer 45 is made of a nitride film and is provided on the first layer 44. The nitride film constituting the second layer 45 is, for example, a silicon nitride film (SiN) or the like. The first portion 41 and the boundary portion 43 are composed of the first layer 44 and the second layer 45, and the second portion 42 is composed of the first layer 44.

[0063] The metal layer 50 is provided on the first portion 41 of the insulating layer 40. That is, the metal layer 50 is provided on the inner surface of the groove portion 33 via the first portion 41. The metal layer 50 is made of a metal material such as titanium (Ti). The metal layer 50 functions as a seed layer for stably forming the wiring portion 60 on the semiconductor substrate, and a barrier layer for preventing the metal element contained in the wiring portion 60 from diffusing into the first silicon layer 81.

[0064] The wiring portion 60 is formed on the metal layer 50 embedded in the groove portion 33. That is, the wiring portion 60 is arranged in the groove portion 33 via the first portion 41 of the insulating layer 40 and the metal layer 50. The wiring portion 60 is made of a metal material such as copper (Cu). The shape of the metal layer 50 in the cross section perpendicular to the extension direction of the wiring portion 60 (in other words, the extension direction of the groove portion 33) corresponds to the cross-sectional shape of the groove portion 33, and in this example, it is roughly rectangular. In addition, as shown in this embodiment, the wiring portion 60 extends in a spiral shape when viewed from above, and when the wiring portion 60 has a first portion extending in a direction parallel to the first axis X1 and a second portion extending in a direction parallel to the second axis X2, the extension direction of the wiring portion 60 is a direction parallel to the first axis X1 in the first portion, and a direction parallel to the second axis X2 in the second portion. Or when the wiring portion 60 extends in a curved or bent shape, the extension direction of a certain portion of the wiring portion 60 may be a tangent direction of the portion.

[0065] The cover layer 70 is provided to cover the second portion 42 of the insulating layer 40, the end portion 51 of the metal layer 50, and the wiring portion 60. In this example, the cover layer 70 extends in a plane parallel to the main surface 31. The thickness T1 of the cover layer 70 is thicker than the thickness T2 of the insulating layer 40. The cover layer 70 is made of, for example, a silicon nitride film and has insulating properties. That is, the cover layer 70 is made of the same material as the second layer 45 of the insulating layer 40.

[0066] like Figure 4 As shown, the surface 41a on the side opposite to the substrate 30 on the first part 41 of the insulating layer 40 is, for example, a flat surface perpendicular to the main surface 31. The surface 42a on the side opposite to the substrate 30 on the second part 42 of the insulating layer 40 is, for example, a flat surface parallel to the main surface 31. The surface 42a is in contact with the cover layer 70. As an example of the present embodiment, when viewed from the extending direction of the wiring portion 60, the surface 43a on the side opposite to the substrate 30 on the boundary portion 43 includes an inclined surface 43b, and the inclined surface 43b is inclined in a direction A1 perpendicular to the main surface 31. More specifically, the inclined surface 43b is inclined outward relative to the surface 41a of the first part 41 (the farther from the bottom surface 33a of the groove portion 33, the farther from the center of the groove portion 33). In this example, the inclined surface 43b is curved in a convex shape toward the side opposite to the substrate 30.

[0067] The end portion 51 of the metal layer 50 enters between the cover layer 70 and the inclined surface 43b. More specifically, the end portion 51 has a portion arranged in a space formed between the cover layer 70 and the inclined surface 43b in the direction A1 perpendicular to the main surface 31.

[0068] The end portion 51 has a first surface 51a, a second surface 51b continuous with the first surface 51a, and a third surface 51c located on the opposite side of the second surface 51b and continuous with the first surface 51a. The first surface 51a is along the cover layer 70 and is bonded to the cover layer 70. In this example, the first surface 51a is a flat surface and is located on the same plane as the surface 42a of the second portion 42 of the insulating layer 40 and the surface 60a of the wiring portion 60 described later.

[0069] The second surface 51b is along the inclined surface 43b and is bonded to the inclined surface 43b. Like the inclined surface 43b, the second surface 51b is inclined outward relative to the direction A1 perpendicular to the main surface 31. The second surface 51b is bent into a concave shape toward the side opposite to the substrate 30. The second surface 51b is in contact with the second layer 45 of the boundary portion 43 constituting the insulating layer 40. That is, the portion of the insulating layer 40 that contacts the second surface 51b (in this example, the second layer 45 that constitutes the boundary portion 43) is made of the same material (silicon nitride film) as the portion of the covering layer 70 that contacts the first surface 51a. As described above, in this example, the entire covering layer 70 is made of a silicon nitride film. As a result, the bonding strength between the insulating layer 40 and the covering layer 70 can be improved.

[0070] The third surface 51c is a surface on the side opposite to the second surface 51b on the end portion 51. When viewed from the extension direction of the wiring portion 60, the third surface 51c is inclined outwardly relative to the direction A1. The inclination of the third surface 51c relative to the direction A1 is gentler than the inclination of the second surface 51b relative to the direction A1. Therefore, the thickness of the end portion 51 in the direction A2 parallel to the main surface 31 gradually increases as it approaches the front end of the end portion 51. A portion 61 of the wiring portion 60 located at the boundary portion between the metal layer 50 and the covering layer 70 enters between the covering layer 70 and the third surface 51c. More specifically, a portion 61 of the wiring portion 60 is arranged in the space formed between the covering layer 70 and the third surface 51c in the direction A1.

[0071] At the end 51, the first surface 51a and the second surface 51b form an acute angle. In other words, the angle θ formed by the first surface 51a and the second surface 51b is less than 90 degrees. That is, the thickness of the end 51 in the direction A1 perpendicular to the main surface 31 gradually decreases as it approaches the front end of the end 51 (for example, the vertex formed by the first surface 51a and the second surface 51b). The angle θ can be, for example, 15 degrees to 88 degrees. The end 51 of the metal layer 50 is not disposed on the second portion 42 of the insulating layer 40.

[0072] The thickness (minimum thickness) of the end portion 51 in the direction A2 parallel to the main surface 31 is greater than that of the portion of the metal layer 50 other than the end portion 51 (for example, the portion of the metal layer 50 located in the middle of the direction A1 perpendicular to the main surface 31, or the portion of the metal layer 50 located on the first portion 41 of the insulating layer 40). The thickness (maximum thickness) of the front end of the metal layer 50 in the direction A1 is less than the thickness T2 of the insulating layer 40. Here, the “front end portion of the metal layer 50” refers to the portion of the metal layer 50 where the thickness in the direction A2 parallel to the main surface 31 is greater than the thickness in the direction A1 perpendicular to the main surface 31.

[0073] In this example, the surface 60a of the wiring portion 60 in contact with the cover layer 70 is located on the same plane as the surface 42a of the second portion 42 of the insulating layer 40. The surface 42a is the surface of the insulating layer 40 in contact with the cover layer 70. The surface 70a of the cover layer 70 on the substrate 30 side is a flat surface.

[0074] As described above, the groove portion 33 extends in a spiral shape when viewed from above. Figure 2 As shown, the groove portion 33 has a plurality of portions 34 adjacent to each other. The distance B between the portions 34 is smaller than the width W of the groove portion 33. The width W of the groove portion 33 is smaller than the depth D of the groove portion 33. The depth D of the groove portion 33 is, for example, the distance between the main surface 31 and the bottom surface 33a in the direction A1 perpendicular to the main surface 31. The distance L between the bottom surface 33a of the groove portion 33 in the direction A1 perpendicular to the main surface 31 and the opposite surface on the side opposite to the main surface 31 on the substrate 30 is greater than the depth D of the groove portion 33. In this example, the opposite surface is the surface 81a on the insulating layer 83 side of the first silicon layer 81 (the side opposite to the main surface 31).

[0075] [Method for manufacturing a damascene wiring structure]

[0076] Next, refer to Figures 5 to 10 The manufacturing method (first to eighth steps) of the damascene wiring structure 100 is described. The manufacturing method of the damascene wiring structure 100 includes a manufacturing method (first to third steps) of a semiconductor substrate (substrate 30) having a groove portion 33. Figure 6 as well as Figures 8 to 10 In FIG. 1 , various parts are schematically shown. In particular, Figure 8 (b) Fig. 9 (a) Fig. 9 (b) Fig.10 (a) and Fig.10 In (b), the inclined surface 33c is not shown, and the groove portion 33 is simplified.

[0077] As an example of this embodiment, Figure 5 As shown in FIG. 1 , a substrate 30 having a groove portion 33 is manufactured from an SOI wafer SW. That is, a plurality of substrates 30 can be obtained by cutting the SOI wafer SW into appropriate shapes. Figure 6 As shown in (a), the substrate 30 included in the SOI wafer SW has a first silicon layer 81, a second silicon layer 82 and an insulating layer 83. The thickness of the first silicon layer 81 is, for example, about 30 to 150 μm, and the thickness of the second silicon layer 82 is, for example, about 625 μm.

[0078] The SOI wafer SW has an orientation flat OF which is a (110) plane and a main surface 31 which is a (100) plane. Figure 5In the embodiment, the Z-axis direction is a direction perpendicular to the main surface 31, the X-axis direction is a direction along the orientation plane OF when viewed from the Z-axis direction, and the Y-axis direction is a direction perpendicular to both the Z-axis direction and the X-axis direction. Here, the silicon crystal contained in the SOI wafer SW is a cubic crystal system. Therefore, in Figure 5 In the example, the plane parallel to the plane perpendicular to the Y-axis direction (XZ plane) and the plane parallel to the plane perpendicular to the X-axis direction (YZ plane) both constitute equivalent crystal planes (i.e., (110) planes). In addition, when viewed from the Z-axis direction, any of the planes inclined 45 degrees relative to the (100) plane constitutes an equivalent crystal plane (i.e., (100) plane). In addition, the X-axis direction is equivalent to the plane parallel to Figure 1 The Y-axis direction corresponds to the direction of one of the first axis X1 and the second axis X2 shown, and the Y-axis direction corresponds to the direction parallel to the other of the first axis X1 and the second axis X2. In addition, depending on the processing accuracy when manufacturing the SOI wafer SW, the crystal orientation of the orientation plane OF may not completely match the (110) plane. That is, the crystal orientations of the above-mentioned planes do not necessarily have to completely match, and there may be a certain deviation.

[0079] (First process)

[0080] First, a process including isotropic etching is performed on the main surface 31 of the substrate 30. The "process including isotropic etching" is, for example, the Bosch process. In the Bosch process, a groove is formed by isotropic dry etching, and a protective film is formed on the inner wall of the groove. Then, after only the protective film at the bottom of the groove is removed by anisotropic dry etching, the groove is formed again by isotropic dry etching. In the Bosch process, the groove is dug out by repeating such a process. As a result, as shown in FIG. Figure 6 As shown in (b) and 7(a), a groove portion 32 is formed, wherein the groove portion 32 has a bottom surface 32a and a side surface 32b on which the corrugations S are formed. Figure 6 B shows a cross section perpendicular to the extending direction of the groove portion 32 . Figure 7 (a) is a SEM image of the bottom portion (including the bottom surface 32a) of the groove portion 32. The groove portion 32 is formed to extend in a direction parallel to the X-axis direction or the Y-axis direction. The ripples S are minute concavo-convex structures formed on the side surface 32b.

[0081] like Figure 7As shown in (b), the bottom surface 33a, the side surface 33b and the inclined surface 33c are formed integrally (continuously). In addition, in the cross section perpendicular to the extension direction of the groove portion 33, the length of the bottom surface 33a is longer than the length of the inclined surface 33c. In addition, a boundary line is formed between the side surface 33b and the inclined surface 33c to separate the side surface 33b from the inclined surface 33c. That is, the boundary between the side surface 33b and the inclined surface 33c is clear, and the corner between the side surface 33b and the inclined surface 33c does not form a gentle curve (curved surface). In addition, the difference between the first angle formed by the bottom surface 33a and the inclined surface 33c and the second angle formed by the side surface 33b and the inclined surface 33c is less than 30 degrees. In this embodiment, the first angle is the angle formed by the (100) surface and the (111) surface, which is approximately 125.3. The second angle is the angle formed by the (110) surface and the (111) surface, which is approximately 144.7 degrees. Therefore, the angle formed by the first angle and the second angle is about 19.4 degrees. In addition, the inclined surface 33c is a flat surface. Therefore, at a predetermined height position, the thickness t1 of the substrate 30 increased by forming the inclined surface 33c is greater than the thickness t2 of the substrate 30 increased by forming the inclined surface when the inclined surface is assumed to be a curved surface C (a curved surface concave to the space in the groove portion). Therefore, according to the inclined surface 33c as a flat surface, the thickness of the substrate 30 near the bottom surface 33a of the groove portion 33 can be appropriately increased, so that the groove portion 33 can be structurally stable. In addition, in order to convex on the side opposite to the opening side of the groove portion 33, the bottom surface 33a is formed into a shape that is at least curved than the inclined surface 33c. Since the bottom surface 33a has such a curved shape, the bottom surface 33a and the inclined surface 33c are gently connected. Therefore, it is possible to appropriately suppress stress concentration on the corner between the bottom surface 33a and the inclined surface 33c.

[0082] Due to the characteristics of forming the groove portion by alternately repeating the above-mentioned isotropic dry etching, formation of a protective film, and anisotropic dry etching, the ripples S are inevitably generated. Then, when the fourth step and subsequent processes are performed in a state where the ripples S remain, a void may be generated between the insulating layer 40 (the second layer 45) and the metal layer 50, or a crack (a fractured portion) of the insulating layer 40 may be generated. The above-mentioned void may become a structural weak point of the damascene wiring structure 100. In addition, the above-mentioned crack may cause the current flowing through the wiring portion 60 to leak to the substrate 30. That is, the metal (the metal layer 50 and the wiring portion 60) formed on the insulating layer 40 may contact a part of the substrate 30 through the crack.

[0083] (Second and third steps)

[0084] In order to avoid the above-mentioned defects caused by the ripples S (i.e., the generation of gaps or cracks, etc.), the second step and the third step are performed. First, a hydrophilic treatment is performed on the side 32b of the groove portion 32 (the second step). The hydrophilic treatment is, for example, a treatment of performing O2 ashing on the side 32b, or a treatment of immersing the side 32b in a surfactant, ethanol, etc. In addition, instead of the above-mentioned hydrophilic treatment (or in combination with the above-mentioned hydrophilic treatment), the groove portion 32 may also be subjected to a degassing treatment. For example, a degassing treatment may be performed to degas the solution present in the groove portion 32. The degassing treatment is a treatment for making it easier to fill the etching solution in the groove portion 32, and is a type of hydrophilic treatment.

[0085] Subsequently, in a state where the bottom surface 32a of the groove portion 32 exists, the groove portion 32 including the ripples S is anisotropically wet-etched (third step). As an etching solution (etchant), for example, TMAH (tetramethylammonium hydroxide), KOH (potassium hydroxide), etc. are used. Here, "a state where the bottom surface 32a of the groove portion 32 exists" refers to a state where the groove portion 32 is a non-through hole (groove). That is, "a state where the bottom surface 32a of the groove portion 32 exists" refers to a state other than a state where the bottom of the groove portion 32 is removed (that is, a state where the groove portion 32 is a through hole that penetrates from the main surface 31 to the surface of the second silicon layer 82 on the opposite side of the insulating layer 83).

[0086] By performing the wet etching described above, the ripples S formed on the side surface 32b of the groove portion 32 are removed, and the side surface 32b is flattened. Figure 6 As shown in (c) and 7(b), a groove portion 33 having a flat side surface 33b from which the corrugations S are removed is obtained. Figure 6 (c) shows a cross section perpendicular to the extending direction of the groove portion 33. In addition, Figure 7 (b) is a SEM image of the bottom of the groove 33 (including the bottom surface 33a). Figure 5 As shown, as the groove portion 33, a first groove portion 133 extending along the Y-axis direction (first direction) and a second groove portion 233 extending along the X-axis direction (second direction) are obtained. Figure 5In the relationship of the surface orientation shown in FIG. 1 , the first groove portion 133 and the second groove portion 233 both form the bottom surface 33a by a plane along the (100) surface (i.e., a surface substantially parallel to the (100) surface), and form the side surface 33b by a plane along the (110) surface (i.e., a surface substantially parallel to the (110) surface). In addition, the inclined surface 33c is formed by a plane along the (111) surface (i.e., a surface substantially parallel to the (111) surface), wherein the (111) surface is inclined at an angle of 54.7 relative to the (100) surface and the (110) surface. That is, the surface orientation of the bottom surface 33a, the surface orientation of the side surface 33b, and the surface orientation of the inclined surface 33c are different from each other. Therefore, the difference between the groove portion 33 and the groove portion 32 is not only that the corrugation S is removed, but also that the shape of the corner portion of the bottom (i.e., the area where the bottom surface and the side surface are connected) is different.

[0087] As described above, the shape of the inner surface of the groove portion 33 is formed by the difference in etching rate depending on the plane orientation. Specifically, at the corner of the bottom of the groove portion 33, the etching rate in the direction perpendicular to the (111) plane is slower than the etching rate in the direction perpendicular to the (100) plane (i.e., the depth direction of the groove portion 33) and the etching rate in the direction perpendicular to the (110) plane (i.e., the width direction of the groove portion 33). Therefore, an inclined surface 33c along the (111) plane is formed.

[0088] In addition, the hydrophilic treatment or degassing treatment may be performed before the third step of anisotropic wet etching, or the degassing treatment may be performed on the groove portion 32 simultaneously with the wet etching in the third step, instead of the hydrophilic treatment or degassing treatment (or, in combination with the hydrophilic treatment or degassing treatment). The degassing treatment on the groove portion 32 is, for example, a treatment for removing the reaction gas (for example, hydrogen) generated in the groove portion 32 by the reaction between the substrate 30 and the etching solution during the wet etching process, or the gas (for example, carbon dioxide, oxygen, nitrogen, etc.) dissolved in the etching solution in the groove portion 32 by using ultrasonic waves.

[0089] Furthermore, in order to appropriately adjust the difference in etching rate between the above-mentioned plane orientations, in the second step, a chemical solution that affects the anisotropy of the etching rate (e.g., surfactant NCW, IPA (isopropyl alcohol) etc.) may be added to the etching solution. Thus, the shape of the groove portion 33 (inclined surface 33c) can be appropriately adjusted.

[0090] According to the above-mentioned method for manufacturing a semiconductor device (processing up to the third step), Figure 8 As shown in (a), a substrate 30 having grooves 33 formed on a main surface 31 can be obtained. The depth of the grooves 33 is, for example, about 5 to 30 μm.

[0091] (Fourth process)

[0092] Then, if Figure 8 As shown in (b), an insulating layer 40 is formed on the main surface 31 of the substrate 30, wherein the insulating layer 40 has: a first portion 41 provided on the inner surface of the groove portion 33, and a second portion 42 formed integrally with the first portion 41 and provided on the main surface 31. More specifically, after a first layer 44 made of a silicon oxide film (thermal oxide film) is formed on the main surface 31 and the inner surface of the groove portion 33, a second layer 45 made of a silicon nitride film (LP-SiN) is formed on the first layer 44. The thickness of the first layer 44 and the second layer 45 is, for example, about 100 to 1000 nm.

[0093] More specifically, in the fourth step, the surface 43a of the insulating layer 40 on the opposite side of the substrate 30 at the boundary portion 43 between the first portion 41 and the second portion 42 is formed to include an inclined surface 43b inclined with respect to the direction A1 perpendicular to the main surface 31 when viewed from the extending direction of the wiring portion 60 (see FIG. 1 ). Figure 4 ). For example, by forming a first layer 44 made of a silicon oxide film and a second layer 45 made of a silicon nitride film on the main surface 31 and the inner surface of the groove portion 33, an inclined surface 43b is formed on the surface 43a of the boundary portion 43. This is because an inclined shape is easily formed in the first layer 44 made of a silicon oxide film.

[0094] (Fifth step)

[0095] Then, if Fig. 9 As shown in (a), a metal layer 50 is formed on the first portion 41 and the second portion 42 of the insulating layer 40. In the fifth process, a metal layer 55 is formed on the metal layer 50. The metal layer 55 is made of a metal material such as copper, for example. The metal layer 55 acts as a seed layer together with the metal layer 50. The metal layer 50 and the metal layer 55 are formed, for example, by sputtering, but can also be formed by atomic layer deposition (ALD), chemical vapor deposition (CVD), ion plating or chemical plating. The total thickness of the metal layer 50 and the metal layer 55 is, for example, about 10nm to 3000nm.

[0096] (Sixth step)

[0097] Then, if Fig. 9 As shown in (b), a wiring portion 60 is formed on the metal layer 50 embedded in the groove portion 33. The wiring portion 60 is formed, for example, by electroplating. The wiring portion 60 is formed, for example, in such a manner that the average thickness of the wiring portion 60 on the main surface 31 is 1 μm or more. In addition, in this example, since the metal layer 55 is made of the same material as the wiring portion 60, when the wiring portion 60 is formed, the wiring portion 60 and the metal layer 55 are integrated, and there is a case where the interface between the wiring portion 60 and the metal layer 55 disappears. In this case, it can be regarded that the metal layer 55 constitutes the wiring portion 60.

[0098] (Seventh step)

[0099] Then, if Fig.10 As shown in (a), the metal layer 50, the metal layer 55 and the wiring portion 60 on the second portion 42 are removed by, for example, chemical mechanical polishing (CMP) in such a manner that the second portion 42 of the insulating layer 40 is exposed. In the seventh step, the insulating layer 40, the metal layer 50, the metal layer 55 and the wiring portion 60 are chemically mechanically polished from the side opposite to the substrate 30. For each of the insulating layer 40, the metal layer 50, the metal layer 55 and the wiring portion 60, the insulating layer 40, the metal layer 50, the metal layer 55 and the wiring portion 60 are planarized by removing a portion of the side opposite to the main surface 31 or the bottom surface 33a in the direction A1 perpendicular to the main surface 31. At this time, in this example, the portion of the second layer 45 of the insulating layer 40 that constitutes the second portion 42 is removed.

[0100] (Step 8)

[0101] Then, if Fig.10 As shown in (b), a cover layer 70 is formed to cover the second portion 42 of the insulating layer 40, the end portion 51 of the metal layer 50, and the wiring portion 60. The cover layer 70 is made of, for example, a silicon nitride film (PE-SiN) and is formed with a thickness of about 200 to 3000 nm. Subsequently, the second silicon layer 82 and the insulating layer 83 are removed by etching or the like. Through the above steps, the above-mentioned damascene wiring structure 100 can be obtained.

[0102] [Effects]

[0103] In the above-mentioned method for manufacturing a semiconductor substrate (first to third steps), after forming the groove portion 32 having the bottom surface 33a and the side surface 33b formed with the corrugation S in the first step, in the second step, the side surface 32b of the groove portion 32 is subjected to a hydrophilic treatment or a degassing treatment, so that the wettability of the etching liquid on the side surface 32b of the groove portion 32 can be improved. In addition, by performing anisotropic wet etching in a state where the bottom surface 32a of the groove portion 32 exists, the etching liquid can be effectively filled into the groove portion 32. Therefore, the entire side surface 32b of the groove portion 32 can be wetted with the etching solution, and the corrugation S formed on the side surface 32b can be effectively removed. That is, the groove portion 33 from which the corrugation S is removed is obtained. By removing the corrugation S, the structural weak point in the groove portion can be eliminated.

[0104] Furthermore, by performing anisotropic etching in the third process, the etching rate of the side surface 32b can be made substantially uniform between the opening side and the bottom surface side of the groove portion 32. Therefore, the occurrence of problems such as the width on the opening side of the groove portion 32 becoming wider in a tapered shape can be suppressed. Therefore, according to the above-mentioned method for manufacturing a semiconductor substrate, a substrate 30 having a highly reliable groove portion 33 can be manufactured. That is, the groove portion 33 in which the waviness S is appropriately removed while maintaining an appropriate shape can be formed on the main surface 31 of the substrate 30.

[0105] According to the manufacturing method of the damascene wiring structure (the first step to the eighth step), the insulating layer 40 and the metal layer 50 are formed on the inner surface of the groove portion 33 from which the corrugation S is appropriately removed. Therefore, the occurrence of the above-mentioned voids or cracks can be suppressed, and a highly reliable damascene wiring structure 100 can be obtained. That is, the groove portion 33 with high reliability is formed, and as a result, the reliability of the damascene wiring structure 100 formed in the groove portion 33 can be improved.

[0106] Furthermore, in the above-mentioned method of manufacturing a damascene wiring structure, if Figure 5 As shown, the main surface 31 of the substrate 30 is along the (100) plane, and in the first step, a groove portion 33 (first groove portion 133 or second groove portion 233) extending along the (110) direction (in this embodiment, the X-axis direction or the Y-axis direction) is formed. According to the above structure, a bottom surface 33a along the (100) plane and a side surface 33b along the (110) plane are formed. In addition, by utilizing the difference in etching rate depending on the plane orientation, an inclined surface 33c can be formed between the bottom surface 33a and the side surface 33b, and the inclined surface 33c is inclined relative to the bottom surface 33a and the side surface 33b while being along the (111) plane. The angle of the corner between the bottom surface 33a and the side surface 33b when the inclined surface 33c is formed (that is, the angle formed by the bottom surface 33a and the inclined surface 33c or the angle formed by the side surface 33b and the inclined surface 33c) is greater than the angle of the corner when the inclined surface 33c is not formed (that is, the angle formed by the bottom surface 33a and the side surface 33b). In the present embodiment, the angle formed by the bottom surface 33a and the inclined surface 33c is approximately 125.3 degrees, and the angle formed by the side surface 33b and the inclined surface 33c is approximately 144.7 degrees. On the other hand, when the inclined surface 33c is not formed, the angle of the corner (i.e., the angle formed by the bottom surface and the side surface) is approximately 90 degrees. That is, by forming the inclined surface 33c, a more rounded corner (i.e., a gradually curved corner) is formed than when the inclined surface 33c is not formed. According to this corner, cracks in the insulating layer 40 can be made difficult to occur at this corner. Therefore, according to the above structure, a more reliable inlaid wiring structure 100 can be obtained. That is, by forming a groove portion 33 with higher reliability, the reliability of the inlaid wiring structure 100 formed in the groove portion 33 can be further improved.

[0107] As described above, in the above-mentioned substrate 30 (i.e., the semiconductor substrate manufactured through the first process to the third process), the angle of the corner between the bottom surface 33a and the side surface 33b is greater than the angle of the corner when the inclined surface 33c is not formed. That is, by the inclined surface 33c, a more rounded corner (i.e., a gradually gently curved corner) is formed than when the inclined surface 33c is not formed. According to the groove portion 33 of the corner, for example, when a prescribed material layer (an insulating layer 40 in this embodiment) is provided on the inner surface of the groove portion 33, cracks in the material layer can be suppressed from being generated at the corner. By the above-mentioned method, in the substrate 30, reliability is improved due to the groove portion 33. In addition, by utilizing the difference in etching rate depending on the surface orientation, the substrate 30 can be obtained relatively easily.

[0108] The above-mentioned damascene wiring structure 100 is formed by embedding the wiring portion 60 and the like in the groove portion 33 having the above-mentioned bottom surface 33a, side surface 33b and inclined surface 33c. Therefore, cracks in the insulating layer 40 are suppressed at the corners of the groove portion 33. Therefore, in the damascene wiring structure 100, the reliability is improved due to the groove portion 33.

[0109] In addition, in the damascene wiring structure 100, the bottom surface 33a is a surface along the (100) plane, the side surface 33b is a surface along the (110) plane, and the inclined surface 33c is a surface along the (111) plane. According to the above configuration, by utilizing the difference in etching rate depending on the plane orientation, the damascene wiring structure 100 having the above effect can be easily obtained.

[0110] Fig.11 1 is a perspective view schematically showing a corner portion of the Damascene wiring structure 100 (ie, an outer corner portion where the first groove portion 133 and the second groove portion 233 intersect). Fig.11 FIG. 2 shows a state before forming the Damascene wiring structure 100 (ie, a state before the wiring section 60 and the like are buried in the first groove section 133 and the second groove section 233). Fig.11 As shown in FIG. 1 , at the corner where the first groove portion 133 and the second groove portion 233 intersect, the first groove portion 133 and the second groove portion 233 share a bottom surface 33a. That is, the bottom surface 33a of the first groove portion 133 and the bottom surface 33a of the second groove portion 233 are continuous at the corner.

[0111] The first groove portion 133 has a first side surface 133b and a first inclined surface 133c. The first inclined surface 133c is connected to the bottom surface 33a and the first side surface 133b between the bottom surface 33a and the first side surface 133b, and is inclined relative to the bottom surface 33a and the first side surface 133b. As described above, in the present embodiment, the bottom surface 33a is along the (100) plane, the first side surface 133b is along the (110) plane, and the first inclined surface 133c is along the (111) plane. Therefore, the angle formed by the bottom surface 33a and the first inclined surface 133c is approximately 125.3 degrees, and the angle formed by the first side surface 133b and the first inclined surface 133c is approximately 144.7 degrees.

[0112] The second groove portion 233 has a second side surface 233b and a second inclined surface 233c. The second inclined surface 233c is connected to the bottom surface 33a and the second side surface 233b between the bottom surface 33a and the second side surface 233b, and is inclined relative to the bottom surface 33a and the second side surface 233b. As described above, in this embodiment, the bottom surface 33a is along the (100) plane, the second side surface 233b is along the (110) plane, and the second inclined surface 233c is along the (111) plane. Therefore, the angle formed by the bottom surface 33a and the second inclined surface 233c is approximately 125.3 degrees, and the angle formed by the second side surface 233b and the second inclined surface 233c is approximately 144.7 degrees.

[0113] An intermediate surface 35 is formed between the first side surface 133b and the second side surface 233b and between the first inclined surface 133c and the second inclined surface 233c. The intermediate surface 35 is connected to the first side surface 133b, the second side surface 233b, the first inclined surface 133c, the second inclined surface 233c and the bottom surface 33a. The intermediate surface 35 is parallel to the (100) plane (see FIG. 1 ) which is parallel to the direction (X-axis direction) perpendicular to the main surface 31. Figure 5 ). The intermediate surface 35 is formed by the difference in etching rate depending on the surface orientation. Specifically, since the etching rate of the (100) surface is slower than the etching rate of the (110) surface, a shape in which the intermediate surface 35 is exposed as the (100) surface can be obtained. In addition, the angle formed by the intermediate surface 35 and the first side surface 133b and the angle formed by the intermediate surface 35 and the second side surface 233b are both obtuse angles. Specifically, all of the above angles are about 135 degrees. In addition, the intermediate surface 35 can be as follows Fig.11 The middle surface 35 is a flat surface shown, and the portion between the first side surface 133b and the second side surface 233b can be inclined relative to the portion between the first inclined surface 133c and the second inclined surface 233c of the middle surface 35. In addition, the middle surface 35 does not necessarily have to form a right angle with the bottom surface 33a, and can also be inclined relative to the bottom surface 33a.

[0114] According to the above structure, the corner where the first groove portion 133 and the second groove portion 233 intersect (that is, the direction perpendicular to the main surface 31 ( Figure 5 The angle of the corner (i.e., the angle formed by the middle surface 35 and the first side surface 133b or the angle formed by the middle surface 35 and the second side surface 233b) when the middle surface 35 is not formed is larger than the angle of the corner (i.e., the angle formed by the first side surface 133b and the second side surface 233b) when the middle surface 35 is not formed. In the present embodiment, the angle of the corner when the middle surface 35 is formed (i.e., the angle formed by the middle surface 35 and the first side surface 133b or the angle formed by the middle surface 35 and the second side surface 233b) is about 135 degrees, and the angle of the corner when the middle surface 35 is not formed is about 90 degrees. That is, by forming the middle surface 35, a more rounded corner (i.e., a gradually curved corner) is formed than when the middle surface 35 is not formed. According to the above-mentioned corner, the stress acting on the wiring portion 60 at the corner when vibration is applied to the substrate 30, etc. can be effectively reduced. Therefore, according to the above-mentioned structure, a mosaic wiring structure 100 with further improved reliability can be obtained. In particular, when the embedded wiring structure 100 is applied to the mirror device 1 as in the present embodiment, since the swing of the first movable part 3 or the second movable part 4 causes vibration to be frequently applied to the substrate 30, the above-mentioned corner structure (i.e., the structure forming the intermediate surface 35) is particularly effective.

[0115] In the damascene wiring structure 100, the insulating layer 40 has a first portion 41 provided on the inner surface of the groove portion 33 and a second portion 42 integrally formed with the first portion 41 and provided on the main surface 31, and the cover layer 70 is provided so as to cover the second portion 42 of the insulating layer 40, the end portion 51 of the metal layer 50, and the wiring portion 60. Therefore, for example, the number of positions where stress may concentrate can be reduced compared with the case where the insulating layer 40 has only the first portion 41. That is, when the insulating layer 40 has only the first portion 41, the end portion of the insulating layer 40 is located near the boundary portion between the main surface 31 and the groove portion 33, and is in contact with the main surface 31 and the cover layer 70. In this case, the substrate 30, the end portion of the insulating layer 40, the end portion 51 of the metal layer 50, the wiring portion 60, and the cover layer 70 are in contact at a position close to each other. Stress concentration is likely to occur at the above-mentioned position. On the other hand, in the damascene wiring structure 100, since the end portion of the insulating layer 40 does not exist near the boundary portion between the main surface 31 and the groove portion 33, the position where stress concentrates can be reduced. In addition, the end 51 of the metal layer 50 extends to contact the cover layer 70. If the end 51 does not reach the cover layer 70 and stays at a position lower than the surface 60a of the wiring section 60, a void may occur in the portion of the wiring section 60 exposed from the metal layer 50. In contrast, in the damascene wiring structure 100, the generation of such a void can be suppressed, and the peeling of the cover layer 70 due to the void can be suppressed. In addition, the surface 43a of the boundary portion 43 between the first portion 41 and the second portion 42 on the insulating layer 40 on the opposite side of the substrate 30 includes an inclined surface 43b, and the end 51 of the metal layer 50 enters between the cover layer 70 and the inclined surface 43b. Then at the end 51, an acute angle is formed along the first surface 51a of the cover layer 70 and the second surface 51b along the inclined surface 43b. Therefore, stress concentration can be prevented from acting on the cover layer 70. As described above, in the damascene wiring structure 100, reliability is enhanced.

[0116] In the damascene wiring structure 100, the thickness T1 of the cover layer 70 is thicker than the thickness T2 of the insulating layer 40. Therefore, the strength of the cover layer 70 can be increased, and the reliability can be further improved.

[0117] In the damascene wiring structure 100, the portion of the cover layer 70 in contact with the first surface 51a of the end portion 51 and the portion of the insulating layer 40 in contact with the second surface 51b of the end portion 51 (the second layer 45 constituting the boundary portion 43) are made of the same material as each other. As a result, the bonding strength between the cover layer 70 and the insulating layer 40 can be improved in the vicinity of the contact portion between the cover layer 70 and the end portion 51 of the metal layer 50, and the reliability can be further improved.

[0118] In the damascene wiring structure 100, the insulating layer 40 has the first layer 44 made of an oxide film and the second layer 45 made of a nitride film provided on the first layer 44. Therefore, an inclined shape can be easily formed on the first layer 44 made of an oxide film, thereby facilitating the formation of the inclined surface 43b.

[0119] In the Damascene wiring structure 100 , the inclined surface 43 b is curved in a convex shape. Therefore, it is possible to more reliably suppress the stress concentration on the cover layer 70 .

[0120] In the damascene wiring structure 100, the third surface 51c on the side opposite to the second surface 51b on the end 51 of the metal layer 50 is inclined, and a portion 61 of the wiring portion 60 enters between the cover layer 70 and the third surface 51c. Therefore, the end 51 of the metal layer 50 can be pressed by the wiring portion 60, and the stress acting on the cover layer 70 from the metal layer 50 can be reduced. In addition, since the thickness of the portion 61 of the wiring portion 60 in the direction A1 perpendicular to the main surface 31 is reduced, the stress acting on the cover layer 70 from the wiring portion 60 can be reduced.

[0121] In the damascene wiring structure 100, the thickness of the end portion 51 of the metal layer 50 in the direction A2 parallel to the main surface 31 is thicker than the thickness of the portion of the metal layer 50 other than the end portion 51. Therefore, the contact area between the end portion 51 of the metal layer 50 and the cover layer 70 can be increased, and the stress acting on the cover layer 70 by the metal layer 50 can be more preferably dispersed.

[0122] In the damascene wiring structure 100, the thickness of the end portion 51 of the metal layer 50 in the direction A2 parallel to the main surface 31 gradually increases as it approaches the front end of the end portion 51. Therefore, the contact area between the end portion 51 of the metal layer 50 and the cover layer 70 can be further increased, and the stress acting on the cover layer 70 from the metal layer 50 can be more preferably dispersed.

[0123] In the Damascene wiring structure 100, the groove portion 33 extends in a spiral shape. Even when the groove portion 33 extends in a spiral shape in this manner, high reliability can be obtained.

[0124] In the damascene wiring structure 100, the distance B between the adjacent portions 34 in the groove 33 can be smaller than the width W of the groove 33. Therefore, the wiring pitch (interval) can be reduced, and a space saving effect can be achieved.

[0125] In the damascene wiring structure 100 , the width W of the groove 33 is smaller than the depth D of the groove 33 . Therefore, the effects of space saving and lowering the resistance of the wiring can be achieved.

[0126] In the damascene wiring structure 100, the distance L between the bottom surface 33a of the groove portion 33 in the vertical direction A1 of the main surface 31 and the opposite surface of the substrate 30 on the opposite side of the main surface 31 (the surface 81a of the first silicon layer 81) is greater than the depth D of the groove portion 33. Therefore, the strength of the substrate 30 can be improved, and the reliability can be further improved.

[0127] [Modifications]

[0128] In the above, although the preferred embodiments of the present disclosure have been described in detail, the present disclosure is not limited to the above embodiments. The materials and shapes of the various structures are not limited to the above examples. In the above embodiments, although the inlaid wiring structure 100 applied to the mirror device 1 has been described, the inlaid wiring structure 100 can be applied to devices other than the mirror device 1. In addition, in the above embodiments, a dual-axis mirror device 1 capable of rotating around dual axes (a first axis X1 and a second axis X2) is shown, but the inlaid wiring structure 100 can also be applied to a single-axis mirror device that rotates around a single axis.

[0129] In the above-mentioned method for manufacturing a semiconductor substrate (the first process to the third process), although groove-shaped groove portions 32 and 33 extending in the direction of the main surface 31 are formed in order to manufacture the inlaid wiring structure 100, a recessed portion in the shape of a through hole with a circular cross section may be formed in the first process and the third process. In this case, the ripples formed on the side of the recessed portion in the first process may also be appropriately removed by wet etching in the third process. In addition, the bottom surface of the recessed portion may be removed after performing the third process. For example, the bottom surface of the recessed portion may be removed by a process such as polishing from the surface of the second silicon layer 82 on the opposite side of the insulating layer 83, and a through hole may be formed. Such a through hole may be used, for example, to bury a through electrode (metal). In addition, when such a through hole is formed, the inclined surface formed in the third process may be removed by polishing, and a through hole having the same width and extending straight and without ripples may be obtained.

[0130] In the above embodiment, the SOI wafer SW whose orientation plane OF is the (110) plane is used. Therefore, in order to make the side surface 33b of the groove portion 33 along the (110) plane, the groove portion 33 is formed in the X-axis direction along the orientation plane OF or in the Y-axis direction perpendicular to the orientation plane OF. However, the SOI wafer used to manufacture the substrate 30 is not limited to the above SOI wafer SW. For example, when an SOI wafer whose orientation plane OF is the (100) plane is used, the surface orientation of the SOI wafer is different from that of the substrate 30. Figure 5 The faces shown are oriented in the opposite direction. That is, Figure 5 The (100) face shown is the (110) face, Figure 5The (110) plane shown is the (100) plane. In this case, by forming the groove portion along a direction inclined at 45 degrees relative to the X-axis direction and the Y-axis direction, a groove portion whose side surface is along the (110) plane can be formed. That is, even if an SOI wafer having a different surface orientation from that of the above-mentioned SOI wafer SW is used, a groove having the same structure as the above-mentioned groove portion 33 can be formed by adjusting the design (extension direction) of the groove portion. In addition, in the SOI wafer SW, the crystal orientation of the first silicon layer 81 and the crystal orientation of the second silicon layer 82 do not necessarily have to be consistent.

[0131] In addition, you can Fig.12 The inlaid wiring structure 100 is configured as in the first modified example shown in FIG. In the first modified example, when viewed from the extending direction of the wiring portion 60, a boundary surface 36 may be provided on the boundary portion between the main surface 31 and the groove portion 33 on the substrate 30, and the boundary surface 36 is inclined outward relative to the direction A1 perpendicular to the main surface 31. The boundary surface 36 is, for example, a flat surface. Since the boundary portion 43 of the insulating layer 40 is provided on the boundary surface 36, it extends along the boundary surface 36 and is inclined outward relative to the direction A1 perpendicular to the main surface 31. The inclined surface 43b of the boundary portion 43 and the second surface 51b of the end portion 51 of the metal layer 50 are flat surfaces parallel to the boundary surface 36. The third surface 51c of the end portion 51 is also a flat surface inclined outward relative to the direction A1. The inclination angle of the third surface 51c relative to the direction A1 is gentler than the inclination angle of the second surface 51b relative to the direction A1. Therefore, the thickness of the end portion 51 in the direction A2 parallel to the main surface 31 gradually increases as it approaches the front end of the end portion 51.

[0132] When manufacturing the damascene wiring structure 100 of the first modification, for example, the groove portion 33 is formed by reactive ion etching using a non-Bosch process and a Bosch process. Therefore, when the groove portion 33 is formed, a boundary surface 36 is formed at a boundary portion between the main surface 31 on the substrate 30 and the groove portion 33. By combining the non-Bosch process and the Bosch process, reliability can be improved.

[0133] The reliability can also be improved by the first variant in the same manner as in the above-mentioned embodiment. In addition, since the boundary surface 36 is provided at the boundary portion between the main surface 31 on the substrate 30 and the groove portion 33, the inclined surface 43b can be easily formed. Also in the first variant, the distance B between the plurality of portions 34 of the groove portion 33 can be smaller than the width W of the groove portion 33. In the case of the first variant, the interval B is the distance between the inner surfaces of the plurality of portions 34 excluding the boundary surface 36 (in other words, the distance between the portions on the inner surface of the groove portion 33 extending in the direction A1 perpendicular to the main surface 31).

[0134] In addition, you can Fig.13The embedded wiring structure 100 is configured as in the second variant shown. In the second variant, the surface 60a of the wiring portion 60 is located on the bottom surface 33a side of the groove portion 33 relative to the surface 42a of the second portion 42 of the insulating layer 40. The third surface 51c of the end portion 51 of the metal layer 50 is covered by a boundary portion 71 between a portion on the surface 60a and a portion on the surface 42a in the covering layer 70. The boundary portion 71 extends along the third surface 51c and is inclined outward relative to a direction A1 perpendicular to the main surface 31. When manufacturing the embedded wiring structure 100 of the second variant, for example, by adjusting the slurry of the chemical mechanical polishing in the seventh step, the dishing amount (the amount of the wiring portion 60 removed) of the wiring portion 60 is increased. Therefore, it is possible to form a structure having a structure as shown in FIG. Fig.13 The wiring section 60 has the shape shown.

[0135] By the second modification, the reliability can also be improved in the same manner as in the above-mentioned embodiment. In addition, the surface 60a is located on the side of the bottom surface 33a of the groove portion 33 relative to the surface 42a. Therefore, the number of positions where stress may be concentrated can be further reduced. In addition, since the third surface 51c of the end portion 51 is covered by the boundary portion 71, the contact area between the end portion 51 of the metal layer 50 and the cover layer 70 can be further increased, and the stress acting on the cover layer 70 by the metal layer 50 can be more preferably dispersed.

[0136] You can also Fig.14 (a) The inlaid wiring structure 100 is configured as in the third variation shown in FIG. 1. In the third variation, as in the second variation, the surface 60a of the wiring portion 60 is located on the bottom surface 33a side of the groove portion 33 relative to the surface 42a of the second portion 42 of the insulating layer 40. In addition, the third surface 51c of the end portion 51 of the metal layer 50 is covered by the boundary portion 71 of the covering layer 70. In the third variation, the thickness T1 of the covering layer 70 is larger than the distance H between the surface 60a and the surface 42a in the direction A1 perpendicular to the main surface 31. By the third variation, the reliability can also be improved in the same manner as in the above-mentioned embodiment. In addition, since the thickness T1 of the covering layer 70 is larger than the distance H between the surface 60a and the surface 42a in the direction A1 perpendicular to the main surface 31, the strength of the covering layer 70 can be further improved.

[0137] You can also Fig.14(b) The inlaid wiring structure 100 is configured as in the fourth variation shown in FIG. In the fourth variation, similarly to the second variation, the surface 60a of the wiring portion 60 is located on the bottom surface 33a side of the groove portion 33 relative to the surface 42a of the second portion 42 of the insulating layer 40. In addition, the third surface 51c of the end portion 51 of the metal layer 50 is covered by the boundary portion 71 of the cover layer 70. In the fourth variation, the thickness T1 of the cover layer 70 is smaller than the distance H between the surface 60a and the surface 42a in the direction A1 perpendicular to the main surface 31. According to the fourth variation, the reliability can also be improved in the same manner as in the above-mentioned embodiment. In addition, since the thickness T1 of the cover layer 70 is smaller than the distance H between the surface 60a and the surface 42a in the direction A1 perpendicular to the main surface 31, the thickness of the wiring portion 60 in the direction A1 can be made thinner, and therefore, the stress applied to the cover layer from the wiring portion 60 can be further reduced.

[0138] The third surface 51c of the end 51 of the metal layer 50 may extend along the second surface 51b. For example, the degree of inclination (inclination angle) of the third surface 51c may be the same as the degree of inclination (inclination angle) of the second surface 51b. The third surface 51c and the second surface 51b may extend parallel to each other. The second portion 42 may be composed of the first layer 44 and the second layer 45. In this case, the number of locations where stress is easily concentrated can be further reduced. When the cover layer 70 is made of the same material as the second layer 45 of the insulating layer 40, the adhesion can be improved because the area of ​​the part of the same material is bonded becomes larger. The insulating layer 40 may be composed of a single layer. The insulating layer 40 may be composed of a single layer made of an oxide film, for example. In this case, the cover layer 70 may be composed of an oxide film. When viewed from the extension direction of the wiring portion 60, the first surface 51a and the second surface 51b may be connected so that their curvatures are continuous with each other. The inlaid wiring structure 100 may be applied to structures other than actuators.

[0139] Explanation of symbols

[0140] 30…substrate (semiconductor substrate); 31…main surface; 32, 33…groove portion; 32a, 33a…bottom surface; 32b, 33b…side surface; 33…groove portion (recessed portion); 33c…inclined surface; 35…intermediate surface; 40…insulating layer; 41…first portion; 42…second portion; 50…metal layer; 51…end portion; 60…wiring portion; 70…covering layer; 100…embedded wiring structure; 133…first groove portion; 133b…first side surface; 133c…first inclined surface; 233…second groove portion; 233b…second side surface; 233c…second inclined surface; S…corrugation.

Claims

1. A mosaic wiring structure, characterized in that: It has: a semiconductor substrate, an insulating layer, a wiring portion and a cover layer, The semiconductor substrate comprises: a main surface provided with a recessed portion; The concave portion has a bottom surface, a side surface and an inclined surface, The inclined surface is connected to the bottom surface and the side surface between the bottom surface and the side surface, and is inclined relative to the bottom surface and the side surface in a manner of forming an obtuse angle with the bottom surface and the side surface. The crystal plane orientation of the bottom surface, the crystal plane orientation of the side surface, and the crystal plane orientation of the inclined surface are different from each other, The recessed portion is a groove extending along the main surface, The insulating layer is disposed on the inner surface of the groove portion, The wiring portion is formed inside the insulating layer in the groove portion, The cover layer has insulating properties and is provided so as to cover the wiring portion.

2. The inlaid wiring structure according to claim 1, characterized in that: The thickness of the cover layer is greater than the thickness of the insulating layer.

3. The inlaid wiring structure according to claim 1, characterized in that: The cover layer has a thickness smaller than that of the insulating layer.

4. The Damascene wiring structure according to any one of claims 1 to 3, characterized in that: The bottom surface is a surface along the (100) plane, The side surface is a surface along the (110) plane, The inclined surface is a surface along the (111) plane.

5. The Damascene wiring structure according to any one of claims 1 to 4, characterized in that: The recess has a first groove portion extending in a first direction along the main surface and a second groove portion sharing the bottom surface with the first groove portion and extending in a second direction, the second direction being a direction along the main surface intersecting the first direction, The first groove portion has a first side surface, and a first inclined surface between the bottom surface and the first side surface, connected to the bottom surface and the first side surface and inclined relative to the bottom surface and the first side surface. The second groove portion has a second side surface, and a second inclined surface between the bottom surface and the second side surface, connected to the bottom surface and the second side surface and inclined relative to the bottom surface and the second side surface. An intermediate surface is formed between the first side surface and the second side surface, and between the first inclined surface and the second inclined surface. The middle surface is connected to the first side surface, the second side surface, the first inclined surface, the second inclined surface and the bottom surface. Angles formed by the intermediate surface, the first side surface and the second side surface are respectively obtuse angles.

6. The Damascene wiring structure according to any one of claims 1 to 5, characterized in that: When viewed from the extending direction of the wiring portion, a boundary surface inclined with respect to a direction perpendicular to the main surface is arranged at a boundary portion between the main surface and the recessed portion in the substrate.

7. The Damascene wiring structure according to any one of claims 1 to 5, characterized in that: When viewed from the extending direction of the wiring portion, the main surface of the substrate and the side surface of the recessed portion are vertically connected.

8. The Damascene wiring structure according to any one of claims 1 to 7, characterized in that: The bottom surface is formed in a curved shape so as to be convex toward a side opposite to the opening side of the recessed portion.

9. The Damascene wiring structure according to any one of claims 1 to 8, characterized in that: The semiconductor substrate comprises a first silicon layer, a second silicon layer, and an insulating layer disposed between the first silicon layer and the second silicon layer. The recessed portion is formed on a surface of the first silicon layer on the opposite side to the insulating layer.

10. The Damascene wiring structure according to any one of claims 1 to 9, characterized in that: The width of the groove portion is smaller than the depth of the groove portion.

11. The Damascene wiring structure according to any one of claims 1 to 10, characterized in that: A plurality of the groove portions adjacent to each other are formed on the main surface of the semiconductor substrate, and a distance between the plurality of the groove portions adjacent to each other is smaller than a width of the groove portion.

12. The Damascene wiring structure according to any one of claims 1 to 11, characterized in that: A distance between the bottom surface of the groove portion and a surface of the semiconductor substrate opposite to the main surface in a direction perpendicular to the main surface is greater than a depth of the groove portion.

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