Method for evaluating electricity removal efficiency of plasma in etching cavity

Abstract

The invention provides a method for evaluating the electricity removal efficiency of plasma in an etching cavity, and the method comprises the steps: S01, placing a wafer in the etching cavity of etching equipment, and placing the wafer on an electrostatic chuck; s02, the wafer is etched, and static elimination processing is carried out on the wafer after etching; s03, performing charge quantity detection on the wafer through a detection device in the etching chamber to obtain a first measurement potential of the wafer; s04, driving the wafer to rise until the wafer is separated from the electrostatic chuck; s05, carrying out charge quantity detection on the wafer through the detection device again to obtain a second measurement potential of the wafer; and S06, setting the difference value between the first measurement potential and the second measurement potential as the potential difference of the wafer, and judging the residual electric charge quantity on the surface of the wafer according to the potential difference. According to the method, the potential of the wafer on the electrostatic chuck and the potential of the wafer separated from the electrostatic chuck can be respectively detected through the detection device in the cavity after the wafer is de-energized, and the residual electric charge quantity on the surface of the wafer is judged through the potential difference value in the two states, so that the de-energizing efficiency of the wafer is evaluated.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor manufacturing, and in particular to a method for evaluating the static removal efficiency of etching chamber plasma. Background Art

[0002] In the existing dry etching process, the wafer is usually adsorbed by an electrostatic chuck in the chamber of the etching equipment. After the wafer is etched, in order to remove the charge on the surface of the wafer, the usual method is to apply a reverse negative voltage to the electrostatic chuck (i.e., hard de-charge) to distribute the reverse charge on the electrostatic chuck, thereby neutralizing the charge on the surface of the wafer. Since the amount of charge on the surface of the wafer is difficult to predict, the size of the applied reverse negative voltage is difficult to accurately judge. If the voltage applied to the electrostatic chuck is too small, the wafer de-charge effect is not good, resulting in the wafer being unable to be lifted smoothly by the ejector pin; if the voltage applied to the electrostatic chuck is too large, it may damage the internal structure of the wafer. At the same time, long-term application of a reverse negative voltage on the electrostatic chuck can easily lead to power attenuation problems in the lower electrode.

[0003] In order to avoid the above problems, soft charge removal (i.e. neutralizing the surface charge of the wafer by plasma) is generally used in the prior art to remove charge from the wafer. After the wafer is etched and static electricity is eliminated, there is still a small amount of residual charge on the surface of the wafer, which will affect the wafer and subsequent processes, resulting in a decrease in product yield and a reduction in dry etching capacity. Therefore, it is particularly important to detect the residual charge on the surface of the wafer after the wafer is de-electrified.

[0004] The existing method for evaluating the residual charge on the wafer surface is to measure the surface charge of the ER wafer through an external detection device before etching and after static elimination. This measurement method is easily affected by the difference in the surface film layer of the ER wafer before etching and after static elimination, as well as the waiting time of the ER wafer measurement, which leads to deviations in the test results of the surface charge of the ER wafer. Summary of the invention

[0005] In order to solve the technical problems in the prior art, the purpose of the present invention is to provide a method for evaluating the static charge removal efficiency of etching chamber plasma. After the wafer is de-staticized, the method can measure the potential of the wafer on the electrostatic chuck and the potential of the wafer after separation from the electrostatic chuck through a detection device in the chamber, and judge the amount of residual charge on the wafer surface by the potential difference between the two states, thereby evaluating the static charge removal efficiency of soft de-staticization on the wafer, which helps to improve the product yield of the wafer.

[0006] To achieve the above object, the present invention provides a method for evaluating the static removal efficiency of an etching chamber plasma, comprising:

[0007] S01: placing the wafer in an etching chamber of an etching device and placing it on an electrostatic chuck;

[0008] S02: etching the wafer, and performing static elimination treatment on the wafer after etching;

[0009] S03: Detecting the charge of the wafer by a detection device in the etching chamber to obtain a first measurement potential of the wafer;

[0010] S04: driving the wafer to rise until it is separated from the electrostatic chuck;

[0011] S05: performing charge detection on the wafer again by the detection device to obtain a second measurement potential of the wafer;

[0012] S06: setting the difference between the first measurement potential and the second measurement potential as the potential difference of the wafer, and determining the amount of residual charge on the surface of the wafer according to the potential difference.

[0013] Optionally, in step S02, the step of performing static elimination treatment on the wafer includes:

[0014] A soft charge removal method is used to release plasma onto the wafer surface under preset parameters to neutralize residual charges on the wafer surface.

[0015] Optionally, the method for evaluating the static removal efficiency of the etching chamber plasma further includes:

[0016] S07: adjusting the preset parameters for the static elimination process of the wafer according to the potential difference.

[0017] Optionally, in step S01 and step S02, multiple groups of preset parameters are set, and multiple wafers are selected; each wafer is etched under the same conditions and subjected to electrostatic elimination treatment under a corresponding set of preset parameters; and steps S03 to S06 are then repeated for each wafer to obtain the potential difference corresponding to each wafer.

[0018] Optionally, in step S07, the step of adjusting the preset parameters for the static elimination process of the wafer according to the potential difference includes:

[0019] The wafer corresponding to the minimum value among the absolute values ​​of all the potential differences is set as a target wafer, and the preset parameters during the static electricity elimination process are adjusted to the preset parameters corresponding to the target wafer.

[0020] Optionally, the surfaces of all the wafers are covered with a film layer of the same thickness.

[0021] Optionally, the electrostatic chuck is provided with a through hole, a ejector pin passes through the through hole, and the ejector pin can extend out of the through hole or retract into the through hole.

[0022] Optionally, in step S04, the step of driving the wafer to rise until it is separated from the electrostatic chuck includes:

[0023] The ejector pin is made to rise relative to the electrostatic chuck; after the ejector pin contacts the wafer, it is used to drive the wafer to rise synchronously until the wafer is completely separated from the electrostatic chuck.

[0024] Optionally, in step S04, the distance that the ejector pin moves relative to the electrostatic chuck after contacting the wafer is not less than 2 mm.

[0025] Optionally, in step S04, after contacting the wafer, the ejector pin first rises to 2 mm at a first rate, and then continues to rise at a second rate, wherein the first rate is less than the second rate.

[0026] The present application provides a method for evaluating the static elimination efficiency of etching chamber plasma, which can detect the residual charge on the surface of the wafer through a detection device in the etching chamber. Specifically, the potential of the wafer on the electrostatic chuck and the potential after the wafer is separated from the electrostatic chuck can be detected after the wafer is subjected to static elimination treatment, and the amount of residual charge on the surface of the wafer after the static elimination treatment can be judged by the potential difference between the two states, thereby evaluating the static elimination efficiency of the wafer. This method can avoid the difference in charge storage capacity of the wafer in different states (for example, the state before etching and the state after static elimination treatment), as well as the error in the detection results caused by factors such as the long waiting time for wafer detection, and can improve the accuracy of evaluating the static elimination efficiency of the wafer, which helps to improve the product yield of the wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 A flow chart of a method for evaluating the static removal efficiency of an etching chamber plasma in a preferred embodiment of the present invention;

[0028] Figure 2 A schematic diagram of a scene in which an etching device performs static elimination processing on a wafer in a preferred embodiment of the present invention;

[0029] Figure 3 A schematic diagram of a use scenario of an electrostatic chuck and a wafer in a preferred embodiment of the present invention, wherein the wafer is adsorbed on the electrostatic chuck;

[0030] Figure 4 It is a schematic diagram of a usage scenario of an electrostatic chuck and a wafer in a preferred embodiment of the present invention, wherein the wafer is separated from the electrostatic chuck.

[0031] The reference numerals are described as follows:

[0032] Wafer 1; etching chamber 2; electrostatic chuck 31; through hole 32; ejector pin 33; plasma 4. DETAILED DESCRIPTION

[0033] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are in very simplified form and in non-precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0034] The orientation or position relationship indicated by the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like are based on the orientation or position relationship shown in the drawings and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred mechanism or element must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be understood as limiting the present invention.

[0035] In the present invention, unless otherwise clearly specified and limited, the terms "installation", "connection", "fixation" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral one; it can be a mechanical connection, an electrical connection, or communication with each other; it can be a direct connection, or a connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0036] Furthermore, those skilled in the art may combine and associate different embodiments or examples and features of different embodiments or examples described in this specification without mutual contradiction.

[0037] Reference Figure 1 and Figure 2 As shown, a preferred embodiment of the present application provides a method for evaluating the static removal efficiency of an etching chamber plasma, comprising:

[0038] S01: Place the wafer 1 in the etching chamber 2 of the etching equipment and place it on the electrostatic chuck 31. During the actual etching, a voltage is applied to the lower electrode 3 so that the electrostatic chuck 31 achieves an electrostatic adsorption effect.

[0039] S02: Etching the wafer 1, and performing static elimination treatment on the wafer 1 after etching.

[0040] S03 : The charge amount of the wafer 1 is detected by a detection device (not shown) in the etching chamber 2 to obtain a first measurement potential V1 of the wafer 1 .

[0041] S04 : driving the wafer 1 to rise until it is separated from the electrostatic chuck 31 .

[0042] S05 : the detection device is used to detect the charge amount of the wafer 1 again to obtain a second measurement potential V2 of the wafer 1 .

[0043] S06: Set the difference between the first measurement potential V1 and the second measurement potential V2 as the potential difference ΔV of the wafer 1, that is, ΔV=V2-V1. Determine the residual charge on the surface of the wafer 1 according to the potential difference ΔV, and then evaluate the static elimination performance of the wafer 1.

[0044] Furthermore, since the less residual charge on the surface of the wafer 1 is, the better the static elimination performance of the wafer 1 is, the static elimination performance of the wafer 1 can be evaluated by obtaining the residual charge on the surface of the wafer 1 to improve the product yield.

[0045] In the prior art, the method for detecting the charge on the surface of the wafer is to detect the charge on the wafer through internal detection equipment before etching and after the static elimination treatment. Since the state of the film layer grown on the wafer is inconsistent before etching and after the static elimination treatment, the amount of charge that the wafer can accommodate may be different due to differences in the growth conditions of the film layer of the wafer itself (such as inconsistent uniformity, etc.). At the same time, since the charge on the surface of the wafer will gradually decrease with the extension of time, if the wafer waits for a long time during detection, the charge on the surface of the wafer will also decrease. Both of the above factors may cause changes in the charge on the surface of the wafer, thereby affecting the accuracy of the detection results of the charge on the surface of the wafer.

[0046] In addition, since the charge storage capacity of different wafers varies, it is not possible to judge the wafer static elimination performance by the specific value of the residual charge after static elimination treatment.

[0047] Specifically, when the wafer 1 is adsorbed on the electrostatic chuck 31, since the charges on the wafer 1 and the charges on the electrostatic chuck 31 are opposite in charge and can attract each other, part of the charges on the wafer 1 cannot be detected by the detection device because they are offset by the charges on the electrostatic chuck 31, so the absolute value of the first measurement potential V1 of the wafer 1 detected by the detection device is relatively small. When the wafer 1 is separated from the electrostatic chuck 31, since part of the charges on the wafer 1 no longer offset the charges on the electrostatic chuck 31, the absolute value of the second measurement potential V2 of the wafer 1 detected by the detection device increases. At this time, the potential difference ΔV of the wafer 1 (i.e., the difference between V2 and V1) is the amount of residual charge on the surface of the wafer 1, so the smaller the absolute value of the potential difference ΔV of the wafer 1, the less the residual charge on the surface of the wafer 1.

[0048] The present application provides a method for evaluating the static elimination efficiency of etching chamber plasma, which can detect the residual charge on the surface of wafer 1 through a detection device in etching chamber 2. Specifically, the potential of wafer 1 on electrostatic chuck 31 and the potential of wafer 1 after separation from electrostatic chuck 31 can be detected after the wafer 1 is subjected to static elimination treatment, and the amount of residual charge on the surface of wafer 1 after static elimination treatment can be judged by the potential difference between the two states, thereby evaluating the static elimination efficiency of the wafer. This method can avoid the difference in charge storage capacity of wafer 1 in different states (for example, the state before etching and the state after static elimination treatment), as well as the error in the detection result caused by factors such as the long waiting time for wafer 1 detection, and can improve the accuracy of evaluating the static elimination efficiency of wafer 1, which helps to improve the product yield of wafers.

[0049] Preferably, in step S02, the step of performing static elimination treatment on the wafer 1 includes:

[0050] Using a soft charge removal method (i.e., releasing plasma 4 onto the wafer surface to neutralize the surface charge of the wafer 1) under preset parameters (i.e., set process parameters) to release plasma 4 onto the surface of the wafer 1 (refer to Figure 2 ) to neutralize the residual charge on the wafer 1, thereby avoiding damage to the wafer 1 and the electrostatic chuck 31 when the wafer 1 is subjected to static elimination treatment by applying a reverse negative voltage to the electrostatic chuck 31.

[0051] It should be known that the etching gas is usually arranged at the upper part of the etching chamber 2, and forms plasma after ionization, and is used to release plasma 4 to the surface of the wafer 1 after the etching is completed to neutralize the charge on the wafer 1, thereby eliminating the charge on the wafer 1 and avoiding the occurrence of shrapnel, falling and broken pieces when lifting the wafer 1.

[0052] Optionally, the method for evaluating the static removal efficiency of the etching chamber plasma further includes S07:

[0053] S07: adjusting preset parameters for static elimination processing of the wafer 1 according to the potential difference ΔV.

[0054] The above-mentioned method for evaluating the static elimination efficiency of etching chamber plasma can obtain the amount of residual charge on the surface of wafer 1 after static elimination treatment through the potential difference ΔV between wafer 1 in two states, thereby obtaining the static elimination efficiency of wafer 1 when static elimination treatment is performed by the soft static elimination method under preset parameters. The operator can adjust the preset parameters when the static elimination efficiency of wafer 1 is weak, thereby optimizing the static elimination efficiency of the soft static elimination method.

[0055] Specifically, after obtaining the potential difference ΔV of the wafer 1 when it is on the electrostatic chuck 31 and when it is separated from the electrostatic chuck 31, if it is judged through the potential difference ΔV that the soft static elimination has a weak static elimination effect on the wafer 1 under the preset parameters, the operator can adjust the preset parameters during the static elimination process according to needs or experience. Then, the soft static elimination method can be used to perform static elimination on the wafer 1 under the adjusted preset parameters and the potential difference ΔV of the wafer 1 can be detected by the above method, so as to judge the static elimination effect of the soft static elimination method on the wafer 1 under the adjusted preset parameters. In addition, if necessary, the above process can be repeated to adjust the process parameters of the soft static elimination method multiple times, and then the static elimination effect of the soft static elimination method can be gradually optimized.

[0056] It should be known that the preset parameters when using the soft static elimination method to perform static elimination treatment on the wafer 1 include but are not limited to the type of gas introduced into the etching chamber 2 (for example, oxygen or nitrogen), the gas flow rate introduced into the etching chamber 2, the gas pressure introduced into the etching chamber 2, and the length of time the wafer 1 is neutralized by the plasma 4.

[0057] As a preferred embodiment, in step S01 and step S02, multiple groups of preset parameters are set, and multiple wafers 1 are selected. Each wafer 1 is etched under the same conditions and subjected to static elimination treatment under a corresponding set of preset parameters. Then, steps S03 to S06 are repeated for each wafer 1 to obtain the potential difference ΔV corresponding to each wafer 1.

[0058] Furthermore, the surfaces of all wafers 1 are covered with a film layer of the same thickness.

[0059] It should be noted that the wafer 1 in the present application refers to a control wafer used to monitor the stability of machine process parameters during chip production. The control wafer has only one or several layers of film (e.g., silicon dioxide film). Since the control wafer has a simple structure and high consistency, multiple control wafers are used as detection wafers 1, and multiple control wafers are covered with films of the same thickness to ensure that the structure of each control wafer is consistent, thereby ensuring that a single soft static removal parameter is changed, and then the above method can be used to obtain the effect of changing only a single soft static removal parameter on the static removal performance of wafer 1.

[0060] Further, in step S07, the step of adjusting the preset parameters for the static elimination process of the wafer 1 according to the potential difference ΔV includes:

[0061] Since the absolute value of the potential difference ΔV of wafer 1 is small, it means that the residual charge of wafer 1 is small. The wafer 1 corresponding to the minimum absolute value of all potential differences ΔV is set as the target wafer. At this time, the residual charge of target wafer 1 is the smallest among all wafers 1. The preset parameters during the static elimination process are adjusted to the preset parameters corresponding to the target wafer to ensure that the soft static elimination method has better static elimination performance.

[0062] Specifically, since the soft static removal method has different static removal performance on wafer 1 under multiple sets of preset parameters, the above method can evaluate the strength of the static removal performance of the soft static removal method under different preset parameters through multiple wafers 1, and select a set of preset parameters with the best static removal performance, thereby achieving gradual optimization of the process parameters of the soft static removal method.

[0063] As shown in the following table, in a specific example, three wafers 1 with substantially the same film thickness may be selected, and the three wafers 1 may be etched in the same conditions in the etching chamber 2 in turn, and then the three wafers 1 may be subjected to static elimination treatment under three different sets of preset parameters by a soft static elimination method. Subsequently, the first measurement potential V of the three wafers 1 adsorbed on the electrostatic chuck 31 may be detected by the detection device in the etching chamber 2. 1 、V 3 and V 5 and respectively detect the second measurement potential V after the three wafers 1 are separated from the electrostatic chuck 31 through the detection device. 2 、V 4 and V 6 , and then obtain the potential difference ΔV of the three wafers 1 respectively 1 , ΔV 2 and ΔV 3 , where ΔV 1 =V 2 -V 1 , ΔV 2 =V 4 -V 3 , ΔV 3 =V 6 -V 5 .

[0064] Soft static removal conditions First measuring potential Second measurement potential Potential difference The first set of preset parameters <![CDATA[V 1 =-344]]> <![CDATA[V 2 =-650]]> <![CDATA[ΔV 1 =-306]]> The second set of preset parameters <![CDATA[V 3 =-90]]> <![CDATA[V 4 =-173]]> <![CDATA[ΔV 2 =-83]]> The third set of preset parameters <![CDATA[V 5 =-152]]> <![CDATA[V 6 =-270]]> <![CDATA[ΔV 3 =-118]]>

[0065] As shown in the table above, at a potential difference of ΔV 1 , ΔV 2 and ΔV 3 In the case of 2The absolute value of is the smallest, so it can be known that among the three sets of preset parameters, the soft static elimination method has the best static elimination performance for wafer 1 under the second set of preset parameters. At this time, the preset parameters of the soft static elimination method for static elimination treatment can be adjusted to the second set of preset parameters to ensure that wafer 1 has less residual charge after static elimination treatment, avoid damage to wafer 1 during processing, and improve the product yield of the etching process.

[0066] Reference Figure 3 and Figure 4 As shown, the electrostatic chuck 31 is provided with a through hole 32. A pin 33 is passed through the through hole 32, and the pin 33 can extend out of the through hole 32 or retract into the through hole 32. The pin 33 is connected to a driving device (such as a motor) and can rise or fall under the drive of the driving device.

[0067] Furthermore, in step S01, the step of placing and adsorbing the wafer 1 on the electrostatic chuck 31 includes:

[0068] First, the wafer 1 is transferred to the etching chamber 2 by a robot arm, and the wafer 1 is placed at a reasonable position on the electrostatic chuck 31. Since the electrostatic chuck 31 is provided with a lower electrode 3, after the wafer 1 is placed, a voltage is applied to the lower electrode 3 so that the electrostatic chuck 31 electrostatically adsorbs the wafer 1. After the wafer 1 is firmly fixed on the electrostatic chuck 31, the wafer 1 can be etched and electrostatically eliminated in the etching chamber 2 in sequence, and after the electrostatic elimination, the surface of the wafer 1 is charged by the detection device, thereby obtaining the first measurement potential V1 of the wafer 1.

[0069] The present application does not limit the fixed position of the detection device in the etching chamber 2. For example, the detection device can be installed at a suitable position inside the lower electrode 3, or the detection device can also be fixed at other positions in the etching chamber 2. The placement position of the detection device only needs to be able to detect the charge amount of the wafer 1.

[0070] Further, in step S04, the step of driving the wafer 1 to rise until it is separated from the electrostatic chuck 31 includes:

[0071] Reference Figure 3 and Figure 4 As shown, after obtaining the first measurement potential V1 of the wafer 1, the ejector pin 33 is raised relative to the electrostatic chuck 31. After the ejector pin 33 is raised, it gradually approaches the wafer 1 until it contacts the wafer 1. After the ejector pin 33 contacts the wafer 1, it is used to drive the wafer 1 to rise synchronously until the wafer 1 is completely separated from the electrostatic chuck 31.

[0072] It should be noted that after the ejector pin 3 contacts the wafer 1, the ejector pin 33 needs to drive the wafer 1 to rise a short distance relative to the electrostatic chuck 31 to completely separate the wafer 1 from the electrostatic chuck 31. After the wafer 1 is completely separated from the electrostatic chuck 31, the residual charge detection of the wafer 1 can be performed to obtain the second measurement potential V2, and then the wafer 1 can be moved out of the etching chamber 2.

[0073] In a preferred embodiment, in step S04, the moving distance of ejector pin 33 relative to electrostatic chuck 31 after contacting wafer 1 is not less than 2 mm, that is, ejector pin 33 can completely separate wafer 1 from electrostatic chuck 31 only when it moves 2 mm relative to electrostatic chuck 31.

[0074] Preferably, in step S04, after contacting the wafer 1, the ejector pin 33 first rises to 2 mm at a first rate, and then continues to rise at a second rate, wherein the first rate is lower than the second rate.

[0075] In more detail, when the ejector pin 33 drives the wafer 1 to rise, it needs to rise at a lower rate (i.e., the first rate) first to prevent the wafer 1 from being damaged by the strong adsorption force between the wafer 1 and the electrostatic chuck 31. After ensuring that the ejector pin 33 is completely separated from the wafer 1 (e.g., a position greater than or equal to 2 mm), the ejector pin 33 can increase the rising rate (i.e., rise at the second rate), thereby driving the wafer 1 to move quickly until the wafer 1 reaches the set position.

[0076] In summary, the present invention provides a method for evaluating the static elimination efficiency of etching chamber plasma. The method can detect the residual charge on the surface of wafer 1 through a detection device in etching chamber 2. Specifically, the potential of wafer 1 on electrostatic chuck 31 and the potential of wafer 1 after separation from electrostatic chuck 31 can be detected after the wafer 1 undergoes static elimination treatment. The amount of residual charge on the surface of wafer 1 after static elimination treatment is judged by the potential difference between the two states, thereby evaluating the static elimination efficiency of the wafer. This method can avoid the difference in charge storage capacity of wafer 1 in different states (for example, the state before etching and the state after static elimination treatment), as well as the error in the detection result caused by factors such as the long waiting time for wafer 1 detection, and can improve the accuracy of evaluating the static elimination efficiency of wafer 1, which helps to improve the product yield of wafers.

[0077] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the protection scope of the present invention.

Claims

1. A method for evaluating the static removal efficiency of an etching chamber plasma, characterized in that: include: S01: placing the wafer in an etching chamber of an etching device and placing it on an electrostatic chuck; S02: etching the wafer, and performing static elimination treatment on the wafer after etching; S03: Detecting the charge of the wafer by a detection device in the etching chamber to obtain a first measurement potential of the wafer; S04: driving the wafer to rise until it is separated from the electrostatic chuck; S05: performing charge detection on the wafer again by the detection device to obtain a second measurement potential of the wafer; S06: setting the difference between the first measurement potential and the second measurement potential as the potential difference of the wafer, and determining the amount of residual charge on the surface of the wafer according to the potential difference.

2. The method for evaluating the static removal efficiency of an etching chamber plasma according to claim 1, wherein: In step S02, the step of performing static elimination treatment on the wafer includes: A soft charge removal method is used to release plasma onto the wafer surface under preset parameters to neutralize residual charges on the wafer surface.

3. The method for evaluating the static removal efficiency of an etching chamber plasma according to claim 2, wherein: Also includes: S07: adjusting the preset parameters for the static elimination process of the wafer according to the potential difference.

4. The method for evaluating the static removal efficiency of an etching chamber plasma according to claim 3, wherein: In step S01 and step S02, multiple groups of preset parameters are set, and multiple wafers are selected; each wafer is etched under the same conditions, and static elimination treatment is performed under a corresponding group of preset parameters; Then, steps S03 to S06 are repeated for each of the wafers to obtain the potential difference corresponding to each of the wafers.

5. The method for evaluating the static removal efficiency of an etching chamber plasma according to claim 4, wherein: In step S07, the step of adjusting the preset parameters for the static elimination process of the wafer according to the potential difference includes: The wafer corresponding to the minimum value among the absolute values ​​of all the potential differences is set as a target wafer, and the preset parameters during the static electricity elimination process are adjusted to the preset parameters corresponding to the target wafer.

6. The method for evaluating the static removal efficiency of an etching chamber plasma according to claim 4, wherein: The surfaces of all the wafers are covered with a film layer of the same thickness.

7. The method for evaluating the static removal efficiency of an etching chamber plasma according to claim 1, wherein: The electrostatic chuck is provided with a through hole, and a ejector pin passes through the through hole. The ejector pin can extend out of the through hole or retract into the through hole.

8. The method for evaluating the static removal efficiency of an etching chamber plasma according to claim 7, wherein: In step S04, the step of driving the wafer to rise until it is separated from the electrostatic chuck includes: The ejector pin is made to rise relative to the electrostatic chuck; after the ejector pin contacts the wafer, it is used to drive the wafer to rise synchronously until the wafer is completely separated from the electrostatic chuck.

9. The method for evaluating the static removal efficiency of an etching chamber plasma according to claim 8, wherein: In step S04, the distance that the ejector pin moves relative to the electrostatic chuck after contacting the wafer is not less than 2 mm.

10. The method for evaluating the static removal efficiency of an etching chamber plasma according to claim 9, wherein: In step S04, after contacting the wafer, the ejector pin first rises a distance of 2 mm at a first rate, and then continues to rise at a second rate, wherein the first rate is less than the second rate.

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