Low signal-to-noise ratio signal processing device and method, and medium

Abstract

The invention provides a low-signal-to-noise-ratio signal processing device and method and a medium, the low-signal-to-noise-ratio signal processing device comprises a signal acquisition system and a signal processing system, the low-signal-to-noise-ratio signal processing device further comprises a signal accumulation filtering system, the signal accumulation filtering system is connected to the output end of the signal acquisition system, and the signal accumulation filtering system comprises an accumulation counting control module used for obtaining a counting value, superposing the plurality of acquired input signals to obtain an accumulated output signal, and outputting the accumulated output signal when a count value reaches a preset accumulated depth threshold value, the count value being the acquisition number of the input signals; the input end of the divider is connected to the output end of the accumulative counting control module, and the divider is used for averaging the accumulative output signal based on the accumulative depth threshold value to obtain an accumulative filtering signal and outputting the accumulative filtering signal to a signal processing system for functional processing. According to the technical scheme of the embodiment of the invention, the amplitude of an effective signal can be kept and white noise can be suppressed by adding a signal accumulation filtering system.

Description

Technical Field

[0001] The present invention relates to the field of signal processing technology, and in particular to a low signal-to-noise ratio signal processing device and method and medium thereof. Background Art

[0002] The existing signal processing equipment includes a signal acquisition system and a signal processing system, and the signal acquisition system is communicatively connected to the signal processing system. The signal acquisition system acquires the initial signal, performs analog-to-digital conversion on the initial signal, obtains the initial digital signal, identifies the valid signal based on the initial digital signal, sends the valid signal to the signal processing system, and the signal processing system performs functional processing on the valid signal.

[0003] However, the existing signal processing method is to filter the original signal, but the existing filtering technology will lose part of the effective signal while removing the white noise, and the existing signal processing equipment is only suitable for signals with high signal-to-noise ratio and medium signal-to-noise ratio. When the signal processing equipment obtains a low signal-to-noise ratio signal, since the effective signal amplitude of the low signal-to-noise ratio signal is small and the white noise amplitude is large, when the low signal-to-noise ratio is processed by the existing signal processing equipment, the effective signal will be removed while removing the white noise, so it is impossible to filter out the white noise from the low signal-to-noise ratio digital signal while retaining the effective signal. Summary of the invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention proposes a low signal-to-noise ratio signal processing device and method, and a medium thereof, which adds a signal cumulative filtering system, obtains multiple low signal-to-noise ratio signals and then performs average processing after superposition, and obtains a cumulative filtering signal that maintains the amplitude of the effective signal and suppresses white noise, thereby effectively identifying the effective signal.

[0005] In a first aspect, an embodiment of the present invention provides a low signal-to-noise ratio signal processing device, the low signal-to-noise ratio signal processing device comprising a signal acquisition system and a signal processing system, and further comprising a signal accumulation filtering system, the signal accumulation filtering system being connected to an output end of the signal acquisition system, the signal accumulation filtering system comprising: A cumulative counting control module, the cumulative counting control module is used to obtain a count value, superimpose multiple input signals obtained to obtain a cumulative output signal, and output the cumulative output signal when the count value reaches a preset cumulative depth threshold, wherein the count value is the number of input signals collected; A divider, wherein the input end of the divider is connected to the output end of the cumulative counting control module, and the divider is used to average the cumulative output signal based on the cumulative depth threshold to obtain a cumulative filtered signal, and output the cumulative filtered signal to the signal processing system for functional processing.

[0006] According to some embodiments of the present invention, the signal accumulation filtering system further comprises: An address synchronization module, a judgment accumulation module and a RAM, wherein the RAM includes a port A and a port B, the port A of the RAM is connected to the judgment accumulation module, the port B of the RAM is connected to the address synchronization module, the judgment accumulation module and the cumulative counting control module, the judgment accumulation module and the address synchronization are respectively connected to the signal acquisition system, the judgment accumulation module is used to obtain a write signal of port A by superimposing the acquired input signal, and send the write signal of port A to the RAM, the address synchronization module is used to obtain an address signal based on the input signal, and send the address signal to the RAM, the RAM is used to send a port B output signal to the judgment accumulation module and the cumulative counting control module, and store the write signal of port A based on the address signal.

[0007] According to some embodiments of the present invention, the address synchronization module includes a pulse width counter, the input end of the pulse width counter is communicatively connected to the output end of the signal acquisition system, the output end of the pulse width counter is communicatively connected to the B port input end of the RAM, and the pulse width counter is used to obtain the address signal based on the input signal and send the address signal to the B port input end of the RAM.

[0008] According to some embodiments of the present invention, the judgment accumulation module includes a first adder and a judgment controller, the first adder is connected to the judgment controller, the cumulative counting control module and the divider, the output end of the judgment controller is connected to the input end of port A of the RAM, and the output end of port B of the RAM is connected to the judgment controller, the first adder is used to count the number of samples collected from the input signal and output the count value, the judgment controller is used to superimpose the input signal and the port B output signal to obtain the port A write signal, and control the output of the port A write signal based on the count value.

[0009] According to some embodiments of the present invention, the cumulative count control module includes a second adder and a judgment selector, the input end of the second adder is communicatively connected to the B port output end of the RAM, the input end of the judgment selector is communicatively connected to the output end of the first adder and the output end of the second adder, respectively, the output end of the judgment selector is communicatively connected to the input end of the signal processing system, the second adder is used to superimpose the B port output signal and the input signal to obtain the cumulative output signal, and send the cumulative output signal to the judgment selector, and the judgment selector is used to control the output of the cumulative output signal based on the count value.

[0010] In a second aspect, an embodiment of the present invention provides a low signal-to-noise ratio signal processing method, which is applied to the low signal-to-noise ratio signal processing device according to the first aspect, and the method includes: The cumulative counting control module obtains a first input signal and a counting value, and obtains a second input signal from the signal acquisition system, wherein the second input signal is a next input signal of the first input signal; The cumulative counting control module superimposes the first input signal and the second input signal to obtain a cumulative output signal, and when the count value reaches a preset cumulative depth threshold, sends the cumulative output signal to the divider; The divider acquires the accumulated output signal and the count value, and performs averaging processing on the accumulated output signal based on the count value to obtain an accumulated filtered signal; The divider sends the accumulated filtered signal to a signal processing system, and the signal processing system performs functional processing on the accumulated filtered signal.

[0011] According to some embodiments of the present invention, the signal accumulation filtering system further includes: an address synchronization module, a judgment accumulation module and a RAM, the RAM includes a port A and a port B, the port A of the RAM is connected to the judgment accumulation module, the port B of the RAM is connected to the address synchronization module and the cumulative counting control module, the judgment accumulation module and the address synchronization are respectively connected to the signal acquisition system, the judgment accumulation module is used to obtain a port A write signal based on the acquired input signal by superposition, and send the port A write signal to the RAM, the address synchronization module is used to obtain an address signal based on the input signal, and send the address signal to the RAM, the RAM is used to send a port B output signal to the cumulative counting control module, and store the port A write signal based on the address signal; The address synchronization module includes a pulse width counter, the input end of the pulse width counter is communicatively connected to the output end of the signal acquisition system, the output end of the pulse width counter is communicatively connected to the input end of the port B of the RAM, and the pulse width counter is used to obtain the address signal based on the input signal and send the address signal to the input end of the port B of the RAM; Before the cumulative counting control module acquires the first input signal and the count value and acquires the second input signal from the signal acquisition system, the method further includes: The judgment accumulation module acquires the first input signal, adds one to the count value, and obtains a first port A write signal based on the first input signal, wherein the first port A write signal is the first input signal; The pulse width counter acquires the first input signal, obtains a first counting result based on the first input signal, and obtains a first address signal based on the first counting result; The RAM acquires the first port A write signal and the first address signal, and stores the first port A write signal based on the first address signal; The cumulative counting control module obtains the first B port output signal, obtains the second input signal from the signal acquisition system, and superimposes the first B port output signal and the second input signal to obtain the cumulative output signal, wherein the first B port output signal is the first A port write signal.

[0012] According to some embodiments of the present invention, the judgment accumulation module includes a first adder and a judgment controller, the first adder is connected to the judgment controller, the cumulative counting control module and the divider, the output end of the judgment controller is connected to the input end of the port A of the RAM, the output end of the port B of the RAM is connected to the judgment controller, the first adder is used to count the number of collections of the input signal and output the count value, the judgment controller is used to superimpose the input signal and the port B output signal to obtain the port A write signal, and control the output of the port A write signal based on the count value; After the judging and accumulating module acquires the first input signal, the method further includes: The first adder obtains the second input signal, and the count value is increased by one; The judgment controller obtains the first B port output signal and the second input signal, superimposes the first B port output signal and the second input signal to obtain a second A port write signal, and sends the second A port write signal to the RAM when the count value is less than the cumulative depth threshold.

[0013] According to some embodiments of the present invention, the cumulative count control module includes a second adder and a judgment selector, the input end of the second adder is communicatively connected to the output end of the port B of the RAM, the input end of the judgment selector is communicatively connected to the output end of the first adder and the output end of the second adder respectively, the output end of the judgment selector is communicatively connected to the input end of the signal processing system, the second adder is used to superimpose the port B output signal and the input signal to obtain the cumulative output signal, and send the cumulative output signal to the judgment selector, and the judgment selector is used to control the output of the cumulative output signal based on the count value; The cumulative counting control module superimposes the first input signal and the second input signal to obtain a cumulative output signal, and when the count value reaches a preset cumulative depth threshold, sends the cumulative output signal to a divider, including: The second adder obtains the first B port output signal and the second input signal, superimposes the first B port output signal and the second input signal to obtain the accumulated output signal, and sends the accumulated output signal to the determination selector; The judgment selector obtains the count value and the accumulated output signal, and sends the accumulated output signal to the divider when the count value reaches the accumulated depth threshold.

[0014] In a third aspect, an embodiment of the present invention provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to execute the low signal-to-noise ratio signal processing method as described in the second aspect above.

[0015] According to the low signal-to-noise ratio signal processing device of the embodiment of the present invention, the low signal-to-noise ratio signal processing device includes a signal acquisition system and a signal processing system, and has at least the following beneficial effects: the low signal-to-noise ratio signal processing device also includes a signal cumulative filtering system, the signal cumulative filtering system is connected to the output end of the signal acquisition system, and the signal cumulative filtering system includes: a cumulative counting control module, the cumulative counting control module is used to obtain a counting value, superimpose multiple input signals obtained to obtain a cumulative output signal, and when the counting value reaches a preset cumulative depth threshold, the cumulative output signal is output, wherein the counting value is the number of input signals collected; a divider, the input end of the divider is connected to the output end of the cumulative counting control module, the divider is used to average the cumulative output signal based on the cumulative depth threshold to obtain a cumulative filtered signal, and output the cumulative filtered signal to the signal processing system for functional processing. According to the technical solution of the embodiment of the present invention, a signal accumulation filtering system is added to obtain multiple low signal-to-noise ratio signals for superposition. Since the amplitude of the effective signal of the input signal is stable and the amplitude of the white noise of the input signal is unstable, during the superposition process, the amplitudes of multiple effective signals are superimposed and the white noises cancel each other out. The accumulated output signal is averaged to obtain the average amplitude of the effective signal, thereby maintaining the effective signal amplitude and suppressing the white noise, thereby achieving the identification of the effective signal from the input signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a schematic structural diagram of a low signal-to-noise ratio signal processing device provided by an embodiment of the present invention; Figure 2 is a structural schematic diagram of a signal accumulation filtering system provided by another embodiment of the present invention; Figure 3 is a schematic diagram of the structure of an address synchronization module provided by another embodiment of the present invention; Figure 4 is a structural diagram of a judgment accumulation module provided by another embodiment of the present invention; Figure 5 is a schematic structural diagram of a cumulative counting control module provided by another embodiment of the present invention; Figure 6 It is a flowchart of a low signal-to-noise ratio signal processing method provided by another embodiment of the present invention. DETAILED DESCRIPTION

[0017] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0018] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., and orientations or positional relationships indicated are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0019] In the description of the present invention, "several" means one or more, "more" means more than two, "greater than", "less than", "exceed" etc. are understood as not including the number itself, and "above", "below", "within" etc. are understood as including the number itself. If there is a description of "first" or "second", it is only used for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0020] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0021] According to the low signal-to-noise ratio signal processing device of the embodiment of the present invention, the low signal-to-noise ratio signal processing device includes a signal acquisition system and a signal processing system, and has at least the following beneficial effects: the low signal-to-noise ratio signal processing device also includes a signal cumulative filtering system, the signal cumulative filtering system is connected to the output end of the signal acquisition system, and the signal cumulative filtering system includes: a cumulative counting control module, the cumulative counting control module is used to obtain a counting value, superimpose multiple input signals obtained to obtain a cumulative output signal, and when the counting value reaches a preset cumulative depth threshold, the cumulative output signal is output, wherein the counting value is the number of input signals collected; a divider, the input end of the divider is connected to the output end of the cumulative counting control module, the divider is used to average the cumulative output signal based on the cumulative depth threshold to obtain a cumulative filtered signal, and output the cumulative filtered signal to the signal processing system for functional processing. According to the technical solution of the embodiment of the present invention, a signal accumulation filtering system is added to obtain multiple low signal-to-noise ratio signals for superposition. Since the amplitude of the effective signal of the input signal is stable and the amplitude of the white noise of the input signal is unstable, during the superposition process, the amplitudes of multiple effective signals are superimposed and the white noises cancel each other out. The accumulated output signal is averaged to obtain the average amplitude of the effective signal, thereby maintaining the effective signal amplitude and suppressing the white noise, thereby achieving the identification of the effective signal from the input signal.

[0022] First, refer to Figure 1 and Figure 2 The low signal-to-noise ratio signal processing device provided in the embodiment of the present application includes a signal acquisition system and a signal processing system, and also includes: a signal accumulation filtering system 100, the signal accumulation filtering system 100 is connected to the output end of the signal acquisition system, and the signal accumulation filtering system 100 includes: The cumulative counting control module 40 is used to obtain a count value, superimpose multiple input signals to obtain a cumulative output signal, and output a cumulative output signal when the count value reaches a preset cumulative depth threshold, wherein the count value is the number of input signals collected; The divider 50 has an input end connected to the output end of the cumulative counting control module 40. The divider 50 is used to average the cumulative output signal based on the cumulative depth threshold to obtain a cumulative filtered signal, and output the cumulative filtered signal to the signal processing system for functional processing.

[0023] It should be noted that the input end of the signal accumulation filtering system 100 is connected to the output end of the signal acquisition system, and the output end of the signal accumulation filtering system 100 is connected to the signal acquisition system; the signal acquisition system collects the original signal, and performs analog-to-digital conversion on the original signal to obtain a digital original signal, and sends the digital original signal to the signal filtering system; the signal filtering system obtains multiple input signals from the signal acquisition system, superimposes the multiple input signals to obtain a cumulative output signal, and when the count value reaches a preset cumulative depth threshold, outputs the cumulative output signal to the divider 50; the divider 50 divides the amplitude of the cumulative output signal by the number of superimposed input signals to obtain a cumulative filtered signal, and sends the cumulative filtered signal to the signal processing system for functional processing; wherein, the original signal is a continuous signal stream, the digital original signal is a continuous signal stream, the digital original signal includes multiple input signals, and the input signal is the part including the valid signal intercepted by the signal filtering system in a continuous digital original signal.

[0024] It should be noted that, during the implementation process, the cumulative counting control module 40 acquires multiple input signals to obtain a first counting value, where the first counting value is the number of input signals collected, and the multiple input signals are superimposed to obtain a first cumulative output signal. When the first counting value is equal to the cumulative depth threshold, the first cumulative output signal is sent to the divider 50, and the first counting value is cleared; when the first counting value is less than the cumulative depth threshold, the cumulative counting control module 40 acquires a new input signal, adds one to the first counting value to obtain a second counting value, superimposes the first cumulative output signal with the new input signal to obtain a second cumulative output signal, and controls the output of the second cumulative output signal based on the second counting value.

[0025] It should be noted that the cumulative counting control module 40 obtains a cumulative output signal by superimposing multiple input signals, and the superposition method is to align the multiple input signals and then perform amplitude superposition; since in one frame of input signal, the amplitude of the effective signal is stable, while the amplitude of the white noise in the input signal is unstable, the larger the number of superimposed input signals, the closer the amplitude of the white noise part is to zero, and the cumulative output signal is averaged to obtain the average amplitude of the effective signal, thereby maintaining the effective signal amplitude, and the white noise part is suppressed, and the larger the number of superimposed input signals, the better the effect of suppressing white noise.

[0026] It should be noted that the cumulative counting control module 40 obtains a first input signal and a first count value, and obtains a second input signal from a signal acquisition system, wherein the second input signal is the next input signal of the first input signal, and the first count value is the number of input signals obtained by the cumulative technical control module; the cumulative counting control module 40 superimposes the first input signal and the second input signal to obtain a first cumulative output signal, and when the first count value is less than the cumulative depth threshold, obtains a third input signal from the signal acquisition system, adds one to the first count value to obtain a second count value, superimposes the first cumulative output signal and the third input signal to obtain a second cumulative output signal, and controls the output of the second cumulative output signal based on the second count value; when the first count value reaches a preset cumulative depth threshold, sends the first cumulative output signal to the divider 50; the divider 50 obtains the first cumulative output signal and the first count value, and averages the first cumulative output signal based on the first count value to obtain a cumulative filtered signal; the divider 50 sends the cumulative filtered signal to the signal processing system, and the signal processing system performs functional processing on the cumulative filtered signal.

[0027] In addition, in one embodiment, referring to Figure 2 , the signal accumulation filtering system 100 further includes: The address synchronization module 10, the judgment accumulation module 20 and the RAM30, the RAM30 includes a port A and a port B, the port A of the RAM30 is connected to the judgment accumulation module 20, the port B of the RAM30 is connected to the address synchronization module 10, the judgment accumulation module 20 and the cumulative counting control module 40, the judgment accumulation module 20 and the address synchronization are respectively connected to the signal acquisition system, the judgment accumulation module 20 is used to obtain the A port write signal based on the acquired input signal by superposition, and send the A port write signal to the RAM30, the address synchronization module 10 is used to obtain the address signal based on the input signal, and send the address signal to the RAM30, the RAM30 is used to send the B port output signal to the judgment accumulation module 20 and the cumulative counting control module 40, and store the A port write signal based on the address signal.

[0028] It should be noted that the judgment accumulation module includes a counting value, and the counting value is the number of input signals obtained by the judgment accumulation module 20. The judgment accumulation module 20 obtains the input signal and the B port output signal sent by the B port output end of RAM30, superimposes the input signal and the B port output signal to obtain the A port write signal, and sends the A port write signal to the A port input end of RAM30.

[0029] It should be noted that RAM30 is a dual-port RAM30, the output end of the judgment accumulation module 20 is connected to the input end of port A of RAM30, the output end of the address synchronization module 10 is connected to the input end of port B of RAM30, and the output end of port B of RAM30 is respectively connected to the judgment accumulation module 20 and the cumulative counting control module 40.

[0030] It should be noted that RAM30 cannot implement synchronous signal storage steps and output steps. By way of example, RAM30 obtains the first port A write signal and stores the first port A write signal. After RAM30 sends the first port B output signal to the judgment accumulation module 20 and the cumulative count control module 40, RAM30 then obtains the second port A write signal and stores the second port A write signal, wherein the first port B output signal is the first port A write signal.

[0031] It should be noted that the judgment accumulation module 20 obtains the first input signal, the count value is increased by one, and the first A port write signal is obtained based on the first input signal, wherein the first A port write signal is the first input signal; the address synchronization module 10 obtains the first input signal, and obtains the first address signal based on the first input signal; RAM30 obtains the first A port write signal and the first address signal, and stores the first A port write signal to RAM30 based on the first address signal; the cumulative counting control module 40 obtains the first B port output signal from RAM30, obtains the second input signal from the signal acquisition system, and superimposes the first B port output signal and the second input signal to obtain the cumulative output signal, wherein the first B port output signal is the first A port write signal.

[0032] In addition, in one embodiment, referring to Figure 2 and Figure 3 The address synchronization module 10 includes a pulse width counter 11, the input end of the pulse width counter 11 is communicatively connected to the output end of the signal acquisition system, the output end of the pulse width counter 11 is communicatively connected to the B port input end of the RAM30, and the pulse width counter 11 is used to obtain an address signal based on the input signal and send the address signal to the B port input end of the RAM30.

[0033] It should be noted that the address synchronization module 10 is used to count based on the acquired input signal pulse width, so as to determine that the pulse width of the acquired input signal is the same as the pulse width of the initial input signal, thereby realizing alignment of multiple input signals, so that in the process of input signal superposition, the amplitude of the effective signal part of the input signal is correctly superimposed, and the input signal is prevented from being misaligned during the superposition process, and an address signal is generated based on the pulse width of the input signal and sent to RAM30.

[0034] In addition, in one embodiment, referring to Figure 2 and Figure 4The judgment accumulation module 20 includes a first adder 21 and a judgment controller 22. The first adder 21 is connected to the judgment controller 22, the cumulative counting control module 40 and the divider 50. The output end of the judgment controller 22 is connected to the input end of port A of the RAM 30, and the output end of port B of the RAM 30 is connected to the judgment controller 22. The first adder 21 is used to count the number of input signal collections and output the count value. The judgment controller 22 is used to superimpose the input signal and the port B output signal to obtain the port A write signal, and control the output of the port A write signal based on the count value.

[0035] It should be noted that the RAM 30 sends the first B port output signal to the judgment accumulation module 20, the judgment accumulation module 20 obtains the second input signal, the count value is increased by one, and the judgment accumulation module 20 superimposes the first B port output signal and the second input signal to obtain the second A port write signal; It should be noted that when the count value is less than the cumulative depth threshold, the second port A write signal is sent to RAM30; when the count value reaches the cumulative depth threshold, the count value is cleared and the second port A write signal is not sent to RAM30.

[0036] In addition, in one embodiment, referring to Figure 2 and Figure 5 The cumulative count control module 40 includes a second adder 42 and a judgment selector 41. The input end of the second adder 42 is communicatively connected to the output end of the port B of the RAM 30. The input end of the judgment selector 41 is communicatively connected to the output end of the first adder 21 and the output end of the second adder 42 respectively. The output end of the judgment selector 41 is communicatively connected to the input end of the signal processing system. The second adder 42 is used to superimpose the port B output signal and the input signal to obtain a cumulative output signal, and send the cumulative output signal to the judgment selector 41. The judgment selector 41 is used to control the output of the cumulative output signal based on the count value.

[0037] It should be noted that since RAM30 cannot perform data storage and output steps synchronously, the count value obtained by the cumulative count controller and the divider 50 is the number of input signals of the B port output signal obtained by the cumulative count controller plus one. The number of input signals of the cumulative output signal sent by the cumulative count controller must be equal to the count value in order to ensure that the cumulative filter signal output of the divider 50 is correct.

[0038] It should be noted that the second adder 42 obtains the first B port output signal and the second input signal, superimposes the first B port output signal and the second input signal to obtain a cumulative output signal, and sends the cumulative output signal to the judgment selector 41; the judgment selector 41 obtains the count value and the cumulative output signal, and when the count value reaches the cumulative depth threshold, the cumulative output signal is sent to the divider 50; when the count value is less than the cumulative depth threshold, the cumulative output signal is not sent to the divider 50, and the second B port output signal and the third input signal are obtained, and the second B port output signal and the third input signal are superimposed and sent to the judgment selector 41. The judgment selector 41 controls whether to output the superimposed signal of the second B port output signal and the third input signal to the divider 50 based on the most recently obtained count value, wherein the second B port output signal is the second A port write signal, and the second A port write signal is the superimposed result of the first input signal and the second signal.

[0039] In addition, the present invention provides a method for processing a low signal-to-noise ratio signal, which is applied to Figures 1 to 5 The low signal-to-noise ratio signal processing device of the embodiment shown in FIG. Figure 6 The method includes but is not limited to the following steps: S10, the cumulative counting control module obtains the first input signal and the counting value, and obtains the second input signal from the signal acquisition system, wherein the second input signal is the next input signal of the first input signal; S20, the cumulative counting control module superimposes the first input signal and the second input signal to obtain a cumulative output signal, and when the count value reaches a preset cumulative depth threshold, sends the cumulative output signal to the divider; S30, the divider obtains the cumulative output signal and the count value, and performs averaging processing on the cumulative output signal based on the count value to obtain a cumulative filtered signal; S40, the divider sends the accumulated filtered signal to the signal processing system, and the signal processing system performs functional processing on the accumulated filtered signal.

[0040] It should be noted that the technical principle of implementing cumulative filtering of low signal-to-noise ratio signals based on cumulative counting control module and divider can be referred to Figure 1 to Figure 2 The description of the illustrated embodiment will not be repeated here.

[0041] Through the technical solution of this embodiment, when the number of input signals obtained reaches the cumulative depth threshold, that is, the count value reaches the cumulative depth threshold, the superposition result of all input signals, that is, the cumulative output signal, is sent to the divider; the divider obtains the cumulative output signal and the count value, and averages the cumulative output signal based on the count value, so that the amplitude of the effective signal part in the low signal-to-noise ratio signal remains unchanged, and the white noise in the low signal-to-noise ratio signal is suppressed after multiple accumulations, so that through the low signal-to-noise ratio signal processing method of the present application, the amplitude of the effective signal of the low signal-to-noise ratio signal is maintained and the white noise is effectively suppressed, so that the signal processing system can perform functional processing on the cumulative filtered signal.

[0042] In addition, in one embodiment, before executing S10, the following steps are also specifically included but not limited to: S11, determining that the accumulation module obtains the first input signal, adding one to the count value, and obtaining a first port A write signal based on the first input signal, wherein the first port A write signal is the first input signal; S12, the pulse width counter acquires a first input signal, obtains a first counting result based on the first input signal, and obtains a first address signal based on the first counting result; S13, the RAM obtains the first port A write signal and the first address signal, and stores the first port A write signal based on the first address signal; S14, the cumulative counting control module obtains the first B port output signal, obtains the second input signal from the signal acquisition system, and superimposes the first B port output signal and the second input signal to obtain a cumulative output signal, wherein the first B port output signal is the first A port write signal.

[0043] It should be noted that the principle of realizing input signal counting and A port write signal storage based on the judgment accumulation module, address synchronization module and RAM can refer to the above Figure 2 and Figure 3 The description of the illustrated embodiment will not be repeated here.

[0044] In addition, in one embodiment, after executing step S11, the following steps are also included but not limited to: S111, the first adder obtains the second input signal, and the count value increases by one; S112, the judgment controller obtains the first B port output signal and the second input signal, superimposes the first B port output signal and the second input signal to obtain the second A port write signal, and when the count value is less than the cumulative depth threshold, sends the second A port write signal to the RAM.

[0045] It should be noted that the principle of realizing input signal counting and generating A port write signal based on the specific structure of the judgment accumulation module can refer to the above Figure 2 and Figure 4The description of the illustrated embodiment will not be repeated here.

[0046] In addition, in one embodiment, S20 also includes but is not limited to the following steps: S21, a second adder obtains the first B port output signal and the second input signal, superimposes the first B port output signal and the second input signal to obtain a cumulative output signal, and sends the cumulative output signal to the judgment selector; S22, the judgment selector obtains the count value and the cumulative output signal, and when the count value reaches the cumulative depth threshold, the cumulative output signal is sent to the divider.

[0047] It should be noted that the principle of realizing the control output of the cumulative output signal based on the specific structure of the cumulative counting control module can refer to the above Figure 2 and Figure 5 The description of the illustrated embodiment will not be repeated here.

[0048] To facilitate understanding of this solution, the following specific embodiments are provided: S31, the judgment accumulation module obtains the first input signal, the initial count value is added by one to obtain the first count value, and the first A port write signal is obtained based on the first input signal, wherein the first A port write signal is the first input signal; S32, the pulse width counter acquires a first input signal, obtains a first counting result based on the first input signal, and obtains a first address signal based on the first counting result; S33, the RAM obtains the first port A write signal and the first address signal, and stores the first port A write signal based on the first address signal; S34, the judgment accumulation module obtains the first B port output signal, the judgment accumulation module obtains the second input signal, the first count value is added by one to obtain the second count value, the first B port output signal and the second input signal are superimposed to obtain the second A port write signal, if the second count value is less than the accumulation depth threshold, the second A port write signal is sent to the RAM, wherein the first B port write signal is the first A port write signal, and the first A port write signal is the first input signal; S35, the pulse width counter acquires a second input signal, obtains a second counting result based on the second input signal, and obtains a second address signal based on the second counting result; S36, the RAM obtains the second port A write signal and the second address signal, and stores the second port A write signal based on the second address signal; S37, the second adder obtains the first B port output signal, obtains the second input signal from the signal acquisition system, superimposes the first B port output signal and the second input signal to obtain a cumulative output signal, and sends the cumulative output signal to the judgment selector, wherein the first B port output signal is the first A port write signal; S38, the judgment selector obtains the second count value and the cumulative output signal, and when the second count value reaches the cumulative depth threshold, the cumulative output signal is sent to the divider; S39, the divider obtains the cumulative output signal and the second count value, performs averaging processing on the cumulative output signal based on the second count value to obtain a cumulative filtered signal, and the divider sends the cumulative filtered signal to the signal processing system, and the signal processing system performs functional processing on the cumulative filtered signal.

[0049] An embodiment of the present application further provides a storage medium, which is a computer-readable storage medium and stores a computer program. When the computer program is executed by a processor, the above-mentioned low signal-to-noise ratio signal processing method is implemented.

[0050] As a non-transient computer-readable storage medium, the memory can be used to store non-transient software programs and non-transient computer executable programs. In addition, the memory may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage devices. In some embodiments, the memory may optionally include a memory remotely arranged relative to the processor, and these remote memories may be connected to the processor via a network. Examples of the above-mentioned networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof. The device embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and are implemented to be located in one place, or may also be distributed to multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment.

[0051] It will be appreciated by those skilled in the art that all or some of the steps and systems in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or transient medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media typically include computer readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0052] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the above-mentioned implementation mode. Technical personnel familiar with the field can also make various equivalent deformations or substitutions under the shared conditions without violating the spirit of the present invention. These equivalent deformations or substitutions are all included in the scope defined by the claims of the present invention.

Claims

1. A low signal-to-noise ratio signal processing device, comprising a signal acquisition system and a signal processing system, characterized in that: It also includes a signal accumulation filtering system, which is connected to the output end of the signal acquisition system, and includes: A cumulative counting control module, the cumulative counting control module is used to obtain a count value, superimpose multiple input signals obtained to obtain a cumulative output signal, and output the cumulative output signal when the count value reaches a preset cumulative depth threshold, wherein the count value is the number of input signals collected; A divider, wherein the input end of the divider is connected to the output end of the cumulative counting control module, and the divider is used to average the cumulative output signal based on the cumulative depth threshold to obtain a cumulative filtered signal, and output the cumulative filtered signal to the signal processing system for functional processing.

2. The low signal-to-noise ratio signal processing device according to claim 1, characterized in that: The signal accumulation filtering system also includes: An address synchronization module, a judgment accumulation module and a RAM, wherein the RAM includes a port A and a port B, the port A of the RAM is connected to the judgment accumulation module, the port B of the RAM is connected to the address synchronization module, the judgment accumulation module and the cumulative counting control module, the judgment accumulation module and the address synchronization are respectively connected to the signal acquisition system, the judgment accumulation module is used to obtain a write signal of port A by superimposing the acquired input signal, and send the write signal of port A to the RAM, the address synchronization module is used to obtain an address signal based on the input signal, and send the address signal to the RAM, the RAM is used to send a port B output signal to the judgment accumulation module and the cumulative counting control module, and store the write signal of port A based on the address signal.

3. The low signal-to-noise ratio signal processing device according to claim 2, characterized in that: The address synchronization module includes a pulse width counter, the input end of the pulse width counter is communicatively connected to the output end of the signal acquisition system, the output end of the pulse width counter is communicatively connected to the B port input end of the RAM, and the pulse width counter is used to obtain the address signal based on the input signal and send the address signal to the B port input end of the RAM.

4. The low signal-to-noise ratio signal processing device according to claim 2, characterized in that: The judgment accumulation module includes a first adder and a judgment controller, the first adder is connected to the judgment controller, the cumulative counting control module and the divider, the output end of the judgment controller is connected to the input end of port A of the RAM, and the output end of port B of the RAM is connected to the judgment controller, the first adder is used to count the number of collections of the input signal and output the count value, the judgment controller is used to superimpose the input signal and the port B output signal to obtain the port A write signal, and control the output of the port A write signal based on the count value.

5. The low signal-to-noise ratio signal processing device according to claim 4, characterized in that: The cumulative count control module includes a second adder and a judgment selector, the input end of the second adder is communicatively connected to the B port output end of the RAM, the input end of the judgment selector is communicatively connected to the output end of the first adder and the output end of the second adder respectively, the output end of the judgment selector is communicatively connected to the input end of the signal processing system, the second adder is used to superimpose the B port output signal and the input signal to obtain the cumulative output signal, and send the cumulative output signal to the judgment selector, and the judgment selector is used to control the output of the cumulative output signal based on the count value.

6. A method for processing a low signal-to-noise ratio signal, characterized in that: The low signal-to-noise ratio signal processing device according to any one of claims 1 to 5, wherein the method comprises: The cumulative counting control module obtains a first input signal and a counting value, and obtains a second input signal from the signal acquisition system, wherein the second input signal is a next input signal of the first input signal; The cumulative counting control module superimposes the first input signal and the second input signal to obtain a cumulative output signal, and when the count value reaches a preset cumulative depth threshold, sends the cumulative output signal to the divider; The divider acquires the accumulated output signal and the count value, and performs averaging processing on the accumulated output signal based on the count value to obtain an accumulated filtered signal; The divider sends the accumulated filtered signal to a signal processing system, and the signal processing system performs functional processing on the accumulated filtered signal.

7. The low signal-to-noise ratio signal processing method according to claim 6, characterized in that: The signal accumulation filtering system also includes: An address synchronization module, a judgment accumulation module and a RAM, wherein the RAM includes a port A and a port B, the port A of the RAM is connected to the judgment accumulation module, the port B of the RAM is connected to the address synchronization module, the judgment accumulation module and the cumulative counting control module, the judgment accumulation module and the address synchronization are respectively connected to the signal acquisition system, the judgment accumulation module is used to obtain a port A write signal by superimposing the acquired input signal, and send the port A write signal to the RAM, the address synchronization module is used to obtain an address signal based on the input signal, and send the address signal to the RAM, the RAM is used to send a port B output signal to the judgment accumulation module and the cumulative counting control module, and store the port A write signal based on the address signal; The address synchronization module includes a pulse width counter, the input end of the pulse width counter is communicatively connected to the output end of the signal acquisition system, the output end of the pulse width counter is communicatively connected to the input end of the port B of the RAM, and the pulse width counter is used to obtain the address signal based on the input signal and send the address signal to the input end of the port B of the RAM; Before the cumulative counting control module acquires the first input signal and the count value and acquires the second input signal from the signal acquisition system, the method further includes: The judgment accumulation module acquires the first input signal, adds one to the count value, and obtains a first port A write signal based on the first input signal, wherein the first port A write signal is the first input signal; The pulse width counter acquires the first input signal, obtains a first counting result based on the first input signal, and obtains a first address signal based on the first counting result; The RAM acquires the first port A write signal and the first address signal, and stores the first port A write signal based on the first address signal; The cumulative counting control module obtains the first B port output signal, obtains the second input signal from the signal acquisition system, and superimposes the first B port output signal and the second input signal to obtain the cumulative output signal, wherein the first B port output signal is the first A port write signal.

8. The low signal-to-noise ratio signal processing method according to claim 7, characterized in that: The judgment accumulation module includes a first adder and a judgment controller, the first adder is connected to the judgment controller, the cumulative counting control module and the divider, the output end of the judgment controller is connected to the input end of the port A of the RAM, and the output end of the port B of the RAM is connected to the judgment controller, the first adder is used to count the number of collections of the input signal and output the count value, the judgment controller is used to superimpose the input signal and the port B output signal to obtain the port A write signal, and control the output of the port A write signal based on the count value; After the judging and accumulating module acquires the first input signal, the method further includes: The first adder obtains the second input signal, and the count value is increased by one; The judgment controller obtains the first B port output signal and the second input signal, superimposes the first B port output signal and the second input signal to obtain a second A port write signal, and sends the second A port write signal to the RAM when the count value is less than the cumulative depth threshold.

9. The low signal-to-noise ratio signal processing method according to claim 7, characterized in that: The cumulative count control module includes a second adder and a judgment selector, the input end of the second adder is communicatively connected to the output end of the port B of the RAM, the input end of the judgment selector is communicatively connected to the output end of the first adder and the output end of the second adder respectively, the output end of the judgment selector is communicatively connected to the input end of the signal processing system, the second adder is used to superimpose the port B output signal and the input signal to obtain the cumulative output signal, and send the cumulative output signal to the judgment selector, and the judgment selector is used to control the output of the cumulative output signal based on the count value; The cumulative counting control module superimposes the first input signal and the second input signal to obtain a cumulative output signal, and when the count value reaches a preset cumulative depth threshold, sends the cumulative output signal to a divider, including: The second adder obtains the first B port output signal and the second input signal, superimposes the first B port output signal and the second input signal to obtain the accumulated output signal, and sends the accumulated output signal to the determination selector; The judgment selector obtains the count value and the accumulated output signal, and sends the accumulated output signal to the divider when the count value reaches the accumulated depth threshold.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable a computer to execute the low signal-to-noise ratio signal processing method according to any one of claims 6 to 9.

Images