SOI radio frequency device low-temperature model modeling method

Abstract

The invention provides an SOI (Silicon On Insulator) radio frequency device low-temperature model modeling method. The method comprises the following steps: modeling direct current characteristics of a radio frequency device at various temperatures; establishing a small-signal equivalent circuit diagram for low-temperature S parameter simulation; according to the small signal equivalent circuit diagram, extracting small signal parameters from the radio frequency actual measurement data at different temperatures; modeling the parameters extracted from different temperatures, establishing a relationship between the parameters and the temperatures, and writing the relationship into an SPICE netlist; and establishing a relation among the Ft, the Fmax and the temperature. According to the method, for the low-temperature condition, the extracted data at different temperatures are adopted for modeling, and the relation between Ft and Fmax and the temperatures is established, so that the method can be suitable for the low-temperature environment.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit design, and in particular to a method for modeling a low-temperature model of an SOI radio frequency device. Background Art

[0002] As the size of devices decreases, they are about to reach their physical limits. However, the heat generation and power consumption of circuits have become increasingly important to the entire circuit. Low temperature has brought about a qualitative leap in the integrated circuit from devices to systems, making high-performance and low-power computing possible. Therefore, research on low-temperature devices is also very important. At low temperatures (usually less than -60°C), semiconductor devices will exhibit unique physical properties, such as warping effects and freeze-out effects, which lead to large differences between the actual measured device characteristic data and the simulation results of the normal temperature model. In addition, for SOI devices, their temperature dependence law has certain particularities and requires further verification.

[0003] At present, the mainstream MOSFET RF device model in the industry is a small signal equivalent circuit analysis model based on the BSIM model, and the corresponding SOIMOSFET device model is BSIMIMG. However, the BSIMIMG model is not suitable for low temperatures, and there is currently no mature modeling method for SOI MOSFET devices at low temperatures. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a modeling method for a SOI radio frequency device for a low temperature environment model.

[0005] In order to solve the above problems, the present invention provides a method for modeling a low-temperature model of an SOI RF device, comprising: modeling the DC characteristics of the RF device at various temperatures; establishing a small signal equivalent circuit diagram for low-temperature S parameter simulation; extracting small signal parameters from RF measured data at different temperatures according to the small signal equivalent circuit diagram; modeling the above parameters extracted at different temperatures, establishing the relationship between these parameters and temperature and writing them into a SPICE netlist; and establishing the relationship between Ft, Fmax and temperature.

[0006] Optionally, a small signal equivalent circuit diagram for low temperature S parameter simulation is established, including a parasitic network from two port pads to ground, a coupling capacitor between gate and drain pads, and parasitic inductance and resistance of port interconnection lines.

[0007] Optionally, small signal parameters are extracted from RF measured data at different temperatures according to the small signal equivalent circuit diagram, and further, S parameters are first converted into Y parameters or Z parameters and then extracted.

[0008] Aiming at low temperature conditions, the present invention adopts the extracted data at different temperatures to build models and establish the relationship between Ft, Fmax and temperature, so that it can be applied to low temperature environments. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Attached Figure 1 Shown is a schematic diagram of the implementation steps of a specific embodiment of the present invention.

[0010] Attached Figure 2 The figure shows a comparison of the DC IV characteristic curve model simulation results and the measurement results of a 22nm FDSOI process NMOS RF device in a specific embodiment of the present invention.

[0011] Attached Figure 3A and Figure 3B The small signal equivalent circuit diagram for low temperature S parameter simulation in a specific embodiment of the present invention is shown as follows:

[0012] Attached Figure 4 The figure shows the comparison between the simulated value and the tested value of the parameters at different temperatures in a specific embodiment of the present invention.

[0013] Attached Figure 5 Shown are measured data at different temperatures and S parameter curves based on small signal equivalent circuit simulation in a specific embodiment of the present invention. DETAILED DESCRIPTION

[0014] The specific implementation of a method for building a low-temperature model of an SOI radio frequency device provided by the present invention is described in detail below with reference to the accompanying drawings.

[0015] Attached Figure 1 The figure shows a schematic diagram of the implementation steps of a specific implementation method of a low-temperature modeling method for an SOI RF device described in the present invention, including: step S11, modeling the DC characteristics of the RF device at various temperatures; step S12, establishing a small signal equivalent circuit diagram for low-temperature S parameter simulation; step S13, extracting small signal parameters from RF measured data at different temperatures according to the small signal equivalent circuit diagram; step S14, modeling the above parameters extracted at different temperatures, establishing the relationship between these parameters and temperature and writing them into the SPICE netlist; step S15, establishing the relationship between Ft, Fmax and temperature.

[0016] Step S11, modeling the DC characteristics of the RF device at various temperatures to establish an intrinsic model. The method can be found in the BSIM-IMG model manual. Figure 2 The comparison chart of the DC IV characteristic curve model simulation results and measurement results of the 22nm FDSOI process NMOS RF device is listed. The results show that the model meets the simulation accuracy requirements.

[0017] Step S12, establishing a small signal equivalent circuit diagram for low temperature S parameter simulation. In this specific embodiment, further establishing the following in ADS (Advanced Design System) simulation software: Figure 3A and Figure 3B The small signal equivalent circuit diagram for low temperature S parameter simulation shown in the figure does not need to be specially modeled for intrinsic parameters (Intrinsic), because the changes of model parameters at low temperature have been covered in the establishment of the intrinsic model in the previous step. The small signal equivalent circuit diagram includes the parasitic network from the port pad to the ground: the primary parameter Cpg of the parasitic capacitance from pad to gate, the secondary parameter Cpg1 of the parasitic capacitance from pad to gate, the parasitic resistance parameter Rpg of pad to gate, the primary parameter Cpd of the parasitic capacitance from pad to drain, the secondary parameter Cpd1 of the parasitic capacitance from pad to drain, the parasitic resistance Rpd of pad to drain, the coupling capacitance Cop between the gate and drain pads; the parasitic inductance and resistance of the port interconnection line, the parasitic inductance Lshg of the gate port interconnection line, the parasitic resistance Rshg of the gate end interconnection line, the parasitic resistance Rshd of the drain end interconnection line, and the parasitic inductance Lshd of the drain end interconnection line. These two parts of the network can be removed by open-short de-embedding. It also includes intrinsic and non-intrinsic parameters: voltage-controlled current source VCCS of analog transistor, internal parasitic capacitance of gate and drain Cgdi, external parasitic capacitance Cgde, parasitic resistance of gate and drain Rgd, internal parasitic capacitance of gate and source Cgsi, external parasitic capacitance Cgse, parasitic resistance of gate and source Rgs, internal parasitic capacitance of source and drain Cdsi, external parasitic capacitance of source and drain Cdse, parasitic resistance of source and drain Rds. External parasitic parameters include: gate resistance Rg, drain resistance Rd, source level parasitic resistance Rs. According to the extracted small signal equivalent parameter values, the capacitance between each port and the interconnection line inductance components are less sensitive to temperature, while the interconnection line resistance decreases at low temperature, but these resistance values ​​are very small (<3Ω), which will not have a significant impact on the test of S parameters at different temperatures.

[0018] Step S13, according to the small signal equivalent circuit diagram, extract the small signal parameters of the RF device transconductance gm, the total gate capacitance Cgg, the total gate and drain parasitic capacitance Cgd, the gate parasitic resistance Rg, and the RF device output admittance gds from the RF measured data at different temperatures. The extraction method is based on the following formula, first converting the S parameter into a Y parameter or a Z parameter, and then extracting it. The extraction result example is shown in Table 1 below, which are the parameter extraction values ​​at 300K and 77K temperatures respectively.

[0019] Gm=abs(Y.21-Y.12)

[0020] Gds = real (Y.22)

[0021] Cgg=imag(Y.11) / (2*Π*freq)

[0022] Cgd=-imag(Y.12) / (2*Π*freq)

[0023] Rg=real(Z.11-Z.21)

[0024] Table 1W f =3μm,NF=32,L g = Small signal parameter values ​​of 32nm FDSOI nMOSFET when biased at maximum transconductance

[0025]

[0026] Step S14, modeling the above parameters extracted at different temperatures, establishing the relationship between these parameters and temperature and writing them into the SPICE netlist:

[0027] .param

[0028] +gm=gma*ln(T)+gmb

[0029] ****gma,gmb are gm fitting parameters respectively

[0030] +gds=gdsa*exp(gdsb*T)

[0031] *****gdsa,gdsb are gds fitting parameters respectively

[0032] +Cgg=cgga*T+cggb

[0033] ****cgga,cggb are Cgg fitting parameters respectively

[0034] +Cgd=cgda*T+cgdb

[0035] ****cgda,cgdb are CGD fitting parameters respectively

[0036] +Rg=rga*ln(T)+rgb

[0037] *****rga,rgb are Rg fitting parameters respectively

[0038] Attached Figure 4 Comparison between the simulation value and the test value of the parameter at different temperatures (the simulation value is the dotted line, the measured value is the dot, the horizontal axis is the temperature, and the vertical axis is the parameter value).

[0039] Step S15, establishing the relationship between Ft, Fmax and temperature.

[0040] Substitute the above parameters into

[0041]

[0042] Where Ft is the cutoff frequency and Fmax is the maximum oscillation frequency.

[0043] get

[0044] FT=(gma*ln(T)+gmb) / (2*π*cgga*T+cggb)

[0045] Fmax=(gma*ln(T)+gmb) / (2*π*cgga*T+cggb / (8*π*(rga*ln(T)+rgb)*(cgda*T+cgdb))

[0046] The final fitting verification results of the complete model are as follows Figure 5 The figure shows the S parameter curves of measured data and small signal equivalent circuit simulation at different temperatures. The dots are measured data and the solid lines are model simulation results. The errors are less than 10%, which meets the industry standards.

[0047] This process can be implemented using commercial software such as Agilent's ADS and IC-CAP, and the simulator can be HSPICE.

[0048] The above is only a preferred embodiment of the present invention. It should be pointed out that ordinary technicians in this technical field can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A method for modeling a low-temperature model of an SOI radio frequency device, characterized in that: include: Model the DC characteristics of RF devices at various temperatures; Establish a small signal equivalent circuit diagram for low temperature S parameter simulation; According to the small signal equivalent circuit diagram, small signal parameters are extracted from the RF measured data at different temperatures; the above parameters extracted at different temperatures are modeled, the relationship between these parameters and temperature is established and written into the SPICE netlist; Establish the relationship between the cut-off frequency Ft, the maximum oscillation frequency Fmax and the temperature.

2. The method according to claim 1, characterized in that A small signal equivalent circuit diagram is established for low temperature S parameter simulation, including the parasitic network from the two port pads to the ground, the coupling capacitance between the gate and drain pads, and the parasitic inductance and resistance of the port interconnection line.

3. The method according to claim 1, characterized in that According to the small signal equivalent circuit diagram, small signal parameters are extracted from the RF measured data at different temperatures. The S parameters are first converted into Y parameters or Z parameters and then extracted.

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