Flight control and navigation integrated microsystem and design method

Abstract

A flight control and navigation integrated microsystem disclosed by the present invention comprises an HDI plate, and an information processing silicon-based micromodule and a plurality of components which are welded on the HDI plate, the information processing silicon-based micromodule comprises a silicon substrate and a plurality of chips embedded in a groove of the silicon substrate, the chips are mutually independent, the silicon substrate adopts an inverted lamination design, and the components are welded on the HDI plate. The processor is welded on the silicon substrate in an inverted manner, the flight control and navigation integrated microsystem is realized by adopting a multi-nesting mode of plane integration, three-dimensional integration, an information processing silicon-based micromodule and a flight control and navigation integrated microsystem module, and a design method of wafer packaging conversion is adopted for the processor. The embedded design is adopted for various discrete chips with external expansion functions, the inverted lamination is adopted for design of a silicon substrate, the FC + embedded + RDL combined design is adopted for interconnection between a processor and the external expansion chips, the low-cost application requirement of a subsequent micro module is considered, the micro module interval design can meet the requirement of being directly applied to a PCB in the subsequent process, and the coverage is wider. Meanwhile, the bottom layer substrate of the flight control and navigation integrated micro-system module adopts a high-density HDI plate, the bottom layer substrate design of a traditional silicon-based micro-module based on a ceramic substrate or an IC carrier plate which is high in price and long in processing period is broken, and low-cost design is achieved.

Description

Technical Field

[0001] The present invention belongs to the field of microelectronics, and in particular relates to a flight control and navigation integrated microsystem and a design method. Background Art

[0002] Low-value and consumable weapons such as micro-UAVs for low-altitude cluster combat have the requirements of "high cost-effectiveness, low power consumption, lightweight and miniaturization". Most of the current three-dimensional plastic-encapsulated microsystem modules are realized by three-dimensional stacking of plastic-encapsulated wafer devices based on three-dimensional integrated PoP process and Wire Bond (WB for short) based on IC carrier or ceramic substrate.

[0003] Due to the large size of the plastic packaged device itself or the large area occupied by the WB chip wire fan-out, the developed microsystem module has a large size. This type of microsystem module is not suitable for environments with strict requirements on size, such as 3.5Kg micro-UAVs. At the same time, due to the diversity and discreteness of the signal type requirements on micro-UAVs, such as the need to take into account TTL level, RS232 level, RS422 level, etc., the demand for low cost, lightweight, and miniaturization of micro-UAVs is also becoming increasingly strong. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a flight control and navigation integrated microsystem and a design method in view of the deficiencies in the above-mentioned prior art, so as to solve the technical problems that the existing flight control and navigation integrated microsystem modules have relatively large size and high cost.

[0005] The present invention adopts the following technical solutions: A flight control and navigation integrated microsystem, comprising an HDI board, on which an information processing silicon-based micromodule is welded in a T-shaped clamping manner, and a plurality of components are arranged on one side of the information processing silicon-based micromodule, and the plurality of components are welded on the HDI board; The information processing silicon-based micromodule comprises a silicon substrate, a processor is flip-chip soldered on the silicon substrate, a groove is opened on the silicon substrate, a plurality of chips are embedded in the groove, and each chip is independent of each other; The silicon substrate adopts an inverted stacking design and is provided with TSV holes.

[0006] Furthermore, the multiple components include a geomagnetic sensor, an air pressure sensor, a MEMS-IMU, a ferroelectric memory and a power supply.

[0007] Furthermore, the process of flip-chip soldering the processor on the silicon substrate is as follows: the processor package design adopts the buckle point method, and the processor is reconstructed at the wafer level, and converted from the WB form to the FC form.

[0008] Furthermore, dry film is used to perform gap filling and surface planarization between different types of chips among the plurality of chips and the grooves.

[0009] Furthermore, the multiple chips include 8 RS422 chips, 1 RS232 chip and 1 reset chip.

[0010] Furthermore, the eight RS422 chips are arranged near the upper and lower ends of the silicon substrate and are designed to be centrally symmetrically arranged, and one RS232 chip and one reset chip are arranged in the middle of the silicon substrate.

[0011] Furthermore, the silicon substrate and the processor in the information processing silicon-based micromodule are surrounded by plastic packaging material.

[0012] Furthermore, a Kovar metal plate is bonded onto the information processing silicon-based micromodule and the plurality of components.

[0013] In a second aspect, a design method for a flight control and navigation integrated microsystem is provided, comprising the following steps: A plurality of chips are embedded in grooves formed on a silicon substrate; Flip-chip soldering the processor onto the assembled silicon substrate; The processor and the assembled silicon substrate are surrounded by plastic packaging materials to form an information processing silicon-based micromodule; The BGA pads of the information processing silicon-based micromodules are soldered on the HDI board by opening small windows inward; Solder the remaining components on the HDI board.

[0014] Furthermore, after the information processing silicon-based micromodule and other components are welded, a Kovar metal plate is bonded above the information processing silicon-based micromodule and other components, and the Kovar metal plate is bonded to the HDI board.

[0015] Compared with the prior art, the present invention has at least the following beneficial effects: The present invention provides a flight control and navigation integrated microsystem, including an HDI board and an information processing silicon-based micromodule welded on the HDI board and a plurality of components, wherein the information processing silicon-based micromodule includes a silicon substrate and a plurality of chips embedded in a groove of the silicon substrate, each chip is independent of each other, the silicon substrate adopts an inverted stacking design, the processor is flip-chip welded on the silicon substrate, the flight control and navigation integrated microsystem is implemented by a multiple nesting method of "planar integration-stereoscopic integration-information processing silicon-based micromodule-flight control and navigation integrated microsystem module", the processor adopts a wafer packaging conversion design method, various discrete chips with external expansion functions are embedded, the silicon substrate design is implemented by inverted stacking, the interconnection between the processor and the external expansion chip adopts a FC+embedded+RDL combined design, considering the low-cost application requirements of subsequent micromodules, the micromodule spacing design can meet the subsequent direct application requirements of PCB boards, and the coverage is wider. At the same time, the bottom substrate of the flight control and navigation integrated microsystem module adopts a high-density HDI board, breaking the bottom substrate design of the traditional silicon-based micromodule based on expensive ceramic substrates or IC carriers with long processing cycles, and realizing low-cost design.

[0016] By using the pad array reconstruction method, the processor is reconstructed at the wafer level, converted from WB form to FC (FlipChip) form, reducing the fan-out area and facilitating miniaturization.

[0017] The silicon substrate adopts an inverted stacking design, which can ensure the silicon substrate yield and avoid waste in the production process, while ensuring the signal electrical quality and improving the compatibility and reliability of the buried reconstruction process.

[0018] Furthermore, the grooves for embedding the chips are arranged inside the silicon substrate with large pits in the middle and small pits on both sides, thereby improving the reliability of the bottom filling of the FC device.

[0019] The present invention also provides a design method for a flight control and navigation integrated microsystem, which comprises the following steps: firstly, a plurality of chips are embedded in grooves formed on a silicon substrate, and then a processor is flip-chip welded on the assembled silicon substrate, and a plastic sealing material is filled around the processor and the assembled silicon substrate to form an information processing silicon-based micromodule, and finally the information processing silicon-based micromodule and other components are welded on an HDI board. Compared with a processor single-core plastic-sealed device (also 18mm x 18mm), the size of the flight control and navigation integrated microsystem module using wafer embedding and reconstruction design is the same as the size of a single-chip processor after WB wire bonding and plastic sealing, but the functional integration and coverage are greatly improved, thereby realizing the functional integration of navigation, storage and information processing in an extreme space.

[0020] In order to ensure the firmness of welding, the BGA pad of the information processing silicon-based micromodule on the HDI board adopts the method of opening a small window inward.

[0021] Furthermore, the thickness of the HDI board is at least 1.5 mm, which can ensure the reliability of welding between the silicon-based module and the HDI board.

[0022] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 This is a design block diagram of a flight control and navigation integrated microsystem module according to an embodiment of the present invention; Figure 2 This is the wire bond diagram of the processor bare core; Figure 3 Convert FC883 layout for processor package; Figure 4 Design block diagrams for information processing silicon-based micromodule layouts; Figure 5 Design a block diagram for the information processing silicon-based micromodule structure; Figure 6 Design diagram for stacking silicon-based micromodules for information processing; Figure 7 Design of silicon-based micromodule layout for information processing; Figure 8 This is a schematic diagram of a T-shaped card slot. DETAILED DESCRIPTION

[0024] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0025] In the description of the present invention, it should be understood that the terms “include” and “comprises” indicate the presence of described features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or collections thereof.

[0026] It should be understood that, although the terms first, second, third, etc. may be used to describe preset ranges, etc. in the embodiments of the present invention, these preset ranges should not be limited to these terms. These terms are only used to distinguish preset ranges from each other. For example, without departing from the scope of the embodiments of the present invention, the first preset range may also be referred to as the second preset range, and similarly, the second preset range may also be referred to as the first preset range.

[0027] Various structural schematic diagrams of the embodiments disclosed in the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0028] In order to make the purpose, technical scheme and advantages of the embodiments of the present invention clearer, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. The components of the embodiments of the present invention described and shown in the drawings here can usually be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0029] The invention provides a flight control and navigation integrated microsystem. The flight control and navigation integrated microsystem comprises an HDI board, an information processing silicon-based micromodule and a plurality of components. The information processing silicon-based micromodule and the plurality of components are welded on the HDI board, wherein the information processing silicon-based micromodule is welded on the HDI board by a T-shaped clamping method, the information processing silicon-based micromodule comprises a silicon substrate and a plurality of chips buried in a groove of the silicon substrate, the chips are independent of each other, the silicon substrate adopts an inverted stacking design, and a processor is flip-chip welded on the silicon substrate.

[0030] Specifically, Figure 1 As shown, the flight control and navigation integrated microsystem is implemented by a multiple nesting method of "planar integration-three-dimensional integration-information processing silicon-based micromodule-flight control and navigation integrated microsystem module".

[0031] After the processor single-core wafer is packaged and converted, an information processing silicon-based micro-module is formed with the external functional chip through a TSV silicon substrate, and then assembled with the MEMS-IMU, air pressure sensor, geomagnetic sensor, ferroelectric memory, power supply, and crystal oscillator through a high-density HDI board assembly design.

[0032] The silicon substrate and processor in the information processing silicon-based micromodule are filled with plastic packaging material; multiple components include geomagnetic sensors, air pressure sensors, MEMS-IMU, ferroelectric memory and power supplies; multiple chips include 8 RS422 chips, 1 RS232 chip and 1 reset chip, and dry film is used to fill the gaps and flatten the surface between different types of chips and grooves.

[0033] like Figure 2 As shown in the figure, the bare die pad of the processor chip is in the form of a double-circle wire bond (WB) arrangement. If such a pad arrangement is electrically interconnected by bonding wires, the fan-out area will increase, resulting in an increase in the circuit area, which is not conducive to miniaturization. Therefore, the processor is reconstructed at the wafer level by reconstructing the pad array, from the WB form to the FC (Flip Chip) form. Since the bare chip size of the processor is 9.496×9.656mm, the welding reliability of the chip after FC is considered in the wafer reconstruction design. When implementing FC packaging, the PI opening is 20-40um, the UBM window is 70-90um, and the center spacing is 300um. At the same time, in order to avoid the metal pad of the embedded chip and avoid short circuit between the processor and the embedded chip, the package design adopts the buckle method, that is, when the processor FC package is packaged, C13, D23, P17-P21, R10-R13, R17, T12, T17, U11-U12, U17 are buckled to form the reconstructed pad array of FC883. The array is arranged as follows: Figure 3 shown.

[0034] In order to improve the flexibility and expansibility of users switching between RS422 signals, RS232 signals and TTL signals, the present invention designs embedded RS422 chips x8 and RS232 chip x1, and half of the 8-way UART signals of the processor are connected to the RS422 chip embedded in the silicon substrate, and the other half are directly connected to the final Ball-MAP implementation mode, that is, 4-way UART signals of the processor are directly interconnected with the RS422 x 4 chips embedded in the silicon substrate in the metal layer of the silicon substrate, and the other 4 directly connected UART signals of the processor are led out to UBM256 through TSV holes and PI holes, and the TTL level ends and differential ends of the other 4 RS422 chips embedded in the silicon substrate and the RS232 chip x 1 are led out to UBM256 through TSV holes and PI holes, so as to facilitate the flexibility of users' self-configuration switching selection of RS422, RS232 and TTL levels.

[0035] In order to reduce the layout area of ​​the micromodule, the reset chip x1 required by the processor of the present invention is also buried in a body up manner by digging a pit on the silicon substrate; the embedded chips of the silicon substrate used in the micromodule are designed to be 10 pieces of 3 types, and dry film is used to fill the gaps between the different types of embedded chips and the grooves and to flatten the surface.

[0036] Considering the feasibility of electrical interconnection when rewiring the package UBM and the embedded chip after the processor is reconstructed, and considering the reliability of the bottom filling of the FC device, the groove of the embedded chip is arranged in the silicon substrate with a large pit in the middle and small pits on both sides, that is, 8 RS422 chips with smaller chip size are arranged close to the upper and lower ends of the substrate, and the eight grooves are symmetrical up and down and left and right. The larger reset chip x1 and RS232 chip x1 are arranged in the middle of the silicon substrate; in order to improve the convenience of buried patch operation, the 8 RS422 chips are designed to be arranged symmetrically in the center, and TSV holes are prohibited from penetrating within 200um on the four sides of the pit to ensure the reliability of the pit patch. The embedded chip layout of the information processing silicon-based micromodule is implemented as follows: Figure 4 shown.

[0037] In order to realize the miniaturization of the entire module, a design combining a larger processor FC chip flip-chip and a smaller chip embedded in a silicon substrate is adopted. The present invention chooses this design method because the bare core size of the processor is 9.496mm×9.656mm, the RS422 bare chip size is 1.15mm×0.588mm, the RS232 bare chip size is 0.965mm×0.930mm, and the reset chip bare core size is 1.795mm×1.432mm. The larger the chip size, the greater the warping after thinning. According to the bare core size of the main controller, after thinning to 100um, the warping is greater than 64um, and it is impossible to bury and reconstruct. Therefore, the micro-module chooses to bury and reconstruct the small chip during electrical design, that is, the RS422 chip, RS232 chip and reset chip are thinned to 100um at the wafer level and then buried inside the silicon substrate. After the relatively large FC processor chip is electroplated and implanted in a hemisphere, it is welded to the silicon substrate through a flip-chip welder and high-temperature solder to form an information processing silicon-based micromodule; the above design not only realizes the functional integration of multiple discrete small chips, improves the application coverage and flexibility of the entire module, but also ensures the reliability and convenience of process implementation. The combined design of small chip embedding + large chip packaging converted to FC packaging is adopted. The size of the entire information processing silicon-based micromodule is only 11mm x 11mm, which is greatly reduced compared to the size of a single-chip processor after bonding and plastic sealing (18mm x18mm). The structural design of the entire information processing silicon-based micromodule is as follows: Figure 5 shown.

[0038] Since the silicon substrate needs to be buried and reconstructed, the process production difficulty of the silicon substrate is greatly increased. In order to ensure the yield of the silicon substrate and avoid waste in the production process, while ensuring the electrical quality of the signal, the stacking structure design of the information processing silicon-based micromodule is particularly important. The silicon substrate of the present invention adopts an inverted stacking design. Figure 6As shown, the core board Si uses 1 layer of Pi + 1 layer of metal, and the core board Si uses 2 layers of Pi + 2 layers of metal structure, that is, the FM1 + BM2 upper 1 lower 2 structure is implemented. The FM1 layer is designed as a buried layer for 10 chips to realize the interconnection of power signals between the chips of the information processing silicon-based micromodule, the electrical interconnection between the buried chip and the FC chip, and the TSV redundant holes for external signal lead-out. The BM1 layer is the reference ground plane, and the BM2 layer is the Ball Map256 lead-out terminal of the information processing silicon-based micromodule. The line width / line spacing of the buried surface is 20um / 20um. This implementation method improves the compatibility and reliability of the buried reconstruction process. The solder ball material of the entire information processing silicon-based micromodule is SnAgCu alloy, with a ball diameter of 300um and a center spacing of 650um.

[0039] The present invention breaks through the traditional baseline of welding silicon-based micromodules on HTCC ceramic substrates or IC carriers in terms of substrate selection, and instead selects a high-density HDI board as the underlying substrate of the navigation and flight control integrated microsystem module. This implementation will not only greatly shorten the production cycle, but also the cost is at least 2 orders of magnitude lower than that of ceramic substrates or IC carriers, truly realizing low-cost design. It should be noted that the thickness of the HDI board must be at least 1.5 mm, which can ensure the reliability of welding between the silicon-based module and the HDI board. If the thickness of the HDI substrate is too thin (such as the conventional 0.4 mm or 1 mm), the silicon-based micromodule welding will crack due to the difference in thermal expansion coefficients, resulting in an open circuit and failure of the micromodule.

[0040] At the same time, in order to realize the multi-information fusion required by micro-UAVs and the user's requirements for the simplification of power supply types, that is, only a single VDD3V3 power supply is provided, the electrical architecture of the flight control and navigation integrated microsystem module includes information processing silicon-based micromodules, MEMS-IMU, barometric altimeter, geomagnetic sensor, ferroelectric memory, power conversion chip, crystal oscillator and resistor-capacitor inductor. The size of the entire microsystem module is only 18mm x18mm. The structural design of the microsystem module is as follows: Figure 7 shown.

[0041] Considering the processing yield rate of the entire microsystem module, the rapid iteration of the production cycle and the low-cost design requirements, the HDI board wiring adopts a design method that combines through holes and first-order blind and buried holes. Considering the electrical quality such as high-speed signal and power integrity, the number of wiring layers is 10. VIA15D8 is selected for through holes in layers 1-10, VIA12D4 is selected for blind holes in layers 1-2 and 9-10, and VIA14D6 is selected for buried holes in layers 2-9. Considering the process maturity of blind and buried holes, the spatial positions of blind holes 1-2 and buried holes 2-9 are overlapped as much as possible during design, and they do not overlap with blind holes 9-10.

[0042] The information processing silicon-based micromodule on the HDI board is only 11mm x 11mm in size, which is relatively small. Since it is a BGA package, the welding reliability problem on the HDI board needs to be solved. Before welding, only flux is applied to the BGA pad of the micromodule on the HDI board without applying solder paste. The information processing silicon-based micromodule is aligned with the BGA pad on the HDI board by using a diagonal T-shaped positioning method, and the right-angle side of the T-shaped must coincide with the right-angle side of the silk-screen border of the information processing silicon-based micromodule, such as Figure 8 As shown, a high melting point soft ball is planted on the bottom of the information processing silicon-based micromodule. To ensure the firmness of welding, the BGA pad of the information processing silicon-based micromodule on the HDI board adopts a method of opening a small window inward, and the high temperature soft ball at the bottom of the information processing silicon-based micromodule itself is used as solder. The information processing silicon-based micromodule is welded to the 1.5mm thick HDI board through a reflow soldering machine.

[0043] The present invention also provides a design method for a flight control and navigation integrated microsystem, comprising the following steps: A plurality of chips are embedded in grooves formed on a silicon substrate; Flip-chip soldering the processor onto the assembled silicon substrate; The processor and the assembled silicon substrate are surrounded by plastic packaging materials to form an information processing silicon-based micromodule; The BGA pads of the information processing silicon-based micromodules are soldered on the HDI board by opening small windows inward; Solder the remaining components on the HDI board.

[0044] In the above steps, dry film is used to fill the gaps and flatten the surface between different types of embedded chips and grooves. Considering the feasibility of electrical interconnection between the package UBM and the embedded chip after the processor is reconstructed, and considering the reliability of the bottom filling of the FC device, the groove of the embedded chip is arranged in the silicon substrate with a large pit in the middle and small pits on both sides.

[0045] The processor is reconstructed at the wafer level by using the pad array reconstruction method, converting from WB form to FC (FlipChip) form.

[0046] A high-melting-point soft ball is planted at the bottom of the information processing silicon-based micromodule. To ensure the firmness of welding, the BGA pad of the information processing silicon-based micromodule on the HDI board is implemented by opening a small window inward. The high-temperature soft ball at the bottom of the information processing silicon-based micromodule itself is used as solder, and the information processing silicon-based micromodule is welded to the 1.5mm thick HDI board through a reflow soldering machine.

[0047] In addition to the information processing silicon-based micromodule on the HDI board, the MEMS-IMU, barometric altimeter, geomagnetic sensor, ferroelectric memory, power conversion chip, crystal oscillator and resistor-capacitor inductor are soldered with high-temperature solder during welding to avoid remelting during ball planting of the microsystem module, which may cause a short circuit. After the front of the HDI board is soldered, a low-temperature soft ball with a ball diameter of 500um is planted on the back of the HDI board, and the external package is a 22-row x 22-column ball grid array. After the ball planting and welding of the HDI board is completed, no potting glue is used for potting. The information processing silicon-based micromodule and ferroelectric memory soldered on the HDI board and the 1mm inward range of the four sides of the HDI board are selected as the focus of the glue application to bond the Kovar cover. It should be noted that since there is a barometric altimeter inside the microsystem module, a pore must be left in the Kovar cover. The pore position must be located directly above the pore of the barometric altimeter itself, and the pore size is φ0.5mm to ensure the normal operation of the barometer. At this point, the flight control and navigation integrated microsystem module is completed.

[0048] Compared with the single-core plastic-encapsulated processor device (also 18mm x18mm), the flight control and navigation integrated microsystem module with wafer embedded reconstruction design has the same size as the single-chip processor after WB wire bonding and plastic encapsulation, but it greatly improves the functional integration and coverage, realizing the functional integration of navigation, storage and information processing in an extreme space.

[0049] The above contents are only for explaining the technical idea of ​​the present invention and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the present invention shall fall within the protection scope of the claims of the present invention.

Claims

1. A flight control and navigation integrated microsystem, characterized in that: It comprises an HDI board, on which an information processing silicon-based micromodule is welded in a T-shaped clamping manner, and a plurality of components are arranged on one side of the information processing silicon-based micromodule, and the plurality of components are welded on the HDI board; The information processing silicon-based micromodule comprises a silicon substrate, a processor is flip-chip soldered on the silicon substrate, a groove is opened on the silicon substrate, a plurality of chips are embedded in the groove, and each chip is independent of each other; The silicon substrate adopts an inverted stacking design and is provided with TSV holes.

2. The flight control and navigation integrated microsystem according to claim 1, characterized in that: The multiple components include a geomagnetic sensor, an air pressure sensor, a MEMS-IMU, a ferroelectric memory and a power supply.

3. The flight control and navigation integrated microsystem according to claim 1, characterized in that: The process of flip-chip soldering the processor on the silicon substrate is as follows: the processor package design adopts the buckle method, and the processor is reconstructed at the wafer level, converting from WB form to FC form.

4. The flight control and navigation integrated microsystem according to claim 1, characterized in that: Dry film is used to perform gap filling and surface planarization between different types of chips in the plurality of chips and the grooves.

5. A flight control and navigation integrated microsystem according to claim 1 or 4, characterized in that: The multiple chips include 8 RS422 chips, 1 RS232 chip and 1 reset chip.

6. The flight control and navigation integrated microsystem according to claim 5, characterized in that: The eight RS422 chips are arranged near the upper and lower ends of the silicon substrate and are designed to be centrally symmetrically arranged. One RS232 chip and one reset chip are arranged in the middle of the silicon substrate.

7. The flight control and navigation integrated microsystem according to claim 1, characterized in that: The silicon substrate and the processor in the information processing silicon-based micromodule are surrounded by plastic packaging material.

8. The flight control and navigation integrated microsystem according to claim 7, characterized in that: A Kovar metal plate is bonded above the information processing silicon-based micromodule and multiple components.

9. A design method for a flight control and navigation integrated microsystem as claimed in claim 1, characterized in that: The following steps are involved: A plurality of chips are embedded in grooves formed on a silicon substrate; Flip-chip soldering the processor onto the assembled silicon substrate; The processor and the assembled silicon substrate are surrounded by plastic packaging materials to form an information processing silicon-based micromodule; The BGA pads of the information processing silicon-based micromodules are soldered on the HDI board by opening small windows inward; Solder the remaining components on the HDI board.

10. The design method of a flight control and navigation integrated microsystem according to claim 9, characterized in that: After the information processing silicon-based micromodule and other components are welded, a Kovar metal plate is bonded above the information processing silicon-based micromodule and other components, and the Kovar metal plate is bonded to the HDI board.

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