PCBA automatic testing system and method

Abstract

The present invention relates to the field of PCBA automated testing technology, and in particular to a PCBA automated testing system and method. The method comprises the following steps: calculating line width average difference based on PCBA circuit design data to obtain line routing width average difference; constructing a PCBA circuit three-dimensional model based on the line routing width average difference to obtain the PCBA circuit three-dimensional model; estimating overload damage probability based on the PCBA circuit theoretical power consumption operating range to obtain power transmission overload damage probability data; performing cascade impact analysis based on the power transmission overload damage probability data, and dividing the circuit limit load level to obtain the circuit limit load level; dynamically adapting test cases based on the circuit limit load level to obtain damage edge condition test adaptation cases. The present invention further improves PCBA automated testing technology by optimizing the processing of PCBA automated testing technology.

Description

Technical Field

[0001] The present invention relates to the technical field of PCBA automated testing, and in particular to a PCBA automated testing system and method. Background Art

[0002] Automated testing methods typically integrate multiple technologies, such as visual recognition-based AOI (automated optical inspection), X-ray inspection, ICT (in-circuit testing), and functional testing, encompassing the entire process from solder quality inspection to electrical performance verification. The core of this approach lies in leveraging computer control and high-precision sensors to achieve real-time data acquisition and analysis, enabling rapid and comprehensive evaluation of PCBA functionality and reliability. Automated PCBA testing methods have broad application prospects in modern electronics manufacturing, particularly in the consumer electronics, automotive electronics, and medical device sectors, where their importance is growing. In automotive electronics, automated testing methods can effectively evaluate the performance of electronic control units (ECUs), ensuring reliable operation under harsh operating conditions. In the medical field, functional testing of circuit boards using precision instruments is crucial to device safety and effectiveness. However, traditional automated PCBA testing methods suffer from unclear overload damage analysis and low test accuracy. Summary of the Invention

[0003] Based on this, it is necessary to provide a PCBA automated testing method to solve at least one of the above technical problems.

[0004] To achieve the above object, a PCBA automated testing method is provided, the method comprising the following steps:

[0005] Step S1: Obtain PCBA circuit design data and the theoretical power consumption operating range of the PCBA circuit; calculate the average difference in line width based on the PCBA circuit design data to obtain the average difference in line width; construct a three-dimensional model of the PCBA circuit based on the average difference in line width to obtain the three-dimensional model of the PCBA circuit;

[0006] Step S2: Collecting power transmission fluctuation test data of the PCBA circuit three-dimensional model according to the theoretical power consumption operating range of the PCBA circuit to obtain power transmission fluctuation test data; identifying abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data; estimating the overload damage probability of the abnormal power transmission fluctuation data to obtain power transmission overload damage probability data;

[0007] Step S3: performing cascade impact analysis based on the power transmission overload damage probability data to obtain overload damage cascade impact data; performing circuit limit load level classification based on the overload damage cascade impact data to obtain the circuit limit load level;

[0008] Step S4: Dynamically adapt the test case according to the circuit limit load level to obtain the damage edge condition test adaptation case; design the automated test firmware based on the damage edge condition test adaptation case to obtain the damage automated test firmware, and send the damage automated test firmware to the terminal to perform PCBA automated testing.

[0009] By acquiring PCBA circuit design data and calculating the mean difference in line widths, the present invention accurately understands line width variations, which is crucial for ensuring the proper operation of the circuit board. Based on this data, a three-dimensional model of the PCBA circuit is constructed, enabling designers to comprehensively analyze and optimize the circuit in a virtual environment. This not only helps ensure the rationality of the circuit board layout but also effectively predicts electrical characteristics such as current paths and transmission impedance, laying the foundation for subsequent testing and optimization. In step S2, a power transmission fluctuation test is performed on the circuit based on the theoretical power consumption operating range of the PCBA circuit. Test data is collected to understand the stability of power transmission. Anomalies in the collected fluctuation data are identified, accurately identifying potential problems caused by power fluctuations. Furthermore, based on this abnormal fluctuation data, the probability of overload damage to the power transmission system is estimated, providing valuable predictions for the long-term stability of the circuit and helping identify areas requiring improvement. Cascade impact analysis, based on the power transmission overload damage probability data, comprehensively assesses the impact of overload damage on the entire circuit system and reveals the damage propagation path. This analysis helps identify the most vulnerable components of the circuit and the chain reactions caused by damage, further providing a basis for assessing the circuit's ultimate load-carrying capacity. Finally, by processing these data, the ultimate load level of the circuit is obtained to ensure that the design meets the actual operating conditions and load requirements. According to the ultimate load level of the circuit, in step S4, dynamic adaptation of the test case is performed to ensure that the test covers all damage edge conditions. These adapted test cases will be used to design automated test firmware to verify the stability and reliability of the circuit by simulating various damage scenarios under actual operating conditions. The automated test firmware can perform all test tasks efficiently and accurately, and perform automated testing by sending it to the terminal device, thereby greatly improving the efficiency and accuracy of the test, and providing important guarantees for the quality control of circuit products. Therefore, the present invention is an optimization process made to a traditional PCBA automated testing method, which solves the problems of unclear overload damage analysis and low test accuracy in a traditional PCBA automated testing method, improves the clarity of overload damage analysis, and improves test accuracy.

[0010] Preferably, step S1 includes the following steps:

[0011] Step S11: Obtain PCBA circuit design data and PCBA circuit theoretical power consumption operating range;

[0012] Step S12: marking the circuit routing of the PCBA circuit design data to obtain circuit routing marking data;

[0013] Step S13: Calculating the average width difference of the circuit trace mark data according to the PCBA circuit design data to obtain the average width difference of the circuit trace;

[0014] Step S14: constructing a three-dimensional model of the PCBA circuit according to the average difference in line width and the PCBA circuit design data to obtain a three-dimensional model of the PCBA circuit.

[0015] The present invention first obtains PCBA circuit design data and the theoretical power consumption operating range of the circuit, providing essential foundational information for subsequent analysis and optimization. Circuit design data includes circuit layout, component types, and connection methods, while the theoretical power consumption operating range helps determine the circuit's power requirements and load capacity under normal operating conditions. This step ensures that all subsequent analysis and optimization are based on accurate circuit data and the expected power consumption range, thereby avoiding design issues caused by inaccurate basic data. The acquired PCBA circuit design data is then traced. The traced data provides detailed information for subsequent trace analysis and calculations. This trace marking clearly identifies the location, width, and relationship of each trace to other traces. This step not only facilitates circuit design optimization but also effectively improves the accuracy and feasibility of circuit board routing, preventing irrational or non-designed traces during later production and testing. Based on the trace marking data, the mean trace width difference is calculated. This process accurately analyzes the width differences of each trace and calculates the mean trace width difference for the entire circuit, ensuring that each trace meets electrical performance requirements. Calculating the average width difference of the lines helps to identify potential problems in the circuit design. For example, too thin lines can cause current overload, while too wide lines waste space and materials. This step plays an important role in improving the stability of the circuit board, reducing electrical interference, and optimizing energy efficiency. Based on the obtained line width difference and PCBA circuit design data, a three-dimensional model of the circuit is constructed. By combining the line width difference with other design parameters, a three-dimensional model of the PCBA circuit is generated to provide support for subsequent electrical performance analysis, thermal analysis, and mechanical analysis. The beneficial effect of this step is that through the visual three-dimensional model, the circuit layout, routing, and component distribution can be more intuitively evaluated, while simulating factors such as current flow and heat distribution, thereby providing a convenient tool for circuit design optimization and problem troubleshooting, and improving the accuracy and feasibility of the overall design.

[0016] Preferably, step S2 includes the following steps:

[0017] Step S21: Building a virtual simulation environment for the PCBA circuit three-dimensional model to obtain a circuit virtual simulation environment;

[0018] Step S22: collecting power transmission fluctuation test data in the circuit virtual simulation environment according to the theoretical power consumption operation range of the PCBA circuit to obtain power transmission fluctuation test data;

[0019] Step S23: using a preset power fluctuation abnormality identification model to identify abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data;

[0020] Step S24: Estimating the overload damage probability of the power transmission abnormal fluctuation data to obtain power transmission overload damage probability data.

[0021] The present invention creates a virtual simulation environment for a three-dimensional model of a PCBA circuit, providing a dynamic simulation platform for circuit performance testing and verification. This virtual simulation environment can simulate the circuit's behavior under different operating conditions, such as current flow, heat distribution, and signal transmission. By creating a precise virtual environment, designers can quickly assess potential circuit design issues without actually building the circuit, reducing the cost and time of hardware testing and providing a reliable foundation for subsequent testing and optimization. Based on the theoretical power consumption operating range of the PCBA circuit, the circuit in the virtual simulation environment is tested for power supply fluctuations, and relevant data is collected. By simulating the circuit's operating conditions within different power consumption ranges, the impact of power supply fluctuations on circuit stability can be identified. The key to this step is understanding the negative effects of power supply fluctuations on the circuit through accurate test data, providing an important basis for subsequent anomaly identification and optimization. The virtual simulation environment allows the risks associated with power supply fluctuations to be predicted and mitigated in a safe virtual environment. By applying a pre-set power fluctuation anomaly identification model, the collected power supply fluctuation test data is analyzed to identify abnormal fluctuations. Based on historical data, fluctuation amplitude, frequency, and other parameters, this model can quickly and accurately identify abnormal fluctuations and pinpoint fluctuation patterns that could lead to power overloads or equipment damage. The core value of this process lies in proactively identifying potential power fluctuations, preventing damage caused by unstable power supply during actual circuit operation, thereby improving the reliability and safety of circuit systems. The overload damage probability is estimated for identified abnormal power transmission fluctuation data. This step analyzes the anomalies in the fluctuation data and, combined with circuit design parameters, load conditions, and power transmission characteristics, estimates the probability of the power transmission system experiencing overload damage. This process helps designers understand the risk of power system damage under specific fluctuation conditions and provides data support for subsequent design optimization. By predicting damage probability in advance, appropriate measures can be taken during the circuit design phase to optimize the stability of the power transmission system, reduce the likelihood of overloads, and ensure long-term stable operation in actual applications.

[0022] Preferably, step S24 includes the following steps:

[0023] Step S241: performing amplitude offset segmentation processing on the abnormal power transmission fluctuation data to obtain abnormal amplitude offset segmented data;

[0024] Step S242: performing segmented amplitude integration based on the abnormal amplitude offset segmented data to obtain segmented amplitude offset integral data;

[0025] Step S243: performing amplitude concentration distribution analysis on the abnormal amplitude offset segmented data according to the amplitude offset segmented integral data to obtain the amplitude concentration distribution degree;

[0026] Step S244: performing geometric analysis of abnormal heat accumulation in segments according to the amplitude concentration distribution and the amplitude offset segment integral data to obtain geometric analysis of abnormal heat accumulation in segments;

[0027] Step S245: Estimating the overload damage probability based on the segmented abnormal heat accumulation geometric data to obtain power transmission overload damage probability data.

[0028] The present invention performs segmented amplitude offset processing on abnormal power transmission fluctuation data. This process divides power fluctuation data into multiple stages based on the amplitude variation range, ensuring relatively consistent fluctuation amplitudes within each stage, facilitating subsequent analysis. Segmented processing helps more accurately capture the fluctuation characteristics of different amplitude ranges, reduces data noise interference, and provides a clearer data foundation for subsequent anomaly identification and risk assessment. This processing step effectively improves data processing accuracy and analysis operability, avoiding potential problems masked by a single data fluctuation range. Based on the segmented amplitude offset processing, a segmented amplitude integral calculation is performed on the data of each segment. This integral operation can obtain the total energy accumulation of power fluctuations within each segment, revealing the intensity of power fluctuations within each stage and their long-term impact on the system. This operation helps quantify the cumulative effect of power fluctuations, allowing designers to clearly identify risky stages with larger fluctuations or longer durations. This step is crucial for further predicting abnormal conditions in the power transmission system and provides a quantitative basis for subsequent damage probability estimation and optimization. Amplitude concentration distribution analysis is performed based on the segmented amplitude offset integral data. This process statistically analyzes the concentration of segmented data to assess the distribution characteristics of power fluctuations within each segment, identifying which segments have relatively concentrated fluctuation amplitudes and place greater stress on the circuit. Amplitude concentration distribution analysis helps identify which fluctuation ranges during power transmission are more concentrated, potentially leading to overloads, heat loss, and other issues. This analysis enables further optimization of circuit design and power management strategies, ensuring stable operation of the power system under extreme conditions. By combining the amplitude concentration distribution with the segmented integral data of amplitude offset, a geometric analysis of abnormal heat accumulation within each segment is performed. This process quantifies the thermal accumulation effect of power fluctuations within each segment on circuit components. Parts of power fluctuations with concentrated amplitudes and prolonged duration often lead to heat accumulation, which can cause component overheating and lead to failure or damage. This geometric analysis provides the heat accumulation profile for each stage, enabling a more accurate assessment of the circuit's thermal management requirements under specific fluctuation conditions and preventing system failure due to thermal runaway. Overload damage probability is estimated based on the geometric analysis of abnormal heat accumulation within each segment. This step analyzes heat accumulation data for each segment, combined with the physical characteristics and thermal tolerances of the circuits, to assess the probability of overload damage to the power delivery system under specific power fluctuation conditions. Overload damage is often accompanied by excessive heat accumulation, leading to damage to circuit components or system failure. By calculating the damage probability, designers can assess the power system's load-carrying capacity and, based on the results, take necessary preventative measures, such as increasing heat dissipation, optimizing power delivery, or introducing overload protection mechanisms, thereby improving the safety and reliability of the power system.

[0029] Preferably, step S244 includes the following steps:

[0030] According to the amplitude concentration distribution and amplitude offset segmented integral data, the abnormal heat dynamic gradient field is obtained to obtain the abnormal heat segmented gradient field;

[0031] Perform anisotropic migration vector analysis on the abnormal thermal segmented gradient field to obtain segmented thermal migration vector data;

[0032] Perform geometric fitting processing on the segmented heat offset vector data to obtain heat offset geometric fitting data;

[0033] Based on the heat offset proportional fitting data, the segmented abnormal heat accumulation proportional analysis is performed to obtain the segmented abnormal heat accumulation proportional data.

[0034] The present invention constructs a dynamic gradient field for abnormal heat generation by combining amplitude concentration distribution and segmented integral data of amplitude offset. This process can identify changes in heat distribution due to power fluctuations at different temporal and spatial scales, thereby revealing trends in heat generation in localized circuit regions caused by excessive fluctuations. The generation of segmented gradient fields for abnormal heat generation provides accurate regional thermal data for subsequent thermal analysis, helping to locate hotspots of heat accumulation. This allows for timely identification of critical areas that may lead to overheating or damage during the design phase, thereby optimizing thermal management. Anisotropic offset vector analysis of the segmented gradient field for abnormal heat generation reveals changes in heat distribution in different directions. This process analyzes whether heat accumulation exhibits a specific directional offset, such as excessive concentration or uneven distribution along a particular direction. Extracting segmented heat offset vector data allows for more precise analysis of heat diffusion patterns caused by power fluctuations, providing designers with more specific guidance on heat dissipation. This information is crucial for effectively controlling overheating risks and optimizing heat dissipation solutions. By performing geometric fitting on the segmented heat offset vector data, the nonlinear changes in heat offset can be converted into a predictable mathematical model. The geometric fitting process helps designers quantify the changing trends of thermal excursion at different stages and regions, making the changes in heat distribution more regular and controllable. This approach simplifies the complexity of circuit thermal management. Designers can use the fitting results to predict thermal trends and potential overheating issues, providing higher accuracy for subsequent risk assessments. Geometric analysis of abnormal heat accumulation in segments based on the thermal excursion geometric fitting data can further predict and quantify heat accumulation in different regions of the circuit. By combining thermal excursion data with circuit design parameters and analyzing the degree of heat accumulation within each segment, it is possible to identify areas where excessive heat accumulation can cause overheating and damage. This geometric analysis provides a more accurate thermal distribution map for circuit design, allowing designers to effectively adjust power transmission and cooling design to avoid equipment failures caused by excessive heat accumulation and improve overall system stability and reliability.

[0035] Preferably, step S3 includes the following steps:

[0036] Step S31: normalizing the power transmission overload damage probability data to obtain power transmission overload damage normalized data;

[0037] Step S32: performing cascade impact analysis based on the normalized data of power transmission overload damage to obtain overload damage cascade impact data;

[0038] Step S33: performing circuit limit load level classification based on the overload damage cascade impact data and the power transmission overload damage normalization data to obtain the circuit limit load level.

[0039] The present invention first normalizes the power transmission overload damage probability data, converting it to a unified standard range (typically 0 to 1) and eliminating differences between different data scales. This process helps improve data comparability and ensures that subsequent analysis can be performed on the same scale. Furthermore, normalization helps reduce the impact of extreme values ​​on data analysis results, allowing the damage probability to more accurately reflect the actual risk level of the system during analysis. Through normalization, the power transmission damage probability is represented more clearly and standardized, providing a reliable foundation for subsequent cascading impact analysis and circuit carrying capacity assessment. Cascading impact analysis based on normalized power transmission overload damage data aims to identify the mutual influence between different components in the power system. Overload damage in power systems often has a cascading effect, where damage to one component leads to a chain reaction in other components, further exacerbating overall system damage. Cascading analysis of this data can reveal the interdependencies between various components in the system and potential risk transmission paths. This process helps quantify potential cascading effects in the system and identify key factors leading to large-scale system failures, providing valuable information for power system stability analysis and risk warning. Using overload damage cascading impact data and normalized power transmission overload damage data to classify circuits into extreme load levels aims to establish clear boundaries for the power system's load capacity. By comprehensively considering damage probability, cascading effects, and the load capacity of each component in the system, circuits can be classified into different load levels. This process helps identify the safety boundaries of the power system and supports power management decisions. For example, by classifying extreme load levels, the system's maximum load capacity under different load conditions can be determined, preventing system collapse or damage in the event of an overload. This analysis is crucial to the safety, reliability, and optimal design of power transmission systems. It can guide the development of equipment operation and maintenance strategies and improve the system's risk tolerance.

[0040] Preferably, step S33 includes the following steps:

[0041] Step S331: performing multi-dimensional vector field mapping processing based on the overload damage cascade impact data and the power transmission overload damage normalized data to obtain overload damage vector correlation data;

[0042] Step S332: Calculating the thermal distribution of circuit nodes based on the overload damage vector correlation data to obtain thermal distribution characteristic data of circuit nodes;

[0043] Step S333: calculating the overload thermal instability variance based on the circuit node thermal distribution characteristic data and the overload damage vector correlation data to obtain the overload thermal instability variance data;

[0044] Step S334: performing critical value fitting on the overload thermal instability variance data to obtain overload thermal instability critical value fitting data;

[0045] Step S335: performing circuit limit load level classification according to the overload thermal instability variance data and the overload thermal instability critical value fitting data to obtain the circuit limit load level.

[0046] This invention transforms damage data from various dimensions into a vector field format by performing multidimensional vector field mapping on overload damage cascade impact data and normalized power transmission overload damage data. This process reveals the correlation between damage status of various components in the power transmission system and system load, providing a systematic and comprehensive damage assessment framework for subsequent analysis. The mapped overload damage vector correlation data allows designers to more clearly understand the system's overload risk under different load conditions, providing strong data support for circuit optimization and risk warning. Circuit node thermal distribution calculations based on the overload damage vector correlation data aim to analyze the heat distribution characteristics of each node in the circuit. Heat accumulation caused by overload is often a key factor in power system damage, so accurately calculating the thermal distribution of each node is crucial for assessing system safety. These calculations generate characteristic data on the thermal distribution of circuit nodes, revealing which nodes or areas are at risk of overheating under overload conditions. This data provides a foundation for subsequent thermal instability analysis, helping designers identify high-temperature areas that may lead to circuit failures, enabling timely implementation of heat dissipation optimization measures to prevent system failure. By combining circuit node thermal distribution characteristic data with overload damage vector correlation data, the overload thermal instability variance is calculated. This process aims to quantify the volatility of thermal instability in a power system under overload conditions. The thermal instability variance reflects the amplitude and instability of thermal fluctuations when the system is carrying an overload. A larger variance generally indicates a greater risk of thermal instability. By calculating the overload thermal instability variance data, potential thermal instability areas in the power system can be identified, providing a scientific basis for further risk assessment and control measures. This helps optimize thermal management during the design phase and reduce the probability of system overheating failures. The overload thermal instability variance data is fitted with a critical value to identify the critical point at which the power system becomes unstable under overload conditions. This process, by fitting the thermal instability variance data, produces a predictive and instructive critical value. This critical value represents the maximum thermal load that the power system can carry. Exceeding this critical value puts the system at risk of thermal instability or damage. This fitting allows designers to adjust the power system's operating parameters and load according to actual conditions to ensure that the system operates within a safe thermal load range. This process helps effectively predict and avoid thermal instability in overloaded systems, improving system safety and reliability. Circuits are classified into extreme load levels based on overload thermal instability variance data and fitted data on overload thermal instability critical values. This process combines thermal instability variance and critical values ​​to determine the maximum load capacity of a circuit and classify it into different load levels. This classification provides clear safety margins for power system design and operation, helping to identify areas at risk of overload under different load conditions, thereby enabling targeted risk prevention and control.This process provides a scientific basis for the safe operation of the power system, helps to avoid circuit failures due to overload in practical applications, and ensures the long-term stable operation of the system.

[0047] Preferably, step S334 includes the following steps:

[0048] Perform nonlinear reduction processing on the overload thermal instability variance data to obtain the reduced overload thermal instability vector data;

[0049] Perform multi-partition thermodynamic analysis on the reduced overload thermal instability vector data to obtain thermal instability partition critical analysis data;

[0050] According to the critical analysis data of thermal instability partitions and the thermal distribution characteristic data of circuit nodes, a critical gain matrix is ​​fitted to obtain a gain critical gain matrix;

[0051] Critical numerical fitting is performed based on the gain critical gain matrix to obtain the critical numerical fitting data of overload thermal instability.

[0052] The present invention applies nonlinear reduction to the overload thermal instability variance data, aiming to simplify complex multidimensional datasets and reduce unnecessary redundant information. Nonlinear reduction employs dimensionality reduction methods, such as principal component analysis (PCA) or manifold learning, to map the data into a low-dimensional space while retaining its most important thermal instability information. This step has the beneficial effect of making the originally complex data more compact and easier to process, while also improving the data's interpretability. Subsequent analysis using the reduced thermal instability vector data can more accurately capture the system's potential instability behavior, avoiding the information loss or computational burden associated with large-scale data processing. Multi-region thermodynamic analysis is then performed on the reduced overload thermal instability vector data. Thermal instability in power systems typically exhibits spatial distribution characteristics, with significant variations in heat conduction and accumulation across different regions. Through multi-region thermodynamic analysis, the system can be divided into multiple regions, and the thermal dynamic behavior of each region under overload conditions analyzed separately, thereby obtaining critical analysis data for the thermal instability regions. This process helps reveal the thermal instability characteristics and thresholds of each region, identifying critical areas of excessive heat load in the system and providing data support for thermal management and optimization. Furthermore, this regional analysis makes thermal instability early warnings for the system more accurate and controllable, preventing overall instability. A critical gain matrix is ​​fitted using thermal instability zone criticality analysis data and circuit node thermal distribution characteristic data. This fitting process yields a gain-critical gain matrix, which reveals the gain response of each zone or node to the overall system stability under different thermal instability conditions. The critical gain matrix reflects the degree of mutual influence of thermal instability between different nodes or zones, as well as the contribution of each zone to the system's load-carrying capacity. This step offers the benefit of providing a thermodynamic model for the system, helping to further evaluate the stability of each node in the circuit under thermal overload conditions. This allows designers to accurately predict the response of the power system under different thermal loads, thereby preventing thermal instability in practical applications. Critical numerical fitting is performed based on the gain-critical gain matrix to obtain critical numerical fitting data for overload thermal instability. The goal of critical numerical fitting is to determine the critical value of the power system under different thermal loads through mathematical modeling, i.e., the critical point of system instability. This fitting can predict the risk of thermal instability under different levels of overload and clarify the maximum thermal load range that the system can withstand. The fitted critical values ​​provide safety margins for system operation and design, helping to prevent equipment overheating, burnout, or system failure caused by overload. This step also provides a scientific numerical method for predicting the system's thermal instability behavior under extreme conditions, providing clear quantitative standards for safe circuit operation and supporting system optimization and fault prevention.

[0053] Preferably, step S4 includes the following steps:

[0054] Step S41: performing level edge condition sampling on the overload damage cascade impact data and the power transmission overload damage probability data according to the circuit limit load level to obtain overload damage level edge condition data;

[0055] Step S42: dynamically adapt the test case to the overload damage level edge condition data to obtain a damage edge condition test adaptation case;

[0056] Step S43: Designing automated test firmware based on the damage edge condition test adaptation case to obtain damage automated test firmware, and sending the damage automated test firmware to the terminal to perform PCBA automated testing.

[0057] By sampling edge-of-level conditions based on circuit extreme load levels, overload damage cascade impact data, and power transmission overload damage probability data, the present invention can accurately identify critical overload damage scenarios. This method fully considers the circuit's load capacity and damage probability, providing more accurate baseline data for subsequent testing and design. This sampling process facilitates analysis of circuit reliability and load limits in a variety of complex situations, providing a scientific basis for optimizing test plans and improving circuit durability. Dynamic adaptation of overload damage edge-of-level condition data ensures that test cases can be adjusted in real time to varying damage edge conditions. This dynamic adaptation not only improves test accuracy but also adapts to changing conditions in different test environments, enhancing the targetedness and flexibility of testing. By optimizing test cases, different damage scenarios can be better covered, ensuring comprehensive evaluation of devices under various extreme conditions, thereby improving product reliability and safety. Designing automated test firmware based on damage edge condition test adaptation cases enables an efficient and systematic testing process. Automating PCBA (printed circuit board assembly) testing not only reduces manual errors and labor intensity, but also significantly improves test speed and accuracy. Sending automated test firmware to the terminal for execution can quickly obtain test results, promptly identify potential problems, and optimize them, thereby accelerating product verification and quality improvement processes, reducing testing costs, and ensuring the high quality of the final product.

[0058] Preferably, the present invention further provides a PCBA automated testing system for executing the above-mentioned PCBA automated testing method, the PCBA automated testing system comprising:

[0059] A three-dimensional model construction module is used to obtain PCBA circuit design data and the theoretical power consumption operating range of the PCBA circuit; calculate the average difference in line width based on the PCBA circuit design data to obtain the average difference in line width; and construct a three-dimensional model of the PCBA circuit based on the average difference in line width to obtain the three-dimensional model of the PCBA circuit;

[0060] The overload damage probability estimation module is used to collect power transmission fluctuation test data of the PCBA circuit three-dimensional model based on the theoretical power consumption operating range of the PCBA circuit to obtain power transmission fluctuation test data; identify abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data; and estimate the overload damage probability based on the abnormal power transmission fluctuation data to obtain power transmission overload damage probability data;

[0061] The load level classification module is used to perform cascade impact analysis based on the power transmission overload damage probability data to obtain overload damage cascade impact data; based on the overload damage cascade impact data, the circuit limit load level is classified to obtain the circuit limit load level;

[0062] The automated firmware design module is used to dynamically adapt test cases according to the circuit's extreme load level to obtain damage edge condition test adaptation cases; based on the damage edge condition test adaptation cases, the automated test firmware is designed to obtain damage automated test firmware, and the damage automated test firmware is sent to the terminal to perform PCBA automated testing.

[0063] The present invention has the beneficial effect of obtaining PCBA circuit design data and calculating the mean difference in line widths, enabling precise understanding of line width variations, which is crucial for ensuring the proper operation of the circuit board. Based on this data, a three-dimensional model of the PCBA circuit is constructed, enabling designers to comprehensively analyze and optimize the circuit in a virtual environment. This not only helps ensure the rationality of the circuit board layout, but also effectively predicts electrical characteristics such as current paths and transmission impedance, laying the foundation for subsequent testing and optimization. In step S2, based on the operating range of the PCBA circuit's theoretical power consumption, the circuit is tested for power transmission fluctuations. Test data is collected to understand the stability of power transmission. Anomalies in the collected fluctuation data are identified, accurately identifying potential problems caused by power fluctuations. Furthermore, based on this abnormal fluctuation data, the probability of overload damage to the power transmission system is estimated, providing valuable predictions for the long-term stability of the circuit and helping identify areas requiring improvement. Cascade impact analysis, based on the power transmission overload damage probability data, comprehensively assesses the impact of overload damage on the entire circuit system and reveals the damage propagation path. This analysis helps identify the most vulnerable components of the circuit and the chain reactions caused by damage, further providing a basis for assessing the circuit's ultimate load-carrying capacity. Finally, by processing these data, the ultimate load level of the circuit is obtained to ensure that the design meets the actual operating conditions and load requirements. According to the ultimate load level of the circuit, in step S4, dynamic adaptation of the test case is performed to ensure that the test covers all damage edge conditions. These adapted test cases will be used to design automated test firmware to verify the stability and reliability of the circuit by simulating various damage scenarios under actual operating conditions. The automated test firmware can perform all test tasks efficiently and accurately, and perform automated testing by sending it to the terminal device, thereby greatly improving the efficiency and accuracy of the test, and providing important guarantees for the quality control of circuit products. Therefore, the present invention is an optimization process made to a traditional PCBA automated testing method, which solves the problems of unclear overload damage analysis and low test accuracy in a traditional PCBA automated testing method, improves the clarity of overload damage analysis, and improves test accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1 A schematic diagram of the steps of a PCBA automated testing method;

[0065] Figure 2 for Figure 1 Detailed implementation steps of step S2 in FIG.

[0066] The purpose, features and advantages of the present invention will be further described with reference to the accompanying drawings and in conjunction with the embodiments. DETAILED DESCRIPTION

[0067] The following is a clear and complete description of the technical method of the present invention in conjunction with the accompanying drawings. It is obvious that the embodiments described are part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative efforts are within the scope of protection of the present invention.

[0068] In addition, the accompanying drawings are merely schematic illustrations of the present invention and are not necessarily drawn to scale. Identical reference numerals in the figures denote identical or similar parts, and thus repetitive descriptions thereof will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities that do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor and / or microcontroller approaches.

[0069] It should be understood that although the terms "first," "second," and the like may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used solely to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of the exemplary embodiments. The term "and / or" as used herein includes any and all combinations of one or more of the listed associated items.

[0070] To achieve this, please refer to Figures 1 to 2 , a PCBA automated testing method, the method comprising the following steps:

[0071] Step S1: Obtain PCBA circuit design data and the theoretical power consumption operating range of the PCBA circuit; calculate the average difference in line width based on the PCBA circuit design data to obtain the average difference in line width; construct a three-dimensional model of the PCBA circuit based on the average difference in line width to obtain the three-dimensional model of the PCBA circuit;

[0072] Step S2: Collecting power transmission fluctuation test data of the PCBA circuit three-dimensional model according to the theoretical power consumption operating range of the PCBA circuit to obtain power transmission fluctuation test data; identifying abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data; estimating the overload damage probability of the abnormal power transmission fluctuation data to obtain power transmission overload damage probability data;

[0073] Step S3: performing cascade impact analysis based on the power transmission overload damage probability data to obtain overload damage cascade impact data; performing circuit limit load level classification based on the overload damage cascade impact data to obtain the circuit limit load level;

[0074] Step S4: Dynamically adapt the test case according to the circuit limit load level to obtain the damage edge condition test adaptation case; design the automated test firmware based on the damage edge condition test adaptation case to obtain the damage automated test firmware, and send the damage automated test firmware to the terminal to perform PCBA automated testing.

[0075] In the embodiment of the present invention, reference Figure 1 FIG. 1 is a flow chart of a method for automated testing of a PCBA according to the present invention. In this example, the method for automated testing of a PCBA includes the following steps:

[0076] Step S1: Obtain PCBA circuit design data and the theoretical power consumption operating range of the PCBA circuit; calculate the average difference in line width based on the PCBA circuit design data to obtain the average difference in line width; construct a three-dimensional model of the PCBA circuit based on the average difference in line width to obtain the three-dimensional model of the PCBA circuit;

[0077] In an embodiment of the present invention, PCBA circuit design data is obtained, including information such as the power requirements of all components, connections, and elements on the circuit board. This data is mainly derived from circuit schematics and wiring diagrams, and can provide a comprehensive description of the circuit layout and function. After obtaining the theoretical power consumption operating range of the circuit, the circuit trace width in the design data is calculated and a line width mean difference calculation method is executed. Specifically, by analyzing the circuit wiring, the range of variation of the line width is calculated to obtain the mean difference in width of each line. The formula for calculating the mean difference is the average of the absolute values ​​of the differences between the widths of all lines and their average widths. The result obtained in this way helps to evaluate the distribution of current and the power carrying capacity of the circuit. Then, based on the line trace width mean difference data, a three-dimensional modeling algorithm (for example, a modeling technique based on Bézier curve fitting) is used to construct a three-dimensional model of the PCBA circuit. This model accurately reflects the actual layout and line direction of the circuit board, laying the foundation for subsequent testing and simulation analysis.

[0078] Step S2: Collecting power transmission fluctuation test data of the PCBA circuit three-dimensional model according to the theoretical power consumption operating range of the PCBA circuit to obtain power transmission fluctuation test data; identifying abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data; estimating the overload damage probability of the abnormal power transmission fluctuation data to obtain power transmission overload damage probability data;

[0079] In an embodiment of the present invention, a power transmission fluctuation test is conducted based on the theoretical power consumption operating range of the PCBA circuit. Specifically, a virtual simulation environment is designed based on a three-dimensional model of the PCBA circuit to simulate the circuit's current fluctuations under different power operating conditions. This simulation environment includes a tool for collecting data on current and voltage fluctuations between the power input and the circuit. By running power fluctuation scenarios under different load conditions, power transmission fluctuation data is collected, including time series variations in voltage, current, and power. Subsequently, an anomaly detection algorithm is used to analyze the collected fluctuation data. This algorithm uses a time series-based anomaly identification method, such as a statistical analysis-based Z-score detection or a machine learning-based clustering algorithm, to identify power fluctuation data outside the normal power consumption range. The identified abnormal fluctuation data is further analyzed, and a statistically based model (such as a Bayesian inference model) is used to estimate the probability of overload damage. By calculating the damage probability, data on the potential overload damage probability during the power transmission process is obtained.

[0080] Step S3: performing cascade impact analysis based on the power transmission overload damage probability data to obtain overload damage cascade impact data; performing circuit limit load level classification based on the overload damage cascade impact data to obtain the circuit limit load level;

[0081] In an embodiment of the present invention, after obtaining the overload damage probability data of power transmission, these data are first normalized. The normalization operation standardizes all damage probability data to unify their numerical ranges, which facilitates subsequent analysis. Next, a cascade analysis method is used to perform cascade impact analysis on the overload damage data. This analysis evaluates the degree of impact of damage to a certain node on other nodes by establishing the influence relationship between the nodes in the power transmission network. In the cascade impact analysis, the connectivity analysis method in graph theory is used to model circuit connections in the form of nodes and edges, and calculate the cascade impact data of damage under overload conditions. Based on these analysis results, the limit state analysis method is used to divide the circuit into extreme load levels. This method grades the circuit's load level according to the circuit's load capacity and the damage extension path, ensuring that each node can withstand the maximum load when operating at high power, avoiding overload-induced system crashes.

[0082] Step S4: Dynamically adapt the test case according to the circuit limit load level to obtain the damage edge condition test adaptation case; design the automated test firmware based on the damage edge condition test adaptation case to obtain the damage automated test firmware, and send the damage automated test firmware to the terminal to perform PCBA automated testing.

[0083] In an embodiment of the present invention, test cases are dynamically adapted based on the circuit's ultimate load level by determining the overload damage level edge conditions. First, the load capacity of each node is analyzed based on the circuit's ultimate load level, and its performance under extreme conditions is evaluated. By analyzing the damage level edge condition data obtained, a constrained optimization algorithm is used to adjust and adapt the test cases. During this process, test cases are designed for different damage scenarios, taking into account the load differences between different circuit components and the overload modes that may occur. Next, based on the adapted test cases, automated test firmware is generated using a firmware design method. In specific implementation, firmware design is performed using an embedded development platform, and automated testing tools are used to generate test scripts compatible with the PCBA circuit. These firmware are then sent to the test terminal for execution. During the test, the firmware performs real-time monitoring based on the preset damage edge conditions to ensure that the test covers all potential overload damage scenarios. Data is automatically recorded and results are fed back to complete comprehensive automated testing of the PCBA circuit.

[0084] Preferably, step S1 includes the following steps:

[0085] Step S11: Obtain PCBA circuit design data and PCBA circuit theoretical power consumption operating range;

[0086] Step S12: marking the circuit routing of the PCBA circuit design data to obtain circuit routing marking data;

[0087] Step S13: Calculating the average width difference of the circuit trace mark data according to the PCBA circuit design data to obtain the average width difference of the circuit trace;

[0088] Step S14: constructing a three-dimensional model of the PCBA circuit according to the average difference in line width and the PCBA circuit design data to obtain a three-dimensional model of the PCBA circuit.

[0089] In an embodiment of the present invention, all circuit diagrams and circuit component information are first extracted from the PCBA design file. This design file typically includes circuit diagrams, component parameters, layout information, connection relationships, routing rules, and more. By analyzing the circuit design data, parameter information such as the operating voltage, current, and power consumption of each component is extracted. Furthermore, the component's operating range must be verified against the component's specification sheet to ensure that the theoretical power consumption in the design is reasonable. This data can be obtained by analyzing the electrical connection information in the circuit diagram, for example, using methods similar to circuit simulation software to calculate the power consumption of each circuit component under normal operating conditions. The theoretical power consumption operating range is determined by the design current and voltage range, providing a basis for subsequent steps. All circuit traces in the PCBA circuit design data are individually labeled. This trace labeling ensures that detailed calculation and optimization of trace width and distribution are performed in subsequent steps. This process can be performed using automated tools that read the trace information in the circuit design and annotate each trace's basic attributes, including trace type, trace width, and trace spacing, based on the length, current density, and transmission requirements of each trace segment. For this reason, the circuit design file can be parsed, and for each circuit routing, the level to which it belongs (such as single-sided board, multi-layer board, etc.) is set, and the routing width and spacing requirements are marked by algorithm processing. In addition, it is also necessary to set the current carrying capacity of the routing according to current, power consumption and environmental factors (such as temperature, humidity, etc.) to ensure the accuracy of the marked data. It is necessary to further calculate the circuit routing mark data obtained in step S12 to obtain the circuit routing width mean difference. The main purpose of this calculation is to optimize the width distribution of the circuit, to ensure that there is no overheating or uneven situation when current flows through, thereby improving the stability and performance of the circuit. First, by the current density and power demand in the circuit design, the ideal width of each routing line segment is calculated, and compared with the actual width recorded in the marked data. The mean difference calculation can be achieved by the following steps: first calculate the theoretical width of each routing, and calculate the expected width range based on the calibrated current density. Then, obtain the actual width of each routing in the marked data, and calculate the difference between the theoretical width and the actual width. By averaging the width differences of all lines, the line width average difference is obtained, thereby further adjusting the layout of the circuit routing to ensure that the designed routing width meets the current carrying and thermal management requirements. Based on the line routing width average difference and circuit design data calculated in step S13, a three-dimensional model of the PCBA circuit is constructed. First, using the spatial coordinates and size information of each component in the circuit design data and the routing mark data obtained in step S12, a three-dimensional layout of the circuit is drawn using a computer-aided design (CAD) tool. Specifically, according to information such as the layout position, pad size, and pin distribution of each component, these components are accurately located in three-dimensional space.Next, based on the mean difference in trace width data obtained in step S13, the trace layout of the circuit is adjusted to ensure that the width and spacing of each trace are within the allowable design range. Numerical optimization algorithms, such as genetic algorithms or particle swarm optimization (PSO) algorithms, are used to further adjust the direction and width of the circuit traces to avoid over-concentration or over-sparseness. Ultimately, the spatial relationship between each circuit component and trace is presented in the three-dimensional model, and a three-dimensional model file is generated for subsequent simulation and manufacturing.

[0090] Preferably, step S2 includes the following steps:

[0091] Step S21: Building a virtual simulation environment for the PCBA circuit three-dimensional model to obtain a circuit virtual simulation environment;

[0092] Step S22: collecting power transmission fluctuation test data in the circuit virtual simulation environment according to the theoretical power consumption operation range of the PCBA circuit to obtain power transmission fluctuation test data;

[0093] Step S23: using a preset power fluctuation abnormality identification model to identify abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data;

[0094] Step S24: Estimating the overload damage probability of the power transmission abnormal fluctuation data to obtain power transmission overload damage probability data.

[0095] As an example of the present invention, refer to Figure 2 As shown, in this example, step S2 includes:

[0096] Step S21: Building a virtual simulation environment for the PCBA circuit three-dimensional model to obtain a circuit virtual simulation environment;

[0097] In an embodiment of the present invention, a three-dimensional geometric model of the PCBA circuit is first established. The model should include the layout of the circuit board, the position of the electrical components, and the connection method. A CAD tool (such as SolidWorks or AutoCAD) is used to design the detailed geometric structure of the PCBA circuit and convert it into a three-dimensional model format suitable for simulation software (such as ANSYS or COMSOL). When setting up the simulation environment, it is necessary to consider the physical properties of the electrical components, the layout of the transmission lines, the heat dissipation conditions, etc., to ensure that the simulation environment can accurately reflect the operating environment of the actual circuit. Then, by defining the properties of the material such as electrical conductivity and thermal conductivity, combined with external conditions such as temperature and humidity, a real environment that can simulate power transmission is constructed. The simulation effect of different electrical components of the circuit in the virtual environment must be guaranteed to match the actual physical environment as much as possible, including considering the influence of current, power transmission, etc.

[0098] Step S22: collecting power transmission fluctuation test data in the circuit virtual simulation environment according to the theoretical power consumption operation range of the PCBA circuit to obtain power transmission fluctuation test data;

[0099] In an embodiment of the present invention, the test conditions are first set according to the theoretical power consumption operating range of the PCBA circuit. For example, the normal operating voltage and current range of each component (such as power chip, capacitor, resistor, etc.) are set. Through the power fluctuation test, a series of power fluctuation conditions are introduced into the simulation environment, such as current spikes, short-term voltage changes, etc., to simulate the actual working state. During the test, the simulation software records the power changes of the circuit at each moment according to different fluctuation modes, and collects power fluctuation data in real time. These data include the changing trends of voltage and current, the changes in instantaneous power consumption, etc., and finally a test data set containing various fluctuation conditions is obtained. This data set can provide the actual performance of the circuit under different power consumption and different voltage fluctuation conditions, providing a basis for subsequent abnormal fluctuation identification and damage estimation.

[0100] Step S23: using a preset power fluctuation abnormality identification model to identify abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data;

[0101] In an embodiment of the present invention, signal processing technology is used to analyze the power fluctuation test data collected in step S22. By combining time domain analysis with frequency domain analysis, the main features in the data (such as the standard deviation and mean change of voltage and current fluctuations) are first extracted, and then a threshold is set based on these features to determine whether the fluctuation exceeds the normal range. In order to improve the accuracy of recognition, an anomaly detection algorithm based on statistical analysis (such as the Z-score method) can be used, or a clustering algorithm in machine learning (such as K-means) can be used to classify the fluctuation data to identify the abnormal state of the fluctuation. For example, a sharp fluctuation in current or an excessive deviation in voltage will be identified as an abnormal fluctuation. During the detection process, the normal and abnormal states of the power fluctuation are marked, and finally a test data set containing abnormal fluctuation events is obtained for subsequent analysis.

[0102] Step S24: Estimating the overload damage probability of the power transmission abnormal fluctuation data to obtain power transmission overload damage probability data.

[0103] In an embodiment of the present invention, the abnormal fluctuation data identified in step S23 is first processed to convert these abnormal fluctuations into specific factors that cause circuit overload. By analyzing indicators such as the amplitude, frequency, and duration of power fluctuations, a mathematical model related to overload damage to electrical components in PCBA circuits is established. This model is based on the damage probability and response characteristics of components under overload conditions, and uses cumulative damage theory (such as the Miner criterion) to estimate damage. By comprehensively analyzing the duration and fluctuation amplitude of each abnormal fluctuation event, the degree of damage to the electrical components caused by each abnormal fluctuation is calculated. Finally, the damage probabilities of all fluctuation events are combined to obtain overall overload damage probability data during power transmission. This data can help evaluate the reliability and stability of the circuit during long-term operation and provide a basis for circuit design optimization.

[0104] Preferably, step S24 includes the following steps:

[0105] Step S241: performing amplitude offset segmentation processing on the abnormal power transmission fluctuation data to obtain abnormal amplitude offset segmented data;

[0106] Step S242: performing segmented amplitude integration based on the abnormal amplitude offset segmented data to obtain segmented amplitude offset integral data;

[0107] Step S243: performing amplitude concentration distribution analysis on the abnormal amplitude offset segmented data according to the amplitude offset segmented integral data to obtain the amplitude concentration distribution degree;

[0108] Step S244: performing geometric analysis of abnormal heat accumulation in segments according to the amplitude concentration distribution and the amplitude offset segment integral data to obtain geometric analysis of abnormal heat accumulation in segments;

[0109] Step S245: Estimating the overload damage probability based on the segmented abnormal heat accumulation geometric data to obtain power transmission overload damage probability data.

[0110] In this embodiment of the present invention, data on abnormal fluctuations generated during power transmission must first be collected. This data comes from monitoring points on power transmission equipment such as substations, power lines, or electrical equipment. Abnormal fluctuation data typically manifests as sudden changes in parameters such as current and voltage that fall outside the normal fluctuation range. To facilitate subsequent analysis, this data must be segmented. Specifically, an amplitude threshold is first set to determine whether a data point exhibits abnormal fluctuations. When the amplitude of a data point exceeds this threshold, the point is marked as abnormal. Next, the time series data is divided into consecutive abnormal fluctuation segments, with the start and end of each segment determined by the time the fluctuation amplitude exceeds the set threshold. For each abnormal fluctuation segment, its start and end time, as well as the fluctuation amplitude within the segment, are recorded. This segmented data constitutes "abnormal amplitude offset segment data," which provides the basis for subsequent segment-wise amplitude integration and heat accumulation analysis. Integration processing is performed on each abnormal amplitude offset segment. Specifically, for each segment of abnormal fluctuation data, an integration algorithm is used to calculate the total amplitude change within that segment. Common integration methods include trapezoidal integration and Simpson integration. If the abnormal fluctuation data is a discrete sequence, numerical integration methods can be used to integrate each segment. For example, if the voltage amplitude changes linearly from V1 to V2 within a certain time period, the integration method will calculate the cumulative value corresponding to the amplitude change in that segment. In practice, the sampling frequency and error correction must also be considered. The segmented amplitude integration data provides a quantitative basis for subsequent amplitude concentration analysis. This step yields the integral value for each segment of abnormal fluctuation, known as the "segmented amplitude deviation integral data." This data helps assess the load on equipment caused by abnormal fluctuations in power transmission. The core task of this step is to analyze the amplitude concentration of each segment of abnormal amplitude deviation data. Amplitude concentration measures the degree of concentration of abnormal fluctuation amplitude changes within a certain time period. Specifically, statistical methods such as standard deviation and coefficient of variation can be used to measure the concentration of fluctuation data. First, for each segment of abnormal amplitude deviation data, the mean and standard deviation of all data points within that segment are calculated. A smaller standard deviation indicates that the amplitude changes are more concentrated, and the coefficient of variation represents the ratio of the standard deviation to the mean, reflecting the relative volatility of the data. For each segment of data, the corresponding concentration index is calculated. Then, based on the amplitude concentration of each segment, the overall distribution of the concentration can be further analyzed by statistical methods to obtain the "amplitude concentration distribution" data. This data is helpful for subsequent judgment of the possibility of damage to power equipment under different fluctuation intensities. The aforementioned amplitude concentration distribution and amplitude offset segmented integral data are used to analyze abnormal heat accumulation. According to the energy conversion principle in power transmission, when power equipment is subjected to large abnormal amplitude fluctuations for a long time, excessive heat accumulation will occur, causing equipment overload or damage.Therefore, it is necessary to calculate the heat accumulation caused by abnormal fluctuations on equipment based on the results of the piecewise integration of amplitude. First, a heat accumulation model is established. This model can calculate heat accumulation based on the power formula of current or voltage and the relationship between heat and current amplitude. In this model, the piecewise integration data of the amplitude offset is used as the input parameter for heat accumulation. For each data segment, the heat accumulation value for that period is calculated based on the functional relationship between time and power amplitude. To simplify the model, heat accumulation is often analyzed using a geometric model, which means that heat accumulation within a time period is considered to be a gradual process. By analyzing the heat accumulation in each stage using a geometric method, the heat accumulation during each abnormal fluctuation period can be obtained. This data is called "segmented abnormal heat accumulation geometric data" and reflects the thermal load experienced by equipment when exposed to abnormal fluctuations of varying intensities. Based on the segmented abnormal heat accumulation geometric data obtained in the above steps, the probability of overload damage to equipment in the power transmission system can be further estimated. First, a damage model must be established. This model typically incorporates factors such as the maximum heat tolerance of the equipment, the degree of accumulated heat load, and the thermal resistance of the equipment materials. Based on the design parameters of the power transmission system, equipment overload thresholds can be set. Then, using heat accumulation proportionality data, combined with the equipment's tolerance standards and overload thresholds, the probability of the power equipment experiencing overload within each time period is calculated. Damage probability is typically estimated using a cumulative effects model, assuming that the probability of equipment overload occurring within a given time period is proportional to the degree of heat accumulation. Using methods such as Monte Carlo simulation, the probability of equipment overload damage within each time period is estimated, ultimately generating "power transmission overload damage probability data."

[0111] Preferably, step S244 includes the following steps:

[0112] According to the amplitude concentration distribution and amplitude offset segmented integral data, the abnormal heat dynamic gradient field is obtained to obtain the abnormal heat segmented gradient field;

[0113] Perform anisotropic migration vector analysis on the abnormal thermal segmented gradient field to obtain segmented thermal migration vector data;

[0114] Perform geometric fitting processing on the segmented heat offset vector data to obtain heat offset geometric fitting data;

[0115] Based on the heat offset proportional fitting data, the segmented abnormal heat accumulation proportional analysis is performed to obtain the segmented abnormal heat accumulation proportional data.

[0116] In this embodiment of the present invention, data preprocessing is first performed on the input amplitude concentration distribution and amplitude offset segmented integral data to ensure data integrity and accuracy. The amplitude concentration distribution is obtained by statistically analyzing the input signal amplitude to determine the distribution of the signal amplitude within each interval, thereby determining the signal's changing trend and concentration. The amplitude offset segmented integral data is obtained through segmented integration of the signal and represents the accumulated value of the signal changes in different segments. Based on this, numerical integration methods are used to calculate the gradient of the data. By calculating the gradient field for each segment, an abnormal heat dynamic gradient field can be obtained. Each point in the gradient field represents the rate of change of the signal or the rate of change of the amplitude around that point. Furthermore, by analyzing the local changes in the gradient field, an abnormal heat segmented gradient field is obtained. This process uses numerical differentiation and local optimal interval partitioning to obtain segmented gradient values, ensuring the accuracy and rationality of the gradient field for each segment. After obtaining the abnormal heat segmented gradient field, the next step is to perform anisotropic offset vector analysis on each segment. Anisotropic offset refers to calculating the heat offset in different directions based on the changes in the gradient field. In this step, the directional gradient method is used to directionally decompose each gradient value. By analyzing the signal's variation in each direction, the offset vector for each direction is obtained. Specifically, by calculating the gradient value at each point and combining it with the signal's variation patterns within the local area, a two-dimensional or three-dimensional coordinate transformation is used to analyze the variation trends at that point in each direction, ultimately yielding the offset vector for that point. This process incorporates the spatial variation characteristics of the signal and employs techniques such as the discrete Fourier transform (FFT) to optimize the analysis of each segmented thermal offset vector, making the calculated offset vector more accurate and reflecting the local variation characteristics of the signal. After obtaining the segmented thermal offset vector data, geometric fitting is performed to further refine the representation of the thermal offset vector. Geometric fitting uses a mathematical fitting algorithm to fit the offset vector data to a curve or function that conforms to a geometric relationship. Specifically, the least squares method or other numerical optimization method is used to fit the offset vector data points to a continuous geometric function model. This model accurately represents the pattern of thermal variation of the offset vector, thereby providing a detailed description of the dynamic changes in abnormal heat. During the fitting process, by adjusting the parameters, the overall and local errors of the fitting results are minimized, ensuring that the fitting results can truly reflect the offset of the segmented heat and making subsequent data processing more stable and reliable. After obtaining the proportional fitting data of the heat offset, further proportional analysis of the segmented abnormal heat accumulation is performed. The core of this step is to calculate the cumulative effect of the heat offset in each segment, especially in the sections where the abnormal heat distribution is more concentrated. By integrating the proportional fitting data, the heat accumulation in each segment is obtained. This process uses a numerical integration method to integrate the heat offset of each segment along the time or space axis, and finally obtains the segmented abnormal heat accumulation data.During this process, the geometric accumulation rule is used to ensure that the accumulation process complies with the geometric law and avoid excessive accumulation or omissions. During the process of abnormal heat accumulation in segments, detailed adjustments can be made to adjust the accumulation weight according to different segment intervals, so that the heat accumulation data can more accurately reflect the actual abnormal situation.

[0117] Preferably, step S3 includes the following steps:

[0118] Step S31: normalizing the power transmission overload damage probability data to obtain power transmission overload damage normalized data;

[0119] Step S32: performing cascade impact analysis based on the normalized data of power transmission overload damage to obtain overload damage cascade impact data;

[0120] Step S33: performing circuit limit load level classification based on the overload damage cascade impact data and the power transmission overload damage normalization data to obtain the circuit limit load level.

[0121] In embodiments of the present invention, the power transmission overload damage probability data collected is typically derived from historical data or real-time monitoring data. During implementation, a maximum-minimum normalization method is used, and these data have different dimensions or ranges. To ensure uniformity in data processing and comparability in subsequent analysis, these data must be normalized. Cascading impact analysis is performed using the normalized power transmission overload damage data. The purpose of cascading impact analysis is to assess the mutual influence between components in a system, particularly the impact on other components when overload damage occurs in one component (such as a substation or transmission line). During implementation, an impact relationship matrix is ​​first constructed. The degree of impact can be determined by analyzing historical data, equipment specifications, and the topology of the power system. For example, if a substation experiences overload damage, it will have varying degrees of impact on downstream transmission lines, and vice versa. During implementation, based on the normalized overload damage probability data and cascading impact data, a piecewise function method is used to classify the circuit's ultimate load level. Different load level standards are then set based on the design requirements of the power transmission system. For example, the load level can be divided into three levels: "low load", "normal load" and "overload", and each level corresponds to a critical value range. For each circuit, by combining the overload damage probability data and the cascade impact data, its ultimate load capacity under specific conditions is calculated. At this time, the calculation of the ultimate load capacity needs to take into account the health status of each component in the system, historical fault records, and future damage risks. Based on the calculated load capacity, a piecewise function is used to match the load capacity of each circuit with the preset load level standard. Specifically, if the load capacity is less than a certain threshold, it is classified as a "low load" level; if the load capacity is within a certain range, it is classified as a "normal load"; if the load capacity exceeds a certain threshold, it is determined to be in an "overload" state.

[0122] Preferably, step S33 includes the following steps:

[0123] Step S331: performing multi-dimensional vector field mapping processing based on the overload damage cascade impact data and the power transmission overload damage normalized data to obtain overload damage vector correlation data;

[0124] Step S332: Calculating the thermal distribution of circuit nodes based on the overload damage vector correlation data to obtain thermal distribution characteristic data of circuit nodes;

[0125] Step S333: calculating the overload thermal instability variance based on the circuit node thermal distribution characteristic data and the overload damage vector correlation data to obtain the overload thermal instability variance data;

[0126] Step S334: performing critical value fitting on the overload thermal instability variance data to obtain overload thermal instability critical value fitting data;

[0127] Step S335: performing circuit limit load level classification according to the overload thermal instability variance data and the overload thermal instability critical value fitting data to obtain the circuit limit load level.

[0128] In this embodiment of the present invention, circuit overload damage cascade impact data and normalized power transmission overload damage data are first collected. The overload damage cascade impact data contains the impact relationships between different circuit nodes or power transmission channels under overload conditions, while the normalized power transmission overload damage data indicates the degree of overload damage at each node under standard load conditions. These two sets of data provide foundational information for processing. To achieve multidimensional vector field mapping, these data must first be normalized to unify the dimensions of all data for ease of subsequent calculations. Subsequently, using a finite element method or distributed algorithm, these data are mapped into a multidimensional vector field, where each node corresponds to an overload damage vector that comprehensively considers influencing factors across multiple dimensions, such as current, temperature, and time. During this process, numerical interpolation methods are used to process the spatial and temporal distribution of the circuit, ensuring that the overload damage information for each node is accurately reflected in the vector field, thereby obtaining complete overload damage vector correlation data. The overload damage vector correlation data obtained in step S331 is used as input to calculate the thermal distribution of the circuit nodes. This thermal distribution calculation is performed based on a heat conduction model. Specifically, it is assumed that the heat of each node in the circuit will increase due to overload damage. The conduction of heat follows Fourier's law and will show different distribution characteristics in multidimensional space. In order to perform the calculation, a numerical simulation technology based on the finite difference method (FDM) or the finite element method (FEM) is used to construct a heat conduction equation model, and the temperature change of each circuit node is iteratively calculated. The initial temperature of each node can be set to the temperature under the standard operating state. Over time, the temperature will gradually increase due to overload damage. Through this process, the thermal distribution of each node in the circuit can be obtained, thereby obtaining the thermal distribution characteristic data of the circuit nodes. This data contains the relationship between temperature change and overload damage. Based on the circuit node thermal distribution characteristic data obtained in step S332 and the overload damage vector correlation data in step S331, the overload thermal instability variance is calculated. The thermal instability variance is a key indicator that describes the instability of the thermal distribution of the circuit under overload conditions and the resulting system failure. First, using the theory of thermodynamic stability, a mathematical model of the thermal instability variance is established. By comparing the thermal distribution state of each node in the circuit with the standard thermal distribution state under normal working conditions, the thermal instability of each node is calculated. Thermal instability can be measured by the fluctuation amplitude of the thermal distribution, and the square of the fluctuation amplitude is the thermal instability variance. Then, the thermal instability of all nodes is weighted averaged to obtain the overload thermal instability variance data of the entire circuit. This variance data can help evaluate the stability of the circuit under different workloads, especially the probability of circuit instability under overload conditions. Based on the overload thermal instability variance data obtained in step S333, the critical value fitting method is used to deduce the critical value of the circuit at which thermal instability occurs under different overload conditions.In specific implementation, historical data is first collected or experimentally tested to determine the relationship between the variance of overload thermal instability and actual instability events within a certain range. Using mathematical techniques such as least squares, Lagrange interpolation, or spline curve fitting, the thermal instability variance data is fitted to derive critical values ​​for different damage levels. During the fitting process, the thermal conductivity characteristics of each circuit node and the cascading effects of damage must be considered, ensuring that the fitting function accurately reflects the system's behavior under overload conditions. Ultimately, the resulting fitted data for the critical value of overload thermal instability provides a theoretical basis for the circuit's thermal instability critical point and can be used for subsequent assessment of the circuit's load capacity. First, based on the overload thermal instability variance data and the fitted data for the critical value of overload thermal instability obtained in steps S333 and S334, the circuit's ultimate load capacity is classified. The ultimate load capacity refers to the maximum overload capacity that a circuit can safely carry. Exceeding this capacity will result in thermal instability or other types of failure. In specific operation, the thermal instability variance is first compared with the fitted data for the critical value. By setting certain thresholds, the circuit can be classified into multiple load capacity levels. For example, when the variance of overload thermal instability is less than a certain critical value, the circuit is evaluated as a low load level; when the variance is greater than a higher critical value, the circuit is evaluated as a high load level. Each level represents the load capacity of the circuit under different overload conditions. During the division process, a clustering analysis-based method (such as the K-means algorithm) can be used to automatically divide the circuit into multiple load levels based on the changing trends of the thermal instability variance and critical value fitting data. This process not only improves the accuracy of the division, but also provides clear overload load capacity guidance for the practical application of the circuit.

[0129] Preferably, step S334 includes the following steps:

[0130] Perform nonlinear reduction processing on the overload thermal instability variance data to obtain the reduced overload thermal instability vector data;

[0131] Perform multi-partition thermodynamic analysis on the reduced overload thermal instability vector data to obtain thermal instability partition critical analysis data;

[0132] According to the critical analysis data of thermal instability partitions and the thermal distribution characteristic data of circuit nodes, a critical gain matrix is ​​fitted to obtain a gain critical gain matrix;

[0133] Critical numerical fitting is performed based on the gain critical gain matrix to obtain the critical numerical fitting data of overload thermal instability.

[0134] In an embodiment of the present invention, when performing nonlinear reduction processing on overload thermal instability variance data, it is first necessary to collect overload thermal instability data from the circuit under different operating conditions. This data primarily originates from temperature and power fluctuations during multiple circuit overload states. Nonlinear dimensionality reduction is performed on this data using a method combining principal component analysis (PCA) and an adaptive algorithm. First, principal component analysis is used to extract key features from the data, effectively reducing the data dimension and rendering the data less noisy. Next, a nonlinear mapping method (such as local linear embedding (LLE) or t-SNE) is used to further map the data, avoiding the information loss associated with linear methods. Ultimately, the original high-dimensional data is mapped into low-dimensional overload thermal instability vector data. The key to this step is to preserve the core features of the data through nonlinear dimensionality reduction and reduce redundant information under overload conditions. Multi-partition thermodynamic analysis is then performed on the reduced overload thermal instability vector data obtained. By applying a thermodynamic model to different regions on the circuit board, the entire circuit board is divided into multiple thermodynamic partitions. The thermal characteristics of each partition are determined by physical parameters such as local temperature, power consumption, and thermal conductivity. Finite element analysis (FEA) is used to simulate and analyze the thermal dynamic behavior of each zone. This method takes into account factors such as local temperature variations, heat conduction, and convection. By numerically solving the heat conduction equation, the critical point of thermal instability in each zone under overload is determined. Then, through multi-zone thermodynamic analysis, the critical analysis data for thermal instability is obtained. This step, through precise calculation of the multidimensional thermal model, determines the stability boundaries of different thermal zones and provides a basis for subsequent critical gain matrix fitting. Based on the critical analysis data for thermal instability zones obtained in the previous step and the thermal distribution characteristics of the circuit nodes, the critical gain matrix fitting process is performed. This step first requires extracting thermal distribution data for each node in the circuit, which reflects the temperature and power consumption of each node. Through matrix calculation, the critical points of the thermal instability zones are combined with the thermal characteristics of the nodes to form a critical gain matrix. Each element of this matrix represents the degree to which the temperature change of a node affects the stability of the entire system under specific circuit conditions. During the fitting process, linear regression analysis and a least-squares optimization algorithm are used to optimally match the critical thermal instability analysis data with the thermal distribution characteristics of the circuit nodes, thereby obtaining a gain matrix. This process minimizes the error function, ensuring that the fitted gain matrix accurately predicts circuit thermal instability in practice. After obtaining the critical gain matrix, the final step is critical value fitting. This process, based on the previously fitted gain matrix, uses numerical optimization methods to further accurately fit the critical value for overload thermal instability. Using numerical integration methods and optimization problem solving, the critical gain matrix is ​​numerically calculated to obtain the critical value for overload thermal instability.This fitting process not only considers the circuit's thermal conduction effects, but also incorporates complex factors such as the mutual influence of various components within the circuit, power consumption, and temperature feedback. In practice, numerical fitting employs a backpropagation algorithm, combined with an optimization objective function to fine-tune the fitting results, ensuring the obtained critical values ​​have good engineering applicability and accuracy. Ultimately, the resulting fitted data for the critical values ​​of overload thermal instability provides a reliable theoretical basis for circuit design and operation, helping to avoid potential thermal instability issues during testing.

[0135] Preferably, step S4 includes the following steps:

[0136] Step S41: performing level edge condition sampling on the overload damage cascade impact data and the power transmission overload damage probability data according to the circuit limit load level to obtain overload damage level edge condition data;

[0137] Step S42: dynamically adapt the test case to the overload damage level edge condition data to obtain a damage edge condition test adaptation case;

[0138] Step S43: Designing automated test firmware based on the damage edge condition test adaptation case to obtain damage automated test firmware, and sending the damage automated test firmware to the terminal to perform PCBA automated testing.

[0139] In this embodiment of the present invention, the circuit's ultimate load capacity data must first be obtained. This is typically determined through circuit design specifications or testing experiments. Next, based on the designed capacity of the power transmission system, the probability distribution of overload damage is calculated, taking into account load variations during power transmission and their impact on circuit damage. When categorizing the overload damage data, multiple damage levels are defined based on pre-set current and temperature thresholds. For example, an overload of 0 to 20% can be set as level 1 damage, 20 to 50% as level 2 damage, and over 50% as level 3 damage. Next, using statistical methods and edge condition sampling techniques, specific edge data is extracted from the power transmission overload damage probability data. This edge data lies at the critical points of different damage levels and helps determine the system's performance when approaching the ultimate load. The sampling method can employ methods such as Monte Carlo simulation to generate these edge condition data sets based on the circuit's ultimate load capacity data and the power transmission status, ultimately generating the output "overload damage level edge condition data." First, the overload damage level edge condition data obtained in step S41 must be converted into actual test cases. Each edge condition data point represents a specific circuit operating state and needs to be matched to the circuit's test case. To achieve dynamic adaptation, an adaptation algorithm is used to map this edge data point to the input and output parameters of the circuit test. For example, by setting a current intensity vs. temperature curve, the circuit's operating temperature can be adjusted under different current loads. By simulating changes in current load, the circuit's response under these load conditions can be determined. This process dynamically adjusts the test case parameters to ensure that the generated test cases cover all extreme overload conditions. Intelligent optimization methods such as genetic algorithms and particle swarm optimization can be used to search and adjust the test cases to ensure that all edge conditions are effectively covered and that the generated test cases reflect the performance and behavior of the actual circuit under these edge conditions. The result of this step is a collection of test cases that adapt to different overload damage levels. These test cases can be used for subsequent automated testing. First, based on the previously generated damage edge condition test adaptation cases, corresponding automated test firmware must be designed. The main function of this firmware is to convert these test cases into instruction sequences that can be executed by the automated test platform. The automated test firmware can be written in hardware description language (HDL) or other low-level languages ​​to interact with the test terminal hardware. The test firmware includes all necessary configuration parameters and steps, such as setting the test current level, duration, and other circuit parameters related to overload damage. This firmware also includes an anomaly detection mechanism that monitors the circuit for overload damage in real time and provides feedback based on the test results.When designing the test firmware, a layered architecture can be adopted, with each layer responsible for different testing tasks. For example, the data acquisition layer reads current and voltage data, the control layer sets the circuit load, and the decision layer determines whether the expected damage threshold conditions have been met based on the test results. This firmware is sent to the terminal device via a network interface or physical media, where it is loaded and executed. Upon execution, the firmware automatically tests the PCBA (printed circuit board assembly) according to the designed test cases, evaluating its performance and damage level under different overload conditions and generating corresponding test reports. This approach ensures that the PCBA's overload protection function is verified under real-world extreme conditions and its long-term stability is guaranteed.

[0140] Preferably, the present invention further provides a PCBA automated testing system for executing the above-mentioned PCBA automated testing method, the PCBA automated testing system comprising:

[0141] A three-dimensional model construction module is used to obtain PCBA circuit design data and the theoretical power consumption operating range of the PCBA circuit; calculate the average difference in line width based on the PCBA circuit design data to obtain the average difference in line width; and construct a three-dimensional model of the PCBA circuit based on the average difference in line width to obtain the three-dimensional model of the PCBA circuit;

[0142] The overload damage probability estimation module is used to collect power transmission fluctuation test data of the PCBA circuit three-dimensional model based on the theoretical power consumption operating range of the PCBA circuit to obtain power transmission fluctuation test data; identify abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data; and estimate the overload damage probability based on the abnormal power transmission fluctuation data to obtain power transmission overload damage probability data;

[0143] The load level classification module is used to perform cascade impact analysis based on the power transmission overload damage probability data to obtain overload damage cascade impact data; based on the overload damage cascade impact data, the circuit limit load level is classified to obtain the circuit limit load level;

[0144] The automated firmware design module is used to dynamically adapt test cases according to the circuit's extreme load level to obtain damage edge condition test adaptation cases; based on the damage edge condition test adaptation cases, the automated test firmware is designed to obtain damage automated test firmware, and the damage automated test firmware is sent to the terminal to perform PCBA automated testing.

[0145] The present invention is therefore intended to be illustrative and non-restrictive in all respects, with the scope of the invention being defined by the appended claims rather than the foregoing description, and all changes that come within the meaning and range of equivalents of the application documents are intended to be embraced within the present invention.

[0146] The foregoing description is intended only to provide specific embodiments of the present invention, which will enable those skilled in the art to understand and implement the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not intended to be limited to the embodiments shown herein, but is to be construed in the widest possible manner consistent with the principles and novel features disclosed herein.

Claims

1. A PCBA automated testing method, characterized in that: The following steps are involved: Step S1: Obtain PCBA circuit design data and PCBA circuit theoretical power consumption operating range; Calculate the average difference in line width based on the PCBA circuit design data to obtain the average difference in line width; construct a three-dimensional model of the PCBA circuit based on the average difference in line width to obtain the three-dimensional model of the PCBA circuit; Step S2: collecting power transmission fluctuation test data of the PCBA circuit three-dimensional model according to the theoretical power consumption operation range of the PCBA circuit to obtain power transmission fluctuation test data; identifying abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data; The overload damage probability is estimated based on the abnormal fluctuation data of power transmission to obtain the power transmission overload damage probability data; Step S3: performing cascade impact analysis based on the power transmission overload damage probability data to obtain overload damage cascade impact data; Based on the overload damage cascade impact data, the circuit limit load level is divided into the following categories: Step S4: dynamically adapt the test case according to the circuit limit load level to obtain a damage edge condition test adaptation case; Based on the damage edge condition test adaptation case, the automated test firmware is designed to obtain the damage automated test firmware, which is then sent to the terminal to perform PCBA automated testing.

2. The PCBA automated testing method according to claim 1, wherein: Step S1 includes the following steps: Step S11: Obtain PCBA circuit design data and PCBA circuit theoretical power consumption operating range; Step S12: marking the circuit routing of the PCBA circuit design data to obtain circuit routing marking data; Step S13: Calculating the average width difference of the circuit trace mark data according to the PCBA circuit design data to obtain the average width difference of the circuit trace; Step S14: constructing a three-dimensional model of the PCBA circuit according to the average difference in line width and the PCBA circuit design data to obtain a three-dimensional model of the PCBA circuit.

3. The PCBA automated testing method according to claim 1, wherein: Step S2 includes the following steps: Step S21: Building a virtual simulation environment for the PCBA circuit three-dimensional model to obtain a circuit virtual simulation environment; Step S22: collecting power transmission fluctuation test data in the circuit virtual simulation environment according to the theoretical power consumption operation range of the PCBA circuit to obtain power transmission fluctuation test data; Step S23: using a preset power fluctuation abnormality identification model to identify abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data; Step S24: Estimating the overload damage probability of the power transmission abnormal fluctuation data to obtain power transmission overload damage probability data.

4. The PCBA automated testing method according to claim 3, wherein: Step S24 includes the following steps: Step S241: performing amplitude offset segmentation processing on the abnormal power transmission fluctuation data to obtain abnormal amplitude offset segmented data; Step S242: performing segmented amplitude integration based on the abnormal amplitude offset segmented data to obtain segmented amplitude offset integral data; Step S243: performing amplitude concentration distribution analysis on the abnormal amplitude offset segmented data according to the amplitude offset segmented integral data to obtain the amplitude concentration distribution degree; Step S244: performing geometric analysis of abnormal heat accumulation in segments according to the amplitude concentration distribution and the amplitude offset segment integral data to obtain geometric analysis of abnormal heat accumulation in segments; Step S245: Estimating the overload damage probability based on the segmented abnormal heat accumulation geometric data to obtain power transmission overload damage probability data.

5. The PCBA automated testing method according to claim 4, wherein: Step S244 includes the following steps: According to the amplitude concentration distribution and amplitude offset segmented integral data, the abnormal heat dynamic gradient field is obtained to obtain the abnormal heat segmented gradient field; Perform anisotropic migration vector analysis on the abnormal thermal segmented gradient field to obtain segmented thermal migration vector data; Perform geometric fitting processing on the segmented heat offset vector data to obtain heat offset geometric fitting data; Based on the heat offset proportional fitting data, the segmented abnormal heat accumulation proportional analysis is performed to obtain the segmented abnormal heat accumulation proportional data.

6. The PCBA automated testing method according to claim 1, wherein: Step S3 includes the following steps: Step S31: normalizing the power transmission overload damage probability data to obtain power transmission overload damage normalized data; Step S32: performing cascade impact analysis based on the normalized data of power transmission overload damage to obtain overload damage cascade impact data; Step S33: performing circuit limit load level classification based on the overload damage cascade impact data and the power transmission overload damage normalization data to obtain the circuit limit load level.

7. The PCBA automated testing method according to claim 6, wherein: Step S33 includes the following steps: Step S331: performing multi-dimensional vector field mapping processing based on the overload damage cascade impact data and the power transmission overload damage normalized data to obtain overload damage vector correlation data; Step S332: Calculating the thermal distribution of circuit nodes based on the overload damage vector correlation data to obtain thermal distribution characteristic data of circuit nodes; Step S333: calculating the overload thermal instability variance based on the circuit node thermal distribution characteristic data and the overload damage vector correlation data to obtain the overload thermal instability variance data; Step S334: performing critical value fitting on the overload thermal instability variance data to obtain overload thermal instability critical value fitting data; Step S335: performing circuit limit load level classification according to the overload thermal instability variance data and the overload thermal instability critical value fitting data to obtain the circuit limit load level.

8. The PCBA automated testing method according to claim 7, wherein: Step S334 includes the following steps: Perform nonlinear reduction processing on the overload thermal instability variance data to obtain the reduced overload thermal instability vector data; Perform multi-partition thermodynamic analysis on the reduced overload thermal instability vector data to obtain thermal instability partition critical analysis data; According to the critical analysis data of thermal instability partitions and the thermal distribution characteristic data of circuit nodes, a critical gain matrix is ​​fitted to obtain a gain critical gain matrix; Critical numerical fitting is performed based on the gain critical gain matrix to obtain the critical numerical fitting data of overload thermal instability.

9. The PCBA automated testing method according to claim 1, wherein: Step S4 includes the following steps: Step S41: performing level edge condition sampling on the overload damage cascade impact data and the power transmission overload damage probability data according to the circuit limit load level to obtain overload damage level edge condition data; Step S42: dynamically adapt the test case to the overload damage level edge condition data to obtain a damage edge condition test adaptation case; Step S43: Designing automated test firmware based on the damage edge condition test adaptation case to obtain damage automated test firmware, and sending the damage automated test firmware to the terminal to perform PCBA automated testing.

10. A PCBA automated testing system, characterized in that: For executing the PCBA automated testing method according to claim 1, the PCBA automated testing system comprises: A three-dimensional model construction module is used to obtain PCBA circuit design data and the theoretical power consumption operating range of the PCBA circuit; calculate the average difference in line width based on the PCBA circuit design data to obtain the average difference in line width; and construct a three-dimensional model of the PCBA circuit based on the average difference in line width to obtain the three-dimensional model of the PCBA circuit; The overload damage probability estimation module is used to collect power transmission fluctuation test data of the PCBA circuit three-dimensional model based on the theoretical power consumption operating range of the PCBA circuit to obtain power transmission fluctuation test data; identify abnormal fluctuations in the power transmission fluctuation test data to obtain abnormal power transmission fluctuation data; and estimate the overload damage probability based on the abnormal power transmission fluctuation data to obtain power transmission overload damage probability data; The load level classification module is used to perform cascade impact analysis based on the power transmission overload damage probability data to obtain overload damage cascade impact data; based on the overload damage cascade impact data, the circuit limit load level is classified to obtain the circuit limit load level; The automated firmware design module is used to dynamically adapt test cases according to the circuit's extreme load level to obtain damage edge condition test adaptation cases; based on the damage edge condition test adaptation cases, the automated test firmware is designed to obtain damage automated test firmware, and the damage automated test firmware is sent to the terminal to perform PCBA automated testing.

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