Circuit defect detection method and system for printed circuit board

Through the improved Faster R-CNN model and wavelet transform preprocessing technology, the problems of poor noise immunity and low accuracy of the printed circuit board line detection system are solved, and high-precision and high-efficiency line defect detection are achieved.

CN120031832APending Publication Date: 2025-05-23HOHAI UNIV
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Patent Information

Application Number
CN202510108443.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-11-14
Filing Date
2025-01-23
Publication Date
2025-05-23

AI Technical Summary

Technical Problem

The existing printed circuit board line detection system has poor noise resistance, insufficient accuracy and efficiency, and cannot effectively solve the problem of low recognition accuracy due to appearance diversity, poor image quality and noise.

Method used

The improved Faster R-CNN model is adopted, and feature extraction is combined with Resnet and FSSD networks, and a CA attention module is added after the ROI pooling layer. At the same time, two-dimensional discrete wavelet decomposition and reconstruction are performed before image detection to reduce resolution influence and denoising.

Benefits of technology

It improves detection accuracy and speed, enhances the detection ability of small targets, improves the impact of image background interference, improves detection efficiency and accuracy, and effectively improves the accuracy of printed circuit board line defect detection.

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Abstract

The invention discloses a printed circuit board line defect detection method and system, and the method comprises the steps: inputting an obtained printed circuit board picture into a defect detection model, and obtaining a position mark of a line defect of a printed circuit board; the defect detection model is a Faster R-CNN model, Resnet and an FSSD network are used for feature extraction, and the FSSD network is connected between the two Resnet; and a CA attention module is connected behind the ROI pooling pooling layer. According to the method, the feature extraction network part and the ROI pooling layer of the Faster R-CNN are optimized, so that the detection speed and accuracy can be improved.
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Description

Technical Field

[0001] The invention relates to the technical field of automatic detection of printed circuit boards, in particular to a method and system for detecting defects in circuits of printed circuit boards. Background Art

[0002] Printed circuit boards are important carriers for connecting various electronic components and are one of the necessary basic components for the normal operation of electronic equipment. With the development of industrial information technology, printed circuit boards are widely used in various fields. Under this background, the requirements for the quality of printed circuit boards are getting higher and higher. Accurate detection of printed circuit board defects and solder joint defects is crucial to ensure product quality. However, the background of PCB defects itself is very complex. On the one hand, the wiring and soldering density are very high, and it is not easy to separate defects from the background. There are many types of defects, including common missing holes, mouse bites, open circuits, short circuits, bone spurs and fake copper. On the other hand, for small target objects, the accuracy requirements are very high. For precision electronic components such as PCBs, the accuracy of detection is very important.

[0003] Existing solutions have problems such as poor noise resistance, low accuracy and efficiency. With the rapid development of the semiconductor industry, the diversification of PCB appearance, and the particularity of the production environment, traditional PCB circuit detection systems and methods have poor noise resistance and insufficient generalization, and have gradually failed to meet actual needs. Therefore, there is an urgent need for a PCB surface circuit defect detection solution that can solve the problem of low recognition accuracy due to factors such as PCB appearance diversity, poor image quality, and high noise. Summary of the invention

[0004] Purpose of the invention: The purpose of the present invention is to provide a method and system for detecting defects in printed circuit boards with high detection accuracy.

[0005] Technical solution: The printed circuit board line defect detection method described in the present invention includes the following steps: obtaining a printed circuit board image, inputting it into a defect detection model, and obtaining a position mark of the line defect of the printed circuit board; the defect detection model is a Faster R-CNN model, in which Resnet and FSSD networks are used for feature extraction, and a FSSD network is connected between two Resnets; and a CA attention module is connected after the ROI pooling layer.

[0006] Furthermore, before the printed circuit board image is input into the defect detection model, the printed circuit board image is subjected to two-dimensional discrete wavelet decomposition and reconstruction.

[0007] Furthermore, the two-dimensional discrete wavelet decomposition and reconstruction of the printed circuit board image includes:

[0008] Perform one-dimensional discrete wavelet transform on each row of the printed circuit board image, and then perform one-dimensional discrete wavelet transform on each column to obtain the printed circuit board image transformation result, including the low-frequency component LL in the horizontal and vertical directions, the low-frequency component LH in the horizontal direction and the high-frequency component LH in the vertical direction, the high-frequency component HL in the horizontal direction and the low-frequency component HL in the vertical direction, and the high-frequency component HH in the horizontal and vertical directions of the printed circuit board image;

[0009] Perform one-dimensional discrete wavelet inverse transform on each column of the printed circuit board image transformation result, and then perform one-dimensional discrete wavelet inverse transform on each row to obtain a reconstructed printed circuit board image;

[0010] De-noising the reconstructed image of the printed circuit board to obtain a clear reconstructed image of the printed circuit board;

[0011] The clean reconstructed image of the PCB is fed into the defect detection model.

[0012] Furthermore, according to the position mark of the line defect of the printed circuit board, the corresponding printed circuit board is laser marked to obtain a printed circuit board with the line defect.

[0013] Furthermore, the loss function of the defect detection model is L(p,u,t u ,v)=L cls (p,u)+λ[u≥1]L loc (t u ,v);

[0014] Among them, L cls (p,u)=-logp u is the cross entropy loss, L loc is the loss between the classification target value and the quadruple of the detection box, calculated using smoothL1 loss; p is the discrete probability distribution of each candidate region output, u is the classification target value, v is the detection box regression target value, t u The Faster R-CNN output is the regression offset for each detection box in u categories, and λ is a parameter.

[0015] The printed circuit board line defect detection system of the present invention comprises:

[0016] An image acquisition unit, used to acquire an image of a printed circuit board;

[0017] The defect detection unit is used to input the printed circuit board image into the defect detection model to obtain the position mark of the line defect of the printed circuit board; the defect detection model is a Faster R-CNN model, in which Resnet and FSSD networks are used for feature extraction, and a FSSD network is connected between two Resnets; and a CA attention module is connected after the ROI pooling layer.

[0018] Furthermore, in the defect detection unit, before the printed circuit board image is input into the defect detection model, the printed circuit board image is subjected to two-dimensional discrete wavelet decomposition and reconstruction;

[0019] Perform one-dimensional discrete wavelet transform on each row of the printed circuit board image, and then perform one-dimensional discrete wavelet transform on each column to obtain the printed circuit board image transformation result, including the low-frequency component LL in the horizontal and vertical directions, the low-frequency component LH in the horizontal direction and the high-frequency component LH in the vertical direction, the high-frequency component HL in the horizontal direction and the low-frequency component HL in the vertical direction, and the high-frequency component HH in the horizontal and vertical directions of the printed circuit board image;

[0020] Perform one-dimensional discrete wavelet inverse transform on each column of the printed circuit board image transformation result, and then perform one-dimensional discrete wavelet inverse transform on each row to obtain a reconstructed printed circuit board image;

[0021] De-noising the reconstructed image of the printed circuit board to obtain a clear reconstructed image of the printed circuit board;

[0022] The clean reconstructed image of the PCB is fed into the defect detection model.

[0023] The printed circuit board line defect detection device of the present invention comprises an image acquisition device, a motion control system and a background operating system;

[0024] The image acquisition equipment includes an industrial camera, a light source, and an image acquisition card, which is used to capture images of printed circuit boards;

[0025] The motion control system includes a first motor for controlling the extension and retraction of a detection table, on which a printed circuit board to be detected is placed; a second motor for controlling the position of an image acquisition device; and a sensor for adjusting the speed of the first motor and the second motor according to the detection speed;

[0026] The background operating system is used to upload the collected printed circuit board images to the server, and perform detection according to the printed circuit board line defect detection method according to any one of claims 1-5.

[0027] The electronic device described in the present invention includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the computer program is loaded into the processor, the printed circuit board line defect detection method is implemented.

[0028] The computer-readable storage medium of the present invention stores a computer program, and when the computer program is executed by a processor, the printed circuit board line defect detection method is implemented.

[0029] Beneficial effects: Compared with the prior art, the advantages of the present invention are: (1) The improved Faster R-CNN model used in the present invention has the characteristics of high detection accuracy, fast speed and good detection effect on small targets. Through the special RPN network in its network structure, the influence of image background interference can be better improved, and the convolution operation is optimized, thereby improving the detection efficiency and accuracy, thereby better realizing the detection of printed circuit defects of PCB boards; (2) The present invention can reduce the influence of resolution on detection accuracy by introducing wavelet transform for image preprocessing before image detection. At the same time, wavelet transform has good denoising processing ability, and preprocessing can effectively improve the accuracy of subsequent detection; (3) The present invention improves the detection speed and accuracy by optimizing the feature extraction network part of Faster R-CNN, using an improved feature fusion algorithm, and adopting a light and lightweight feature fusion module; (4) The present invention adds an attention mechanism after the ROIpooling pooling layer of the improved Faster R-CNN model to emphasize the important feature channels in different RoIs, so that the network pays more attention to the target to be detected, so as to achieve the purpose of improving the detection effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 This is a structural diagram of the improved Faster R-CNN defect detection model of the present invention;

[0031] Figure 2 It is a complete structural diagram of ResNet and FPN of the present invention;

[0032] Figure 3 is a structural diagram of the FSSD of the present invention;

[0033] Figure 4 A schematic diagram of a fixed reference frame with different scales and aspect ratios of anchors in an embodiment of the present invention;

[0034] Figure 5 The RPN split flow chart of the present invention;

[0035] Figure 6 It is the flow chart of ROI pooling layer of the present invention;

[0036] Figure 7 This is the structural diagram of the CA attention mechanism of the present invention;

[0037] Figure 8 It is the Classification and Regression classification regression network structure diagram of the present invention;

[0038] Fig. 9 It is a pretreatment flow chart of the present invention. DETAILED DESCRIPTION

[0039] The technical solution of the present invention is further described below in conjunction with the accompanying drawings.

[0040] The printed circuit board line defect detection method comprises the following steps.

[0041] Step 1: Establish an improved Faster R-CNN defect detection model, introduce the FSSD network into Faster R-CNN to extract input image features, and achieve local optimization of Faster R-CNN; introduce the CA attention mechanism into the Faster R-CNN neural network model.

[0042] Step 2, training the improved Faster R-CNN defect detection model; obtaining multiple groups of printed circuit board images, removing blurred photos, and dividing the printed circuit board defect detection data set into a printed circuit board defect detection training set and a printed circuit board defect detection test set by these images at a ratio of 8:2; first using the training set to build an improved Faster R-CNN model, and perform iterative training to obtain a PCB board circuit printing defect detection model, and use the printed circuit board defect test set to verify the model accuracy, and save the improved Faster R-CNN defect detection model that meets the accuracy requirements.

[0043] Step 3: Use image acquisition equipment to obtain the image of the printed circuit board to be inspected, and perform preprocessing using wavelet transform.

[0044] Step 4: Use the trained defect detection model to detect the preprocessed images, output the defective images during the detection process to the display, and laser mark the corresponding PCB boards according to the image position information.

[0045] Step 5: Find the corresponding PCB board according to the laser marking.

[0046] In step 1, the improved Faster R-CNN model is divided into four modules, including Conv layers network, Region proposal Network network, ROI pooling layer and Classification and Regression classification regression, such as Figure 1 shown.

[0047] ① Conv layers feature extraction network: The traditional Faster R-CNN uses the ResNet+FPN structure to extract features. The traditional Faster R-CNN only needs to input one feature map into the subsequent network. Due to the addition of the FPN structure, multiple feature maps need to be sent to the subsequent network one by one for processing. Resnet performs feature extraction, and the subsequent FPN structure allows the feature map of the current layer to be integrated with the features of the future layer for upsampling and utilization. Because of such a structure, the current feature map can obtain the information of the future layer, which means that the low-order features and high-order features are organically integrated to improve the detection accuracy.

[0048] The complete structure of ResNet and FPN is as follows Figure 2 As shown in the figure, after Resnet performs feature extraction and the FPN network performs feature fusion to obtain multiple feature maps, the feature map input to the RPN network is [p2, p3, p4, p5, p6], and the input to the subsequent target detection network Faster R-CNN is [p2, p3, p4, p5].

[0049] The present invention introduces the FSSD network in the feature extraction network part to replace the FPN network for feature extraction. Figure 3 This is the structural diagram of FSSD, in which the feature fusion module can project and splice features of different scales, then use the batch normalization layer to normalize the feature values, and then add some downsampling blocks to generate a new feature pyramid, which is fed back to the multi-box detector to generate the final detection result to make full use of the features. Its fusion feature module can be described as:

[0050]

[0051]

[0052] Explain the meaning of the letters in the formula: is the source feature map to be fused, represents the transformation function before concatenation of each source feature map, φ f represents the feature fusion function, φ p Represents the function for generating feature pyramid, φ c,lRepresents a method for predicting targets from a provided feature pyramid. Represents the range of the layer that should be fused, loc (location) represents the positioning information, usually the position and size of the bounding box, and class (classification) represents the classification information, usually the probability distribution of the category to which each detected target belongs.

[0053] ②Region proposal network: Classic detection methods are very time-consuming to generate detection frames, such as using sliding windows to generate detection frames in Overfeat, or using selective search methods to generate detection frames in R-CNN. Faster R-CNN abandons the traditional sliding window and selective search methods and directly uses RPN to generate candidate regions, which can greatly improve the detection speed. This module can determine whether the anchor is foreground or background based on the region of interest, which can effectively distinguish defects on the circuit board from the background and improve the detection accuracy.

[0054] The main process of the RPN network is:

[0055] 1) Generate a series of fixed reference frame anchors, covering any position of the image, and then send them to the subsequent network for classification and regression;

[0056] 2) Classification branch: Use softmax classification to determine whether the anchor contains the target;

[0057] 3) Regression branch: calculate the offset of the target box to the anchors to obtain accurate candidate regions;

[0058] 4) The final Proposal layer is responsible for obtaining candidate regions by integrating the anchors containing the target and the corresponding bbox regression offset, while eliminating candidate regions that are too small or beyond the boundary.

[0059] Furthermore, the anchors represent fixed reference frames in target detection, first as Figure 4 A set of fixed reference frames of different scales and aspect ratios are preset to cover almost all positions. Each reference frame is responsible for detecting targets whose intersection-over-union ratio is greater than a threshold (preset training value, usually 0.5 or 0.7). The anchor technology converts the candidate region generation problem into "is there a target in this fixed reference frame, and how far the target frame deviates from the reference frame?" There is no need to traverse the sliding window at multiple scales, which truly achieves good and fast results.

[0060] In the original Faster R-CNN, due to the FPN network, anchors are generated in multiple feature maps of different scales. Assuming that the size of a feature map is h*w, the stride of the downsampling multiple of this feature relative to the input image is first calculated:

[0061]

[0062] Anchors of different ratios are generated on each scale feature map: After obtaining a series of anchors, they can be sent to the subsequent network for classification and regression.

[0063] The FSSD network introduced in the present invention can fuse features of different scales, generate a new feature pyramid through some downsampling blocks, and then perform anchor operations on different scales, which can improve the detection speed while ensuring accuracy.

[0064] The RPN classification process is as follows Figure 5 As shown in the figure: After a matrix of size M*N is sent to the Faster-RCNN network, it is extracted through Conv layers and converted into a feature map of size H*W in the RPN network. After that, a 1*1 convolution is performed to obtain a feature map of size [batchsize, H, W, 18]. Then, a deformation is performed to convert the feature map into a feature map of size [batchsize, 9*H, W, 2]. After that, it is sent to the softmax for classification. After obtaining the classification result, the reshape is performed again to finally obtain a result of size [batchsize, H, W, 18]. 18 represents the probability value of whether k=9 anchors contain the target.

[0065] The RPN regression part outputs a feature map of [1, H, W, 4*9] after convolution, which is equivalent to each point of featuremaps having 9 anchors, and each anchor has 4 transformations for regression:

[0066] [d x (A),d y (A),d w (A),d h (A)] (5)

[0067] This transformation predicts the translation and scale factor between the anchor and the true value:

[0068]

[0069] t h =log(h / h a ) (9)

[0070] The Proposal layer is responsible for integrating the results of the RPN network on the classification and regression of anchors, using the regression results to modify the anchors containing the target, calculate the candidate region, and send it to the subsequent ROI pooling layer. The processing flow of the Proposal layer is as follows:

[0071] 1) Use the results of RPN network regression to correct all anchors and obtain the corrected detection frame;

[0072] 2) Sort the detection boxes from large to small according to the probability values ​​of the softmax output of the RPN network classification, and extract the first 6000 results, that is, extract the detection boxes after the corrected position;

[0073] 3) The detection box that exceeds the image boundary is limited to the image boundary to prevent the candidate area from exceeding the image boundary during subsequent roi pooling;

[0074] 4) Perform non-maximum suppression (NMS) on the remaining detection boxes;

[0075] 5) The output of the proposal layer is the normalized coordinate value [x1, y1, x2, y2] corresponding to the scale of the input network image.

[0076] ③ROI pooling layer: The ROI pooling layer is responsible for collecting candidate regions generated by the RPN network, mapping them to feature maps and fixing the dimensions, and sending them to the subsequent network for classification and regression. The process is as follows Figure 6 As shown, the ROIpooling pooling layer uses maximum pooling to convert the features in any valid ROI region into a small feature map with a fixed spatial range of pool_H×pool_W, where pool_H and pool_W are hyperparameters, such as set to 7*7, which are independent of any specific ROI. In the implementation process, the previous FSSD network produces multiple scale feature maps. Here, ROIs of different scales use different feature layers as the input of the ROI pooling pooling layer. Large-scale ROIs use the later pyramid layers, such as P5; small-scale ROIs use the earlier feature layers, such as P3. The feature layer where the ROI is located is determined using the following formula:

[0077]

[0078] Among them, 224 is the standard input of ImageNet, k 0 is the base value, set to 4, w and h are the length and width of the ROI area, assuming the ROI is 112*112 in size, then k=k 0-1=4-1=3, which means that the ROI should use the P3 feature layer. The k value will be rounded to prevent the result from being an integer, and truncation will be performed to ensure that the k value is between 2 and 5. The output result is: each candidate region is fixed to a size of 7*7.

[0079] CA attention mechanism implementation, such as Figure 7 As shown, it can be considered as two parallel stages. Specifically, the input feature map Input with a size of C*H*W is pooled in the X and Y directions respectively, and the feature maps with sizes of C*H*1 and C*1*W are obtained respectively.

[0080] The output of the cth channel at height h can be expressed as:

[0081]

[0082] The output of the cth channel at width w can be expressed as:

[0083]

[0084] The above two transformations aggregate features along two spatial directions respectively, resulting in a pair of direction-aware feature maps. This is very different from the compression operation that produces a single feature vector in the channel attention method. These two transformations also enable the attention module to capture long-range dependencies along one spatial direction and retain precise location information along another spatial direction, thereby helping the network to more accurately locate objects of interest.

[0085] Next, the feature maps obtained by formula (11) and formula (12) are concatenated and sent to a shared 1*1 convolution transformation function F1, resulting in:

[0086] f=δ(F1(z h ,z w )) (13)

[0087] Among them, [z h ,z w ] represents the connection operation along the spatial dimension, δ is the nonlinear activation function, and formula (14) is the intermediate feature map, which encodes spatial information in the horizontal and vertical directions. r is the reduction ratio of the control block size.

[0088] f∈R C / r×(H+W) (14)

[0089] Then, we split f into two separate tensors along the spatial dimension:

[0090] f h ∈R C / r×H (15)

[0091] f w ∈R C / r×W (16)

[0092] Use two 1*1 convolution operations to increase the dimension of f h and f w Convert it to a tensor with the same number of channels as the input, and then combine it with the sigmoid activation function (σ) to get:

[0093] g h =σ(F h (f h )) (17)

[0094] g w =σ(F w (*f w )) (18)

[0095] Finally: The output formula of Coordinate Attention can be written as:

[0096]

[0097] The present invention adds an attention mechanism after the RoI pooling layer of the improved Faster R-CNN model to emphasize the important feature channels in different RoIs, so that the network pays more attention to the target to be detected, so as to achieve the purpose of improving the detection effect.

[0098] ④Classification and Regression: This part uses the feature map of the candidate area to calculate the defect category of each candidate area through the fully connected layer and softmax, and outputs the probability value; at the same time, the regression method is used again to obtain the position offset of each candidate area for regressing a more accurate target detection frame. The network structure of this part is as follows Figure 8 After obtaining the fixed-size feature map from the ROI pooling layer, it is sent to the subsequent network to classify the candidate regions through full connection and softmax and regress the candidate regions again to obtain a higher-precision detection frame.

[0099] In step 2, the training of Faster R-CNN is divided into two parts, namely the training of the RPN network and the detection network Faster R-CNN. The entire training process is divided into four steps:

[0100] Step 1: Training of the RPN network, initialized using the ImageNet pre-trained model, and end-to-end fine-tuning for the region proposal task.

[0101] Step 2: Using the proposal boxes generated by the RPN in the first step, Faster R-CNN trains a separate detection network. This detection network is also initialized by the ImageNet pre-trained model. At this time, the two networks do not share convolutional layers.

[0102] Step 3: Initialize RPN training with the detection network, but fix the shared convolutional layers and only fine-tune the RPN-specific layers. Now the two networks share the convolutional layers.

[0103] Step 4: Keep the shared convolutional layers fixed and fine-tune the fc layer of Faster R-CNN. In this way, the two networks share the same convolutional layers and form a unified network.

[0104] Furthermore, the training of the RPN network is: initialized using the ImageNet pre-trained model and end-to-end fine-tuned for the region proposal task. The role of the RPN network is to extract candidate regions that contain the target and are regressed from a large number of anchors. In order to train the RPN, each anchor is assigned a label of whether it contains the target, that is, a label of positive and negative samples, and then trained.

[0105] The positive and negative sample labeling process is as follows: the anchor whose IOU with the real box ground truth (GT) is greater than 0.7 is a positive sample, that is, the anchor contains the target, and the target value is set to 1; the anchor whose IOU with the real box ground truth (GT) is less than 0.3 is a negative sample, that is, the anchor does not contain the target, and the target value is set to -1;

[0106] Other anchors are discarded and do not participate in network training, and their target values ​​are set to 0.

[0107] The loss function of the RPN network is:

[0108]

[0109] Where i represents the index of the anchor, p i is the probability that the i-th anchor is predicted as the target, is the ground-truth label. If the anchor is positive, the ground-truth label is 1, otherwise it is 0. That is, when the IoU between the ith anchor and the GT is greater than 0.7, the anchor is considered to be positive and the label is 1; otherwise, when IoU is less than 0.3, the anchor is considered to be negative and the label is 0. iRepresents the four parameterized prediction results of the positive sample anchor to the bounding box of the prediction area. is the offset of the ground-truth box corresponding to this positive anchor, as shown below:

[0110] Predicted value:

[0111]

[0112] True value:

[0113]

[0114] Where x, y, w, and h represent the center coordinates of the window and the width and height of the window. a and x * They represent the coordinates of the prediction window, anchor window, and Ground Truth respectively (same for y, w, and h).

[0115] The entire loss is divided into two parts: classification and regression losses

[0116] L cls The classification loss is the softmax loss of a binary classifier:

[0117]

[0118] L reg is the regression loss, which is the smooth(x) loss, and only positive samples participate in the regression loss calculation:

[0119]

[0120] N cls and N reg They are used to standardize the classification loss term L cls and the regression loss term L reg , the default batch size is set to N cls , initialize N with the number of anchor positions ~2000 reg . N cls and N reg If the difference is too large, the parameter λ is used to balance the two, and the general value is N cls and N reg A ratio of g of 10 is sufficient.

[0121] During training, the positive and negative samples of each iteration are composed of the positive and negative samples of an image: 256 anchors are randomly sampled and the loss function is calculated, where the ratio of sampled positive and negative anchors is 1:1; all new layers (layers after the last convolutional layer) are randomly initialized by weights obtained from a Gaussian distribution with zero mean and standard deviation of 0.01, and all other layers (i.e., shared convolutional layers) are initialized by models pre-trained for ImageNet classification; the network is trained using the stochastic gradient descent algorithm with momentum.

[0122] Training of Faster R-CNN network: Use the candidate regions collected by the RPN network and the features extracted by the imageNet pre-trained convolutional network to train the detection Faster R-CNN network.

[0123] The positive and negative sample labeling process is as follows: the candidate area whose IOU with the true box ground truth (GT) is greater than 0.5 is set as a positive sample, and the target value of the category is the category of GT; the candidate area whose IOU with the true box ground truth (GT) is less than 0.5 is set as a negative sample, and the target value of the category is 0.

[0124] The loss function of Faster R-CNN is:

[0125] The output of Faster R-CNN consists of two parts: one is the softmax layer for classification, with k output categories plus the "background" category, and the other is the boundingbox regressor. That is:

[0126] A part of the output is a discrete probability distribution over k+1 categories (each candidate region), p = (p 0 ,p 1 ,...,p k ). Usually, the probability value is calculated by Softmax on the k+1 outputs of the fully connected layer.

[0127] The other part outputs the regression offset for each detection box in the k categories, where t k Specify a scale-invariant transformation and log-space height / width shift relative to the proposal box, the same as in the RPN network.

[0128] Each candidate region for training is labeled with a classification target value u and a bounding box regression target value v. Background samples are represented by u = 0, and a multi-task loss L is used for each labeled candidate region to jointly train classification and bounding box regression:

[0129] L(p,u,t u ,v)=Lcls (p,u)+λ[u≥1]L loc (t u ,v) (25)

[0130] Where L cls (pu)=-logp u , represents the cross entropy loss, and the second loss L loc It is the loss between the four-tuple that defines the target value and the predicted detection box. It is calculated using the smoothL1 loss. Similarly, only the candidate regions of the positive samples (non-background) are used to calculate the regression loss. The parameter λ is set to 1, and t u Output the regression offset of each detection box in u categories for Faster R-CNN.

[0131] Faster R-CNN training obtains positive and negative samples in each image: all positive samples are sorted according to the IOU value, the first 256 regions of each image are taken, and the coordinates of these regions are saved as training samples for the image; the weights of the fully connected layers used for Softmax classification and detection box regression are initialized using zero-mean Gaussian distributions with variances 0.01 and 0.001, respectively, and the bias is initialized to 0. The feature extraction network uses the ImageNet pre-trained network; the gradient descent algorithm is used for optimization.

[0132] In step 3, the preprocessing process is as follows Fig. 9 As shown, it includes two-dimensional discrete wavelet decomposition and reconstruction of the image. The decomposition process can be described as: first, 1D-DWT (one-dimensional discrete wavelet transform) is performed on each row of the image to obtain the low-frequency component L and high-frequency component H of the original image in the horizontal direction, and then 1D-DWT is performed on each column of the transformed data to obtain the low-frequency component LL in the horizontal and vertical directions, the low-frequency component LH in the horizontal direction and the high-frequency component LH in the vertical direction, the high-frequency component HL in the horizontal direction and the low-frequency component HL in the vertical direction, and the high-frequency component HH in the horizontal and vertical directions of the original image.

[0133] The reconstruction process can be described as: first, perform a one-dimensional discrete wavelet inverse transform on each column of the transformed result, and then perform a one-dimensional discrete wavelet inverse transform on each row of the transformed data to obtain the reconstructed image. From the above process, it can be seen that the wavelet decomposition of the image is a process of separating the signal into low frequency and directed high frequency. During the decomposition process, the obtained LL component can be further decomposed by wavelet as needed until the requirements are met.

[0134] In wavelet transform, the wavelet function corrects the difference between the scale function representation and the original signal, denoises the image, and obtains a clear image; the scale function is defined as:

[0135]

[0136] The printed circuit board line defect detection system of the present invention comprises:

[0137] An image acquisition unit, used to acquire an image of a printed circuit board;

[0138] The defect detection unit is used to input the printed circuit board image into the defect detection model to obtain the position mark of the line defect of the printed circuit board; the defect detection model is a Faster R-CNN model, in which Resnet and FSSD networks are used for feature extraction, and a FSSD network is connected between two Resnets; and a CA attention module is connected after the ROI pooling layer.

[0139] The printed circuit board line defect detection device of the present invention comprises an image acquisition device, a motion control system and a background operating system;

[0140] The image acquisition equipment includes an industrial camera, a light source, and an image acquisition card, which is used to capture images of printed circuit boards;

[0141] The motion control system includes a first motor for controlling the extension and retraction of a detection table, on which a printed circuit board to be detected is placed; a second motor for controlling the position of an image acquisition device; and a sensor for adjusting the speed of the first motor and the second motor according to the detection speed; the first motor and the second motor of this embodiment are a servo motor and a stepper motor respectively;

[0142] The background operating system is used to upload the collected printed circuit board images to the server and perform detection according to the printed circuit board line defect detection method.

[0143] The electronic device described in the present invention includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the computer program is loaded into the processor, the printed circuit board line defect detection method is implemented.

[0144] The computer-readable storage medium of the present invention stores a computer program, and when the computer program is executed by a processor, the printed circuit board line defect detection method is implemented.

[0145] The computer-readable storage medium may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage devices, magnetic disk storage devices or other magnetic storage devices, flash memory or any other medium that can be used to store program codes in the form of instructions or data structures and can be accessed by a computer. The processor is used to execute the computer program stored in the memory to implement the various steps in the method involved in the above embodiments.

Claims

1. A method for detecting defects in a printed circuit board, characterized in that: The method comprises the following steps: obtaining a printed circuit board image, inputting the image into a defect detection model, and obtaining position marks of line defects of the printed circuit board; the defect detection model is a FasterR-CNN model, in which Resnet and FSSD networks are used for feature extraction, and a FSSD network is connected between two Resnets; and a CA attention module is connected after the ROIpooling pooling layer.

2. The printed circuit board line defect detection method according to claim 1, characterized in that: Before the printed circuit board image is input into the defect detection model, the printed circuit board image is subjected to two-dimensional discrete wavelet decomposition and reconstruction.

3. The printed circuit board line defect detection method according to claim 1, characterized in that: The two-dimensional discrete wavelet decomposition and reconstruction of the printed circuit board image comprises: Perform one-dimensional discrete wavelet transform on each row of the printed circuit board image, and then perform one-dimensional discrete wavelet transform on each column to obtain the printed circuit board image transformation result, including the low-frequency component LL in the horizontal and vertical directions, the low-frequency component LH in the horizontal direction and the high-frequency component LH in the vertical direction, the high-frequency component HL in the horizontal direction and the low-frequency component HL in the vertical direction, and the high-frequency component HH in the horizontal and vertical directions of the printed circuit board image; Perform one-dimensional discrete wavelet inverse transform on each column of the printed circuit board image transformation result, and then perform one-dimensional discrete wavelet inverse transform on each row to obtain a reconstructed printed circuit board image; De-noising the reconstructed image of the printed circuit board to obtain a clear reconstructed image of the printed circuit board; The clean reconstructed image of the PCB is fed into the defect detection model.

4. The printed circuit board line defect detection method according to claim 1, characterized in that: According to the position mark of the line defect of the printed circuit board, the corresponding printed circuit board is laser marked to obtain a printed circuit board with line defects.

5. The printed circuit board line defect detection method according to claim 1, characterized in that: The loss function of the defect detection model is L(p,u,t u ,v)=L cls (p,u)+λ[u≥1]L loc (t u ,v); Among them, L cls (p,u)=-logp u is the cross entropy loss, L loc is the loss between the classification target value and the quadruple of the detection box, calculated using smoothL1 loss; p is the discrete probability distribution of each candidate region output, u is the classification target value, v is the detection box regression target value, t u is the detection box regression offset and λ is the parameter.

6. A printed circuit board line defect detection system, characterized in that: include: An image acquisition unit, used to acquire an image of a printed circuit board; The defect detection unit is used to input the printed circuit board image into the defect detection model to obtain the position mark of the line defect of the printed circuit board; the defect detection model is a FasterR-CNN model, in which Resnet and FSSD networks are used for feature extraction, and a FSSD network is connected between two Resnets; a CA attention module is connected after the ROIpooling pooling layer.

7. The printed circuit board line defect detection system according to claim 6, characterized in that: In the defect detection unit, before the printed circuit board image is input into the defect detection model, the printed circuit board image is subjected to two-dimensional discrete wavelet decomposition and reconstruction; Perform one-dimensional discrete wavelet transform on each row of the printed circuit board image, and then perform one-dimensional discrete wavelet transform on each column to obtain the printed circuit board image transformation result, including the low-frequency component LL in the horizontal and vertical directions, the low-frequency component LH in the horizontal direction and the high-frequency component LH in the vertical direction, the high-frequency component HL in the horizontal direction and the low-frequency component HL in the vertical direction, and the high-frequency component HH in the horizontal and vertical directions of the printed circuit board image; Perform one-dimensional discrete wavelet inverse transform on each column of the printed circuit board image transformation result, and then perform one-dimensional discrete wavelet inverse transform on each row to obtain a reconstructed printed circuit board image; De-noising the reconstructed image of the printed circuit board to obtain a clear reconstructed image of the printed circuit board; The clean reconstructed image of the PCB is fed into the defect detection model.

8. A printed circuit board line defect detection device, characterized in that: Including image acquisition equipment, motion control system and background operating system; The image acquisition equipment includes an industrial camera, a light source, and an image acquisition card, which is used to capture images of printed circuit boards; The motion control system includes a first motor for controlling the extension and retraction of a detection table, on which a printed circuit board to be detected is placed; a second motor for controlling the position of an image acquisition device; and a sensor for adjusting the speed of the first motor and the second motor according to the detection speed; The background operating system is used to upload the collected printed circuit board images to the server, and perform detection according to the printed circuit board line defect detection method according to any one of claims 1-5.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the computer program is loaded into a processor, the printed circuit board line defect detection method according to any one of claims 1 to 5 is implemented.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the printed circuit board line defect detection method according to any one of claims 1 to 5 is implemented.