Method for manufacturing buried resistor circuit board with blind holes crossed for four times on same-layer core board

Abstract

A manufacturing method of a buried resistor circuit board with blind holes crossed for four times on a core board on the same layer comprises the following steps: cutting: cutting L1 to L16 according to size requirements; manufacturing L15-L16: drilling blind holes VIA 15 #, VIA 16 #, carrying out plasma treatment, carrying out PTH-plate power, carrying out circuit / etching, manufacturing buried resistance blocks, and carrying out browning; manufacturing L13-L16: pressing the L13-L16, drilling a blind hole VIA13 #, drilling a blind hole VIA16 #, carrying out plasma treatment, carrying out PTHs, carrying out plate power supply, plugging the hole with resin, and reducing copper; manufacturing L07-L16: carrying out circuit / etching on L13, L12, L11, L10, L9 and L8, browning, pressing the L7-L16, drilling blind holes VIA 7 #-VIA 16 #, carrying out plasma treatment, carrying out PTH-plate power, plugging the holes with resin, reducing copper, and carrying out circuit / etching on L7, L6 and L5; etching lines L7, L6 and L5, etching inner layer lines, browning, laminating L3-L4 and L5-L6, drilling buried holes VIA3 #-VIA6 #, plasma treatment, PTHs / board electricity, and plugging the holes with resin; etching the L3-L6 layers of the circuit; browning / pressing the L1 to L16 layers; drilling holes VIA1 #, VIA3 # and VIA4 #, and through holes VIA8 #. According to the manufacturing method, the back drilling machining mode and the blind hole machining mode are correlated, the machining technical difficulty of the two modes is lowered, the technological process is reduced, and finally the crossed blind holes are manufactured.

Description

Technical Field

[0001] The invention relates to the technical field of circuit board manufacturing, in particular to a manufacturing method of a buried blocking circuit board with four cross blind holes on the same core board. Background Art

[0002] In the electronics industry, circuit boards have become an indispensable component. In some high-end circuit boards, cross blind holes are often opened to improve the integration and utilization of circuit boards. Cross blind holes refer to a circuit board where the inner core board of the same level has no less than two blind holes of different orders intersecting with it. The design of cross blind holes can increase soldering density, reduce wiring, save space, and reduce weight and cost.

[0003] In the PCB industry, the processing method for blind hole circuit boards generally adopts laser drilling followed by copper deposition and electroplating, and the blind holes are filled with electroplating. However, for cross blind hole boards, laser drilling and electroplating filling are difficult to achieve, especially when the blind hole thickness-to-diameter ratio is greater than 1:1. Electroplating filling will cause quality problems such as insufficient exchange of liquid or bubbles leading to core filling, incomplete bottoming of the hole, open hole, and insufficient copper in the hole. The smaller the diameter of the metalized blind hole, the greater the depth, and the more orders, the more difficult it is to process and achieve. Summary of the invention

[0004] In view of this, the present invention provides a method for manufacturing a buried blocking circuit board with four cross blind holes on the same core board layer, which can solve the above-mentioned technical problems.

[0005] A method for manufacturing a buried blocking circuit board with four cross blind holes in the same core board, wherein the total thickness of the buried blocking circuit board is greater than 3.7 mm, the thickness of the core board is at least 0.254 mm and there are 7 sheets, the thickest is at most 0.762 mm and there is 1 sheet, the thickness of each PP sheet is 0.1 mm, the depth of any first-order blind hole is at least 0.254 mm, and the thickness-to-diameter ratio is at least 1.7:1. The manufacturing method comprises the following steps: STEP 101: cutting the material, cutting L1 to L16 according to the size requirements; STEP102: Make L15-L16: Drill blind vias VIA15#-VIA16#--plasma--PTH--board electricity--circuit / etching--buried resistor production--browning; STEP103: Make L13-L16: Press L13-L16-drill blind holes VIA13#-VIA16#----Plasma--PTH--Board electricity--Resin plug--Reduce copper; STEP104: Make L07-L16: Circuit / etch L13, L12, L11, L10, L9, L8--browning--press L7-L16-drill blind vias VIA7#-VIA16#----plasma--PTH--board electricity--resin plug--reduce copper--circuit / etch L7, L6, L5; STEP105: For L7, L6, L5 lines / etching--inner layer lines / etching--browning--pressing L3-L4 and L5-L6--drilling buried holes VIA3#-VIA6#--plasma--PTH / board electricity--resin plugging holes; STEP106: Circuit etching L3-L6 layers--browning / pressing L1 to L16 layers--drilling VIA1#, VIA3#, VIA4#, through hole VIA8#--plasma--PTH--board electricity--resin plugging--copper reduction--back drilling VIA1#, VIA3#, VIA4# holes--resin plugging--plasma--PTH / board electricity--circuit--graphic plating--nickel gold plating--etching L1 and L16--AOI--solder mask--text--testing--molding--final inspection.

[0006] Further, in step STEP106, it is used to prepare a buried hole, that is, to prepare a buried barrier layer, and the method for preparing the buried barrier layer is as follows: STEP201: Pre-cast two fake boards, the bottom copper and the bottom copper of the buried resistance layer are consistent. Before making the buried resistance layer circuit, measure the surface copper thickness, select the etching speed according to the surface copper thickness, and etch the prepared fake board. After the line width of the fake board is qualified, etch the real board first board according to the etching speed of the fake board + 0.8m / min. When etching, the circuit surface is facing down, and the board is dragged through the machine; STEP202: Turn off the "sub-liquid washing" tank before etching, etch first and then strip the film. When etching and stripping the film, place the resistor circuit face up, and put thick edge strips on both sides of the board to pass through the machine together to avoid scratching the resistor film; STEP203: Use a fake board to confirm the etching speed; measure the resistance length, and no over-etching is allowed; the fake board allows the residual burrs on both sides to be 0.5mil in total.

[0007] Furthermore, in step STEP201, the line width tolerance is controlled at ±0.5mil, and the size of the 100Ω resistor: length 40mil × width 40mil is adjusted to length 40.mil × width 44.mil; the resistance control range after etching is 90Ω-105Ω, if the resistance value is too large, adjust the etching speed or line width; if the resistance value is too small, use laser equipment to adjust the resistance to ensure that the finished product resistance is 90Ω-110Ω.

[0008] Furthermore, in steps STEP103, 104, and 105, the pressing method includes: (1)VIA5# blind vias are made by the “press-fit self-filling method”, without the need to add a resin plugging process; (2) Except for the VIA5# blind via, other blind and buried vias are first plugged and then pressed together, and the "pressing and self-filling method" is not used for production.

[0009] Furthermore, during pressing, the heating rate is controlled at 2.0+ / -0.5℃ / min, the maximum pressure is 360PSI, the maximum material temperature is 180-185℃, full pressing is set for 15-20min, and heat and pressure are maintained for 60-90min.

[0010] Furthermore, in step STEP 106, the back drilling method and parameters are: (1) Make an isolation ring in the back-drilling layer in advance; (2) The back drilling STUB is controlled at 0.1-0.2mm; (3) Set different orders of back-drilled test holes on the edge of the board in advance. The hole diameter should be consistent with the back-drilled hole diameter. Drill the edge of the board and slice it for confirmation before production. After it passes the test, make the first piece in the board to reduce test scrap.

[0011] Compared with the prior art, in the method for making a buried resistor circuit board provided by the present invention, the number of back drilling times can be reduced by making blind holes in layers, avoiding back drilling to lines that cannot be avoided, and ensuring that the copper thickness of the VIA blind holes meets the requirements. At the same time, by optimizing to four times of pressing, on the one hand, the production of VIA2# buried holes can be realized, and on the other hand, it is convenient to make blind holes in each layer, solving technical problems such as blind hole copper plating core, copper plating and base copper not contacting, thin / uneven copper, and depression. In addition, by selectively back drilling three times, that is, by the mutual association of the back drilling processing method and the blind hole processing method, not only the influence of the thickness-to-diameter ratio is reduced by multiple blind drillings, but also by selecting three blind and three back drillings as complementary combinations, the difficulty of the processing technology of the two is reduced and the process flow is reduced, and finally the production of cross blind holes is realized. DETAILED DESCRIPTION

[0012] The specific embodiments of the present invention are further described in detail below. It should be understood that the description of the embodiments of the present invention herein is not intended to limit the protection scope of the present invention.

[0013] In the invention, a buried resistor circuit board is prepared with at least 8 core boards, which will have at least 7 PP layers pressed together with the 8 core boards. The total thickness of the buried resistor circuit board is 3.7mm, the thinnest thickness of each core board (excluding copper) is at least 0.254mm and there are 7 sheets, the thickest thickness is 0.762mm and there is 1 sheet, the thickness of each PP sheet is 0.1mm, the depth of any first-order VIA blind hole is at least 0.254mm, and the maximum is 2.94mm), so the thickness-to-diameter ratio is at least 1.7:1 and the maximum is 19.6:1.

[0014] As we all know, there are two methods for processing blind holes. One is the traditional laser drilling of blind holes combined with electroplating filling process, and the other is to directly use the existing back drilling process. The depth processing capability of laser blind holes is 0.2mm, and the thickness-to-diameter ratio is ≤1:1. Therefore, the thickness-to-diameter ratio of the buried resistor circuit board theoretically exceeds the depth processing capability of laser blind holes and cannot be realized. At the same time, for layers L3 to L6, they are buried hole layers, and the process of combining laser drilling with copper plating cannot be used.

[0015] The existing back drilling process also has the following objective problems: (1) Since the multiple blind holes of the buried circuit board are very likely to correspond to the hexagonal PAD set on the outer layer of L1, and there may also be a hole between the pattern and the substrate, directly using back drilling will drill through the PAD.

[0016] (2) Since the buried resistor circuit board has up to 7 levels of cross blind buried vias, such as hole 2, which has corresponding L1-L3 and L6-L16 routing, direct back drilling will drill into the L8 layer wire and the L15 layer large copper foil, resulting in open circuit failure.

[0017] The present invention provides a method for manufacturing a buried blocking circuit board with four cross blind holes on the same core board, which comprises the following steps: STEP101: Cut the material into L1 to L16 according to the size requirements; STEP102: Make L15-L16: Drill blind vias VIA15#-VIA16#--plasma--PTH--board electricity--circuit / etching--buried resistor production--browning; STEP103: Make L13-L16: Press L13-L16-Drill blind holes VIA13#-VIA16#----Plasma--PTH--Board electricity--Resin plug--Reduce copper; STEP104: Make L07-L16: Circuit / etch L13, L12, L11, L10, L9, L8--browning--press L7-L16-drill blind vias VIA7#-VIA16#----plasma--PTH--board electricity--resin plug--reduce copper--circuit / etch L7, L6, L5; STEP105: For L7, L6, L5 lines / etching--inner layer lines / etching--browning--pressing L3-L4 and L5-L6--drilling buried holes VIA3#-VIA6#--plasma--PTH / board electricity--resin plugging holes; STEP106: Circuit etching L3-L6 layers--browning / pressing L1 to L16 layers--drilling VIA1#, VIA3#, VIA4#, through hole VIA8#--plasma--PTH--board electricity--resin plugging--copper reduction--back drilling VIA1#, VIA3#, VIA4# holes--resin plugging--plasma--PTH / board electricity--circuit--graphic plating--nickel gold plating--etching L1 and L16--AOI--solder mask--text--testing--molding--final inspection.

[0018] In step STEP101, the product can use Taikangli TSM-DS3 microwave material and buried resistance material with a specification of 100Ω, and the PP layer can use Taikangli FR-28. The designed holes include sixth-order blind holes, first-order buried holes, and metallized through holes, among which there are fourth-order cross blind buried holes. The minimum hole diameter is 0.2mm. At the same time, it is also required that VIA1#-VIA7# holes must be filled with resin and capped with copper. It is required that VIA8# hole is not filled, VIA1#-VIA8# are metallized through holes, and the hole copper thickness is required to be at least 25um.

[0019] In step STEP106, it is used to prepare buried holes, that is, to prepare buried resistance layers. The buried resistance layer preparation method and parameters are as follows: STEP201: Pre-cast two fake boards, the bottom copper and the bottom copper of the buried resistance layer are consistent. Before the buried resistance layer circuit is made, measure the surface copper thickness, select the etching speed according to the surface copper thickness, and etch the prepared fake board. After the line width of the fake board is qualified, etch the first real board according to the etching speed of the fake board + 0.8m / min. When etching, the circuit surface is facing down, and the drag board is added to the machine. The line width tolerance is controlled by ±0.5mil. The size of the 100Ω resistor: 40mil long × 40mil wide is adjusted to 40.mil long × 44.mil wide; the resistance control range after etching is 90Ω-105Ω, and the etching speed or line width is adjusted if the resistance value is too large; if the resistance value is too small, use laser equipment to adjust the resistance to ensure that the finished product resistance value is 90Ω-110Ω; STEP202: Turn off the "sub-liquid washing" tank before etching, etch first and then strip the film. When etching and stripping the film, place the resistor circuit face up, and put thick edge strips on both sides of the board to pass through the machine together to avoid scratching the resistor film; STEP203: Use a fake board to confirm the etching speed; measure the resistance length, and no over-etching is allowed; the FR-4 fake board allows the remaining burrs on both sides to total 0.5mil; produce the board according to the etching speed of the fake board; send it for inspection within 1 hour after etching.

[0020] In addition, you need to hold the board with both hands during the operation to protect the resistor film. It is not allowed to be scratched, contaminated by chemicals, or have moisture.

[0021] In steps STEP103, 104, and 105, the lamination method and parameters are as follows: (1)VIA5# blind vias are made by the “press-fit self-filling method”, without the need to add a resin plugging process; (2) Other blind and buried holes need to be plugged first and then pressed together, and cannot be made using the "pressing and self-filling method"; (3) The pressing heating rate is controlled at 2.0+ / -0.5℃ / min, the maximum pressure is 360PSI, the maximum material temperature is 180-185℃, full pressure is set for 15-20min, and the temperature and pressure are kept for 60-90min.

[0022] In step STEP 106, back drilling method and parameters: (1) Make an isolation ring in the back-drilling layer in advance; (2) The back drilling STUB is controlled at 0.1-0.2mm; (3) Set different orders of back-drilled test holes on the edge of the board in advance. The hole diameter should be consistent with the back-drilled hole diameter. Drill the edge of the board and slice it for confirmation before production. After it passes the test, make the first piece in the board to reduce scrap during testing.

[0023] Finally, electrical performance test and appearance inspection are carried out, specifically testing the following items: (1) After the outer layer is etched, a mid-test process is added to test the network connectivity; (2) After the finished product is completed, perform thermal shock test, hot and cold cycle test, reflow soldering test, slice measurement of blind buried hole / through hole copper thickness, surface copper thickness, aperture, molding size, etc. according to GJB362C-2021 and QJ831B-2011; (3) Check appearance problems according to GJB362C-2021 and QJ831B-2011.

[0024] Compared with the prior art, in the method for making a buried resistor circuit board provided by the present invention, the number of back drilling times can be reduced by making blind holes in layers, avoiding back drilling to lines that cannot be avoided, and ensuring that the copper thickness of the VIA blind holes meets the requirements. At the same time, by optimizing to four times of pressing, on the one hand, the production of VIA2# buried holes can be realized, and on the other hand, it is convenient to make blind holes in each layer, and solves technical problems such as blind hole copper plating core, copper plating and base copper not contacting, thin / uneven copper, and depression. In addition, by selectively back drilling three times, that is, by the mutual correlation of the back drilling processing method and the blind hole processing method, the selection of three blinds and three back drillings is a complementary match, thereby reducing the difficulty of the processing technology of the two and reducing the process flow, and finally realizing the production of cross blind holes, and the design of three blind drillings plus one buried hole can also reduce the impact of the thickness-to-diameter ratio.

[0025] The above are only preferred embodiments of the present invention and are not intended to limit the protection scope of the present invention. Any modification, equivalent substitution or improvement within the spirit of the present invention is included in the scope of the claims of the present invention.

Claims

1. A method for manufacturing a buried blocking circuit board with four cross blind holes in the same layer of core board, wherein the total thickness of the buried blocking circuit board is greater than 3.7 mm, the thickness of the core board is at least 0.254 mm and there are 7 sheets, the thickest is at most 0.762 mm and there is 1 sheet, the thickness of each PP sheet is 0.1 mm, the depth of any first-order blind hole is at least 0.254 mm, and the thickness-to-diameter ratio is at least 1.7:1, and the manufacturing method comprises the following steps: STEP101: cutting the material, cutting L1 to L16 according to the size requirements; STEP102: Make L15-L16: Drill blind vias VIA15#-VIA16#--plasma--PTH--board electricity--circuit / etching--buried resistor production--browning; STEP103: Make L13-L16: Press L13-L16-drill blind holes VIA13#-VIA16#----Plasma--PTH--Board electricity--Resin plug--Reduce copper; STEP104: Make L07-L16: Circuit / etch L13, L12, L11, L10, L9, L8--browning--press L7-L16-drill blind vias VIA7#-VIA16#----plasma--PTH--board electricity--resin plug--reduce copper--circuit / etch L7, L6, L5; STEP105: For L7, L6, L5 lines / etching--inner layer lines / etching--browning--pressing L3-L4 and L5-L6--drilling buried holes VIA3#-VIA6#--plasma--PTH / board electricity--resin plugging holes; STEP106: Circuit etching L3-L6 layers--browning / pressing L1 to L16 layers--drilling VIA1#, VIA3#, VIA4#, through hole VIA8#--plasma--PTH--board electricity--resin plugging--copper reduction--back drilling VIA1#, VIA3#, VIA4# holes--resin plugging--plasma--PTH / board electricity--circuit--graphic plating--nickel gold plating--etching L1 and L16--AOI--solder mask--text--testing--molding--final inspection.

2. The method for manufacturing a buried blocking circuit board with four cross blind vias in the same core board as claimed in claim 1, characterized in that: In step STEP106, it is used to prepare a buried hole, that is, to prepare a buried barrier layer. The buried barrier layer manufacturing method is as follows: STEP201: Pre-cast two fake boards, the bottom copper and the bottom copper of the buried resistance layer are consistent. Before making the buried resistance layer circuit, measure the surface copper thickness, select the etching speed according to the surface copper thickness, and etch the prepared fake board. After the line width of the fake board is qualified, etch the real board first board according to the etching speed of the fake board + 0.8m / min. When etching, the circuit surface is facing down, and the board is dragged through the machine; STEP202: Turn off the "sub-liquid washing" tank before etching, etch first and then strip the film. When etching and stripping the film, place the resistor circuit face up, and put thick edge strips on both sides of the board to pass through the machine together to avoid scratching the resistor film; STEP203: Use a fake board to confirm the etching speed; When measuring the resistance, no over-etching is allowed; for fake boards, the residual burrs on both sides are allowed to be 0.5mil in total.

3. The method for manufacturing a buried blocking circuit board with four cross blind vias in the same core board as claimed in claim 2, characterized in that: In step STEP201, the line width tolerance is controlled at ±0.5mil, and the size of the 100Ω resistor: length 40mil × width 40mil is adjusted to length 40.mil × width 44.mil; the resistance control range after etching is 90Ω-105Ω, if the resistance value is too large, adjust the etching speed or line width; if the resistance value is too small, use laser equipment to adjust the resistance to ensure that the finished product resistance is 90Ω-110Ω.

4. The method for manufacturing a buried blocking circuit board with four cross blind vias in the same core board as claimed in claim 1, characterized in that: In steps STEP103, 104, and 105, the pressing method includes: (1)VIA5# blind vias are made by "pressing and self-filling method", without adding resin plugging process; (2) Except for the VIA5# blind via, other blind and buried vias are first plugged and then pressed together, and the "pressing and self-filling method" is not used.

5. The method for manufacturing a buried blocking circuit board with four cross blind vias in the same core board as claimed in claim 4, characterized in that: During pressing, the heating rate is controlled at 2.0+ / -0.5℃ / min, the maximum pressure is 360PSI, the maximum material temperature is 180-185℃, full pressing is set for 15-20min, and the temperature and pressure are kept for 60-90min.

6. The method for manufacturing a buried blocking circuit board with four cross blind vias in the same core board as claimed in claim 1, characterized in that: In step STEP 106, back drilling production method and parameters: (1) Make an isolation ring in the back-drilling layer in advance; (2) The back drilling STUB is controlled at 0.1-0.2mm; (3) Set different orders of back-drilled test holes on the edge of the board in advance. The hole diameter should be consistent with the back-drilled hole diameter. Drill the edge of the board and slice it for confirmation before production. After it passes the test, make the first piece in the board to reduce test scrap.