Task processing method and device, electronic equipment and readable storage medium

Abstract

The invention discloses a task processing method and device, electronic equipment and a readable storage medium, and belongs to the technical field of electronic equipment. The task processing method provided by the embodiment of the invention comprises the following steps: acquiring a to-be-executed first task through a main core of the heterogeneous multi-core system; under the condition that the first task is a non-first task in N tasks, indicating a heterogeneous core of the heterogeneous multi-core system to execute the first task based on task execution information through the main core; the task execution information is shared between the main core and the heterogeneous core; the heterogeneous core is in a standby state after executing the first task in the N tasks; n is a positive integer greater than 1.

Description

Technical Field

[0001] This application belongs to the technical field of electronic devices, and particularly relates to a task processing method, apparatus, electronic device, and readable storage medium. Background Art

[0002] In the related art, for the scenario of collaborative allocation of computing tasks between the host core (Host) and heterogeneous cores (Device) of a heterogeneous multi-core system, when the Host transfers each computing task to the Device, it is usually necessary to first move the parameters and data of the corresponding computing task into the Device, and then perform a basic call (kernel launch) to let the Device execute the computing task. After the Device finishes the calculation, it will notify the Host. After receiving the completion event notification, the Host will move out the corresponding calculation result for subsequent processing.

[0003] Although the above heterogeneous computing solution can make full use of the parallel computing of multiple heterogeneous cores, when executing multiple computing tasks, it is necessary to frequently transfer task data between the Host and the Device, and the computing process of the Device is constantly switched between startup and stop, reducing the computing efficiency of the heterogeneous multi-core system. Summary of the Invention

[0004] The purpose of the embodiments of this application is to provide a task processing method, apparatus, electronic device, and readable storage medium, which can solve the problem of low computing efficiency of heterogeneous multi-core systems.

[0005] In a first aspect, the embodiments of this application provide a task processing method, and the method includes:

[0006] Obtain a first task to be executed through the host core of the heterogeneous multi-core system;

[0007] When the first task is not the first task among N tasks, instruct the heterogeneous core of the heterogeneous multi-core system to execute the first task based on task execution information through the host core; the task execution information is shared between the host core and the heterogeneous core; the heterogeneous core is in a standby state after executing the first task among the N tasks; N is a positive integer greater than 1.

[0008] In a second aspect, a task processing apparatus is provided, and the apparatus includes:

[0009] An obtaining module, configured to obtain a first task to be executed through the host core of the heterogeneous multi-core system;

[0010] A processing module, configured to, when the first task is not the first task among N tasks, instruct heterogeneous cores of the heterogeneous multi-core system to execute the first task based on task execution information through the main core; the task execution information is shared between the main core and the heterogeneous cores; the heterogeneous cores are in a standby state after executing the first task among the N tasks; N is a positive integer greater than 1.

[0011] In a third aspect, an embodiment of the present application provides an electronic device, which includes a processor and a memory. The memory stores a program or instruction that can run on the processor. When the program or instruction is executed by the processor, the steps of the method described in the first aspect are implemented.

[0012] In a fourth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the steps of the method described in the first aspect are implemented.

[0013] In a fifth aspect, an embodiment of the present application provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor, and the processor is configured to run a program or instruction to implement the method described in the first aspect.

[0014] In a sixth aspect, an embodiment of the present application provides a computer program product, which is stored in a storage medium and is executed by at least one processor to implement the method described in the first aspect.

[0015] In the embodiments of the present application, on the one hand, the heterogeneous cores are in a standby state after executing the first task among the N tasks, that is, the task execution process of the heterogeneous cores is not shut down after executing the first task, but waits for the next task among the N tasks to be executed. By starting the task execution process of the heterogeneous cores once to continuously execute multiple tasks, this avoids the task execution process of the heterogeneous cores from constantly switching between starting and stopping, effectively improving the overall computing efficiency of the heterogeneous multi-core system. On the other hand, the first task is executed through the shared task execution information, without the need to transmit task execution information between the main core and the heterogeneous cores, reducing the latency caused by data transmission, improving the parallelism of storage and computing, and thus being beneficial to further improving the overall computing efficiency of the heterogeneous multi-core system. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a flowchart of a task processing method according to some embodiments of the present application;

[0017] Figure 2 is a flowchart of a task processing method according to some embodiments of the present application;

[0018] Figure 3It is a schematic flowchart of a task processing method according to some embodiments of the present application;

[0019] Figure 4 It is a schematic diagram of modules of a task processing device according to some embodiments of the present application;

[0020] Figure 5 It is one of the structural block diagrams of an electronic device according to an embodiment of the present application;

[0021] Figure 6 It is the second structural block diagram of an electronic device according to an embodiment of the present application. Detailed implementation manners

[0022] Next, the technical solutions in the embodiments of the present application will be clearly described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, rather than all, embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art belong to the scope of protection of the present application.

[0023] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, rather than to describe a specific order or sequence. It should be understood that such data may be interchanged under appropriate circumstances so that the embodiments of the present application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. generally belong to the same category, and the number of objects is not limited. For example, the first object may be one or more. In addition, "and / or" in the specification and claims means at least one of the connected objects, and the character " / " generally represents an "or" relationship between the associated objects before and after.

[0024] Next, in conjunction with the accompanying drawings, taking an electronic device as the execution entity as an example, the task processing method provided by the embodiments of the present application will be described in detail through specific embodiments and their application scenarios.

[0025] As Figure 1 shown, the embodiments of the present application provide a task processing method, including:

[0026] Step 101: Obtain a first task to be executed through the main core of the heterogeneous multi-core system.

[0027] The heterogeneous multi-core system in the embodiments of the present application may be a chip circuit that realizes the complete system function. The heterogeneous multi-core system may be a system-on-chip or a system-on-a-chip (SOC). The heterogeneous multi-core system can realize heterogeneous computing. Heterogeneous computing mainly refers to a computing method in which computing units using different types of instruction sets and architectures form a system. The heterogeneous multi-core system includes a main core and heterogeneous cores.

[0028] Optionally, the above main core is mainly used to initiate the transfer of computing tasks, and the main core can be a CPU unit.

[0029] Optionally, the above heterogeneous cores are mainly used to execute the tasks transferred by the main core. The above main core can be understood as the main computing unit, and the heterogeneous cores can be understood as slave computing units.

[0030] In the embodiment of the present application, the main core triggers the heterogeneous core to execute the first task by means of Kernel launch, and this process requires a certain triggering time.

[0031] Kernel launch can be understood as the process in which the main core starts the computing tasks of the heterogeneous core.

[0032] Kernel can be understood as the core function that carries the computing tasks in the heterogeneous core.

[0033] In the embodiment of the present application, the main core first determines N tasks that need to be continuously executed by the heterogeneous core. As an optional implementation manner, the main core can divide the tasks to be executed in combination with the actual algorithm and hardware resources to obtain N tasks that need to be continuously executed. For example, the number N of computing tasks that need to be executed in total for a single round of continuous tasks can be set according to the amount of data processed by the Kernel function in the heterogeneous core each time it performs a computing task. Then, a variable S can be set to record the number of tasks that have been executed by the heterogeneous core. Each time the above Kernel is launched, the variable S is cleared. Each time the heterogeneous core completes a task, it will notify the main core, and the main core will increment the count of the variable S based on this notification. In this way, the main core can perceive in real time which task among the N tasks is currently being executed.

[0034] Step 102: When the first task is not the first task among the N tasks, the main core instructs the heterogeneous core of the heterogeneous multi-core system to execute the first task based on the task execution information; the task execution information is shared between the main core and the heterogeneous core; the heterogeneous core is in a standby state after executing the first task among the N tasks; N is a positive integer greater than 1.

[0035] Among them, the standby state can be the standby state.

[0036] As an implementation manner, the heterogeneous multi-core system includes a shared memory, and the task execution information is stored in the shared memory.

[0037] Optionally, the above shared memory refers to a buffer that allows sharing between the main core and heterogeneous cores in a heterogeneous multi-core system. For example, the shared memory is a Direct Memory Access (DMA) buffer. Optionally, in addition to storing the task execution information of the task to be executed, the above shared memory can also be used to store the execution results of the task.

[0038] In the embodiments of the present application, the main core can copy the task execution information of the first task to the above shared memory. In this case, the main core needs to apply in advance to store the task execution information in the above shared memory. When the heterogeneous core executes the task subsequently, it directly uses the data in the shared memory, without the need to transfer the task execution information between the main core and the heterogeneous core, reducing the latency caused by data transmission and improving the parallelism of storage and computing.

[0039] Alternatively, the task execution information of the above first task is automatically transmitted by the upstream algorithm of the execution algorithm to the above shared memory. In this case, the task execution information transmitted by the upstream algorithm is directly saved in the shared memory, without the need for the main core to perform an additional copy operation.

[0040] In the embodiments of the present application, the task execution information includes but is not limited to the data source and parameters. The data source is used to indicate the input data required when executing the task, and the parameters are used to indicate the parameters required when executing the algorithm. Different execution algorithms correspond to different parameters. The execution algorithm is the algorithm used when executing the task.

[0041] In some embodiments of the present application, when the heterogeneous core executes the first task among the above N tasks, based on the indication of the main core, it starts a kernel function and executes the first task based on the started kernel function. After executing the first task, it keeps the started kernel function in the standby state. Then, based on the indication of the main core, it executes the first task based on the task execution information stored in the shared memory, thus realizing the continuous execution of multiple tasks by starting the task execution process of the heterogeneous core once. This avoids the continuous switching of the task execution process of the heterogeneous core between start and stop, effectively improving the overall computing efficiency of the heterogeneous multi-core system. Moreover, by sharing the task execution information in the shared memory, there is no need to transfer the task execution information between the main core and the heterogeneous core, reducing the latency caused by data transmission and improving the parallelism of storage and computing, which is further conducive to improving the overall computing efficiency of the heterogeneous multi-core system.

[0042] In the above solution of the embodiment of the present application, on the one hand, the heterogeneous core is in a standby state after executing the first task among the N tasks, that is, the task execution process of the heterogeneous core will not be shut down after executing the first task, but will wait for the next task among the N tasks. By starting the task execution process of the heterogeneous core once to continuously execute multiple tasks, this avoids the continuous switching of the task execution process of the heterogeneous core between start and stop, effectively improving the overall computing efficiency of the heterogeneous multi-core system. On the other hand, by executing the first task through the shared task execution information, there is no need to transmit the task execution information between the main core and the heterogeneous core, reducing the latency caused by data transmission, improving the parallelism of storage and computing, and thus being beneficial to further improving the overall computing efficiency of the heterogeneous multi-core system.

[0043] In some embodiments of the present application, the main core instructing the heterogeneous core of the heterogeneous multi-core system to execute the first task based on the task execution information includes:

[0044] The main core sets the parameter value of the continuous calculation flag parameter in the shared memory to a first parameter value; the first parameter value is used to instruct the heterogeneous core to execute the first task based on the task execution information stored in the shared memory, and the shared memory is the shared memory between the main core and the heterogeneous core.

[0045] This continuous calculation flag parameter is a shared parameter between the main core and the heterogeneous core, and both the main core and the heterogeneous core can perceive the change of the parameter value of this parameter.

[0046] In the embodiment of the present application, when the main core determines that the task execution information of the first task has been stored in the above-mentioned shared memory, it sets the parameter value of the continuous calculation flag parameter in the shared memory to the first parameter value, so that the heterogeneous core can, based on this first parameter value, perceive that it needs to continue to execute the first task, and thus keep the started kernel function in the standby state. Here, a lightweight communication between heterogeneous cores based on shared parameters is achieved by simulating the shared memory, and multiple consecutive computing tasks are completed through a single Kernel launch, thereby improving the overall computing energy efficiency.

[0047] In some embodiments of the present application, the method further includes:

[0048] The heterogeneous core executes the first task according to the task execution information in the shared memory and the first parameter value.

[0049] Here, a lightweight communication between heterogeneous cores based on shared parameters is achieved by simulating the shared memory, and multiple consecutive computing tasks are completed through a single Kernel launch, thereby improving the overall computing energy efficiency.

[0050] Optionally, the method according to the embodiments of the present application further includes:

[0051] When the first task is completed, the heterogeneous core sets the parameter value of the continuous calculation flag parameter in the shared memory to a second parameter value; the second parameter value is used to indicate that the first task has been completed.

[0052] In the embodiments of the present application, after the heterogeneous core completes the first task, it will set the parameter value of the above continuous calculation flag parameter to the second parameter value. When the main core monitors that the parameter value of the above continuous calculation flag parameter is the second parameter, it can know that the heterogeneous core has completed the first task. That is, through the above second parameter value, the main core can sense that the heterogeneous core has completed the execution of the first task, so that the main core can perform subsequent processes, such as obtaining the execution result of the first task, or triggering the start of the execution of the next task.

[0053] As an implementation, every time the heterogeneous core completes a task, it sets the continuous calculation flag parameter value to the second parameter value and saves the corresponding execution result to the shared memory. After the main core monitors the second parameter value, it obtains the execution result of the task from the shared memory.

[0054] Optionally, the method according to the embodiments of the present application further includes:

[0055] When it is monitored by the main core that the parameter value of the continuous calculation flag parameter in the shared memory is the second parameter value, the main core obtains the execution result of the first task from the shared memory.

[0056] In the embodiments of the present application, after the heterogeneous core completes the first task, it will set the parameter value of the above continuous calculation flag parameter to the second parameter value. When the main core monitors that the parameter value of the above continuous calculation flag parameter is the second parameter, it can know that the heterogeneous core has completed the first task. That is, through the above second parameter value, the main core can sense that the heterogeneous core has completed the execution of the first task, so that the main core can perform subsequent processes, such as obtaining the execution result of the first task, or triggering the start of the execution of the next task.

[0057] Optionally, the method according to the embodiments of the present application further includes:

[0058] When the first task is the last one among the N tasks, the main core sets the parameter value of the continuous calculation flag parameter in the shared memory to a third parameter value; the third parameter value is used to indicate that the heterogeneous core closes the task execution process.

[0059] In an embodiment of the present application, when the first task is the last one among N tasks, by setting the parameter value of the continuous calculation flag parameter to a third parameter value, the heterogeneous core can sense that the N tasks in this round have been completed, and the heterogeneous core can then close the task execution process, such as closing the started kernel function.

[0060] Optionally, the method of the embodiment of the present application further includes:

[0061] When it is monitored by the heterogeneous core that the parameter value of the continuous calculation flag parameter in the shared memory is the third parameter value, the heterogeneous core closes the task execution process.

[0062] In an embodiment of the present application, when the first task is the last one among N tasks, the main core sets the parameter value of the continuous calculation flag parameter to a third parameter value. Based on this third parameter value, the heterogeneous core can sense that the N tasks in this round have been completed, and the heterogeneous core can then close the task execution process, such as closing the started kernel function.

[0063] Optionally, the step of instructing the heterogeneous core of the heterogeneous multi-core system to execute the first task based on the task execution information by the main core includes:

[0064] The main core sends a continuous calculation signal to the heterogeneous core; the continuous calculation signal is used to instruct the heterogeneous core to execute the first task based on the task execution information stored in the shared memory; the shared memory is the shared memory between the main core and the heterogeneous core.

[0065] In some embodiments of the present application, when the main core determines that the task execution information of the first task has been stored in the above-mentioned shared memory, the main core sends a continuous calculation signal to the heterogeneous core, so that the heterogeneous core can determine based on this continuous calculation signal that it needs to continue to execute the first task, and then keep the started kernel function in the standby state.

[0066] Optionally, the method of the embodiment of the present application further includes:

[0067] The heterogeneous core executes the first task according to the task execution information in the shared memory and the continuous calculation signal sent by the main core.

[0068] Here, based on the communication between the main core and the heterogeneous core through the continuous calculation signal, the kernel function started on the heterogeneous core side is in the standby state. This communication method has high communication efficiency and stability, which is conducive to further improving the computing energy efficiency of the entire system.

[0069] Optionally, the method of the embodiment of the present application further includes:

[0070] When the execution of the first task is completed, a task completion notification is sent to the main core through the heterogeneous core.

[0071] In some embodiments of the present application, after the heterogeneous core completes each task, it sends a task completion notification to the main core and saves the corresponding execution result to the shared memory. After receiving the task completion notification, the main core obtains the execution result of the task from the shared memory. In this way, by transmitting the task completion notification between the main core and the heterogeneous core, the main core can obtain the corresponding execution result in a timely manner. This communication method has high communication efficiency and stability, which is conducive to further improving the computing energy efficiency of the entire system.

[0072] Optionally, the method of the embodiment of the present application further includes:

[0073] The main core obtains the execution result of the first task from the shared memory according to the task completion notification.

[0074] Optionally, the method of the embodiment of the present application further includes:

[0075] When the first task corresponding to the execution result is the last one of the N tasks, a notification to close the task execution process is sent to the heterogeneous core through the main core.

[0076] Optionally, the method of the embodiment of the present application further includes:

[0077] The heterogeneous core obtains the notification to close the task execution process;

[0078] The heterogeneous core closes the task execution process according to the notification.

[0079] In the embodiment of the present application, when the first task corresponding to the execution result is the last one of the N tasks, by sending a notification to close the task execution process, the heterogeneous core can determine that the N tasks in this round have been completed based on this notification, and then the heterogeneous core can close the task execution process, such as closing the started kernel function.

[0080] In the embodiment of the present application, when the first task is the last one of the N tasks, by sending a notification to close the task execution process, the heterogeneous core can determine that the N tasks in this round have been completed based on this notification, and then the heterogeneous core can close the task execution process, such as closing the started kernel function.

[0081] In some embodiments of the present application, after each task is completed by the heterogeneous core, a task completion notification is sent to the main core, and the corresponding execution result is saved in the shared memory. After receiving the task completion notification, the main core obtains the execution result of the task from the shared memory. In this way, by transmitting the task completion notification between the main core and the heterogeneous core, the main core can obtain the corresponding execution result in a timely manner. This communication method has high communication efficiency and stability, which is conducive to further improving the computing energy efficiency of the entire system.

[0082] For the above solution of the embodiments of the present application, on the one hand, after the heterogeneous core executes the first task among the N tasks, it is in a standby state, that is, after executing the first task, the task execution process of the heterogeneous core is not shut down, and it will wait for the next task among the N tasks. By starting the task execution process of the heterogeneous core once to continuously execute multiple tasks, this avoids the continuous switching of the task execution process of the heterogeneous core between start and stop, effectively improving the overall computing efficiency of the heterogeneous multi-core system. On the other hand, by sharing task execution information in the shared memory, there is no need to transmit task execution information between the main core and the heterogeneous core, reducing the latency caused by data transmission, improving the parallelism of storage and computing, and thus being conducive to further improving the overall computing efficiency of the heterogeneous multi-core system. For relatively small-grained computing tasks, this solution can significantly improve the heterogeneous acceleration effect and make the collaborative efficiency of heterogeneous computing between the main core and the heterogeneous core more efficient.

[0083] The operations performed by the main core and the heterogeneous core in the embodiments of the present application will be described separately below.

[0084] (1) Operations performed by the main core;

[0085] In some embodiments of the present application, the main core obtains the first task to be executed; when the first task is not the first task among the N tasks, the main core instructs the heterogeneous core of the heterogeneous multi-core system to execute the first task based on the task execution information; the task execution information is shared between the main core and the heterogeneous core; the heterogeneous core is in a standby state after executing the first task among the N tasks; N is a positive integer greater than 1.

[0086] Optionally, the main core instructing the heterogeneous core of the heterogeneous multi-core system to execute the first task based on the task execution information includes:

[0087] The main core sets the parameter value of the continuous calculation flag parameter in the shared memory to the first parameter value; the first parameter value is used to instruct the heterogeneous core to execute the first task based on the task execution information stored in the shared memory, and the shared memory is the shared memory between the main core and the heterogeneous core.

[0088] Optionally, the solution of the above embodiment further includes:

[0089] When it is monitored that the parameter value of the continuous calculation flag parameter in the shared memory is the second parameter value, the main core obtains the execution result of the first task from the shared memory; the second parameter value is used to indicate that the first task has been executed and completed.

[0090] Optionally, the above solution further includes:

[0091] When the first task is the last task among the N tasks, the main core sets the parameter value of the continuous calculation flag parameter in the shared memory to the third parameter value; the third parameter value is used to indicate that the heterogeneous core closes the task execution process.

[0092] Optionally, the indication for the heterogeneous core of the heterogeneous multi-core system to execute the first task based on the task execution information includes:

[0093] Sending a continuous calculation signal to the heterogeneous core; the continuous calculation signal is used to indicate that the heterogeneous core executes the first task based on the task execution information stored in the shared memory between the main core and the heterogeneous core.

[0094] Optionally, the solution further includes:

[0095] Obtaining a task completion notification sent by the heterogeneous core;

[0096] According to the task completion notification, obtaining the execution result of the first task from the shared memory.

[0097] (2) Operations performed by the heterogeneous core;

[0098] In some embodiments of the present application, the heterogeneous core executes the first task according to the task execution information shared between the main core and the heterogeneous core in the heterogeneous multi-core system and the indication of the main core.

[0099] Optionally, the execution of the first task according to the task execution information shared between the main core and the heterogeneous core in the heterogeneous multi-core system and the indication of the main core includes:

[0100] Executing the first task according to the task execution information in the shared memory and the first parameter value of the continuous calculation flag parameter; wherein, the first parameter value is set by the main core, and the first parameter value is used to indicate that the heterogeneous core executes the first task based on the task execution information stored in the shared memory, and the shared memory is the shared memory between the main core and the heterogeneous core.

[0101] Optionally, the solution further includes:

[0102] When the first task is completed, set the parameter value of the continuous calculation flag parameter in the shared memory to a second parameter value; the second parameter value is used to indicate that the first task has been completed.

[0103] Optionally, the solution further includes:

[0104] When it is monitored that the parameter value of the continuous calculation flag parameter in the shared memory between the main core and the heterogeneous core is a third parameter value, close the task execution process; the third parameter value is used to indicate that the heterogeneous core closes the task execution process.

[0105] Optionally, according to the task execution information shared between the main core and the heterogeneous core in the heterogeneous multi-core system and the indication of the main core, executing the first task includes:

[0106] Execute the first task according to the task execution information in the shared memory and the continuous calculation signal sent by the main core; the continuous calculation signal is used to indicate that the heterogeneous core executes the first task based on the task execution information stored in the shared memory.

[0107] Optionally, the solution further includes:

[0108] When the first task is completed, send a task completion notification to the main core.

[0109] On the one hand, in the above solution of the embodiment of the present application, after the heterogeneous core executes the first task among the N tasks, it is in a standby state, that is, after executing the first task, the task execution process of the heterogeneous core will not be closed, and it will wait for the next task among the N tasks. By starting the task execution process of the heterogeneous core once to continuously execute multiple tasks, this avoids the continuous switching of the task execution process of the heterogeneous core between start and stop, effectively improving the overall computing efficiency of the heterogeneous multi-core system. On the other hand, by sharing the task execution information in the shared memory, there is no need to transmit the task execution information between the main core and the heterogeneous core, reducing the latency caused by data transmission, improving the parallelism of storage and computing, and further facilitating the improvement of the overall computing efficiency of the heterogeneous multi-core system. Moreover, for relatively small-grained computing tasks, this solution can significantly improve the heterogeneous acceleration effect and make the collaborative efficiency of heterogeneous computing between the main core and the heterogeneous core more efficient.

[0110] The following will describe the task processing method of the present application in detail with reference to embodiments.

[0111] Embodiment 1: Implement lightweight communication between heterogeneous cores based on shared parameters by simulating a shared memory;

[0112] As Figure 2 shown, the method includes:

[0113] Step 201: The main core divides the tasks to be executed, and determines N tasks that the heterogeneous core needs to continuously execute in this round.

[0114] The main core can divide the tasks to be executed in combination with the actual algorithm and hardware resources to obtain N tasks that need to be continuously executed. For example, the number N of computing tasks that need to be executed in total for a single round of continuous tasks can be set according to the amount of data processed by each Kernel function calculation task in the heterogeneous core.

[0115] Step 202: Prepare the task execution information of the first task.

[0116] The first task is the task that needs to be executed currently among the above N tasks.

[0117] In the embodiment of the present application, the main core needs to apply in advance to copy the task execution information to the shared memory. After the subsequent task is started, the heterogeneous core can directly use the task execution information in the shared memory. In addition, the task execution information of the above first task can also be automatically transmitted by the upstream algorithm executing the algorithm to the above shared memory. In this case, the task execution information transmitted by the upstream algorithm is directly saved in the shared memory, and no additional copy operation needs to be performed by the main core.

[0118] Step 203: The main core determines whether the first task is the first task among the N tasks.

[0119] If the first task is the first task, then execute Step 2041: Instruct the heterogeneous core to execute the first task by means of triggering and starting the kernel function.

[0120] If the first task is not the first task, then execute Step 2042: Set the parameter value of the continuous calculation flag parameter in the DMA Buffer to the first parameter value, and the heterogeneous core executes the first task based on the first parameter value and the already started kernel function.

[0121] By setting the above first parameter value, the heterogeneous core can sense that there is a new task that needs to be processed, and the corresponding task execution information is already ready.

[0122] The continuous calculation flag parameter is transmitted between the main core and the heterogeneous core by simulating the shared memory through the DMA Buffer. The change of this parameter can be sensed by the heterogeneous core in real time. The heterogeneous core enters the standby state based on the first parameter value and waits for the next task trigger or task end signal.

[0123] Step 205: The main core processes other tasks in parallel.

[0124] After the main core triggers the heterogeneous core to execute a task, the main core will synchronize to other tasks. For example, it will perform subsequent processing on the task results of the previous task and prepare data for the next task, etc.

[0125] Step 206: The main core obtains the execution result of the first task based on the continuous calculation flag parameter.

[0126] This execution result can also be described as the calculation result.

[0127] When the main core needs to synchronously write back the previous calculation result, it monitors the continuous calculation flag parameter. Each time the heterogeneous core completes a task, it sets the continuous calculation flag parameter to the second parameter value. When the main core detects that the parameter value of the continuous calculation flag parameter becomes the second parameter value, it writes back the execution result. At this time, a complete calculation task is completed, and the number of remaining continuous calculation tasks in this round is decremented by 1.

[0128] Step 207: Determine whether the consecutive N tasks in this round have been completed.

[0129] If the continuous calculation in this round has not been completed, it will return to step 202 to continue the next task of the continuous calculation in this round. If the continuous calculation in this round has been completed, step 208 is executed.

[0130] Step 208: Start the execution of the next round of consecutive tasks.

[0131] When all the previous round of continuous calculation tasks have been completed, if there are other continuous calculation tasks, the next round of continuous calculation tasks will continue to be started. At this time, the most important operation is to set the parameter value of the continuous calculation flag parameter to the third parameter value. When the heterogeneous core side senses the third parameter value, Kernel will exit, and Kernel launch will be executed again when the next round of continuous calculation starts.

[0132] It should be noted that the combination of the above steps 202 to 208 represents the execution process of a complete round of consecutive tasks.

[0133] In this embodiment, data sharing between heterogeneous cores is achieved through the DMA Buffer, which improves the efficiency of data transmission and calculation. And lightweight communication between heterogeneous cores based on shared parameters is achieved by simulating shared memory. Multiple consecutive calculation tasks can be completed through a single Kernel launch, which is beneficial to improving the overall computing energy efficiency.

[0134] Embodiment 2: Communication between the main core and the heterogeneous core is achieved by transmitting signals;

[0135] As Figure 3 shown, the method includes:

[0136] Step 301: The master core divides the tasks to be executed and determines N tasks that the heterogeneous core needs to execute continuously in this round.

[0137] This step 301 is the same as step 201 in Embodiment 1.

[0138] Step 302: Prepare the task execution information of the first task.

[0139] This first task is the task that needs to be executed currently among the above N tasks.

[0140] In the embodiment of the present application, the master core needs to apply in advance to copy the task execution information to the shared memory. After the subsequent task is started, the heterogeneous core can directly use the task execution information in the shared memory. In addition, the task execution information of the above first task can also be automatically transmitted by the upstream algorithm of the execution algorithm to the above shared memory. In this case, the task execution information transmitted by the upstream algorithm is directly saved in the shared memory, and no additional copy operation needs to be performed by the master core.

[0141] Step 303: The master core determines whether the first task is the first task among the N tasks.

[0142] If the first task is the first task, then execute step 3041: In the way of triggering the startup kernel function, instruct the heterogeneous core to execute this first task.

[0143] If the first task is not the first task, then execute step 3042: Send a continuous calculation signal to the heterogeneous core, and the heterogeneous core executes the first task based on this continuous calculation signal and the started kernel function.

[0144] After receiving the above continuous calculation signal, the heterogeneous core will enter the standby state, waiting for the next continuous calculation signal or task end signal.

[0145] Step 305: The master core processes other tasks in parallel.

[0146] This step 305 is the same as step 205 in Embodiment 1.

[0147] Step 306: The master core obtains the execution result of the first task according to the task completion notification.

[0148] This execution result can also be described as the calculation result.

[0149] The master core waits for the task completion notification from the heterogeneous core end when it needs to synchronously write back the previous calculation result. The heterogeneous core end sends a task completion notification to the master core every time a task is completed. This task completion notification can be described as the notification of the task completion event. When the master core receives the task completion notification, it will write back the execution result. At this time, a complete calculation task is executed, and the number of remaining continuous calculation tasks in this round is decreased by 1.

[0150] Step 307: Determine whether the consecutive N tasks in this round have been completed.

[0151] If the consecutive calculations in this round have not been completed, it will return to Step 302 to continue with the next task in the consecutive calculations of this round. If the consecutive calculations in this round have been completed, then Step 308 is executed.

[0152] Step 308: Initiate the execution of the consecutive tasks in the next round.

[0153] After all the consecutive calculation tasks in the previous round have been completed, if there are other consecutive calculation tasks, the consecutive calculation tasks in the next round will continue to be initiated. At this time, the main operation is to send a notification to the heterogeneous core to close the task execution process, that is, the end calculation signal. When the heterogeneous core receives the end calculation signal, Kernel will exit, and Kernel launch will be executed again when the next round of consecutive calculations is initiated.

[0154] It should be noted that the combination of the above Steps 302 to 308 represents the execution process of a round of complete consecutive tasks.

[0155] In this embodiment, data sharing between heterogeneous cores is achieved through the DMA Buffer, improving the efficiency of data transmission and calculation; and lightweight communication between heterogeneous cores is achieved through semaphores. Through a single Kernel launch, consecutive multiple calculation tasks can be completed. Compared with the shared parameter polling monitoring method in Embodiment 1, the communication method based on semaphores has better efficiency and stability, and the overall computing energy efficiency is also higher.

[0156] It should be noted that the task processing method in the embodiments of the present application is applicable to all other scenarios that require cross-core communication for joint calculation, not limited to between two cores, but also applicable to multiple cores; and the present application can be flexibly evolved to adapt to scenarios where Host and Device need to execute alternately, such as when a Host-side processing task needs to be inserted during the kernel calculation task on the Device side. At this time, efficient cooperative operations between the Host and Device sides can be achieved through the above-mentioned shared flag parameters or semaphores.

[0157] For the task processing method provided in the embodiments of the present application, the execution entity can be a task processing device. In the embodiments of the present application, taking the task processing device executing the task processing method as an example, the task processing device provided in the embodiments of the present application is described.

[0158] As Figure 4 shown, the embodiments of the present application also provide a task processing device 400, and the device includes:

[0159] An acquisition module 401, configured to acquire a first task to be executed through a main core of a heterogeneous multi-core system;

[0160] A processing module 402, configured to, when the first task is not the first task among N tasks, instruct a heterogeneous core of the heterogeneous multi-core system to execute the first task based on task execution information through the main core; the task execution information is shared between the main core and the heterogeneous core; the heterogeneous core is in a standby state after executing the first task among the N tasks; N is a positive integer greater than 1.

[0161] Optionally, the processing module is configured to:

[0162] Set a parameter value of a continuous calculation flag parameter in a shared memory to a first parameter value through the main core; the first parameter value is used to instruct the heterogeneous core to execute a first task based on task execution information stored in the shared memory, and the shared memory is a shared memory between the main core and the heterogeneous core.

[0163] Optionally, the processing module is further configured to:

[0164] Execute the first task through the heterogeneous core according to the task execution information in the shared memory and the first parameter value.

[0165] Optionally, the processing module is further configured to:

[0166] When the first task is completed, set the parameter value of the continuous calculation flag parameter in the shared memory to a second parameter value through the heterogeneous core; the second parameter value is used to indicate that the first task has been executed.

[0167] Optionally, the processing module is further configured to:

[0168] When it is monitored through the main core that the parameter value of the continuous calculation flag parameter in the shared memory is the second parameter value, obtain an execution result of the first task from the shared memory through the main core.

[0169] Optionally, the processing module is further configured to:

[0170] When the first task is the last task among the N tasks, set the parameter value of the continuous calculation flag parameter in the shared memory to a third parameter value through the main core; the third parameter value is used to instruct the heterogeneous core to close the task execution process.

[0171] Optionally, the processing module is further configured to:

[0172] When the parameter value of the continuous calculation flag parameter in the shared memory is monitored by the heterogeneous core and is the third parameter value, the task execution process is closed by the heterogeneous core.

[0173] Optionally, the processing module is further configured to:

[0174] Send a continuous calculation signal to the heterogeneous core through the main core; the continuous calculation signal is used to instruct the heterogeneous core to execute a first task based on the task execution information stored in the shared memory; the shared memory is a shared memory between the main core and the heterogeneous core.

[0175] Optionally, the processing module is further configured to:

[0176] The heterogeneous core executes the first task according to the task execution information in the shared memory and the continuous calculation signal sent by the main core.

[0177] Optionally, the processing module is further configured to:

[0178] When the first task is completed, the heterogeneous core sends a task completion notification to the main core.

[0179] Optionally, the processing module is further configured to:

[0180] The main core obtains the execution result of the first task from the shared memory according to the task completion notification.

[0181] On the one hand, in the device according to the embodiment of the present application, the heterogeneous core is in a standby state after executing the first task among the N tasks, that is, the task execution process of the heterogeneous core will not be closed after executing the first task, and it will wait for the next task among the N tasks. By starting the task execution process of the heterogeneous core once to continuously execute multiple tasks, this avoids the continuous switching of the task execution process of the heterogeneous core between start and stop, effectively improving the overall computing efficiency of the heterogeneous multi-core system. On the other hand, by executing the first task through the shared task execution information, there is no need to transmit the task execution information between the main core and the heterogeneous core, reducing the latency caused by data transmission, improving the parallelism of storage and computing, and thus being conducive to further improving the overall computing efficiency of the heterogeneous multi-core system.

[0182] The task processing device in the embodiments of the present application can be an electronic device or a component in an electronic device, such as an integrated circuit or a chip. The electronic device can be a terminal or other devices other than terminals. Exemplarily, the electronic device can be a mobile phone, a tablet computer, a laptop computer, a handheld computer, a vehicle-mounted electronic device, a Mobile Internet Device (MID), an augmented reality (AR) / virtual reality (VR) device, a robot, a wearable device, an ultra-mobile personal computer (UMPC), a netbook, or a personal digital assistant (PDA), etc. It can also be a server, a Network Attached Storage (NAS), a personal computer (PC), a television (TV), a teller machine, or a self-service machine, etc. The embodiments of the present application do not make specific limitations.

[0183] The task processing device in the embodiments of the present application can be a device with an operating system. The operating system can be an Android operating system, an iOS operating system, or other possible operating systems. The embodiments of the present application do not make specific limitations.

[0184] The task processing device provided in the embodiments of the present application can implement Figures 1 to 3 each process implemented by the method embodiments. To avoid repetition, it will not be elaborated here.

[0185] Optionally, as Figure 5 shown, the embodiments of the present application further provide an electronic device 500, including a processor 501 and a memory 502. A program or instruction that can run on the processor 501 is stored on the memory 502. When the program or instruction is executed by the processor 501, it implements each step of the above-mentioned task processing method embodiment and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0186] It should be noted that the electronic devices in the embodiments of the present application include the above-mentioned mobile electronic devices and non-mobile electronic devices.

[0187] Figure 6 The figure is a schematic diagram of the hardware structure of an electronic device for implementing the embodiments of the present application.

[0188] The electronic device 600 includes, but is not limited to, components such as a radio frequency unit 601, a network module 602, an audio output unit 603, an input unit 604, a sensor 605, a display unit 606, a user input unit 607, an interface unit 608, a memory 609, and a processor 610, etc.

[0189] Those skilled in the art can understand that the electronic device 600 may further include a power source (such as a battery) for supplying power to each component. The power source can be logically connected to the processor 610 through a power management system, so as to implement functions such as management of charging, discharging, and power consumption management through the power management system. Figure 6 The structure of the electronic device shown does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown, or combine certain components, or have different component arrangements, which will not be elaborated here.

[0190] Wherein, in an embodiment of the present application, the processor 610 is configured to obtain a first task to be executed through the main core of the heterogeneous multi-core system; in the case where the first task is not the first task among N tasks, the main core is used to instruct the heterogeneous cores of the heterogeneous multi-core system to execute the first task based on task execution information; the task execution information is shared between the main core and the heterogeneous cores; the heterogeneous cores are in a standby state after executing the first task among the N tasks; N is a positive integer greater than 1.

[0191] Optionally, the processor 610 is further configured to:

[0192] Set the parameter value of the continuous calculation flag parameter in the shared memory to a first parameter value through the main core; the first parameter value is used to instruct the heterogeneous cores to execute the first task based on the task execution information stored in the shared memory, and the shared memory is the shared memory between the main core and the heterogeneous cores.

[0193] Optionally, the processor 610 is further configured to:

[0194] Execute the first task through the heterogeneous cores according to the task execution information in the shared memory and the first parameter value.

[0195] Optionally, the processor 610 is further configured to:

[0196] In the case where the first task is executed, set the parameter value of the continuous calculation flag parameter in the shared memory to a second parameter value through the heterogeneous cores; the second parameter value is used to indicate that the first task has been executed.

[0197] Optionally, the processor 610 is further configured to:

[0198] When the main core monitors that the parameter value of the continuous calculation flag parameter in the shared memory is the second parameter value, the main core obtains the execution result of the first task from the shared memory.

[0199] Optionally, the processor 610 is further configured to:

[0200] When the first task is the last one among the N tasks, the main core sets the parameter value of the continuous calculation flag parameter in the shared memory to a third parameter value; the third parameter value is used to indicate that the heterogeneous core closes the task execution process.

[0201] Optionally, the processor 610 is further configured to:

[0202] When the heterogeneous core monitors that the parameter value of the continuous calculation flag parameter in the shared memory is the third parameter value, the heterogeneous core closes the task execution process.

[0203] Optionally, the processor 610 is further configured to:

[0204] The main core sends a continuous calculation signal to the heterogeneous core; the continuous calculation signal is used to indicate that the heterogeneous core executes the first task based on the task execution information stored in the shared memory; the shared memory is the shared memory between the main core and the heterogeneous core.

[0205] Optionally, the processor 610 is further configured to:

[0206] The heterogeneous core executes the first task according to the task execution information in the shared memory and the continuous calculation signal sent by the main core.

[0207] Optionally, the processor 610 is further configured to:

[0208] When the first task is completed, the heterogeneous core sends a task completion notification to the main core.

[0209] Optionally, the processor 610 is further configured to:

[0210] The main core obtains the execution result of the first task from the shared memory according to the task completion notification.

[0211] In an embodiment of the present application, on the one hand, after the heterogeneous core executes the first task among N tasks, it is in a standby state, that is, after executing the first task, the task execution process of the heterogeneous core will not be shut down, but will wait for the next task among the N tasks. By starting the task execution process of the heterogeneous core once, multiple tasks can be continuously executed, thus avoiding the continuous switching of the task execution process of the heterogeneous core between start and stop, and effectively improving the overall computing efficiency of the heterogeneous multi-core system. On the other hand, by executing the first task through the shared task execution information, there is no need to transmit the task execution information between the main core and the heterogeneous core, reducing the latency caused by data transmission, enhancing the parallelism of storage and computing, and thus being conducive to further improving the overall computing efficiency of the heterogeneous multi-core system.

[0212] It should be understood that in an embodiment of the present application, the input unit 604 may include a Graphics Processing Unit (GPU) 6041 and a microphone 6042. The graphics processor 6041 processes the image data of static pictures or videos obtained by an image capture device (such as a camera) in a video capture mode or an image capture mode. The display unit 606 may include a display panel 6061, and the display panel 6061 may be configured in the form of a liquid crystal display, an organic light-emitting diode, etc. The user input unit 607 includes at least one of a touch panel 6071 and other input devices 6072. The touch panel 6071 is also called a touch screen. The touch panel 6071 may include two parts: a touch detection device and a touch controller. The other input devices 6072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, and a joystick, which will not be elaborated here.

[0213] The memory 609 can be used to store software programs and various data. The memory 609 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data. Among them, the first storage area may store an operating system, application programs or instructions required for at least one function (such as a sound playback function, an image playback function, etc.). In addition, the memory 609 may include a volatile memory or a non-volatile memory, or the memory 609 may include both a volatile memory and a non-volatile memory. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDR SDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synchronous link dynamic random access memory (SLDRAM), and a direct rambus random access memory (DRRAM). The memory 609 in the embodiments of the present application includes, but is not limited to, these and any other suitable types of memories.

[0214] The processor 610 may include one or more processing units; optionally, the processor 610 integrates an application processor and a modem processor. Among them, the application processor mainly processes operations related to the operating system, user interface, and application programs, etc., and the modem processor mainly processes wireless communication signals, such as a baseband processor. It can be understood that the above modem processor may not be integrated into the processor 610.

[0215] The embodiments of the present application further provide a heterogeneous multi-core system, including a main core and heterogeneous cores. The main core can implement each process of the task processing method embodiment executed by the main core, and the heterogeneous cores can implement each process of the task processing method embodiment executed by the heterogeneous cores.

[0216] The embodiments of the present application also provide a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, each process of the above-mentioned task processing method embodiment is implemented, and the same technical effect can be achieved. To avoid repetition, it will not be elaborated here.

[0217] Wherein, the processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer-readable storage medium, such as a computer read-only memory ROM, a random access memory RAM, a magnetic disk, or an optical disc, etc.

[0218] The embodiments of the present application further provide a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is used to run a program or instruction to implement each process of the above-mentioned task processing method embodiment, and the same technical effect can be achieved. To avoid repetition, it will not be elaborated here.

[0219] It should be understood that the chip mentioned in the embodiments of the present application may also be referred to as a system-on-chip, system chip, chip system, or system-on-chip, etc.

[0220] The embodiments of the present application provide a computer program product, which is stored in a storage medium. The program product is executed by at least one processor to implement each process of the above-mentioned task processing method embodiment, and the same technical effect can be achieved. To avoid repetition, it will not be elaborated here.

[0221] It should be noted that in this article, the term "comprising", "including" or any other variation thereof is intended to cover a non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including that element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in a reverse order according to the functions involved. For example, the described methods may be performed in an order different from that described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0222] Through the description of the above embodiments, those skilled in the art can clearly understand that the above-described embodiment methods can be implemented by means of software plus a necessary general hardware platform. Of course, they can also be implemented by hardware, but in many cases, the former is a better implementation. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art can be embodied in the form of a computer software product. The computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions for causing a terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present application.

[0223] The embodiments of the present application have been described above in conjunction with the accompanying drawings. However, the present application is not limited to the above specific implementation manners. The above specific implementation manners are merely illustrative rather than restrictive. Under the inspiration of the present application, those of ordinary skill in the art can also make many forms without departing from the purpose of the present application and the scope protected by the claims, and all of them fall within the protection scope of the present application.

Claims

1. A task processing method, characterized in that: The method comprises: Acquire a first task to be executed through a main core of the heterogeneous multi-core system; In the case that the first task is not the first task among N tasks, the main core instructs the heterogeneous cores of the heterogeneous multi-core system to execute the first task based on task execution information; the task execution information is shared between the main core and the heterogeneous cores; the heterogeneous cores are in a standby state after executing the first task among the N tasks; N is a positive integer greater than 1.

2. The method according to claim 1, characterized in that The instructing, by the main core, the heterogeneous cores of the heterogeneous multi-core system to execute the first task based on the task execution information includes: The parameter value of the continuous calculation flag parameter in the shared memory is set to a first parameter value through the main core; the first parameter value is used to instruct the heterogeneous core to execute the first task based on the task execution information stored in the shared memory, and the shared memory is a shared memory between the main core and the heterogeneous core.

3. The method according to claim 2, characterized in that The method further comprises: The first task is executed by the heterogeneous core according to the task execution information in the shared memory and the first parameter value.

4. The method according to claim 3, characterized in that Also includes: When the first task is executed, setting the parameter value of the continuous calculation flag parameter in the shared memory to a second parameter value through the heterogeneous core; The second parameter value is used to indicate that the first task has been completed.

5. The method according to claim 4, characterized in that Also includes: When the main core monitors that the parameter value of the continuous calculation flag parameter in the shared memory is the second parameter value, the main core obtains the execution result of the first task from the shared memory.

6. The method according to claim 5, characterized in that Also includes: In a case where the first task is the last task among the N tasks, setting the parameter value of the continuous calculation flag parameter in the shared memory to a third parameter value by the main core; The third parameter value is used to indicate the heterogeneous core shutdown task execution process.

7. The method according to claim 6, characterized in that Also includes: In a case where the parameter value of the continuous calculation flag parameter in the shared memory is monitored by the heterogeneous core as the third parameter value, the task execution process is closed by the heterogeneous core.

8. The method according to claim 1, characterized in that The instructing, by the main core, the heterogeneous cores of the heterogeneous multi-core system to execute the first task based on the task execution information includes: A continuous computing signal is sent to the heterogeneous core through the main core; the continuous computing signal is used to instruct the heterogeneous core to execute the first task based on the task execution information stored in the shared memory; the shared memory is a shared memory between the main core and the heterogeneous core.

9. The method according to claim 8, characterized in that The method further comprises: The first task is executed by the heterogeneous core according to the task execution information in the shared memory and the continuous computing signal sent by the main core.

10. The method according to claim 8, characterized in that The method further comprises: When the first task is completed, a task completion notification is sent to the main core through the heterogeneous core.

11. The method according to claim 10, characterized in that The method further comprises: The main core obtains the execution result of the first task from the shared memory according to the task completion notification.

12. A task processing device, characterized in that: The device comprises: An acquisition module, used for acquiring a first task to be executed through a main core of the heterogeneous multi-core system; A processing module, used for instructing the heterogeneous cores of the heterogeneous multi-core system to execute the first task based on task execution information through the main core when the first task is not the first task among N tasks; the task execution information is shared between the main core and the heterogeneous cores; the heterogeneous cores are in a standby state after executing the first task among the N tasks; N is a positive integer greater than 1.

13. An electronic device, characterized in that: The method comprises a processor and a memory, wherein the memory stores a program or instruction that can be run on the processor, and when the program or instruction is executed by the processor, the steps of the task processing method according to any one of claims 1 to 11 are implemented.

14. A readable storage medium, characterized in that: The readable storage medium stores a program or instruction, and when the program or instruction is executed by the processor, the steps of the task processing method according to any one of claims 1 to 11 are implemented.

15. A computer program product, characterized in that The method comprises computer instructions, which, when executed by a processor, implement the steps of the task processing method according to any one of claims 1 to 11.

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