DDR (Double Data Rate) dynamic frequency switching method, device and equipment in SSD (Solid State Disk) service scene and medium

Abstract

The invention discloses a DDR (Double Data Rate) dynamic frequency switching method, device and equipment in an SSD (Solid State Disk) service scene and a medium, and relates to the technical field of DDR frequency switching. Comprising the steps that a frequency switching mode is enabled, a DDR SDRAM ensures that an instruction is normally completed before the frequency switching mode is enabled, and the instruction after the frequency switching mode is enabled is imported into a system public RAM; acquiring configuration parameters of the target frequency point, and configuring the configuration parameters of the target frequency point into the DDR SDRAM; after the DDR SDRAM is started, a frequency switching mode is configured to quit enabling, the system public RAM ensures that an instruction before the frequency switching mode quits enabling can be normally completed, and the instruction after the frequency switching mode quits enabling is sent to the DDR SDRAM; in the embodiment of the invention, the access to the DDR SDRAM does not need to be cut off in the whole process, and the DDR SDRAM does not need to be initialized again, so that the frequency switching efficiency is greatly improved, the quick frequency switching operation of the DDR SDRAM is realized, and the partial access requirement of the system can be ensured while the power consumption is reduced.

Description

Technical Field

[0001] The present invention relates to the field of DDR frequency switching technology, and in particular to a DDR dynamic frequency switching method, device, equipment and medium in an SSD business scenario. Background Art

[0002] DDRSDRAM (Double Data Rate Synchronous Dynamic Random-Access Memory) reduces power consumption by dynamically switching the frequency. The general strategy is that when the SOC system determines that the current scenario requires reducing the system power consumption by reducing the DDR SDRAM operating frequency, the system controller must first shut down the system's access to the DDR SDRAM; after waiting for the entire system to complete access to the DDR SDRAM, the entire system is placed in an IDLE state; at this time, the system controller begins switching the DDR SDRAM frequency and the initialization process at the new DDR SDRAM operating frequency; after completing the initialization at the new DDR SDRAM frequency, the system controller can remove the access restrictions on each module to the DDR SDRAM, and then allow the system to access the DDR SDRAM.

[0003] This method requires shutting down access to the DDR SDRAM and re-initializing the DDR SDRAM. The frequency switching process usually takes milliseconds or even seconds to complete. At this time, the entire system cannot have any access to the DRAM, otherwise the system may deadlock. This method will cause the system to be disconnected for a long time and cannot meet the system's dynamic frequency switching requirements. Summary of the invention

[0004] The embodiments of the present invention provide a DDR dynamic frequency switching method, apparatus, device and medium in an SSD service scenario, aiming to solve at least one technical problem in the above-mentioned background technology.

[0005] In a first aspect, an embodiment of the present invention provides a DDR dynamic frequency switching method in an SSD service scenario, which includes:

[0006] Enable the frequency cutting mode, wherein the DDR SDRAM ensures that the instructions before the frequency cutting mode is enabled are completed normally, and the instructions after the frequency cutting mode is enabled are imported into the system public RAM;

[0007] Acquire configuration parameters of a target frequency point, and configure the configuration parameters of the target frequency point into the DDR SDRAM;

[0008] After the DDR SDRAM starts up successfully, configure the frequency switching mode to disable. Among them, the system common RAM ensures that the instructions before the frequency switching mode is disabled can be completed normally, and the instructions after the frequency switching mode is disabled are all sent to the DDR SDRAM.

[0009] A further technical solution thereof is that the method further includes:

[0010] Determine whether the power consumption of the DDR SDRAM is greater than a preset power consumption threshold;

[0011] If the power consumption of the DDR SDRAM is greater than the preset power consumption threshold, execute the step of enabling the frequency switching mode.

[0012] A further technical solution thereof is that before enabling the frequency switching mode, the method includes:

[0013] Initialize the DDR SDRAM based on each frequency point of the DDR SDRAM respectively to obtain the configuration parameters of each frequency point of the DDR SDRAM;

[0014] Store the configuration parameters of each frequency point of the DDR SDRAM in a preset storage location.

[0015] A further technical solution thereof is that obtaining the configuration parameters of the target frequency point includes:

[0016] Read the configuration parameters of the target frequency point from a preset storage location.

[0017] A further technical solution thereof is that after the instructions after the frequency switching mode is enabled are imported into the system common RAM, the system common RAM can respond to the system instructions only after ensuring that the interaction with the DDR SDRAM is completed.

[0018] A further technical solution thereof is that after the instructions after the frequency switching mode is disabled are all sent to the DDR SDRAM, the DDR SDRAM can respond to the system instructions only after ensuring that the system common RAM completes the instructions before the frequency switching mode is disabled and the data in the system common RAM is transmitted to the DDR SDRAM.

[0019] A further technical solution thereof is that when configuring the configuration parameters of the target frequency point into the DDR SDRAM, the external PLL switches to the output clock corresponding to the target frequency point.

[0020] In a second aspect, an embodiment of the present invention further provides a DDR dynamic frequency switching device in an SSD service scenario, which includes a unit for executing the above method.

[0021] In a third aspect, an embodiment of the present invention further provides a computer device, which includes a memory and a processor. A computer program is stored on the memory, and when the processor executes the computer program, the above method is implemented.

[0022] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium. The storage medium stores a computer program, and when the computer program is executed by a processor, the above method can be implemented.

[0023] An embodiment of the present invention provides a DDR dynamic frequency switching method, device, equipment and medium in an SSD service scenario. Among them, the method includes: enabling the frequency switching mode. Among them, the DDR SDRAM ensures that the instructions before the enabling of the frequency switching mode are normally completed, and the instructions after the enabling of the frequency switching mode are imported into the system common RAM; obtaining the configuration parameters of the target frequency point, and configuring the configuration parameters of the target frequency point into the DDR SDRAM; after the DDR SDRAM starts up and completes, configuring the disabling of the frequency switching mode. Among them, the system common RAM ensures that the instructions before the disabling of the frequency switching mode can be normally completed, and the instructions after the disabling of the frequency switching mode are all sent to the DDR SDRAM; by importing the instructions into the system common RAM and taking over by the system common RAM, and directly configuring the DDR SDRAM based on the configuration parameters of the target frequency point, there is no need to turn off the access to the DDR SDRAM throughout the process, and there is no need to re-initialize the DDR SDRAM, thereby greatly improving the efficiency of frequency switching, realizing the fast frequency switching operation of the DDR SDRAM, and ensuring the partial access requirements of the system while reducing power consumption. Description of the Drawings

[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0025] Figure 1 It is a schematic flowchart of a DDR dynamic frequency switching method in an SSD service scenario provided by an embodiment of the present invention;

[0026] Figure 2 It is a schematic diagram of an application scenario of a DDR dynamic frequency switching method in an SSD service scenario provided by an embodiment of the present invention.

[0027] Figure 3 It is a schematic block diagram of a computer device provided by an embodiment of the present invention. Detailed Embodiments

[0028] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0029] It should be understood that when used in this specification and the appended claims, the terms "comprises" and "comprising" indicate the presence of the described features, wholes, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or their combinations.

[0030] It should also be understood that the terms used in this specification of the present invention are merely for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in this specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" are intended to include the plural forms.

[0031] It should be further understood that the term "and / or" used in this specification of the present invention and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0032] As used in this specification and the appended claims, the term "if" can be interpreted as "when", "once", "in response to determining", or "in response to detecting" according to the context. Similarly, the phrase "if determined" or "if [the described condition or event] is detected" can be interpreted as meaning "once determined", "in response to determining", "once [the described condition or event] is detected", or "in response to detecting [the described condition or event]" according to the context.

[0033] Please refer to Figure 1 and Figure 2 , Figure 1 which is a schematic flowchart of the DDR dynamic frequency switching method in the SSD service scenario provided by the embodiments of the present invention. Figure 2 which is a schematic diagram of the application scenario of the DDR dynamic frequency switching method in the SSD service scenario provided by the embodiments of the present invention. Figure 2 The module descriptions in

[0034] 1. MASTER0 to MASTERn: Source modules accessing the DDR SDRAM;

[0035] 2. DATA MUX: The selection unit of the access path, which realizes the path selection and data takeover of the access from MASTER to DDR SDRAM;

[0036] 3. PLL: The clock generation module, which supplies the working clock required by DDR SDRAM;

[0037] 4. PLL DMUX: The selection module for the input clock of DDR SDRAM, which selects the required frequency point to DDR SDRAM to realize the fast frequency switching process;

[0038] 5. DDR SDRAM CONTROLLER: The controller unit for DDR SDRAM access;

[0039] 6. DDR SDRAM: The DDR cache unit, which is used to cache external data;

[0040] 7. SYSTEM RAM: The system common RAM, which realizes the takeover operation of the system access data during the dynamic frequency switching process.

[0041] In the embodiment of the present invention, in addition to being compatible with the traditional frequency switching mode, the takeover operation for the access with traffic is added therein to realize fast frequency switching during the traffic process; because the capacity of the general SYSTEM RAM is not very large, if this module is accessed for a long time, it may cause performance problems. Therefore, a MUX selection is also made at the output end of the PLL to realize the fast switching of the input clock, reduce the time of fast frequency switching, and realize the requirement of dynamically switching the frequency of DDR SDRAM to reduce power consumption during the traffic process. ( Figure 2 wherein, vld: data valid flag; FREQ1 / FREQ2: corresponding to two different working frequencies; Fast_freq_mode: the frequency selection signal for FREQ1 / FREQ2; path1 / 2 / 3: representing three different access paths)

[0042] Correspondingly, the embodiment of the present invention provides a method for dynamically switching the frequency of DDR in the SSD service scenario. Refer to Figure 1 and in combination with Figure 2 The method includes the following steps:

[0043] S1, enable the frequency switching mode, wherein, DDR SDRAM ensures that the instructions before the enabling of the frequency switching mode are normally completed, and the instructions after the enabling of the frequency switching mode are imported into the system common RAM.

[0044] In specific implementation, when dynamic screen switching is required, enable the screen switching mode (implemented by configuring the Fast_freq_mode signal). At this time, the DDR SDRAM ensures that the instructions before the enabling of the frequency switching mode can be completed normally, and the instructions after the enabling of the frequency switching mode will be imported into the system common RAM (Path2). However, the system common RAM cannot return any response at this time.

[0045] Specifically, after the instructions after the enabling of the frequency switching mode are imported into the system common RAM, the system common RAM can respond to the system instructions only after ensuring the completion of the DDR SDRAM interaction, thus avoiding data access errors effectively. After the DDR SDRAM has interacted with all instructions, the access of the entire system is taken over by the system common RAM (Path2).

[0046] In some embodiments, before step S1, the method further includes the following steps: determining whether the power consumption of the DDR SDRAM is greater than a preset power consumption threshold; if the power consumption of the DDR SDRAM is greater than the preset power consumption threshold, execute the step of enabling the frequency switching mode.

[0047] In specific implementation, the power consumption threshold can be configured by those skilled in the art, and the present invention does not specifically limit this. If the power consumption of the DDR SDRAM is greater than the preset power consumption threshold, it indicates that the power consumption is too large and DDR dynamic frequency switching is required to reduce the system power consumption. At this time, execute the above step S1.

[0048] S2, obtain the configuration parameters of the target frequency point, and configure the configuration parameters of the target frequency point into the DDR SDRAM.

[0049] In specific implementation, the target frequency point refers to the frequency point to which the switch needs to be made. For example, in this embodiment, the target frequency point is frequency point 2. In the present invention, the configuration parameters of each frequency point are obtained in advance and stored in a preset storage location. Therefore, when performing dynamic frequency switching, the configuration parameters of the target frequency point can be read from the preset storage location, thereby improving the efficiency. The preset storage location can be the system common RAM.

[0050] Correspondingly, when configuring the configuration parameters of the target frequency point into the DDR SDRAM, the external PLL switches to the output clock corresponding to the target frequency point. For example, in this embodiment, it switches to FREQ2. This kind of PLL configuration does not need to be locked again, reducing the system dynamic frequency switching time.

[0051] In some embodiments, before step S2, the method further includes the following steps: initializing the DDR SDRAM based on each frequency point of the DDR SDRAM respectively to obtain configuration parameters of each frequency point of the DDR SDRAM; storing the configuration parameters of each frequency point of the DDR SDRAM in a preset storage location.

[0052] Specifically, the DDR SDRAM includes frequency point 1 and frequency point 2. When the system starts, the DDR SDRAM is initialized according to the required frequency point 1 (FREQ1, the high-speed frequency at which it needs to operate), and the initialization result of the DDR SDRAM (the configuration parameters of frequency point 1) is placed in the system common RAM; then the DDR SDRAM is initialized according to the required frequency point 2 (FREQ2, the low-frequency point set for power consumption reduction), and the initialization result of the DDR SDRAM (the configuration parameters of frequency point 2) is placed in the system common RAM, so that when performing frequency point switching for power consumption reduction in the later stage, the initialization result can be directly read from the system common RAM and used directly without re-initializing the DDR SDRAM.

[0053] Furthermore, the initialization result of frequency point 1 is configured into the DDR SDRAM and started. After the start is completed, the system is supported to access the DDR SDRAM (Path1).

[0054] S3, after the DDR SDRAM starts up successfully, configure the frequency switching mode exit enable. Among them, the system common RAM ensures that the instructions before the frequency switching mode exit enable can be completed normally, and the instructions after the frequency switching mode exit enable are all sent to the DDR SDRAM.

[0055] In specific implementation, after the DDR SDRAM starts up successfully, the frequency switching mode exit enable is configured at this time; similarly, after all the instructions after the frequency switching mode exit enable are sent to the DDR SDRAM, the DDR SDRAM can respond to the system instructions only after ensuring that the system common RAM completes the instructions before the frequency switching mode exit enable and the data in the system common RAM is transmitted to the DDR SDRAM.

[0056] Specifically, the system common RAM ensures that the instructions before the enabling of the frequency switching mode exit can be completed normally. The instructions after the enabling of the frequency switching mode exit are all sent to the DDR SDRAM, but the response terminal of the DDR SDRAM is suppressed, and the DDR SDRAM is not allowed to return any access results, ensuring that the system common RAM completes all the instructions before the enabling of the frequency switching mode exit. At this time, according to the service requirements, Path3 can be selected to transfer the data in the system common RAM to the DDR SDRAM. After ensuring that all the data has been placed in the DDR, the backpressure on the DDR SDRAM is released, and the DDR SDRAM can respond to the system instructions, enabling the system to operate normally.

[0057] An embodiment of the present invention provides a DDR dynamic frequency switching method in an SD service scenario, including: enabling the frequency switching mode, wherein the DDR SDRAM ensures that the instructions before the enabling of the frequency switching mode are completed normally, and the instructions after the enabling of the frequency switching mode are imported into the system common RAM; obtaining the configuration parameters of the target frequency point and configuring the configuration parameters of the target frequency point into the DDR SDRAM; after the DDR SDRAM starts up and completes, configuring the enabling of the frequency switching mode exit, wherein the system common RAM ensures that the instructions before the enabling of the frequency switching mode exit can be completed normally, and the instructions after the enabling of the frequency switching mode exit are all sent to the DDR SDRAM; by importing the instructions into the system common RAM and taking over by the system common RAM, and directly configuring the DDR SDRAM based on the configuration parameters of the target frequency point, the access to the DDR SDRAM does not need to be turned off throughout the process, and there is no need to re-initialize the DDR SDRAM, thereby greatly improving the efficiency of frequency switching, realizing the fast frequency switching operation of the DDR SDRAM, and ensuring the partial access requirements of the system while reducing power consumption.

[0058] Corresponding to the above DDR dynamic frequency switching method in the SSD service scenario, the present invention also provides a DDR dynamic frequency switching device in the SSD service scenario. The DDR dynamic frequency switching device in the SSD service scenario includes a unit for executing the above DDR dynamic frequency switching method in the SSD service scenario, and the DDR dynamic frequency switching device in the SSD service scenario can be configured in a terminal. Specifically, the DDR dynamic frequency switching device in the SSD service scenario includes:

[0059] An enabling unit for enabling the frequency switching mode, wherein the DDR SDRAM ensures that the instructions before the enabling of the frequency switching mode are completed normally, and the instructions after the enabling of the frequency switching mode are imported into the system common RAM;

[0060] A configuration unit for obtaining the configuration parameters of the target frequency point and configuring the configuration parameters of the target frequency point into the DDR SDRAM;

[0061] An exit unit, configured to configure the enabling of frequency switching mode exit after the DDR SDRAM starts up successfully. Among them, the system common RAM ensures that the instructions before the enabling of frequency switching mode exit can be completed normally, and the instructions after the enabling of frequency switching mode exit are all sent to the DDR SDRAM.

[0062] A further technical solution thereof is that the DDR dynamic frequency switching device in the SSD service scenario further includes:

[0063] A judgment unit, configured to judge whether the power consumption of the DDR SDRAM is greater than a preset power consumption threshold;

[0064] A jump unit, configured to jump to the step of enabling the frequency switching mode if the power consumption of the DDR SDRAM is greater than the preset power consumption threshold.

[0065] A further technical solution thereof is that the DDR dynamic frequency switching device in the SSD service scenario further includes:

[0066] An initialization unit, configured to initialize the DDR SDRAM based on each frequency point of the DDR SDRAM respectively to obtain the configuration parameters of each frequency point of the DDR SDRAM;

[0067] A storage unit, configured to store the configuration parameters of each frequency point of the DDR SDRAM in a preset storage location.

[0068] In some embodiments, such as this embodiment, obtaining the configuration parameters of the target frequency point includes:

[0069] Reading the configuration parameters of the target frequency point from a preset storage location.

[0070] In some embodiments, such as this embodiment, after the instructions after the enabling of the frequency switching mode are imported into the system common RAM, the system common RAM can respond to the system instructions only after ensuring the completion of the interaction between the DDR SDRAM.

[0071] In some embodiments, such as this embodiment, after the instructions after the enabling of the frequency switching mode exit are all sent to the DDR SDRAM, the DDR SDRAM can respond to the system instructions only after ensuring that the system common RAM completes the instructions before the enabling of the frequency switching mode exit and transfers the data in the system common RAM to the DDR SDRAM.

[0072] In some embodiments, such as this embodiment, when configuring the configuration parameters of the target frequency point into the DDR SDRAM, the external PLL switches to the output clock corresponding to the target frequency point.

[0073] It should be noted that those skilled in the art can clearly understand that the specific implementation processes of the DDR dynamic frequency switching device and each unit in the above SSD service scenario can refer to the corresponding descriptions in the foregoing method embodiments. For the sake of convenience and conciseness of description, they will not be elaborated here.

[0074] The DDR dynamic frequency switching device in the above SSD service scenario can be implemented in the form of a computer program, and this computer program can run on a computer device as shown in Figure 3 the figure.

[0075] Please refer to Figure 3 , Figure 3 which is a schematic block diagram of a computer device provided by an embodiment of the present application. The computer device 500 can be a terminal or a server.

[0076] The computer device 500 includes a processor 502, a memory, and a network interface 505 connected through a system bus 501. Among them, the memory can include a non-volatile storage medium 503 and an internal memory 504.

[0077] The non-volatile storage medium 503 can store an operating system 5031 and a computer program 5032. When the computer program 5032 is executed, the processor 502 can be caused to execute a DDR dynamic frequency switching method in an SSD service scenario.

[0078] The processor 502 is used to provide computing and control capabilities to support the operation of the entire computer device 500.

[0079] The internal memory 504 provides an environment for the operation of the computer program 5032 in the non-volatile storage medium 503. When the computer program 5032 is executed by the processor 502, the processor 502 can be caused to execute a DDR dynamic frequency switching method in an SSD service scenario.

[0080] The network interface 505 is used for network communication with other devices. Those skilled in the art can understand that the above structure is only a block diagram of some structures related to the solution of the present application, and does not constitute a limitation on the computer device 500 to which the solution of the present application is applied. The specific computer device 500 may include more or fewer components than those shown in the figure, or combine some components, or have different component arrangements.

[0081] Among them, the processor 502 is used to run the computer program 5032 stored in the memory to implement the steps of the above DDR dynamic frequency switching method in an SSD service scenario, specifically including the following steps:

[0082] Enable the frequency switching mode. Among them, the DDR SDRAM ensures that the instructions before the frequency switching mode is enabled are completed normally, and the instructions after the frequency switching mode is enabled are imported into the system common RAM;

[0083] Obtain the configuration parameters of the target frequency point, and configure the configuration parameters of the target frequency point into the DDR SDRAM;

[0084] After the DDR SDRAM starts up and completes, configure the enable to exit the frequency switching mode. Among them, the system common RAM ensures that the instructions before the enable to exit the frequency switching mode can be completed normally, and the instructions after the enable to exit the frequency switching mode are all sent to the DDR SDRAM.

[0085] In some embodiments, such as this embodiment, the method further includes:

[0086] Judge whether the power consumption of the DDR SDRAM is greater than a preset power consumption threshold;

[0087] If the power consumption of the DDR SDRAM is greater than the preset power consumption threshold, execute the step of enabling the frequency switching mode.

[0088] In some embodiments, such as this embodiment, before enabling the frequency switching mode, the method includes:

[0089] Initialize the DDR SDRAM based on each frequency point of the DDR SDRAM respectively to obtain the configuration parameters of each frequency point of the DDR SDRAM;

[0090] Store the configuration parameters of each frequency point of the DDR SDRAM in a preset storage location.

[0091] In some embodiments, such as this embodiment, the obtaining of the configuration parameters of the target frequency point includes:

[0092] Read the configuration parameters of the target frequency point from a preset storage location.

[0093] In some embodiments, such as this embodiment, after the instructions after the frequency switching mode is enabled are imported into the system common RAM, the system common RAM can respond to the system instructions only after ensuring the completion of the interaction with the DDR SDRAM.

[0094] In some embodiments, such as this embodiment, after all the instructions after the enable to exit the frequency switching mode are sent to the DDR SDRAM, the DDR SDRAM can respond to the system instructions only after ensuring that the system common RAM completes the instructions before the enable to exit the frequency switching mode and transfers the data in the system common RAM to the DDR SDRAM.

[0095] In some embodiments, such as this embodiment, when configuring the configuration parameters of the target frequency point into the DDR SDRAM, the external PLL switches to the output clock corresponding to the target frequency point.

[0096] It should be understood that in the embodiments of the present application, the processor 502 may be a central processing unit (CPU), and the processor 502 may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Among them, the general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0097] Those of ordinary skill in the art can understand that all or part of the processes in the methods of implementing the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a storage medium, and the storage medium is a computer-readable storage medium. The computer program is executed by at least one processor in the computer system to implement the process steps of the embodiments of the above method.

[0098] Therefore, the present invention also provides a storage medium. The storage medium may be a computer-readable storage medium. The storage medium stores a computer program. When the computer program is executed by a processor, the processor executes the steps of the above DDR dynamic frequency switching method in a SSD service scenario, specifically including the following steps:

[0099] Enable the frequency switching mode. Among them, the DDR SDRAM ensures that the instructions before the frequency switching mode is enabled are completed normally, and the instructions after the frequency switching mode is enabled are imported into the system common RAM;

[0100] Obtain the configuration parameters of the target frequency point, and configure the configuration parameters of the target frequency point into the DDR SDRAM;

[0101] After the DDR SDRAM starts up and is completed, configure the disable of the frequency switching mode. Among them, the system common RAM ensures that the instructions before the frequency switching mode is disabled can be completed normally, and the instructions after the frequency switching mode is disabled are all sent to the DDR SDRAM.

[0102] In some embodiments, such as this embodiment, the method further includes:

[0103] Determine whether the power consumption of the DDR SDRAM is greater than a preset power consumption threshold;

[0104] If the power consumption of the DDR SDRAM is greater than the preset power consumption threshold, execute the step of enabling the frequency switching mode.

[0105] In some embodiments, such as this embodiment, before enabling the frequency switching mode, the method includes:

[0106] Initialize the DDR SDRAM based on each frequency point of the DDR SDRAM respectively to obtain the configuration parameters of each frequency point of the DDR SDRAM;

[0107] Store the configuration parameters of each frequency point of the DDR SDRAM in a preset storage location.

[0108] In some embodiments, such as this embodiment, obtaining the configuration parameters of the target frequency point includes:

[0109] Read the configuration parameters of the target frequency point from a preset storage location.

[0110] In some embodiments, such as this embodiment, after the instructions after enabling the frequency switching mode are imported into the system common RAM, the system common RAM can respond to the system instructions only after ensuring the completion of the interaction with the DDR SDRAM.

[0111] In some embodiments, such as this embodiment, after the instructions after disabling the frequency switching mode are all sent to the DDR SDRAM, the DDR SDRAM can respond to the system instructions only after ensuring that the system common RAM completes the instructions before disabling the frequency switching mode and the data in the system common RAM is transmitted to the DDR SDRAM.

[0112] In some embodiments, such as this embodiment, when configuring the configuration parameters of the target frequency point into the DDR SDRAM, the external PLL switches to the output clock corresponding to the target frequency point.

[0113] The storage medium is a physical, non-transitory storage medium, such as a USB flash drive, a portable hard drive, a read-only memory (ROM), a magnetic disk, or an optical disc, etc., various physical storage media that can store program codes. The computer-readable storage medium can be non-volatile or volatile.

[0114] Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0115] In several embodiments provided by the present invention, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of each unit is only a logical function division, and there may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed.

[0116] The steps in the method embodiments of the present invention can be adjusted, combined, and deleted according to actual needs. The units in the device embodiments of the present invention can be combined, divided, and deleted according to actual needs. In addition, the functional units in each embodiment of the present invention can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit.

[0117] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a terminal, or a network device, etc.) to execute all or part of the steps of the methods described in each embodiment of the present invention.

[0118] In the above embodiments, the descriptions of each embodiment have their own emphases. For the parts not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0119] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention is also intended to include these changes and modifications.

[0120] As described above, it is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A DDR dynamic frequency switching method in an SSD service scenario, characterized in that: include: Enable the frequency cutting mode, wherein the DDR SDRAM ensures that the instructions before the frequency cutting mode is enabled are completed normally, and the instructions after the frequency cutting mode is enabled are imported into the system public RAM; Acquire configuration parameters of a target frequency point, and configure the configuration parameters of the target frequency point into the DDR SDRAM; After the DDR SDRAM is started, the frequency cutting mode is enabled. The system common RAM ensures that the instructions before the frequency cutting mode is enabled can be completed normally, and the instructions after the frequency cutting mode is enabled are sent to the DDR SDRAM.

2. The DDR dynamic frequency switching method in the SSD service scenario according to claim 1, characterized in that: The method further comprises: Determine whether the power consumption of the DDR SDRAM is greater than a preset power consumption threshold; If the power consumption of the DDR SDRAM is greater than a preset power consumption threshold, the step of enabling the frequency switching mode is performed.

3. The DDR dynamic frequency switching method in the SSD service scenario according to claim 1, characterized in that: Before enabling the frequency cutting mode, the method includes: Initializing the DDR SDRAM based on each frequency point of the DDR SDRAM respectively to obtain configuration parameters of each frequency point of the DDR SDRAM; The configuration parameters of each frequency point of the DDR SDRAM are stored in a preset storage location.

4. The DDR dynamic frequency switching method in the SSD service scenario according to claim 3, characterized in that: The step of obtaining the configuration parameters of the target frequency point includes: The configuration parameters of the target frequency point are read from a preset storage location.

5. The DDR dynamic frequency switching method in the SSD service scenario according to claim 1, characterized in that: After the instructions after the frequency cutting mode is enabled are imported into the system common RAM, the system common RAM can respond to the system instructions only after ensuring that the DDR SDRAM interaction is completed.

6. The DDR dynamic frequency switching method in the SSD service scenario according to claim 1, characterized in that: After all instructions after the frequency cutting mode is exited and enabled are sent to the DDR SDRAM, the DDR SDRAM can respond to the system instructions only after ensuring that the system common RAM completes the instructions before the frequency cutting mode is exited and enabled and the data in the system common RAM is transmitted to the DDR SDRAM.

7. The DDR dynamic frequency switching method in the SSD service scenario according to claim 1, characterized in that: When the configuration parameters of the target frequency are configured in the DDR SDRAM, the external PLL switches to the output clock corresponding to the target frequency.

8. A DDR dynamic frequency switching device in an SSD service scenario, characterized in that: The method comprises a unit for executing the method according to any one of claims 1 to 7.

9. A computer device, characterized in that: The computer device includes a memory and a processor, the memory stores a computer program, and the processor implements the method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 1 to 7 can be implemented.

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