Chip packaging structure and packaging method thereof

Abstract

The invention relates to a chip packaging structure and a packaging method thereof. The packaging method of the chip packaging structure comprises the steps that a plurality of filter chips are arranged on the packaging side of a substrate in an inverted mode, a control chip is arranged on the packaging side of the substrate in a normal mode, and all the filter chips are electrically connected with the substrate; an opening is formed in the packaging film, the opened packaging film is attached to the packaging side of the substrate and covers the filter chip, and the control chip is all located in the range defined by the opening of the packaging film; and mounting a plurality of conductive elements on the packaging side of the substrate, and electrically connecting each conductive element with the substrate and the control chip after all the conductive elements are positioned in a range defined by the opening of the packaging film. According to the chip packaging structure and the packaging method thereof provided by the invention, the product development speed can be increased.

Description

Technical Field

[0001] This application relates to the field of semiconductor packaging technology, and particularly to a chip packaging structure and its packaging method. Background Art

[0002] During the product development stage of a chip packaging structure, a control chip and multiple filter chips are usually arranged on the substrate of the chip packaging structure, and the on-off of different filter chips is controlled by the control chip to control the signal flow direction to detect whether the product is qualified.

[0003] In the prior art, both the filter chip and the control chip are flip-chip mounted on the substrate, and a plurality of bumps are arranged on the side of the filter chip and the control chip facing the substrate. The cavity packaging of the filter chip and the control chip can be completed by using the bumps.

[0004] In fact, only the filter chip is the chip that needs cavity packaging, while the control chip is the chip that does not need cavity packaging. The above setting method results in the need to arrange a plurality of bumps on the control chip, and the design and manufacture of the bumps require a long time, resulting in an increase in the invested manpower and time, and a slowdown in the development speed. In addition, with more bumps, the substrate wiring will be relatively complex, the design cycle and difficulty will increase, further resulting in a slowdown in the development speed. Summary of the Invention

[0005] Based on this, it is necessary to provide a chip packaging structure and its packaging method that can improve the product development speed for the above problems.

[0006] A packaging method for a chip packaging structure, the packaging method of the chip packaging structure includes:

[0007] Flip-chip mount a plurality of filter chips and face-up mount a control chip on the packaging side of the substrate, and electrically connect each of the filter chips to the substrate;

[0008] Open an opening in the encapsulation film, and attach the opened encapsulation film to the packaging side of the substrate to cover the filter chips, and the control chip is entirely within the range defined by the opening of the encapsulation film; and

[0009] Mount a plurality of conductive elements on the packaging side of the substrate, and after all the conductive elements are entirely within the range defined by the opening of the encapsulation film, electrically connect each of the conductive elements to the substrate and the control chip.

[0010] In some embodiments, in the direction of the central axis of the opening pointing from the edge of the opening, the minimum distance between the control chip and the edge of the opening is L1, and L1≥150um.

[0011] In some embodiments, the minimum distance between each of the filter chips and the edge of the opening is L2, and L2≥200um.

[0012] In some embodiments, forming an opening in the encapsulation film includes: forming a laser opening in the encapsulation film;

[0013] And / or, electrically connecting each of the conductive elements to the substrate and the control chip includes: soldering each of the conductive elements to the substrate and the control chip for electrical connection.

[0014] In some embodiments, after electrically connecting each of the conductive elements to the substrate and the control chip, it further includes:

[0015] Forming a plastic encapsulation layer on the encapsulation side of the substrate, and the plastic encapsulation layer seals the encapsulation film and its opening, the control chip, and the conductive elements.

[0016] In some embodiments, all the conductive elements and all the filter chips are arranged at intervals along the circumferential direction around the control chip.

[0017] A chip packaging structure, the chip packaging structure includes:

[0018] A substrate having an encapsulation side;

[0019] A plurality of filter chips, flip-chip mounted on the encapsulation side, and each of the filter chips is electrically connected to the substrate;

[0020] A control chip, face-up mounted on the encapsulation side of the substrate;

[0021] An encapsulation film having an opening, the encapsulation film is mounted on the encapsulation side of the substrate and covers the filter chips, and the control chip is entirely within the range defined by the opening of the encapsulation film; and

[0022] A plurality of conductive elements, mounted on the encapsulation side of the substrate, all the conductive elements are entirely within the range defined by the opening of the encapsulation film, and each of the conductive elements is electrically connected to the substrate and the control chip.

[0023] In some embodiments, in the direction of the central axis of the opening pointing from the edge of the opening, the minimum distance between the control chip and the edge of the opening is L1, and L1≥150um.

[0024] In some embodiments, the minimum distance between each of the filter chips and the edge of the opening is L2, and L2≥200um.

[0025] In some embodiments, the chip packaging structure further includes a plastic encapsulation layer, which is encapsulated on the encapsulation side of the substrate and is used to seal the encapsulation film and its opening, the control chip, and the conductive element.

[0026] Compared with the prior art, the present application has the following beneficial effects:

[0027] For the above chip packaging structure and its packaging method, the control chip is mounted face up. After covering the encapsulation film, the conductive element can be loaded through the opening on the encapsulation film, and it is convenient to electrically connect the conductive element to the substrate and the control chip. This design does not require the setting of bumps on the control chip, reducing the increase in investment in manpower and time, and accelerating the development speed. In addition, with fewer bumps, the substrate wiring will be relatively simple, reducing the design cycle and difficulty, and further enhancing the development speed. Description of the Drawings

[0028] Figure 1 It is a schematic flowchart of the packaging method of the chip packaging structure in an embodiment of the present application;

[0029] Figure 2 It is a top view of the chip packaging structure in an embodiment of the present application after removing the plastic encapsulation layer;

[0030] Figure 3 It is a cross-sectional view of the chip packaging structure in an embodiment of the present application taken along the A-A direction;

[0031] Figure 4 It is a schematic diagram of the cooperation between the opening of the encapsulation film and the control chip in an embodiment of the present application.

[0032] Reference Numerals in the Drawings:

[0033] 100, chip packaging structure;

[0034] 10, substrate; 20, filter chip; 21, cavity; 30, control chip; 40, encapsulation film; 41, opening; 50, plastic encapsulation layer; 60, conductive element; 70, bump. Detailed Embodiments

[0035] To make the above objects, features, and advantages of the present application more apparent and understandable, the following detailed description of the specific embodiments of the present application will be made in conjunction with the accompanying drawings. Many specific details are set forth in the following description to fully understand the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the connotation of the present application. Therefore, the present application is not limited by the specific embodiments disclosed below.

[0036] In the description of the present application, it should be understood that the orientation or positional relationship indicated by terms such as "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present application.

[0037] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically and clearly defined.

[0038] In the present application, unless otherwise clearly specified and limited, terms such as "mounted", "connected", "coupled", "fixed", etc. should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0039] In the present application, unless otherwise clearly specified and limited, the first feature being "on" or "under" the second feature may be that the first and second features are in direct contact, or the first and second features are indirectly in contact through an intermediate medium. Moreover, the first feature being "above", "over" and "on top of" the second feature may be that the first feature is directly above or obliquely above the second feature, or merely indicates that the first feature has a higher horizontal height than the second feature. The first feature being "under", "beneath" and "underneath" the second feature may be that the first feature is directly below or obliquely below the second feature, or merely indicates that the first feature has a lower horizontal height than the second feature.

[0040] It should be noted that when an element is referred to as "fixed to" or "disposed on" another element, it can be directly on the other element or there may be an intermediate element. When an element is considered to be "connected" to another element, it can be directly connected to the other element or there may be an intermediate element at the same time. The terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used herein are only for illustrative purposes and do not represent the only implementation.

[0041] In the product development stage of a chip packaging structure, a control chip and a plurality of filter chips are usually disposed on the substrate of the chip packaging structure, and the control chip is used to control the on / off of different filter chips to control the signal flow direction, so as to detect whether the product is qualified.

[0042] In the prior art, whether it is a filter chip or a control chip, they are both flip-chip mounted on the substrate, and a plurality of bumps are disposed on the side of the filter chip and the control chip facing the substrate. The cavity packaging of the filter chip and the control chip can be completed by using the bumps.

[0043] In fact, only the filter chip is a chip that needs cavity packaging, while the control chip is a chip that does not need cavity packaging. The above setting method results in the need to set a plurality of bumps on the control chip, and the design and manufacture of bumps require a long time, resulting in an increase in the invested manpower and time, and the development speed becomes slower. In addition, if there are more bumps, the substrate wiring will be relatively complex, and the design cycle and difficulty will increase, further resulting in a slower development speed.

[0044] Please refer to Figures 1 to 3 simultaneously, in order to alleviate the above problems, the present application provides a packaging method for a chip packaging structure 100. The packaging method of the chip packaging structure 100 includes the following steps:

[0045] S100. Flip-chip mount a plurality of filter chips 20 and face-up mount a control chip 30 on the packaging side of the substrate 10, and electrically connect each filter chip 20 to the substrate 10;

[0046] S200. Open an opening 41 in the encapsulation film 40, and attach the encapsulation film 40 after opening the opening 41 to the packaging side of the substrate 10 and cover the filter chips 20, and the control chip 30 is entirely located within the range defined by the opening 41 of the encapsulation film 40; and

[0047] S300. Mount a plurality of conductive elements 60 on the packaging side of the substrate 10, and after all the conductive elements 60 are entirely located within the range defined by the opening 41 of the encapsulation film 40, electrically connect each conductive element 60 to the substrate 10 and the control chip 30.

[0048] Among them, the encapsulation side of the substrate 10 refers to the side used to carry the filter chip 20 and the control chip 30 for encapsulation. The substrate 10 has traces on its encapsulation side, and the encapsulation side of the substrate 10 also has a plurality of first solder joints and a plurality of second solder joints.

[0049] The filter chip 20 is used to filter the input signal to remove the frequency components that the signal does not need. The filter chip 20 is flip-chip mounted, which means the active surface of the filter chip 20 (i.e., the side containing components such as transistors, resistors, and capacitors) faces the substrate 10. A plurality of bumps 70 are designed on the active surface of the filter chip 20. The bumps 70 on the filter chip 20 are in one-to-one correspondence with the first solder joints, and the bumps 70 on the filter chip 20 are eutectic soldered to the corresponding first solder joints on the substrate 10 to achieve the electrical connection between the filter chip 20 and the substrate 10 (i.e., to achieve the electrical connection of the circuits between the filter chip 20 and the substrate 10). In addition, due to the arrangement of the bumps 70, a cavity 21 is formed between the filter chip 20 and the substrate 10. After the chip packaging structure 100 is covered with the encapsulation film 40, the filter chip 20 is encapsulated in the cavity 21 to prevent foreign objects from entering the cavity 21 and causing the electrical connection between the filter chip 20 and the substrate 10 to fail.

[0050] The control chip 30 is face-up mounted, which means the active surface of the control chip 30 faces away from the substrate 10. A plurality of conductive positions are provided on the active surface of the control chip 30. The conductive elements 60 are in one-to-one correspondence with the conductive positions and the second solder joints. The conductive elements 60 are electrically connected to the corresponding conductive positions and the second solder joints to achieve the electrical connection between the control chip 30 and the substrate 10 (i.e., to achieve the electrical connection of the circuits between the control chip 30 and the substrate 10). Furthermore, through the trace design on the substrate 10, the control chip 30 can be electrically connected to each filter chip 20 (i.e., to achieve the electrical connection of the circuits between the control chip 30 and each filter chip 20), so as to achieve the purpose of the control chip 30 controlling the on-off of each filter chip 20.

[0051] The encapsulation film 40 is mounted on the encapsulation side of the substrate 10 and covers the filter chip 20 to achieve the cavity 21 encapsulation of the filter chip 20. In addition, the encapsulation film 40 has an opening 41. The control chip 30 is entirely located within the range defined by the opening 41 of the encapsulation film 40. Therefore, the control chip 30 can be exposed through the opening 41. Then, all the conductive elements 60 are mounted on the encapsulation side of the substrate 10 through the opening 41, and all the conductive elements 60 are entirely located within the range defined by the opening 41 of the encapsulation film 40 to facilitate the subsequent electrical connection of each conductive element 60 to the substrate 10 and the control chip 30 to achieve the electrical connection of the circuits between the control chip 30 and the substrate 10.

[0052] It is worth mentioning that, to ensure the accuracy of the connection between the conductive element 60, the substrate 10, and the control chip 30, before electrically connecting the conductive element 60 to the substrate 10 and the control chip 30, the conductive element 60 should be bonded to the substrate 10 first to position the conductive element 60, thereby reducing the risk of movement during the connection process between the conductive element 60, the substrate 10, and the control chip 30, and improving the accuracy of the connection of the conductive element 60.

[0053] It can be understood that all the control chips 30 and all the conductive elements 60 are located within the range defined by the opening 41 of the encapsulation film 40, which means that the area of the opening 41 of the encapsulation film is large enough so that the orthographic projection of the control chip 30 and all the conductive elements 60 on the encapsulation side of the substrate 10 can completely fall within the range defined by the edge of the opening 41 of the encapsulation film 40. This method facilitates the installation of the conductive element 60 and can quickly electrically connect the conductive element 60 to the substrate 10 and the control chip 30.

[0054] In the present application, the control chip 30 is mounted upright, and after covering the encapsulation film 40, the conductive element 60 can be inserted through the opening 41 on the encapsulation film 40, which facilitates the electrical connection of the conductive element 60 to the substrate 10 and the control chip 30. This design does not require the setting of bumps 70 on the control chip 30, reducing the investment in manpower and time, and speeding up the development speed. In addition, with fewer bumps 70, the wiring on the substrate 10 will be relatively simple, reducing the design cycle and difficulty, and further improving the development speed.

[0055] Please refer to Figure 1 、 Figure 2 and Figure 4 , in some embodiments, in the direction of the central axis of the opening 41 pointing from the edge of the opening 41, the minimum distance between the control chip 30 and the edge of the opening 41 is L1, and L1 ≥ 150um.

[0056] Taking the opening 41 on the encapsulation film 40 as a rectangular opening, the control chip 30 as a rectangle, the central axis of the opening 41 on the encapsulation film 40 coinciding with the central axis of the control chip 30, and the four sides of the edge of the opening 41 corresponding to and being parallel to the four sides of the outer edge of the control chip 30 as an example, the minimum distance L1 between the control chip 30 and the edge of the opening 41 is the distance between the edge of the opening 41 of the encapsulation film 40 and the two parallel sides corresponding to the outer edge of the control chip 30, specifically as Figure 2 shown.

[0057] Taking the opening 41 on the encapsulation film 40 as a circular opening and the control chip 30 as circular, and taking the case where the central axis of the opening 41 of the encapsulation film 40 coincides with the central axis of the control chip 30 as an example, the minimum distance L1 between the control chip 30 and the edge of the opening 41 is the distance between the edge of the opening 41 of the encapsulation film 40 and the outer edge of the control chip 30 in the radial direction of the opening 41 of the encapsulation film 40. Specifically, as shown in Figure 4 shown.

[0058] By designing the minimum distance L1 between the control chip 30 and the edge of the opening 41 to be L1≥150um, it can ensure that there is enough space between the control chip 30 and the edge of the opening 41 of the encapsulation film 40 to install the conductive element 60, and it is sufficient to complete the electrical connection operation between the conductive element 60, the substrate 10 and the control chip 30.

[0059] Please refer to Figure 2 , in some embodiments, the minimum distance between each filter chip 20 and the edge of the opening 41 is L2, and L2≥200um.

[0060] Taking the opening 41 on the encapsulation film 40 as a rectangular opening and the filter chip 20 as rectangular as an example, the minimum distance L2 between the filter chip 20 and the edge of the opening 41 of the encapsulation film is the distance between the two closest sides among the outer edge of the filter chip 20 and the edge of the opening 41 of the encapsulation film. Specifically, as shown in Figure 2 shown.

[0061] By designing the minimum distance between each filter chip 20 and the edge of the opening 41 of the encapsulation film to be L2, and L2≥200um, in this way, after the encapsulation film covers the filter chip, there is still a certain distance between the outer edge of the filter chip and the edge of the opening 41 of the encapsulation film, and the effect of the encapsulation film sealing the filter chip is better, and the problem of the failure of the chip packaging structure 100 caused by the air leakage of the cavity 21 will not occur after the film covering process.

[0062] Please refer to Figure 2 and Figure 3 , in some embodiments, opening the opening 41 on the encapsulation film 40 includes: laser-opening the opening 41 on the encapsulation film 40. By using the method of laser-opening 41, the opening speed is fast, the production efficiency is high, and it is suitable for mass production. In addition, during the opening process, there is no contact, no deformation, no burrs, and the finished product can be obtained by one processing, saving time and manpower.

[0063] In some embodiments, electrically connecting each conductive element 60 to the substrate 10 and the control chip includes: welding each conductive element 60 to the substrate 10 and the control chip 30 for electrical connection.

[0064] Specifically, the conductive element 60 can be a solder strip or a welding wire. The conductive element 60 is welded to the substrate 10 and the control chip 30 to achieve electrical connection between the conductive element 60, the substrate 10 and the control chip 30. This design is convenient for operation, and the connection between the conductive element 60, the substrate 10 and the control chip 30 is stable and reliable.

[0065] Please refer to Figure 1 and Figure 3 , in some embodiments, after electrically connecting each conductive element 60 to the substrate 10 and the control chip 30, it further includes step S400: forming a plastic encapsulation layer 50 on the encapsulation side of the substrate 10. The plastic encapsulation layer 50 hermetically encapsulates the encapsulation film 40 and its opening 41, the control chip 30, and the conductive element 60 to reduce interference from the outside to the control chip 30, the filter chip 20, and the substrate 10.

[0066] Optionally, plastic encapsulation materials such as epoxy resin, polyethylene, and polypropylene can be used to encapsulate the control chip 30, the filter chip 20, and the substrate 10 to form the plastic encapsulation layer 50.

[0067] Specifically, in the traditional chip packaging structure 100, the encapsulation film completely encapsulates the control chip 30, the filter chip 20, and the substrate 10. Although the encapsulation film 40 is a thermoplastic material, during the thermoplastic process of the encapsulation film 40, the air between the encapsulation film 40 and the substrate 10 may not be completely exhausted. Due to the presence of air, the encapsulation film 40 cannot be tightly attached to the substrate 10 and does not have the supporting force to support the plastic encapsulation layer 50. When the encapsulation film 40 is stressed or heated, it will have a certain deformation, which will further cause the deformation of the plastic encapsulation layer 50, and the weak welding points inside the chip packaging structure 100 (such as the welding points between the conductive element 60 and the substrate 10, the welding points between the conductive element 60 and the control chip 30, and the welding points between the filter chip 20 and the substrate 10) will be stressed by the plastic encapsulation layer 50, resulting in cracks or even fractures, the function of the chip packaging structure 100 fails, causing greater economic losses, and moreover, the sustainability of the function during the subsequent use of the chip packaging structure 100 cannot be guaranteed.

[0068] In the present application, by providing an opening 41 on the encapsulation film 40, air can be discharged along the opening 41 on the encapsulation film 40 during the plastic encapsulation process, enabling the encapsulation film 40 to closely adhere to the substrate 10 and the filter chip 20 during the thermoplastic process, and having a better supporting force for supporting the plastic encapsulation layer 50. Moreover, the deformation degree of the encapsulation film 40 is relatively small when it is stressed or heated. In this way, the plastic encapsulation layer 50 is also not easily deformed, and the stress applied to the welding points inside the chip packaging structure 100 is also relatively small, and can even be ignored. In addition, after plastic encapsulation, at the opening 41 of the coating film, the plastic encapsulation layer 50 and the substrate 10 are combined to form a rigid connection. During the subsequent use of the chip packaging structure 100, the substrate 10 can effectively provide a rigid supporting effect on the plastic encapsulation layer 50, further reducing the risk of functional failure of the chip packaging structure 100 caused by the deformation of the encapsulation film 40, reducing a large amount of manpower and material resources consumption, saving resources, and thus improving the product production efficiency.

[0069] Please refer to Figure 1 and Figure 2 , in some embodiments, all the conductive elements 60 and all the filter chips 20 are arranged at intervals around the circumference of the control chip 30. Under this design, the conductive elements 60 and the filter chips 20 can be evenly arranged along the circumference of the control chip 30. Moreover, the traces on the substrate 10 can also be reasonably arranged, enabling the control chip 30 to be electrically connected to each filter chip 20 through the circuits formed by the traces and the conductive elements 60. Additionally, when all the conductive elements 60 and all the filter chips 20 are arranged at intervals around the circumference of the control chip 30, there is a relatively short distance between each filter chip 20 and the control chip 30. Therefore, the conductive elements 60 for realizing the electrical connection between the control chip 30 and the filter chips 20 and the traces on the substrate 10 can also be designed to be shorter, reducing the manufacturing cost of the chip packaging structure 100.

[0070] Please refer to Figure 2 and Figure 3 , the present application also provides a chip packaging structure 100, which is manufactured by using the packaging method of the chip packaging structure 100 described in any one of the above embodiments.

[0071] The chip packaging structure 100 includes a substrate 10, a plurality of filter chips 20, a control chip 30, and an encapsulation film 40. The substrate 10 has a packaging side, and all the filter chips 20 are flip-chip mounted on the packaging side. Each filter chip 20 is electrically connected to the substrate 10. The control chip 30 is face-up mounted on the packaging side of the substrate 10. The encapsulation film 40 has an opening 41. The encapsulation film 40 is mounted on the packaging side of the substrate 10 and covers the filter chips 20. The control chip 30 is entirely located within the range defined by the opening 41 of the encapsulation film 40. All the conductive elements 60 are mounted on the packaging side of the substrate 10, and all the conductive elements 60 are entirely located within the range defined by the opening 41 of the encapsulation film 40. Each conductive element 60 is electrically connected to the substrate 10 and the control chip 30.

[0072] Among them, the packaging side of the substrate 10 refers to the side used to carry the filter chips 20 and the control chip 30 for packaging. The substrate 10 has traces on its packaging side, and the packaging side of the substrate 10 also has a plurality of first solder joints and a plurality of second solder joints.

[0073] The filter chip 20 is used to filter the input signal to remove the frequency components that the signal does not need. The flip-chip mounting of the filter chip 20 means the way that the active surface of the filter chip 20 (i.e., the side containing elements such as transistors, resistors, and capacitors) faces the substrate 10. A plurality of bumps 70 are designed on the active surface of the filter chip 20. The bumps 70 correspond to the first solder joints one by one. The bumps 70 on the filter chip 20 are eutectic soldered to the corresponding first solder joints on the substrate 10 to achieve the electrical connection between the filter chip 20 and the substrate 10 (i.e., to achieve the electrical connection of the circuits between the filter chip 20 and the substrate 10). In addition, due to the setting of the bumps 70, a cavity 21 is formed between the filter chip 20 and the substrate 10. After the chip packaging structure 100 is covered with the encapsulation film 40, the filter chip 20 forms a cavity 21 encapsulation to prevent foreign objects from entering the cavity 21 and causing the electrical connection between the filter chip 20 and the substrate 10 to fail.

[0074] The face-up mounting of the control chip 30 means the way that the active surface of the control chip 30 faces away from the substrate 10. A plurality of conductive positions are provided on the active surface of the control chip 30. The conductive elements 60 correspond to the conductive positions and the second solder joints one by one. The conductive elements 60 are electrically connected to the corresponding conductive positions and the second solder joints to achieve the electrical connection between the control chip 30 and the substrate 10 (i.e., to achieve the electrical connection of the circuits between the control chip 30 and the substrate 10). Furthermore, through the trace design on the substrate 10, the control chip 30 can be electrically connected to each filter chip 20 (i.e., to achieve the electrical connection between the control chip 30 and each filter chip 20), so as to achieve the purpose of the control chip 30 controlling the on-off of each filter chip 20.

[0075] The encapsulation film 40 is mounted on the encapsulation side of the substrate 10 and covers the filter chip 20 to achieve the encapsulation of the cavity 21 of the filter chip 20. In addition, the encapsulation film 40 has an opening 41, and the control chip 30 is entirely located within the range defined by the opening 41 of the encapsulation film 40. Therefore, the control chip 30 can be exposed through the opening 41. Then, all the conductive elements 60 are mounted on the encapsulation side of the substrate 10 through the opening 41, and all the conductive elements 60 are entirely located within the range defined by the opening 41 of the encapsulation film 40, so as to facilitate the subsequent electrical connection of each conductive element 60 with the substrate 10 and the control chip 30, and to achieve the electrical connection of the circuit between the control chip 30 and the substrate 10.

[0076] It is worth mentioning that to ensure the accuracy of the connection between the conductive element 60 and the substrate 10 and the control chip 30, before electrically connecting the conductive element 60 with the substrate 10 and the control chip 30, the conductive element 60 should be bonded to the substrate 10 first to position the conductive element 60, thereby reducing the risk of movement during the connection process of the conductive element 60 with the substrate 10 and the control chip 30 and improving the connection accuracy of the conductive element 60.

[0077] It can be understood that all the control chip 30 and all the conductive elements 60 being entirely located within the range defined by the opening 41 of the encapsulation film 40 means that the area of the opening 41 of the encapsulation film is large enough so that the orthographic projection of the control chip 30 and all the conductive elements 60 on the encapsulation side of the substrate 10 can completely fall within the range defined by the edge of the opening 41 of the encapsulation film 40. This method facilitates the installation of the conductive element 60 and can quickly electrically connect the conductive element 60 with the substrate 10 and the control chip 30.

[0078] In this application, the control chip 30 is mounted upright. After covering the encapsulation film 40, the conductive element 60 can be inserted through the opening 41 on the encapsulation film 40, and it is convenient to electrically connect the conductive element 60 with the substrate 10 and the control chip 30. This design does not require the setting of bumps 70 on the control chip 30, reducing the increase in investment in manpower and time, and accelerating the development speed. In addition, with fewer bumps 70, the wiring of the substrate 10 will be relatively simple, reducing the design cycle and difficulty, and further improving the development speed.

[0079] Please refer to Figure 2 and Figure 4 , in some embodiments, in the direction of the central axis of the opening 41 pointing from the edge of the opening 41, the minimum distance between the control chip 30 and the edge of the opening 41 is L1, and L1 ≥ 150um.

[0080] Taking the opening 41 on the encapsulation film 40 as a rectangular opening, the control chip 30 as rectangular, the central axis of the opening 41 on the encapsulation film 40 coincides with the central axis of the control chip 30, and the four sides of the edge of the opening 41 correspond to and are parallel to the four sides of the outer edge of the control chip 30 one by one as an example, the minimum distance L1 between the control chip 30 and the edge of the opening 41 is the distance between the edge of the opening 41 of the encapsulation film 40 and the two parallel sides corresponding to and parallel to the outer edge of the control chip 30. Specifically, as shown in Figure 2 shown.

[0081] By designing the minimum distance L1 between the control chip 30 and the edge of the opening 41 to be L1≥150um, it can ensure that there is enough space between the control chip 30 and the edge of the opening 41 of the encapsulation film 40 to place the conductive element 60, and it is sufficient to complete the electrical connection operation between the conductive element 60, the substrate 10 and the control chip 30.

[0082] Please refer to Figure 2 , in some embodiments, the minimum distance between each filter chip 20 and the edge of the opening 41 is L2, and L2≥200um.

[0083] Taking the opening 41 on the encapsulation film 40 as a rectangular opening and the filter chip 20 as rectangular as an example, the minimum distance L2 between the filter chip 20 and the edge of the opening 41 of the encapsulation film is the distance between the two closest sides of the outer edge of the filter chip 20 and the edge of the opening 41 of the encapsulation film. Specifically, as shown in Figure 2 shown.

[0084] By designing the minimum distance between each filter chip 20 and the edge of the opening 41 of the encapsulation film to be L2, and L2≥200um, in this way, after the encapsulation film covers the filter chip, there is still a certain distance between the outer edge of the filter chip and the edge of the opening 41 of the encapsulation film, and the effect of the encapsulation film sealing the filter chip is better, and the problem of the chip packaging structure 100 failing due to air leakage in the cavity 21 will not occur after the film covering process.

[0085] Please refer to Figure 2 and Figure 3 , in some embodiments, the chip packaging structure 100 further includes a plastic encapsulation layer 50. The plastic encapsulation layer 50 is plastic encapsulated on the encapsulation side of the substrate 10 and is used to seal the encapsulation film 40 and its opening 41, the control chip 30 and the conductive element 60 to reduce the interference from the outside to the control chip 30, the filter chip 20 and the substrate 10.

[0086] Optionally, plastic encapsulation materials such as epoxy resin, polyethylene and polypropylene can be used to plastic encapsulate the control chip 30, the filter chip 20 and the substrate 10 to form the plastic encapsulation layer 50.

[0087] Specifically, in the traditional chip packaging structure 100, the encapsulation film completely encapsulates the control chip 30, the filter chip 20 and the substrate 10. Although the encapsulation film 40 is a thermoplastic material, during the thermoplastic process of the encapsulation film 40, the air between the encapsulation film 40 and the substrate 10 may not be completely discharged. Due to the presence of air, the encapsulation film 40 cannot be closely attached to the substrate 10 and does not have the supporting force to support the plastic encapsulation layer 50. When the encapsulation film 40 is stressed or heated, it will have a certain deformation, which in turn causes the plastic encapsulation layer 50 to deform, and the welding joints inside the chip packaging structure 100 that are weak in stress (such as the welding joints between the conductive element 60 and the substrate 10, the welding joints between the conductive element 60 and the control chip 30, and the welding joints between the filter chip 20 and the substrate 10) are stressed by the plastic encapsulation layer 50, resulting in cracks or even fractures, the function of the chip packaging structure 100 fails, causing greater economic losses. Moreover, the sustainability of the function during the subsequent use of the chip packaging structure 100 cannot be guaranteed.

[0088] In this application, by providing an opening 41 on the encapsulation film 40, air can be discharged along the opening 41 on the encapsulation film 40 during the plastic encapsulation process, so that the encapsulation film 40 can be closely attached to the substrate 10 and the filter chip 20 during the thermoplastic process and has a better supporting force to support the plastic encapsulation layer 50. And when the encapsulation film 40 is stressed or heated, the degree of deformation is small. In this way, the plastic encapsulation layer 50 is not easily deformed, and the stress applied to the welding joints inside the chip packaging structure 100 is also small, and can even be ignored. In addition, after plastic encapsulation, at the opening 41 of the encapsulation film, the plastic encapsulation layer 50 and the substrate 10 are combined to form a rigid connection. During the subsequent use of the chip packaging structure 100, the substrate 10 can effectively provide a rigid supporting effect on the plastic encapsulation layer 50, further reducing the risk of function failure of the chip packaging structure 100 caused by the deformation of the encapsulation film 40, reducing a large amount of manpower and material consumption, saving resources, and thus improving the production efficiency of the product.

[0089] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0090] The above-described embodiments only represent several implementation manners of the present application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A packaging method for a chip packaging structure, characterized in that: The packaging method of the chip packaging structure comprises: A plurality of filter chips are flipped and a control chip is mounted face-up on the packaging side of the substrate, and each of the filter chips is electrically connected to the substrate; Opening an encapsulation film, and attaching the opened encapsulation film to the packaging side of the substrate and covering the filter chip, wherein the control chip is entirely located within a range defined by the opening of the encapsulation film; and After a plurality of conductive elements are mounted on the packaging side of the substrate and all the conductive elements are located within the range defined by the opening of the encapsulation film, each of the conductive elements is electrically connected to the substrate and the control chip.

2. The packaging method of the chip packaging structure according to claim 1, characterized in that: In the direction in which the edge of the opening points to the central axis of the opening, the minimum distance between the control chip and the edge of the opening is L1, and L1≥150um.

3. The packaging method of the chip packaging structure according to claim 1, characterized in that: The minimum distance between each filter chip and the edge of the opening is L2, and L2≥200um.

4. The packaging method of the chip packaging structure according to claim 1, characterized in that: The step of opening an opening on the encapsulation film comprises: laser opening an opening on the encapsulation film; And / or, electrically connecting each of the conductive elements to the substrate and the control chip includes: welding each of the conductive elements to the substrate and the control chip to achieve electrical connection.

5. The packaging method of the chip packaging structure according to claim 1, characterized in that: After the conductive elements are electrically connected to the substrate and the control chip, the method further includes: The packaging side of the substrate is plastic-sealed to form a plastic-sealing layer, and the plastic-sealing layer seals the encapsulation film and the opening thereof, the control chip, and the conductive element.

6. The packaging method of the chip packaging structure according to claim 1, characterized in that: All the conductive elements and all the filter chips are arranged at intervals in the circumferential direction around the control chip.

7. A chip packaging structure, characterized in that: The chip packaging structure comprises: a substrate having a packaging side; A plurality of filter chips are flip-chip mounted on the package side, and each of the filter chips is electrically connected to the substrate; A control chip, disposed upright on the packaging side of the substrate; An encapsulation film having an opening, wherein the encapsulation film is attached to the packaging side of the substrate and covers the filter chip, and the control chip is entirely located within a range defined by the opening of the encapsulation film; and A plurality of conductive elements are mounted on the packaging side of the substrate, all of the conductive elements are located within the range defined by the opening of the packaging film, and each of the conductive elements is electrically connected to the substrate and the control chip.

8. The chip packaging structure according to claim 1, characterized in that: In the direction in which the edge of the opening points to the central axis of the opening, the minimum distance between the control chip and the edge of the opening is L1, and L1≥150um.

9. The chip packaging structure according to claim 1, characterized in that: The minimum distance between each filter chip and the edge of the opening is L2, and L2≥200um.

10. The chip packaging structure according to claim 1, characterized in that: The chip packaging structure further includes a plastic packaging layer, which is plastic-sealed on the packaging side of the substrate and is used to seal the encapsulation film and its opening, the control chip and the conductive element.

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