Silicon carbide MOSFET power module high-speed driving circuit capable of naturally dissipating heat

Abstract

A silicon carbide MOSFET power module high-speed driving circuit capable of naturally dissipating heat comprises an ISO5852 isolation type grid driving chip, and the output end of the ISO5852 isolation type grid driving chip is connected with the input end of a driving enhancement and soaking unit; according to the invention, the isolated gate driving chip is externally connected with the driving enhancement and soaking unit, namely the multi-stage parallel push-pull transistor amplification circuit, so that the initially amplified driving enhancement signal continues to be subjected to secondary amplification through the multi-stage transistor; a plurality of current-limiting and current-sharing resistors are used for carrying out soaking design to ensure that current distribution among a plurality of transistors is balanced, voltage drop accumulation of a single component of a circuit is shared, amplification of a driving signal is concerned, higher driving capability is provided, high-speed on-off operation of the device is realized, and the reliability of the device is improved. Natural heat dissipation of the circuit is achieved without adding an extra heat dissipation system, power consumption of all elements of the drive circuit is reduced through series connection of the current-limiting resistors, overheating of the elements is avoided, meanwhile, the maximum current provided for the grid electrode of the MOSFET is limited, and therefore stable work is achieved under the natural heat dissipation condition.

Description

Technical Field

[0001] The present invention belongs to the technical field of electronic circuits, and particularly relates to a high-speed drive circuit for a silicon carbide MOSFET power module with natural heat dissipation. Background Art

[0002] With the continuous advancement of industrial automation and intelligent manufacturing, the demand for high-performance and high-reliability power devices in the production environment is increasing day by day. As a typical representative of the third-generation semiconductor material, silicon carbide (SiC) enables MOSFETs to operate under high-frequency and high-voltage conditions. The increase in the operating frequency of MOSFETs can further optimize the performance of the system, and it has broad application prospects in fields such as new energy vehicles, photovoltaic inverters, rail transit, and metallurgical casting. Especially in the field of metallurgical casting, the depth and speed of electromagnetic induction heating are the key to the quenching process, which requires MOSFETs to be able to turn on and off at high speed under high-voltage and high-current conditions. For MOSFETs to turn on and off safely and quickly, appropriate drive signals and effective protection circuits are needed. However, high-speed switching under high-voltage and high-current conditions is particularly sensitive to the parasitic parameters of the system. Insufficient drive circuit capabilities and protection failures will seriously affect the performance of the system. In addition, the heat dissipation capacity of the drive circuit is also an important issue to be considered in the industrial field. An unreasonable heat dissipation method will not only increase the complexity of the system but also directly affect the reliability of the system. Therefore, it is particularly necessary to design a high-speed drive for MOSFETs that can dissipate heat naturally under high-voltage and high-current conditions.

[0003] Currently, the commonly used drive circuits include Si MOSFET drive circuits, IGBT drive circuits, and SiC MOSFET drive circuits. The Si MOSFET drive circuit is limited by its breakdown voltage and driving ability and cannot meet the working requirements of SiC-MOSFET. The IGBT drive circuit cannot be applied to the drive of SiC MOSFET due to its low switching frequency ability. The drive circuit of SiC MOSFET requires stronger driving ability and shorter detection and protection time. For example, in the invention patent application "A SiC MOSFET Gate Driver" (CN116488628A), it includes a weak-current side unit, an isolation unit, and a drive unit, which is electrically connected to a controller upward and to a SiC MOSFET half-bridge module downward. By converting the drive signal of the weak-current side unit, it realizes the power-stage signal for driving the SiC MOSFET device to turn on or off, controls the normal on-off of the SiC MOSFET device, and provides reliable short-circuit protection and anti-crosstalk functions. However, in this invention, only one triode is used in the gate drive sub-unit to drive a single-level signal, resulting in the switching speed not being able to meet the high-speed requirements in large high-voltage and current scenarios. Another example is the invention patent application "A Drive Circuit for SiC MOSFET" (CN111900969A). This device includes an isolation circuit, a current amplification module, a logic module, and a protection circuit. In this invention, the current amplification module amplifies the signal at the first stage by a current amplification circuit and at the second stage by a totem-pole current amplification circuit. The signal input by the logic circuit is amplified through a push-pull circuit composed of a pair of NPN and PNP transistors, successfully providing the driving current that meets the requirements for the SiC MOSFET power module. However, the thermal management ability of this invention's circuit is relatively weak, and the thermal balance problem of power components is not particularly considered. The components overheat due to uneven current during long-term operation, and the last-stage transistor Q5 in this current amplification module bears most of the current burden. Without sufficient heat dissipation design, such as heat sinks or fans, the temperature of Q5 will rise rapidly and it is difficult to dissipate heat naturally.

[0004] The SiC MOSFET driver circuits currently available on the market generally consist of a weak-current side unit, an isolation unit, and a driver unit. Few circuits can meet natural heat dissipation while focusing on driving signal amplification. In actual high-voltage scenarios, an additional complex heat dissipation system often needs to be added to make the circuit work properly. In terms of signal amplification, in order to efficiently drive SiC MOSFET devices in high-voltage scenarios, most inventions choose to use dedicated driver chips or design external push-pull circuits additionally to amplify the signal. The driving ability of the driver circuit using a dedicated driver chip is limited by the capabilities of the selected dedicated chip. Although this type of driver circuit can also drive SiC MOSFETs normally, since the unit providing the driving current is inside the chip, limited by the heat dissipation area and manufacturing process, the driving ability it can provide is limited. High-power SiC MOSFET modules commonly used in industrial sites have relatively large gate capacitances and require greater driving ability to achieve high-speed operation. The driving current that the existing gate driver circuits based on dedicated chips can provide is far from enough, resulting in the inability to quickly charge and discharge the gate capacitances of MOSFETs, and the device cannot complete the on and off operations in a shorter time, let alone stably drive the power module to switch at high speed.

[0005] The patent application document with the publication number CN111900969A discloses a driving circuit for SiC-MOSFET. The method of using an external push-pull circuit to amplify the signal is now mostly based on the BJT totem-pole current amplification circuit. By using a pair of NPN and PNP transistors to form a push-pull circuit outside the dedicated chip, the driving current is increased while reducing the heat dissipation pressure on the dedicated chip. However, since the devices providing the current are concentrated on the transistors and the driver chip, in complex industrial sites, especially in high-temperature environments, the gain of the totem-pole current amplification circuit is greatly affected by temperature. This type of driver circuit requires a complex heat dissipation device to work properly, and in more serious cases, it cannot work reliably in high-temperature environments. Currently, the voltage level of commercial SiC MOSFETs is mainly 1200V. To use SiC MOSFETs in high-current applications, they need to be connected in parallel. In the case of multiple SiC MOSFETs connected in parallel, the gates of each MOSFET need to be quickly charged and discharged, which requires a large driving current. The driving ability of the BJT totem-pole circuit may not be sufficient to meet the parallel requirements of multiple devices, resulting in a reduction in the switching speed of MOSFETs and an increase in losses. Summary of the Invention

[0006] To overcome the deficiencies of the above-mentioned prior art, the purpose of the present invention is to provide a high-speed drive circuit for a silicon carbide MOSFET power module with natural heat dissipation. By externally connecting a drive enhancement and heat equalization unit, namely a multi-stage parallel push-pull transistor amplification circuit, to an isolated gate drive chip, the initially amplified drive enhancement signal is further amplified twice through multiple transistors. A plurality of current-limiting and current-sharing resistors are used for heat equalization design to ensure balanced current distribution among multiple transistors, sharing the voltage drop accumulation of individual circuit components. It not only focuses on drive signal amplification, provides stronger drive capabilities, and enables high-speed on and off operations of the device, but also does not require an additional heat dissipation system to achieve natural heat dissipation of the circuit itself. The series connection of the current-limiting resistors reduces the power consumption of each component of the drive circuit, avoids device overheating, and at the same time limits the maximum current provided to the MOSFET gate, thereby enabling stable operation under natural heat dissipation conditions. It is applicable to circuits with higher requirements for power balance and thermal management, as well as systems that operate for a long time and require high stability in high-voltage scenarios.

[0007] To achieve the above purpose, the technical solution adopted by the present invention is:

[0008] A high-speed drive circuit for a silicon carbide MOSFET power module with natural heat dissipation, comprising: an ISO5852 isolated gate drive chip and a drive enhancement and heat equalization unit. The ISO5852 isolated gate drive chip is used to isolate and initially amplify the drive signal, and separately input the drive signal to the drive enhancement and heat equalization unit; the drive enhancement and heat equalization unit is used to perform multi-stage enhancement on the separately output drive signal and achieve natural heat dissipation of the overall circuit.

[0009] The ISO5852 isolated gate drive chip includes an isolation unit, a gate drive module, a logic unit, and a desaturation detection module. The input end of the isolation unit is connected to the output end of the control signal, and the output end of the isolation unit is connected to the first input end of the gate drive module. The isolation unit is used for signal isolation. The second input end of the gate drive module is connected to the first output end of the logic module. The OUTH output end and the OUTL output end of the gate drive module are respectively connected to the first input end and the second input end of the drive enhancement and heat equalization unit, and are used for initially amplifying the control signal input through the isolation unit. The second output end of the logic unit is connected to the first input end of the desaturation detection module. The logic unit is used to respectively perform logic control on the working states of the gate drive module and the desaturation detection module. The second input end of the desaturation detection module is connected in series with a resistor R1, a first high-voltage diode D1, and a second high-voltage diode D2 and then connected to the drain of the SiC MOSFET power transistor. A capacitor CBLK is connected in parallel between the input end of the desaturation detection module and the source end of the SiC MOSFET power transistor, and is used to detect the voltage across the SiC MOSFET power transistor under normal and abnormal conditions, as a judgment of short circuit or overcurrent.

[0010] The driving enhancement and heat spreading unit includes a first NPN transistor Q1, a second NPN transistor Q3, a third NPN transistor Q5, a first PNP transistor Q2, a second PNP transistor Q4, and a third PNP transistor Q6;

[0011] Among them, the base of the first NPN transistor Q1 is connected to the base of the first PNP transistor Q2; the base of the second NPN transistor Q3 is connected to the base of the second PNP transistor Q4; the base of the third NPN transistor Q5 is connected to the base of the third PNP transistor Q6;

[0012] The bases of the first NPN transistor Q1, the second NPN transistor Q3, and the third NPN transistor Q5 are respectively connected in series with a first current sharing resistor R2, a third current sharing resistor R4, and a fifth current sharing resistor R8 and commonly connected to the OUTH signal line; the emitters of the first NPN transistor Q1, the second NPN transistor Q3, and the third NPN transistor Q5 are respectively connected in series with a first current limiting resistor R5, a third current limiting resistor R9, and a fifth current limiting resistor R12 and commonly connected to the gate of the SiC MOSFET power transistor; the collectors of the first NPN transistor Q1, the second NPN transistor Q3, and the third NPN transistor Q5 are commonly connected to the power supply VCC (+20V);

[0013] The bases of the first PNP transistor Q2, the second PNP transistor Q4, and the third PNP transistor Q6 are respectively connected in series with a second current sharing resistor R3, a fourth current sharing resistor R7, and a sixth current sharing resistor R11 and commonly connected to the OUTL signal line; the collectors of the first PNP transistor Q2, the second PNP transistor Q4, and the third PNP transistor Q6 are respectively connected in series with a second current limiting resistor R6, a fourth current limiting resistor R10, and a sixth current limiting resistor R13 and commonly connected to the gate of the SiC MOSFET power transistor; the emitters of the first PNP transistor Q2, the second PNP transistor Q4, and the third PNP transistor Q6 are commonly connected to the power supply VEE (-5V).

[0014] The driving enhancement and heat spreading unit circuit further includes a first charge discharge resistor R14, and the first charge discharge resistor R14 is connected between the gate and the source of the SiC MOSFET power transistor.

[0015] The ISO5852 isolated gate driver chip can be replaced with an ISO5851 isolated gate driver chip or an ADUM4146 isolated gate driver chip.

[0016] Compared with the prior art, the beneficial effects of the present invention are:

[0017] 1. In the driving enhancement and heat equalization unit of the present invention, multiple NPN transistors and PNP transistors are connected in series and parallel to design a multi-stage parallel push-pull transistor amplifier circuit. The initially amplified driving enhancement signal is further amplified twice through multiple transistors, effectively increasing the amplification factor of the driving current signal, which can meet the driving current requirements of high-power SiC MOSFET power tubes during switching operation. By adjusting the resistance value, the driving requirements of different power modules can also be met, and the switching speed can be effectively increased.

[0018] 2. In the driving enhancement and heat equalization unit of the present invention, resistors with different resistance values are connected in series to the base, emitter, and collector of the transistors to achieve current limiting and current sharing design. The heat equalization design using multiple current limiting resistors and current sharing resistors can ensure the balanced distribution of current among multiple transistors, share the voltage drop accumulation of individual circuit components, and greatly improve the thermal stability of the circuit through negative feedback regulation. Under the condition of the same output current, the power consumption on a single component can be reduced, and an additional air-cooling or water-cooling system is not required for heat dissipation, and the thermal balance of the circuit can be achieved under natural heat dissipation conditions.

[0019] In summary, by externally connecting a driving enhancement and heat equalization unit, that is, a multi-stage parallel push-pull transistor amplifier circuit, to the isolated gate driver chip in the present invention, the initially amplified driving enhancement signal is further amplified twice through multiple transistors. The heat equalization design is carried out using multiple current limiting and current sharing resistors to ensure the balanced distribution of current among multiple transistors, share the voltage drop accumulation and power consumption of individual circuit components, avoid device overheating, and has the advantages of high-speed driving and natural heat dissipation. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a schematic diagram of the overall circuit structure of the present invention.

[0021] Figure 2 is a schematic diagram of the connection of the isolation unit of the ISO5852 isolated gate driver chip of the present invention.

[0022] Figure 3 is a schematic diagram of the driving enhancement and heat equalization unit circuit of the present invention.

[0023] Figure 4 is a schematic diagram of the desaturation detection circuit of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0024] The technical solutions adopted by the present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0025] As Figure 1As shown in the figure, a high-speed drive circuit for a silicon carbide MOSFET power module with natural heat dissipation provided by the present invention mainly includes an ISO5852 isolated gate drive chip and a drive enhancement and heat equalization unit. The output end of the ISO5852 isolated gate drive chip is connected to the input end of the drive enhancement and heat equalization unit. The ISO5852 isolated gate drive chip is used to isolate and initially amplify the drive signal and separately input the drive signal to the drive enhancement and heat equalization unit. The drive enhancement and heat equalization unit is used to perform multi-stage enhancement on the separately output drive signal and achieve natural heat dissipation of the overall circuit. Specifically:

[0026] The ISO5852 isolated gate drive chip includes an isolation unit, a gate drive module, a logic unit, and a desaturation detection module. The input end of the isolation unit is connected to the output end of the control signal. The output end of the isolation unit is connected to the first input end of the gate drive module. The isolation unit is used for signal isolation. The second input end of the gate drive module is connected to the first output end of the logic module. The OUTH output end and the OUTL output end of the gate drive module are respectively connected to the first input end and the second input end of the drive enhancement and heat equalization unit, and are used for initially amplifying the control signal input through the isolation unit. The second output end of the logic unit is connected to the first input end of the desaturation detection module. The logic unit is used for respectively performing logic control on the working states of the gate drive module and the desaturation detection module. The second input end of the desaturation detection module is connected in series with a resistor R1, a first high-voltage diode D1, and a second high-voltage diode D2 and then connected to the drain of the SiC MOSFET power tube. A capacitor CBLK is connected in parallel between the input end of the desaturation detection module and the source end of the SiC MOSFET power tube, and is used for detecting the voltages at both ends of the SiC MOSFET power tube under normal and abnormal conditions, as a judgment of short circuit or overcurrent.

[0027] The ISO5852 isolated gate drive chip consists of four parts: an isolation unit, a gate drive module, a logic unit, and a desaturation detection module. Its main functions are to provide high-voltage isolation, initial enhancement of the drive signal, desaturation detection, and output the drive signal to an external drive circuit. The two input ends of the drive enhancement and heat equalization unit are connected to the OUTH and OUTL output ends of the gate drive module of the ISO5852 isolated gate drive chip, perform secondary amplification on the separated initial drive enhancement signal, and adopt current sharing and heat equalization design to ensure balanced current distribution among multiple transistors, share the voltage drop accumulation of circuit components, so as to achieve high-speed drive and natural heat dissipation.

[0028] The ISO5852 isolated gate drive chip can be replaced by an ISO5851 isolated gate drive chip or an ADUM4146 isolated gate drive chip.

[0029] Such as Figure 2As shown, the isolation unit of the ISO5852 isolated gate driver chip includes a high-frequency capacitive coupling circuit and a demodulation and restoration circuit. Among them, the high-frequency capacitive coupling circuit modulates the input low-frequency or digital control signal into a high-frequency signal before entering the isolation area, and then couples and transmits it through the internal isolation capacitance layer. These capacitors are usually integrated into the chip by the chip manufacturer and isolated by high-insulating materials, enabling strong insulation between the high-voltage end and the low-voltage end (such as an isolation withstand voltage of 5 kV); the demodulation and restoration circuit is used to restore the high-frequency signal transmitted through the capacitive isolation layer into the original control signal, demodulate and filter the transmitted high-frequency signal to remove noise and signal distortion, and ensure a clear and complete drive signal on the high-voltage side; the drive signal obtained through the isolation unit is input to the gate drive module for initial amplification of the signal, and the gate drive module will amplify and separately output the drive signal from the isolation unit to adapt to the input of the drive enhancement and heat equalization unit.

[0030] As Figure 3 shown, the drive enhancement and heat equalization unit includes a first NPN transistor Q1, a second NPN transistor Q3, a third NPN transistor Q5, a first PNP transistor Q2, a second PNP transistor Q4, and a third PNP transistor Q6;

[0031] Among them, the base of the first NPN transistor Q1 is connected to the base of the first PNP transistor Q2; the base of the second NPN transistor Q3 is connected to the base of the second PNP transistor Q4; the base of the third NPN transistor Q5 is connected to the base of the third PNP transistor Q6;

[0032] The bases of the first NPN transistor Q1, the second NPN transistor Q3, and the third NPN transistor Q5 are respectively connected in series with a first current-sharing resistor R2, a third current-sharing resistor R4, and a fifth current-sharing resistor R8 and commonly connected to the OUTH signal line; the emitters of the first NPN transistor Q1, the second NPN transistor Q3, and the third NPN transistor Q5 are respectively connected in series with a first current-limiting resistor R5, a third current-limiting resistor R9, and a fifth current-limiting resistor R12 and commonly connected to the gate of the SiC MOSFET power transistor; the collectors of the first NPN transistor Q1, the second NPN transistor Q3, and the third NPN transistor Q5 are commonly connected to the power supply VCC (+20 V);

[0033] The bases of the first PNP transistor Q2, the second PNP transistor Q4, and the third PNP transistor Q6 are respectively connected in series with the second current-sharing resistor R3, the fourth current-sharing resistor R7, and the sixth current-sharing resistor R11 and commonly connected to the OUTL signal line; the collectors of the first PNP transistor Q2, the second PNP transistor Q4, and the third PNP transistor Q6 are respectively connected in series with the second current-limiting resistor R6, the fourth current-limiting resistor R10, and the sixth current-limiting resistor R13 and commonly connected to the gate of the SiC MOSFET power transistor; the emitters of the first PNP transistor Q2, the second PNP transistor Q4, and the third PNP transistor Q6 are commonly connected to the power supply VEE (-5V); specifically:

[0034] The base of the first NPN transistor Q1 is connected to the OUTH signal line through being connected in series with the first current-sharing resistor R2, and the base of the first PNP transistor Q2 is connected to the OUTL signal line through being connected in series with the second current-sharing resistor R3, and the base of the first NPN transistor Q1 is connected to the base of the first PNP transistor Q2; the emitter of the first NPN transistor Q1 is connected to the gate of the SiC MOSFET power transistor through being connected in series with the first current-limiting resistor R5, and the collector of the first PNP transistor Q2 is connected to the gate of the SiC MOSFET power transistor through being connected in series with the second current-limiting resistor R6; the collector of the first NPN transistor Q1 is connected to the power supply VCC (+20V), and the emitter of the first PNP transistor Q2 is connected to the power supply VEE (-5V);

[0035] The base of the second NPN transistor Q3 is connected to the OUTH signal line through being connected in series with the third current-sharing resistor R4, and the base of the second PNP transistor Q4 is connected to the OUTL signal line through being connected in series with the fourth current-sharing resistor R7, and the base of the second NPN transistor Q3 is connected to the base of the second PNP transistor Q4; the emitter of the second NPN transistor Q3 is connected to the gate of the SiC MOSFET power transistor through being connected in series with the third current-limiting resistor R9, and the collector of the second PNP transistor Q4 is connected to the gate of the SiC MOSFET power transistor through being connected in series with the fourth current-limiting resistor R10; the collector of the second NPN transistor Q3 is connected to the power supply VCC (+20V), and the emitter of the second PNP transistor Q4 is connected to the power supply VEE (-5V);

[0036] The base of the third NPN transistor Q5 is connected to the OUTH signal line by being connected in series with the fifth current-balancing resistor R8, the base of the third PNP transistor Q6 is connected to the OUTL signal line by being connected in series with the sixth current-balancing resistor R11, and the base of the third NPN transistor Q5 is connected to the base of the third PNP transistor Q6; the emitter of the third NPN transistor Q5 is connected to the gate of the SiC MOSFET power tube by being connected in series with the fifth current-limiting resistor R12, and the collector of the third PNP transistor Q6 is connected to the gate of the SiC MOSFET power tube by being connected in series with the sixth current-limiting resistor R13; the collector of the third NPN transistor Q5 is connected to the power supply VCC (+20V), and the emitter of the third PNP transistor Q6 is connected to the power supply VEE (-5V).

[0037] The drive enhancement and heat equalization unit circuit further includes a first charge discharge resistor R14, and the first charge discharge resistor R14 is connected between the gate and the source of the SiC MOSFET power tube.

[0038] This drive enhancement and heat-averaging unit circuit is designed by increasing multi-stage drive by isolating the signal. By designing a multi-stage parallel push-pull transistor amplifier circuit, it has the advantages of high-speed drive and natural heat dissipation. A new external push-pull circuit consisting of a drive enhancement and heat-averaging unit is added to the ISO5852 isolated gate drive chip to achieve drive current enhancement by driving multiple transistors with one drive signal. The number of transistors is increased to 3 NPN transistors and 3 PNP transistors. The amplification factor of the drive current also increases linearly according to the hierarchical series and parallel connection of the transistors, and drive enhancement is successfully achieved. The circuit connects current-sharing resistors of different resistances in series at the base of the transistor so that transistors with different working parameters can work uniformly in the saturation region; the circuit designs small-resistance resistors in series at the emitter of the NPN transistor and the collector of the PNP transistor to limit the maximum current supplied to the gate of the SiCMOSFET power tube, reduce the CE voltage drop, and reduce the power of the transistor in disguise, avoiding thermal overload of a single transistor, while reducing the base current, thereby reducing the collector current of the transistor, realizing negative feedback regulation, helping to make the working state of each transistor more consistent, avoiding the normal operation of the entire circuit being affected by the unstable operation of a certain transistor, and improving the thermal stability of the circuit. The driving current of the circuit is jointly provided by each transistor, dispersing the power consumption of each driving element, thereby reducing the thermal load of a single device and realizing natural heat dissipation.

[0039] In the ISO5852 isolated gate driver chip circuit, there are two output terminals, OUTH and OUTL, which are used to drive the control of the enhancement and heat equalization unit push-pull circuit. The first NPN transistor Q1, the second NPN transistor Q3, the third NPN transistor Q5, the first PNP transistor Q2, the second PNP transistor Q4, and the third PNP transistor Q6 in parallel push-pull are used to achieve the current amplification of the drive signal. The first NPN transistor Q1, the second NPN transistor Q3, and the third NPN transistor Q5 are used to charge the gate when driving the SiC MOSFET power transistor to turn on, and can quickly provide sufficient charge for the gate. The first PNP transistor Q2, the second PNP transistor Q4, and the third PNP transistor Q6 are used to quickly release the gate charge to achieve the quick turn-off of the SiC MOSFET power transistor. The first current-sharing resistor R2, the second current-sharing resistor R3, the third current-sharing resistor R4, the fourth current-sharing resistor R7, the fifth current-sharing resistor R8, and the sixth current-sharing resistor R11 are used to independently set the base current of each transistor, and can achieve current sharing when the operating parameters of each transistor are inconsistent. It can not only help reduce power consumption by changing the voltage drop of the triode, but also adjust the collector current through negative feedback to avoid overheating caused by excessive current in individual triodes. Avoid power consumption being concentrated on a single transistor and affecting the normal operation of the circuit. The first current-limiting resistor R5, the second current-limiting resistor R6, the third current-limiting resistor R9, the fourth current-limiting resistor R10, the fifth current-limiting resistor R12, and the sixth current-limiting resistor R13 are used to limit the maximum current provided to the gate of the SiC MOSFET power transistor, reduce the power of a single transistor, and make the operating states of each transistor consistent through negative feedback regulation. The first charge discharge resistor R14 with a size of 10K plays a role in discharging charge and can provide a discharge channel for the gate-source charge.

[0040] The drive enhancement and heat equalization unit circuit proposed by the present invention can provide a large drive current for the SiC MOSFET power transistor through the parallel connection of multiple groups of transistors, and at the same time disperses the power consumption of each component, thereby reducing the heat dissipation pressure of the circuit and improving the thermal balance and stability of the overall circuit. By changing the resistance values of the first current-limiting resistor R5, the second current-limiting resistor R6, the third current-limiting resistor R9, the fourth current-limiting resistor R10, the fifth current-limiting resistor R12, and the sixth current-limiting resistor R13, the drive requirements of different power modules can be adapted.

[0041] Such as Figure 4As shown in the figure, it is a schematic diagram of a desaturation detection circuit. The resistor R1, the first high-voltage diode D1, the second high-voltage diode D2, and the capacitor CBLK constitute the desaturation detection circuit. The first high-voltage diode D1 and the second high-voltage diode D2 are fast-recovery diodes. The change in the resistance value of the resistor R1 and the number of the first high-voltage diode D1 and the second high-voltage diode D2 can set the detection threshold of desaturation, so as to adapt to the requirements of different power devices. For the SiC MOSFET power transistor, when it is conducting normally, the voltage across VCE may be about 2V. The 500μA constant current source pulled up by the chip flows out from the DESAT port, through the resistor R1, the first high-voltage diode D1, and the second high-voltage diode D2 to the SiC MOSFET power transistor. At this time, the capacitor CBLK is the voltage drop across the DESAT port, and its magnitude is approximately composed of three parts: the VCE voltage drop of the SiC MOSFET power transistor plus the forward conduction voltage drops of the first high-voltage diode D1 and the second high-voltage diode D2 plus the voltage drop across the resistor R1. The output of the comparator A1 remains low, and the circuit continues to work. When a short-circuit occurs, the voltage drop across VCE of the SiC MOSFET power transistor will rise rapidly. At this time, the first high-voltage diode D1 and the second high-voltage diode D2 will be reverse-biased, and there is only one direction for the internal current source, that is, to charge the capacitor CBLK. The voltage drop across the capacitor CBLK, that is, the DESAT voltage, will be detected by the COM port. When it exceeds the threshold voltage VDESAT, the output of the comparator A1 is high, and the logic unit triggers short-circuit or over-current protection. Until the output of the comparator A1 returns from high level to low level, the logic unit confirms that the device exits the saturation state, and the drive signal can be re-enabled to resume normal operation.

[0042] Embodiment 1:

[0043] In the circuit, the drive current output by 6 transistors is set by the resistors connected to them. Taking the first NPN transistor Q1 as an example:

[0044] The influence of the first current-sharing resistor R2 on the drive current I d1 can be calculated by the following formula:

[0045] I d1 = β(Vin - Vbe) / R 2

[0046] Vin is the voltage output by OUTH, Vbe is the base-emitter voltage of the transistor (usually about 0.7V), and β is the current amplification gain coefficient of the transistor. For different types of transistors, the resistance value of the current-sharing resistor can be adjusted to make the working states of each transistor unified. After the transistor with a low turn-on voltage conducts, there will be no EB voltage drop clamping, nor will there be a problem that the transistor with a high turn-on voltage cannot conduct.

[0047] Connecting multiple transistors in parallel can effectively increase the current capacity. If the output current of each transistor is I d , then the total output current after connecting N transistors in parallel is:

[0048] I total = N * I d

[0049] When Vin is constant, the magnitude of the resistor connected in series with the base directly determines the magnitude of the input current of the transistor. The smaller the base resistor, the larger the input current and the stronger the output current capacity. The more parallel-connected triodes, the stronger the output current capacity.

[0050] Example 2:

[0051] The power consumption of the triode mainly comes from the product of the voltage (V CE ) between the collector and the emitter and the collector current (I C ), that is:

[0052] P = V CE * I C

[0053] A small-value resistor is designed to be connected in series with the emitter of the NPN transistor and the collector of the PNP transistor. A small-value resistor R E (in this invention, it is the first current-sharing resistor R2, the second current-sharing resistor R3, the third current-sharing resistor R4, the fourth current-sharing resistor R7, the fifth current-sharing resistor R8, and the sixth current-sharing resistor R11). According to Ohm's law, the voltage drop across the resistor is:

[0054] V R = I C · R E

[0055] Therefore, the total voltage drop between the collector and the emitter becomes:

[0056] V CE = V CC - V R = V CC - I C · R E

[0057] When the current increases, the voltage drop across the resistor also increases, thereby reducing V CE , thus reducing the power consumption of the triode. By controlling the value of the R E resistor, the power consumption can be reduced while maintaining the circuit performance.

[0058] At the same time, connecting a small-value resistor in series with the collector will produce a negative feedback effect. When the current I CWhen it increases, the voltage drop V across the resistor R also increases, which causes the voltage V BE between the base and emitter to decrease, thereby reducing the base current I B . The decrease in the base current further reduces the collector current, achieving negative feedback control. This mechanism can be represented by the following relationship:

[0059] The relationship between the base current and the collector current is:

[0060] I C = β·I B

[0061] where β is the current amplification factor of the triode.

[0062] For the base-emitter voltage V BE :

[0063] V BE = V B - V E

[0064] where V E includes the voltage drop generated by the resistor R E :

[0065] V E = I C ·R E

[0066] As I C increases, V E also increases, causing V BE to decrease, thereby reducing the base current I B and decreasing I C

[0067] , achieving negative feedback.

[0068] It can be seen from the above formula that connecting a small resistor R E in series with the collector can not only help reduce power consumption, but also regulate the collector current through negative feedback to prevent overheating caused by excessive current in individual triodes.

[0069] Example 3:

[0070] The gate charge Qg of the SiC MOSFET power transistor is a known parameter. The gate current determines the charging and discharging time. According to Figure 1 the system composition architecture, taking a push-pull circuit composed of the third NPN transistor Q5 and the third PNP transistor Q6 as an example, the fifth current-limiting resistor R12 and the sixth current-limiting resistor R13 respectively determine the charging and discharging time, and the following formula can be used for estimation:

[0071] t = Qg * Rg / Vgs

[0072] Vgs is the gate - source voltage of the MOSFET, with a variation range between - 5V and 20V. Rg is the fifth current - limiting resistor R12 or the sixth current - limiting resistor R13, and its resistance value can control the charge - discharge rate.

[0073] The key points and protected points of the present invention are as follows:

[0074] The present invention uses multiple transistors in parallel push - pull to form a drive circuit, and uses multiple current - limiting and current - sharing resistors for heat - equalizing design, realizing the enhancement of the driving signal ability of the SiC MOSFET power tube. At the same time, the power consumption of the drive circuit is dispersed to multiple transistors, and reasonable resistor design is carried out for negative - feedback regulation, which can reduce the power consumption of a single component, balance the heat of the components in the whole circuit, and achieve natural heat dissipation without adding an additional heat - dissipation system. This design architecture enables the high - power module to switch at a higher frequency, while reducing the heat - dissipation requirement of the drive circuit itself, and improving the high - efficiency application of the SiC MOSFET power tube in more high - voltage and high - current scenarios.

Claims

1. A high-speed drive circuit for a silicon carbide MOSFET power module capable of natural heat dissipation, characterized in that: include: ISO5852 isolated gate driver chip, driver enhancement and heat-saturation unit. The ISO5852 isolated gate driver chip is used to isolate and initially amplify the drive signal, and separate the drive signal and input it to the driver enhancement and heat-saturation unit; The drive enhancement and heat equalization unit is used to perform multi-level enhancement on the separated output drive signal and realize natural heat dissipation of the entire circuit.

2. A silicon carbide MOSFET power module high-speed drive circuit capable of natural heat dissipation according to claim 1, characterized in that: The ISO5852 isolated gate drive chip includes an isolation unit, a gate drive module, a logic unit, and a desaturation detection module. The input end of the isolation unit is connected to the output end of the control signal, the output end of the isolation unit is connected to the first input end of the gate drive module, the isolation unit is used to perform signal isolation, the second input end of the gate drive module is connected to the first output end of the logic module, the OUTH output end and the OUTL output end of the gate drive module are respectively connected to the first input end and the second input end of the drive enhancement and heat equalization unit, and are used to initially amplify the control signal input through the isolation unit, the second output end of the logic unit is connected to the first input end of the desaturation detection module, the logic unit is used to logically control the working states of the gate drive module and the desaturation detection module respectively, the second input end of the desaturation detection module is connected in series with the resistor R1, the first high-voltage diode D1, and the second high-voltage diode D2, and then connected to the drain of the SiC MOSFET power tube, the capacitor CBLK is connected in parallel to the input end of the desaturation detection module and the source end of the SiC MOSFET power tube, and is used to detect the voltages at both ends of the SiC MOSFET power tube under normal and abnormal conditions as a judgment of short circuit or overcurrent.

3. The silicon carbide MOSFET power module high-speed drive circuit capable of natural heat dissipation according to claim 1, characterized in that: The driving enhancement and heat equalization unit includes a first NPN transistor Q1, a second NPN transistor Q3, a third NPN transistor Q5, a first PNP transistor Q2, a second PNP transistor Q4 and a third PNP transistor Q6; The base of the first NPN transistor Q1 is connected to the base of the first PNP transistor Q2; the base of the second NPN transistor Q3 is connected to the base of the second PNP transistor Q4; the base of the third NPN transistor Q5 is connected to the base of the third PNP transistor Q6; The bases of the first NPN transistor Q1, the second NPN transistor Q3, and the third NPN transistor Q5 are respectively connected in series with the first current-sharing resistor R2, the third current-sharing resistor R4, and the fifth current-sharing resistor R8, and are connected to the OUTH signal line; the emitters of the first NPN transistor Q1, the second NPN transistor Q3, and the third NPN transistor Q5 are respectively connected in series with the first current-limiting resistor R5, the third current-limiting resistor R9, and the fifth current-limiting resistor R12, and are connected to the gate of the SiC MOSFET power tube; the collectors of the first NPN transistor Q1, the second NPN transistor Q3, and the third NPN transistor Q5 are connected to the power supply VCC (+20V); The bases of the first PNP transistor Q2, the second PNP transistor Q4, and the third PNP transistor Q6 are respectively connected in series with the second current equalizing resistor R3, the fourth current equalizing resistor R7, and the sixth current equalizing resistor R11, and are collectively connected to the OUTL signal line; the collectors of the first PNP transistor Q2, the second PNP transistor Q4, and the third PNP transistor Q6 are respectively connected in series with the second current limiting resistor R6, the fourth current limiting resistor R10, and the sixth current limiting resistor R13, and are collectively connected to the gate of the SiC MOSFET power tube; the emitters of the first PNP transistor Q2, the second PNP transistor Q4, and the third PNP transistor Q6 are collectively connected to the power supply VEE (-5V).

4. The silicon carbide MOSFET power module high-speed drive circuit capable of natural heat dissipation according to claim 3, characterized in that: The drive enhancement and heat equalization unit circuit further includes a first charge discharge resistor R14, and the first charge discharge resistor R14 is connected between the gate and the source of the SiC MOSFET power tube.

5. The silicon carbide MOSFET power module high-speed drive circuit capable of natural heat dissipation according to claim 1, characterized in that: The ISO5852 isolated gate driver chip can be replaced by an ISO5851 isolated gate driver chip or an ADUM4146 isolated gate driver chip.

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