Antimonide HEMT structure, epitaxy structure and preparation method thereof

Abstract

The invention provides an antimonide HEMT (High Electron Mobility Transistor) structure, an epitaxial structure and a preparation method thereof. InSb channel layers are formed on the two sides of an InAs channel layer, and the lattice constant of an InSb material is higher than that of an InAs material and that of a GaSb material, so that the InSb material layer can generate a tensile stress effect on an InAs material layer and a GaSb material layer on the two sides of the InSb material layer in the growth process, and the flatness of an interface between the InSb material layer and the InAs material layer and the flatness of an interface between the InSb material layer and the GaSb material layer are improved; the dislocation density in the material is effectively reduced, so that the electron mobility of a quantum well is improved; meanwhile, the GaSb material layer is inserted between the InSb material layer and the AlSb material layer, so that the influence of high temperature on precipitation of In atoms in the InSb material layer and the InAs material layer during high-temperature growth of the AlSb material layer can be effectively ensured, and the lattice constant of the GaSb material layer and the mismatch degree of the AlSb material layer are very small, so that dislocation can be reduced, and the quality of the active layer can be improved; in addition, the InAs composite channel layer structure can form a stepped square quantum well, so that the concentration of 2DEG is effectively increased.

Description

Technical Field

[0001] The present invention relates to the technical field of HEMT semiconductors, and particularly to an antimonide HEMT structure, an epitaxial structure and a preparation method thereof. Background Art

[0002] In high-speed compound semiconductor devices, high electron mobility transistors (HEMTs) play a crucial role due to their excellent properties such as high transconductance, low threshold voltage, high current cutoff frequency, and low gate leakage current. High electron mobility transistors based on III-V compound semiconductors have been continuously attracting attention in recent years for their applications in microwave, millimeter-wave devices, monolithic integrated circuits, and logic integrated circuits.

[0003] Antimonide (Sb) system materials are the application materials for the third-generation high electron mobility transistors. Compared with the current mainstream GaAs-based and InP-based HEMTs for high-speed devices, antimonide HEMT devices have the following advantages: 1. Sb-based HEMT materials have a higher electron mobility than GaAs-based and InP-based HEMT structure materials. The electron mobility in the InAs channel at room temperature has exceeded 30,000 cm 2 V -1 s -1 ; 2. The electrons in the conductive channel of Sb-based HEMT materials have a higher saturated drift velocity (InAs channel: 4×10 7 cm / s), which can obtain better frequency and gain characteristics. Therefore, the conversion efficiency is high, and it has better transmission performance under high electric fields; 3. There is a larger conduction band discontinuity (1.35 eV) between the AlSb barrier and the InAs channel in Sb-based HEMT materials, which can form a higher carrier concentration in the channel. At the same time, it also makes the Sb-based HEMT devices have better radiation resistance; 4. It can be directly compatible with optoelectronic devices such as lasers, light-emitting diodes, and PIN photodiodes. Optoelectronic devices and electrical devices can be fabricated on the same chip, facilitating the realization of optoelectronic integrated circuits (OEICs). These characteristics give antimonide HEMTs great potential in generating excellent properties such as high frequency, high speed, low power consumption, and low noise at low operating voltages.

[0004] In the existing antimonide HEMT structures, an AlSb barrier layer and an InAs channel layer are mainly grown on a substrate, and electrons will form a two-dimensional electron gas (2DEG) in the InAs channel layer. Therefore, the growth quality of the channel layer is crucial for improving the performance of antimonide HEMT devices. Summary of the Invention

[0005] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide an antimonide HEMT structure, an epitaxial structure and a preparation method thereof, which are used to solve the problem of low material growth quality of the channel layer in the antimonide HEMT epitaxial structure in the prior art.

[0006] To achieve the above object and other related objects, the present invention provides an antimonide HEMT epitaxial structure, and the epitaxial structure includes:

[0007] An InP substrate; and

[0008] A buffer layer, a first AlSb barrier layer, an InAs composite channel layer, an AlSb isolation layer, a second antimonide barrier layer and an InAs cap layer which are arranged in sequence from bottom to top on one side of the InP substrate;

[0009] Wherein, the InAs composite channel layer includes a first GaSb channel layer, a first InSb channel layer, an InAs channel layer, a second InSb channel layer and a second GaSb channel layer in sequence from bottom to top;

[0010] The thickness of the first GaSb channel layer is 1 nm to 3 nm, the thickness of the first InSb channel layer is 0.3 nm to 1 nm, the thickness of the InAs channel layer is 10 nm to 12 nm, the thickness of the second InSb channel layer is 0.3 nm to 1 nm, and the thickness of the second GaSb channel layer is 1 nm to 3 nm.

[0011] Optionally, a GaSb protection layer is formed between the second antimonide barrier layer and the cap layer, and the thickness of the GaSb protection layer is 2 nm to 3 nm.

[0012] Optionally, the second antimonide barrier layer includes a second AlSb barrier layer and In x AlSb barrier layer from bottom to top, where 0.2 < x < 0.3.

[0013] Optionally, the buffer layer is a composite buffer stack, which includes an InP buffer layer, a first superlattice buffer layer composed of an InGaAs layer / InAlAs layer and a second superlattice buffer layer composed of an AlAsSb layer / GaSb layer in sequence from bottom to top; wherein, the component of the InGaAs layer in the first superlattice buffer layer is denoted as In x GaAs layer, 0.65 < x < 0.75, the component of the InAlAs layer is denoted as In y AlAs layer, 0.65 < y < 0.75; the second superlattice buffer layer includes at least two second superlattice sub-buffer layers in sequence from bottom to top, and the As atomic molar content of the AlAsSb layer in the second superlattice sub-buffer layer gradually decreases along the direction from bottom to top.

[0014] Further, the second superlattice buffer layer sequentially includes a lower second superlattice buffer layer, a middle second superlattice buffer layer, and an upper second superlattice buffer layer from bottom to top; wherein, the composition of the AlAsSb layer in the lower second superlattice buffer layer is denoted as AlAs x Sb layer, 0.35 < x < 0.45, the composition of the AlAsSb layer in the middle second superlattice buffer layer is denoted as AlAs y Sb layer, 0.15 < y < 0.25, the composition of the AlAsSb layer in the upper second superlattice buffer layer is denoted as AlAs z Sb layer, 0 < z < 0.1.

[0015] Further, the thickness of the InP buffer layer is 50 nm to 100 nm; the thickness of the InGaAs layer in the first superlattice buffer layer is 3 nm to 5 nm, and the thickness of the InAlAs layer in the first superlattice buffer layer is 3 nm to 5 nm; the thickness of the AlAsSb layer in the second superlattice buffer layer is 5 nm to 10 nm, and the thickness of the GaSb layer is 2 nm to 3 nm.

[0016] Further, the first superlattice buffer layer is composed of 5 to 10 periods of InGaAs layer / InAlAs layer; the second superlattice buffer layer is composed of 5 to 10 periods of AlAsSb layer / GaSb layer.

[0017] Optionally, the upper surface of the AlSb isolation layer is subjected to tellurium δ-doping, and the doping concentration of the tellurium δ-doping is 4E12 cm -2 ~5E12 cm -2 .

[0018] The present invention also provides a preparation method of a antimonide HEMT epitaxial structure, which is prepared by molecular beam epitaxy process, and the preparation method includes the following steps:

[0019] S1: Provide an InP substrate;

[0020] S2: Grow a buffer layer on one side of the InP substrate;

[0021] S3: Grow a first AlSb barrier layer on the buffer layer, and the growth temperature is 530 °C to 550 °C;

[0022] S4: Grow an InAs composite channel layer on the first AlSb barrier layer, where the InAs composite channel layer sequentially includes, along the growth direction, a first GaSb channel layer with a thickness of 1 nm to 3 nm, a first InSb channel layer with a thickness of 0.3 nm to 1 nm, an InAs channel layer with a thickness of 10 nm to 12 nm, a second InSb channel layer with a thickness of 0.3 nm to 1 nm, and a second GaSb channel layer with a thickness of 1 nm to 3 nm;

[0023] S5: Grow an AlSb isolation layer on the InAs composite channel layer, with a growth temperature of 530 °C to 550 °C;

[0024] S6: Grow a second antimonide barrier layer on the AlSb isolation layer;

[0025] S7: Grow an InAs cap layer on the second antimonide barrier layer, with a growth temperature of 400 °C to 450 °C.

[0026] Optionally, the method for growing the InAs composite channel layer in step S4 includes:

[0027] S41: Grow the first GaSb channel layer on the first AlSb barrier layer by the growth interruption method, with a growth temperature of 470 °C to 500 °C;

[0028] S42: Lower the temperature to the growth temperature of InSb material and InAs material in an Sb source atmosphere;

[0029] S43: Terminate the introduction of the Sb source and introduce an In source to grow the first InSb channel layer on the first GaSb channel layer by the surface mobility enhancement method;

[0030] S44: Grow the InAs channel layer on the first InSb channel layer;

[0031] S45: Grow the second InSb channel layer on the InAs channel layer by the surface mobility enhancement method;

[0032] S46: Grow the second GaSb channel layer on the second InSb channel layer at the same growth temperature as in step S45.

[0033] Optionally, the buffer layer is a composite buffer stack, which sequentially includes, from bottom to top: an InP buffer layer, a first superlattice buffer layer composed of an InGaAs layer / InAlAs layer, and a second superlattice buffer layer composed of an AlAsSb layer / GaSb layer; where the InGaAs layer component in the first superlattice buffer layer is denoted as In x GaAs layer, 0.65 < x < 0.75, and the InAlAs layer component is denoted as Iny AlAs layer, 0.65 < y < 0.75; the second superlattice buffer layer sequentially includes at least two second superlattice sub-buffer layers from bottom to top, and the molar content of As atoms in the AlAsSb layer in the second superlattice sub-buffer layer gradually decreases in the direction from bottom to top; the method for growing the buffer layer in step S2 includes:

[0034] S21: Raise the temperature of the InP substrate to 500°C - 550°C for deoxidation, and sequentially grow the InP buffer layer and the first superlattice buffer layer on the deoxidized InP substrate;

[0035] S22: Grow the second superlattice buffer layer on the first superlattice buffer layer, and the growth temperature is 530°C - 550°C.

[0036] Optionally, after forming the AlSb isolation layer in step S5, it further includes a step of performing tellurium δ-doping on the upper surface of the AlSb isolation layer using a GaTe source at the same temperature.

[0037] Optionally, the second antimonide barrier layer includes a second AlSb barrier layer and an In x AlSb barrier layer from bottom to top, where 0.2 < x < 0.3; the method for forming the second antimonide barrier layer in step S6 includes: first grow the second AlSb barrier layer on the AlSb isolation layer, and the growth temperature is 530°C - 550°C; then cool down to 450°C - 500°C in an Sb source atmosphere; finally grow the In x AlSb barrier layer on the second AlSb barrier layer.

[0038] Further, a GaSb protection layer is formed between the second antimonide barrier layer and the cap layer; after forming the second antimonide barrier layer, form the GaSb protection layer on the In x AlSb barrier layer at the same temperature.

[0039] The present invention also provides an antimonide HEMT structure, and the HEMT structure is prepared based on the antimonide HEMT epitaxial structure described in any one of the above.

[0040] As described above, the present invention provides an antimonide HEMT structure, an epitaxial structure and a preparation method thereof. In the antimonide HEMT epitaxial structure, by forming InSb channel layers (i.e., the first InSb channel layer and the second InSb channel layer) on both sides of the InAs channel layer, since the lattice constant of the InSb material is about higher than that of the InAs material and the lattice constant of the GaSb material is about The lattice constant of [the relevant layer] is such that during the growth process, the InSb material layer will exert a tensile stress effect on the InAs material layers and GaSb material layers on both of its sides, thereby improving the flatness of the interfaces between the InSb material layer and the InAs material layer and between the InSb material layer and the GaSb material layer, and effectively reducing the dislocation density in the material, thereby improving the electron mobility of the quantum well; at the same time, setting a GaSb material layer (i.e., the first GaSb channel layer and the second GaSb channel layer) on one side of the InAs material layer also plays a role in protecting the InSb channel layer and the InAs channel layer during the temperature change process of their growth. Since the growth temperature of the AlSb material layer is the highest (about 530 °C - 550 °C), the growth temperatures of the InSb material layer and the InAs material layer are the lowest (about 400 °C - 450 °C), and the growth temperature of the GaSb material layer is between the two (about 470 °C - 500 °C), inserting a GaSb material layer between the InSb material layer and the AlSb material layer can effectively ensure that the high temperature during the growth of the AlSb material layer does not affect the precipitation of In atoms in the InSb material layer and the InAs material layer, thereby ensuring the quality of the channel layer. And the lattice constant of the GaSb material layer (about ) has a very small mismatch with the lattice constant of the AlSb material layer (about ), thereby further improving the lattice matching between the two, reducing dislocations, and further improving the quality of the active layer; in addition, by adopting the InAs composite channel layer structure of the present invention, a stepped square quantum well can be formed, thereby effectively increasing the concentration of 2DEG. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 Shows a cross-sectional structural schematic diagram of a sulfide HEMT epitaxial structure according to an embodiment of the present invention.

[0042] Figure 2 Shows a cross-sectional structural schematic diagram of the InAs composite channel layer in the sulfide HEMT epitaxial structure according to an embodiment of the present invention.

[0043] Figure 3 Shows Figure 2 the energy band schematic diagram of the InAs composite channel layer.

[0044] Figure 4 Shows a cross-sectional structural schematic diagram of the first superlattice buffer layer in the sulfide HEMT epitaxial structure according to an embodiment of the present invention.

[0045] Figure 5 Shows a cross-sectional structural schematic diagram of the second superlattice buffer layer in the sulfide HEMT epitaxial structure according to an embodiment of the present invention.

[0046] Figure 6Schematic cross-sectional structure diagram of the second superlattice buffer layer in the antimonide HEMT epitaxial structure according to another embodiment of the present invention.

[0047] Figure 7 Schematic flow diagram of the method for preparing the antimonide HEMT epitaxial structure according to an embodiment of the present invention.

[0048] Figure 8 Schematic shutter sequence diagram during the growth of the InAs composite channel layer in the method for preparing the antimonide HEMT epitaxial structure according to an embodiment of the present invention.

[0049] Element number description

[0050] 10 InP substrate

[0051] 11 Buffer layer

[0052] 110 InP buffer layer

[0053] 111 First superlattice buffer layer

[0054] 112 InGaAs layer

[0055] 113 InAlAs layer

[0056] 114 Second superlattice buffer layer

[0057] 115 Second superlattice sub-buffer layer

[0058] 115a Lower second superlattice sub-buffer layer

[0059] 115b Middle second superlattice sub-buffer layer

[0060] 115c Upper second superlattice sub-buffer layer

[0061] 116 GaSb layer

[0062] 117 AlAsSb layer

[0063] 12 First AlSb barrier layer

[0064] 13 InAs composite channel layer

[0065] 130 First GaSb channel layer

[0066] 131 First InSb channel layer

[0067] 132 InAs channel layer

[0068] 133 Second InSb channel layer

[0069] 134 Second GaSb channel layer

[0070] 14 AlSb isolation layer

[0071] 140 Tellurium δ-doping

[0072] 15 Second antimonide barrier layer

[0073] 150 Second AlSb barrier layer

[0074] 151 In x AlSb barrier layer

[0075] 16 GaSb protective layer

[0076] 17 InAs cap layer Specific embodiments

[0077] The following specific examples illustrate the embodiments of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0078] For the sake of description, spatial relative terms such as "above...", "over...", "on the upper surface of...", "above" etc. can be used here to describe the spatial positional relationship between a device or feature shown in the figure and other devices or features. It should be understood that the spatial relative terms are intended to include different orientations in use or operation in addition to the orientation of the device described in the figure. For example, if the device in the figure is inverted, the device described as "above other devices or structures" or "over other devices or structures" will then be positioned "below other devices or structures" or "under other devices or structures". Thus, the exemplary term "above..." can include both the orientations of "above..." and "below...". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and corresponding interpretations are made for the spatial relative descriptions used here.

[0079] It should be understood that using words such as "first", "second", "third", etc. to limit components is only for the convenience of distinguishing the above components. Without further statement, the above words have no special meaning, so they cannot be understood as limiting the protection scope of the present invention.

[0080] Please refer to Figures 1 to 8It should be noted that the illustrations provided in this embodiment only schematically illustrate the basic concept of the present invention. Therefore, only the components related to the present invention are shown in the illustrations, rather than being drawn according to the number, shape, and size of the components in actual implementation. The types, quantities, and proportions of the components in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0081] As Figure 1 and Figure 2 shown, this embodiment provides an antimonide HEMT epitaxial structure, and the epitaxial structure includes:

[0082] an InP substrate 10; and

[0083] a buffer layer 11, a first AlSb barrier layer 12, an InAs composite channel layer 13, an AlSb isolation layer 14, a second antimonide barrier layer 15, and an InAs cap layer 17 that are arranged in sequence from bottom to top on one side of the InP substrate 10;

[0084] Among them, as Figure 2 shown, the InAs composite channel layer 13 sequentially includes a first GaSb channel layer 130, a first InSb channel layer 131, an InAs channel layer 132, a second InSb channel layer 133, and a second GaSb channel layer 134 from bottom to top;

[0085] the thickness of the first GaSb channel layer 130 is 1 nm to 3 nm, the thickness of the first InSb channel layer 131 is 0.3 nm to 1 nm, the thickness of the InAs channel layer 132 is 10 nm to 12 nm, the thickness of the second InSb channel layer 133 is 0.3 nm to 1 nm, and the thickness of the second GaSb channel layer 134 is 1 nm to 3 nm.

[0086] In the antimonide HEMT epitaxial structure, it is easier for the InAs channel layer to relax when grown on the AlSb barrier layer. This is because the lattice constant of the InAs material is about the lattice constant of the AlSb material is about There is a large lattice mismatch between the two, which easily leads to a deterioration of the interface quality of the InAs / AlSb quantum well and will generate misfit dislocations in the InAs channel layer. The interface roughness and the misfit dislocations generated in the channel are typical electron scattering sources, seriously affecting the electron mobility of the quantum well. In the antimonide HEMT epitaxial structure of this embodiment, by forming InSb channel layers (i.e., the first InSb channel layer and the second InSb channel layer) on both sides of the InAs channel layer, since the lattice constant of the InSb material is about higher than that of the InAs material and the lattice constant of the GaSb material is about The lattice constant of, so during the growth process, the InSb material layer will exert a tensile stress effect on the InAs material layers and GaSb material layers on both sides of it, thereby improving the flatness of the interface between the InSb material layer and the InAs material layer and the interface between the InSb material layer and the GaSb material layer, and effectively reducing the dislocation density in the material, thereby improving the electron mobility of the quantum well; at the same time, setting a GaSb material layer (i.e., the first GaSb channel layer and the second GaSb channel layer) on one side of the InAs material layer also plays a role in protecting the InSb channel layer and the InAs channel layer during the temperature change process during growth. Since the growth temperature of the AlSb material layer is the highest (about 530 °C - 550 °C), the growth temperatures of the InSb material layer and the InAs material layer are the lowest (about 400 °C - 450 °C), and the growth temperature of the GaSb material layer is between the two (about 470 °C - 500 °C), so inserting a GaSb material layer between the InSb material layer and the AlSb material layer can effectively ensure that the high temperature during the growth of the AlSb material layer affects the precipitation of In atoms in the InSb material layer and the InAs material layer, thereby ensuring the quality of the channel layer, and the lattice constant of the GaSb material layer (about ) and the lattice constant of the AlSb material layer (about ) have a very small mismatch degree, so it can also improve the lattice matching between the two, reduce dislocations, and further improve the quality of the active layer; in addition, adopting the InAs composite channel layer structure of this embodiment can form a stepped square quantum well as shown in Figure 3 , thereby effectively increasing the concentration of 2DEG.

[0087] As shown in Figure 1 , as a preferred example, a GaSb protection layer 16 is formed between the second antimonide barrier layer 15 and the cap layer 17, and the thickness of the GaSb protection layer 16 is 2 nm - 3 nm. The GaSb protection layer 16 can protect the InAs / AlSb HEMT structure from the influence of the growth environment in the cavity, facilitating the growth of the cap layer InAs material during cooling; in addition, the GaSb protection layer 16 can also provide a part of stress release on the second antimonide barrier layer 15 to improve the mobility of the HEMT device; finally, the GaSb protection layer 16 can also be used as an etching stop layer during the preparation of the HEMT device to facilitate the processing of the gate groove etching.

[0088] As shown in Figure 1 , as a specific example, the second antimonide barrier layer 15 includes a second AlSb barrier layer 150 and an In x AlSb barrier layer 151 from bottom to top, where 0.2 < x < 0.3. Increasing the In xThe AlSb barrier layer 151 can reduce the problems caused by the oxidation of the second AlSb barrier layer 150 during the subsequent preparation process of the HEMT device; in addition, the In x AlSb barrier layer 151 can also serve as a hole blocking layer to reduce the gate leakage current caused by hole leakage, making the device more suitable for the usage requirements of ultra-low power consumption devices. The thickness of the second AlSb barrier layer 150 is generally selected to be 10 nm to 15 nm, and the In x AlSb barrier layer 151 is generally selected to be 3 nm to 5 nm.

[0089] As Figure 1 shown, as another specific example, the upper surface of the AlSb isolation layer 14 is subjected to tellurium δ-doping 140, and the doping concentration of the tellurium δ-doping 140 is 4E12 cm -2 ~5E12 cm -2 . The tellurium δ-doping 140 avoids the amphoteric doping property of the Si dopant and can achieve a larger carrier concentration. The thickness of the AlSb isolation layer is generally selected to be 3 nm to 5 nm.

[0090] As an example, the InAs cap layer 17 is generally N-type heavily doped, and its main function is to easily form a good ohmic contact with the subsequent formed metal lead-out structure, so as to reduce the contact resistance, lower the threshold voltage, and reduce the device power consumption. The N-type heavy doping of the InAs cap layer 17 can be achieved by silicon doping, and the doping concentration of silicon is generally 0.5E19 cm -3 ~1.0E19 cm -3 . The thickness of the InAs cap layer 17 is generally selected to be 20 nm to 30 nm.

[0091] As an example, the thickness of the first AlSb barrier layer 12 is generally 100 nm to 200 nm. The first AlSb barrier layer 12 serves as both a lower barrier layer and a buffer layer to further adjust and release the lattice mismatch problem between the InP substrate 10 and the InAs channel layer 132.

[0092] As Figure 1 、 Figure 4 and Figure 5 shown, as a preferred example, the buffer layer 11 is a composite buffer stack, which sequentially includes from bottom to top: an InP buffer layer 110, a first superlattice buffer layer 111 composed of an InGaAs layer / InAlAs layer, and a second superlattice buffer layer 114 composed of an AlAsSb layer / GaSb layer; wherein, as Figure 4 shown, the composition of the InGaAs layer 112 in the first superlattice buffer layer 111 is denoted as In xGaAs layer, 0.65 < x < 0.75, and the composition of the InAlAs layer 113 is denoted as In y AlAs layer, 0.65 < y < 0.75; as Figure 5 shown, the second superlattice buffer layer 114 includes at least two second superlattice sub-buffer layers 115 from bottom to top, and the molar content of As atoms in the AlAsSb layer 117 in the second superlattice sub-buffer layer 115 gradually decreases along the direction from bottom to top. The InP buffer layer 110 can flatten the surface of the deoxidized InP substrate 10; the first superlattice buffer layer 111 can compensate for the lattice mismatch between the InP substrate 10 and the active region, pulling the lattice constant to around (i.e., between InAs and InP), and the InAlAs layer 113 material can also provide a relatively high resistivity to improve the substrate leakage problem; the second superlattice buffer layer 114 is arranged such that the molar content of As atoms in the AlAsSb layer gradually decreases from bottom to top, further compensating for the lattice mismatch between the InP substrate 10 and the active region, pulling the lattice constant to the same lattice constant as the AlSb material (about ), thereby alleviating the lattice mismatch problem between the substrate and the active region in a slow compensation manner, improving the material growth quality of the active region, and the AlAsSb layer 117 material can also further provide a relatively high resistivity to improve the substrate leakage problem. It should be noted here that in the cycle period of the first superlattice buffer layer 111, the stacking positions of the InGaAs layer 112 and the InAlAs layer 113 are not overly restricted, that is, it can be as Figure 4 shown, where the InGaAs layer 112 is located in the lower layer and the InAlAs layer 113 is located in the upper layer, or the InAlAs layer 113 is located in the lower layer and the InGaAs layer 112 is located in the upper layer. In this embodiment, it is preferably stacked as Figure 4 shown, where the InGaAs layer 112 is located in the lower layer and the InAlAs layer 113 is located in the upper layer. In addition, in the cycle period of the second superlattice buffer layer 114, the AlAsSb layer 117 is located in the upper layer and the GaSb layer 116 is located in the lower layer.

[0093] Preferably, as Figure 6 shown, the second superlattice buffer layer 114 is provided with 3 second superlattice sub-buffer layers 115 from bottom to top, that is Figure 6The lower second superlattice buffer layer 115a, the middle second superlattice buffer layer 115b, and the upper second superlattice buffer layer 115c in it. The molar content change of As atoms in the AlAsSb layer 117 of the three second superlattice buffer layers 115 is as follows: The component of the AlAsSb layer 117 in the lower second superlattice buffer layer 115a is denoted as AlAs x Sb layer, 0.35 < x < 0.45. The component of the AlAsSb layer 117 in the middle second superlattice buffer layer 115b is denoted as AlAs y Sb layer, 0.15 < y < 0.25. The component of the AlAsSb layer 117 in the upper second superlattice buffer layer 115c is denoted as AlAs z Sb layer, 0 < z < 0.1.

[0094] Furthermore, the thickness of the InP buffer layer 110 is 50 nm to 100 nm; the thickness of the InGaAs layer 112 in the first superlattice buffer layer 111 is 3 nm to 5 nm, and the thickness of the InAlAs layer 113 in the first superlattice buffer layer 111 is 3 nm to 5 nm; the thickness of the AlAsSb layer 117 in the second superlattice buffer layer 115 is 5 nm to 10 nm, and the thickness of the GaSb layer 116 is 2 nm to 3 nm.

[0095] Optimally, the first superlattice buffer layer 111 is composed of 5 to 10 periods of InGaAs layer 112 / InAlAs layer 113; the second superlattice buffer layer 115 is composed of 5 to 10 periods of AlAsSb layer 117 / GaSb layer 116.

[0096] This embodiment also provides a preparation method of a antimonide HEMT epitaxial structure for preparing the antimonide HEMT epitaxial structure described above. Figure 7 It is a flow schematic diagram of the preparation method of the antimonide HEMT epitaxial structure in this embodiment, and is prepared by molecular beam epitaxy technology. Figure 1 It is the antimonide HEMT epitaxial structure obtained by using this preparation method. The preparation method includes the following steps:

[0097] S1: Provide an InP substrate;

[0098] S2: Grow a buffer layer on one side of the InP substrate;

[0099] S3: Grow a first AlSb barrier layer on the buffer layer, and the growth temperature is 530 °C to 550 °C;

[0100] S4: Grow an InAs composite channel layer on the first AlSb barrier layer, where the InAs composite channel layer sequentially includes a first GaSb channel layer with a thickness of 1 nm to 3 nm, a first InSb channel layer with a thickness of 0.3 nm to 1 nm, an InAs channel layer with a thickness of 10 nm to 12 nm, a second InSb channel layer with a thickness of 0.3 nm to 1 nm, and a second GaSb channel layer with a thickness of 1 nm to 3 nm along the growth direction;

[0101] S5: Grow an AlSb isolation layer on the InAs composite channel layer, and the growth temperature is 530 °C to 550 °C;

[0102] S6: Grow a second antimonide barrier layer on the AlSb isolation layer;

[0103] S7: Grow an InAs cap layer on the second antimonide barrier layer, and the growth temperature is 400 °C to 450 °C.

[0104] Specifically, in step S1, the InP substrate 10 includes, but is not limited to, indium phosphide substrates of 2 inches, 4 inches, 6 inches, 8 inches, and composite substrates composed of silicon-based indium phosphide. Additionally, before performing step S2, the InP substrate 10 is subjected to a temperature-raising deoxidation treatment.

[0105] As an example, as Figure 1 、 Figure 4 and Figure 5 shown, the buffer layer 11 is a composite buffer stack, which sequentially includes, from bottom to top: an InP buffer layer 110, a first superlattice buffer layer 111 composed of an InGaAs layer 112 / InAlAs layer 113, and a second superlattice buffer layer 114 composed of an AlAsSb layer 117 / GaSb layer 116; where the composition of the InGaAs layer 112 in the first superlattice buffer layer 111 is denoted as In x GaAs layer, 0.65 < x < 0.75, and the composition of the InAlAs layer 113 is denoted as In y AlAs layer, 0.65 < y < 0.75; the second superlattice buffer layer 114 sequentially includes at least two second superlattice sub-buffer layers 115 from bottom to top, and along the upward direction, the molar content of As atoms in the AlAsSb layer 117 in the second superlattice sub-buffer layer 115 gradually decreases; at this time, the method for growing the buffer layer 11 in step S2 includes:

[0106] S21: Raise the temperature of the InP substrate 10 to 500 °C to 550 °C for deoxidation, and sequentially grow the InP buffer layer 110 and the first superlattice buffer layer 111 on the deoxidized InP substrate 10;

[0107] S22: Grow the second superlattice buffer layer 114 on the first superlattice buffer layer 111 at a growth temperature of 530°C to 550°C.

[0108] As an example, as Figure 1 shown, after step S5 forms the AlSb isolation layer 14, it further includes a step of performing tellurium δ-doping 140 on the upper surface of the AlSb isolation layer 14 using a GaTe source at the same temperature.

[0109] As an example, the second antimonide barrier layer 15 includes, from bottom to top, a second AlSb barrier layer 150 and an In x AlSb barrier layer 151, where 0.2 < x < 0.3; the method for forming the second antimonide barrier layer 15 in step S6 includes: first growing the second AlSb barrier layer 150 on the AlSb isolation layer 14 at a growth temperature of 530°C to 550°C; then cooling down to 450°C to 500°C in an Sb source atmosphere; and finally growing the In x AlSb barrier layer 151 on the second AlSb barrier layer 150. Further, when a GaSb protection layer 16 is formed between the second antimonide barrier layer 15 and the cap layer 17, after forming the In x AlSb barrier layer 151, it further includes a step of forming the GaSb protection layer on the In x AlSb barrier layer 151 at the same temperature.

[0110] As a preferred example, the method for growing the InAs composite channel layer in step S4 includes:

[0111] S41: Grow the first GaSb channel layer 130 on the first AlSb barrier layer 12 by growth interruption method at a growth temperature of 470°C to 500°C;

[0112] S42: Cool down to the growth temperature of InSb material and InAs material in an Sb source atmosphere;

[0113] S43: Stop introducing the Sb source and introduce an In source to grow the first InSb channel layer 131 on the first GaSb channel layer 130 by surface mobility enhancement method;

[0114] S44: Grow the InAs channel layer 132 on the first InSb channel layer 131;

[0115] S45: Grow the second InSb channel layer 133 on the InAs channel layer 132 by surface mobility enhancement method;

[0116] S46: Grow the second GaSb channel layer 134 on the second InSb channel layer 133 at the same growth temperature as in step S45.

[0117] Specifically, as Figure 8 shown, it is a schematic diagram of the shutter sequence during the growth of the InAs composite channel layer in step S4. Combining Figure 2 and Figure 8 , where:

[0118] The time period of a is the growth time of the first AlSb barrier layer 12, and the specific growth time is determined according to the thickness and growth rate;

[0119] The time period of b is the growth time of the first GaSb channel layer 130. During this process, the Sb source is continuously introduced. First, the growth temperature is reduced from the growth temperature of the first AlSb barrier layer 12 in the time period of a (for example, 530°C - 550°C) to the suitable temperature for GaSb material growth (for example, 470°C - 500°C), and then the Ga source is introduced to form the first GaSb channel layer 130;

[0120] The time period of c is the temperature change time (i.e., the cooling time) for the subsequent growth of the first InSb channel layer 131 and the InAs channel layer 132 materials. During this process, the Sb source is continuously introduced;

[0121] The time period of d is the growth time of the first InSb channel layer 131 using the surface mobility enhancement method (MEE). This growth method can effectively inhibit the intermixing of group V elements;

[0122] The time period of e is the growth time of the InAs channel layer 132, and the specific growth time is determined according to the thickness and growth rate. The growth temperature of the InAs channel layer 132 is the same as the growth temperature of the first InSb channel layer 131;

[0123] The time period of f is the growth time of the second InSb channel layer 133 using the surface mobility enhancement method (MEE). This growth method can effectively inhibit the intermixing of group V elements:

[0124] The time period of g is the growth time of the second GaSb channel layer 134. During this process, the growth temperature can be kept the same as the growth temperature of the second InSb channel layer 133. The second GaSb channel layer 134 can effectively prevent the segregation of In in the In-containing channel layer;

[0125] The time period of h is the temperature change time for heating up to the suitable temperature for AlSb material growth in the atmosphere of continuously introducing the Sb source;

[0126] The i time period is the growth time of the AlSb isolation layer 14 , and the specific growth time is determined according to the thickness and growth speed.

[0127] This embodiment further provides an antimonide HEMT structure, which is prepared based on the antimonide HEMT epitaxial structure described in this embodiment.

[0128] In summary, the present invention provides an antimonide HEMT structure, an epitaxial structure and a preparation method thereof. In the antimonide HEMT epitaxial structure, an InSb channel layer (i.e., a first InSb channel layer and a second InSb channel layer) is formed on both sides of the InAs channel layer. Since the lattice constant of the InSb material is approximately Higher than InAs materials The lattice constant of GaSb material is about The lattice constant of the InSb material layer is small, so during the growth process, the InSb material layer will produce a tensile stress effect on the InAs material layer and the GaSb material layer on both sides thereof, thereby improving the flatness of the interface between the InSb material layer and the InAs material layer and the interface between the InSb material layer and the GaSb material layer, and effectively reducing the dislocation density in the material, thereby improving the electron mobility of the quantum well; at the same time, arranging the GaSb material layer (i.e., the first GaSb channel layer and the second GaSb channel layer) on one side of the InAs material layer also plays a role in maintaining the temperature of the InSb channel layer and the InAs channel layer during the growth process. Since the growth temperature of the AlSb material layer is the highest (about 530℃~550℃), the growth temperature of the InSb material layer and the InAs material layer is the lowest (about 400℃~450℃), and the growth temperature of the GaSb material layer is between the two (about 470℃~500℃), inserting the GaSb material layer between the InSb material layer and the AlSb material layer can effectively ensure that the high temperature during the high-temperature growth of the AlSb material layer affects the precipitation of In atoms in the InSb material layer and the InAs material layer, thereby ensuring the quality of the channel layer, and the lattice constant of the GaSb material layer (about ) and the lattice constant of the AlSb material layer (approximately ) mismatch is very small, thereby improving the lattice matching between the two, reducing dislocations, and further improving the quality of the active layer; in addition, the InAs composite channel layer structure of the present invention can form a stepped square quantum well, thereby effectively increasing the concentration of 2DEG. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0129] The above embodiments are only illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. An antimonide HEMT epitaxial structure, characterized in that: The epitaxial structure comprises: InP substrate; and A buffer layer, a first AlSb barrier layer, an InAs composite channel layer, an AlSb isolation layer, a second antimonide barrier layer and an InAs cap layer are arranged in sequence from bottom to top on one side of the InP substrate; The InAs composite channel layer includes, from bottom to top, a first GaSb channel layer, a first InSb channel layer, an InAs channel layer, a second InSb channel layer and a second GaSb channel layer; The thickness of the first GaSb channel layer is 1nm-3nm, the thickness of the first InSb channel layer is 0.3nm-1nm, the thickness of the InAs channel layer is 10nm-12nm, the thickness of the second InSb channel layer is 0.3nm-1nm, and the thickness of the second GaSb channel layer is 1nm-3nm.

2. The antimonide HEMT epitaxial structure according to claim 1, characterized in that: A GaSb protective layer is formed between the second antimonide barrier layer and the cap layer, and the thickness of the GaSb protective layer is 2nm-3nm.

3. The antimonide HEMT epitaxial structure according to claim 1, characterized in that: The second antimonide barrier layer includes a second AlSb barrier layer and an In x AlSb barrier layer, wherein 0.2<x<0.

3.

4. The antimonide HEMT epitaxial structure according to claim 1, characterized in that: The buffer layer is a composite buffer stack, which includes, from bottom to top, an InP buffer layer, a first superlattice buffer layer composed of an InGaAs layer / InAlAs layer, and a second superlattice buffer layer composed of an AlAsSb layer / GaSb layer; wherein the InGaAs layer component in the first superlattice buffer layer is recorded as In x GaAs layer, 0.65<x<0.75, the composition of the InAlAs layer is recorded as In y AlAs layer, 0.65<y<0.75; the second superlattice buffer layer includes at least two second superlattice buffer layers in sequence from bottom to top, and the As atomic molar content of the AlAsSb layer in the second superlattice buffer layer gradually decreases along the bottom-to-top direction.

5. The antimonide HEMT epitaxial structure according to claim 4, characterized in that: The second superlattice buffer layer includes, from bottom to top, a lower second superlattice buffer layer, a middle second superlattice buffer layer and an upper second superlattice buffer layer; wherein the AlAsSb layer component in the lower second superlattice buffer layer is recorded as AlAs x Sb layer, 0.35<x<0.45, the AlAsSb layer composition in the middle second superlattice buffer layer is recorded as AlAs y Sb layer, 0.15<y<0.25, the AlAsSb layer composition in the upper second superlattice buffer layer is recorded as AlAs z Sb layer, 0<z<0.

1.

6. The antimonide HEMT epitaxial structure according to claim 4 or 5, characterized in that: The thickness of the InP buffer layer is 50nm to 100nm; the thickness of the InGaAs layer in the first superlattice buffer layer is 3nm to 5nm, and the thickness of the InAlAs layer in the first superlattice buffer layer is 3nm to 5nm; the thickness of the AlAsSb layer in the second superlattice buffer layer is 5nm to 10nm, and the thickness of the GaSb layer is 2nm to 3nm.

7. The antimonide HEMT epitaxial structure according to claim 6, characterized in that: The first superlattice buffer layer is composed of 5 to 10 periods of InGaAs layer / InAlAs layer; and the second superlattice buffer layer is composed of 5 to 10 periods of AlAsSb layer / GaSb layer.

8. The antimonide HEMT epitaxial structure according to claim 1, characterized in that: The upper surface of the AlSb isolation layer is doped with tellurium delta, and the doping concentration of the tellurium delta doping is 4E12cm -2 ~5E12cm -2 .

9. A method for preparing an antimonide HEMT epitaxial structure, characterized in that: The molecular beam epitaxy process is used for preparation, and the preparation method comprises the following steps: S1: providing an InP substrate; S2: growing a buffer layer on one side of the InP substrate; S3: growing a first AlSb barrier layer on the buffer layer at a growth temperature of 530° C. to 550° C.; S4: growing an InAs composite channel layer on the first AlSb barrier layer, wherein the InAs composite channel layer includes, in sequence along the growth direction, a first GaSb channel layer with a thickness of 1 nm to 3 nm, a first InSb channel layer with a thickness of 0.3 nm to 1 nm, an InAs channel layer with a thickness of 10 nm to 12 nm, a second InSb channel layer with a thickness of 0.3 nm to 1 nm, and a second GaSb channel layer with a thickness of 1 nm to 3 nm; S5: growing an AlSb isolation layer on the InAs composite channel layer at a growth temperature of 530° C. to 550° C.; S6: growing a second antimonide barrier layer on the AlSb isolation layer; S7: growing an InAs cap layer on the second antimonide barrier layer at a growth temperature of 400°C to 450°C.

10. The method for preparing an antimonide HEMT epitaxial structure according to claim 9, characterized in that: Step S4: The method for growing the InAs composite channel layer comprises: S41: growing the first GaSb channel layer on the first AlSb barrier layer by a growth interruption method, with a growth temperature of 470° C. to 500° C.; S42: cooling down to the growth temperature of the InSb material and the InAs material in the Sb source atmosphere; S43: stopping the introduction of the Sb source, and introducing the In source to grow the first InSb channel layer on the first GaSb channel layer by using a surface mobility enhancement method; S44: growing the InAs channel layer on the first InSb channel layer; S45: growing the second InSb channel layer on the InAs channel layer using a surface mobility enhancement method; S46: growing the second GaSb channel layer on the second InSb channel layer at the same growth temperature as step S45.

11. The method for preparing an antimonide HEMT epitaxial structure according to claim 9, characterized in that: The buffer layer is a composite buffer stack, which includes, from bottom to top, an InP buffer layer, a first superlattice buffer layer composed of an InGaAs layer / InAlAs layer, and a second superlattice buffer layer composed of an AlAsSb layer / GaSb layer; wherein the InGaAs layer component in the first superlattice buffer layer is recorded as In x GaAs layer, 0.65<x<0.75, the composition of the InAlAs layer is recorded as In y AlAs layer, 0.65<y<0.75; the second superlattice buffer layer includes at least two second superlattice buffer layers in sequence from bottom to top, and the As atomic molar content of the AlAsSb layer in the second superlattice buffer layer gradually decreases along the bottom-to-top direction; step S2 the method for growing the buffer layer includes: S21: raising the temperature of the InP substrate to 500° C. to 550° C. for deoxidation, and sequentially growing the InP buffer layer and the first superlattice buffer layer on the deoxidized InP substrate; S22: growing the second superlattice buffer layer on the first superlattice buffer layer at a growth temperature of 530° C. to 550° C.

12. The method for preparing an antimonide HEMT epitaxial structure according to claim 9, characterized in that: After forming the AlSb isolation layer, step S5 further includes the step of doping the upper surface of the AlSb isolation layer with tellurium delta using a GaTe source at the same temperature.

13. The method for preparing an antimonide HEMT epitaxial structure according to claim 9, characterized in that: The second antimonide barrier layer includes a second AlSb barrier layer and an In x AlSb barrier layer, wherein 0.2<x<0.3; Step S6 The method for forming the second antimonide barrier layer comprises: firstly growing the second AlSb barrier layer on the AlSb isolation layer at a growth temperature of 530℃~550℃; then cooling down to 450℃~500℃ in an Sb source atmosphere; finally growing the In on the second AlSb barrier layer x AlSb barrier layer.

14. The method for preparing an antimonide HEMT epitaxial structure according to claim 13, characterized in that: A GaSb protective layer is formed between the second antimonide barrier layer and the cap layer; after the second antimonide barrier layer is formed, the GaSb protective layer is formed at the same temperature on the In x The GaSb protection layer is formed on the AlSb barrier layer.

15. An antimonide HEMT structure, characterized in that: The HEMT structure is prepared based on the antimonide HEMT epitaxial structure according to any one of claims 1 to 8.

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