Through electrode substrate and method for manufacturing through electrode substrate
By forming a metal oxide clamp layer on the through-hole side wall of the through-electrode substrate, the problem of easy peeling of the through-electrode under temperature changes is solved, and a more stable connection effect is achieved.
Patent Information
- Application Number
- CN202380076276.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-06-14
- Filing Date
- 2023-11-02
- Publication Date
- 2025-05-27
AI Technical Summary
The existing through-electrode substrates are prone to peel off the through-electrode from the side walls of the through-holes under factors such as temperature changes, resulting in unstable connections.
A tight fit layer is formed between the side wall of the through hole and the through electrode. The tight fit layer is composed of metal oxides, and a pore tight fit layer is formed by chemical vapor growth, which is located between the side wall and the pore metal layer to enhance the fit.
The pore metal layer is effectively suppressed from peeling off from the through-hole side wall of the substrate, and the stability and connection strength of the through-electrode substrate are improved.
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Figure CN120052061A_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present disclosure relate to a through electrode substrate and a method for manufacturing the through electrode substrate. Background Art
[0002] A so-called through electrode substrate is used in various applications. The through electrode substrate is a member including a first surface and a second substrate on the opposite side of the first surface, a through hole formed in the substrate, and a through electrode located in the through hole. For example, when stacking a plurality of LSI chips to increase the mounting density of the LSI, the through electrode substrate is used as an interposer between two LSI chips. The through electrode substrate may also be interposed between components such as LSI chips and a mounting substrate such as a mother board. The through electrode substrate is also used as a member constituting passive components such as inductors and capacitors.
[0003] There is a known problem that the through electrode peels off from the side wall of the through hole due to temperature changes or the like. To solve this problem, for example, Patent Document 1 proposes to partially form an adhesive layer between the side wall of the through hole and the through electrode.
[0004] Prior Art Documents
[0005] Patent Documents
[0006] Patent Document 1: JP-A-2022-519287 Summary of the Invention
[0007] The through electrode of Patent Document 1 includes a portion in contact with the side wall of the through hole. Therefore, the through electrode may peel off from the side wall of the through hole.
[0008] An object of embodiments of the present disclosure is to provide a through electrode substrate and a method for manufacturing the through electrode substrate that can effectively solve such problems.
[0009] Embodiments of the present disclosure relate to the following [1] to
[23] .
[0010] [1] A through electrode substrate, comprising: a substrate including a first surface, a second surface on the opposite side of the first surface, and a through hole penetrating from the first surface to the second surface; a metal layer including at least a hole metal layer located in the through hole; and an adhesion layer located between the substrate and the metal layer and including a metal oxide. The through hole includes side walls reaching from the first surface to the second surface. The side walls include a first end connected to the first surface and a second end connected to the second surface. The adhesion layer includes a hole adhesion layer located between the side walls and the hole metal layer so as to reach from the first end to the second end of the side walls.
[0011] [2]In the through electrode substrate described in [1], the aspect ratio of the through hole may be 3.0 or more. The aspect ratio is the ratio of the thickness of the substrate to the minimum value of the width of the through hole.
[0012] [3]In the through electrode substrate described in [1] or [2], the metal oxide may be titanium oxide, zinc oxide, aluminum oxide, tantalum oxide, or magnesium oxide.
[0013] [4]In the through electrode substrate described in any one of [1] to [3], the adhering layer may contain the metal oxide in a crystalline state.
[0014] [5]In the through electrode substrate described in any one of [1] to [4], the electron diffraction pattern of the metal oxide in the adhering layer may include a plurality of diffraction spots regularly arranged along at least one direction.
[0015] [6]In the through electrode substrate described in any one of [1] to [5], the hole adhering layer may have a central thickness at the central position in the thickness direction of the substrate and an end thickness at the position of the first surface of the substrate. The ratio of the end thickness to the central thickness may be 1.10 or less.
[0016] [7]In the through electrode substrate described in any one of [1] to [6], the adhering layer may include a lower adhering layer in contact with the substrate and an upper adhering layer in contact with the metal layer.
[0017] [8]In the through electrode substrate described in any one of [1] to [7], the substrate may include a surface layer constituting the surface of the side wall, and the surface layer may include metal atoms of the metal oxide constituting the adhering layer.
[0018] [9]In the through electrode substrate described in [8], the metal oxide contained in the lower adhering layer and the metal oxide contained in the upper adhering layer may be different.
[0019]
[10] In the through electrode substrate described in any one of [1] to [9], the metal layer may contain copper, aluminum, nickel, gold, or tungsten.
[0020]
[11] In the through electrode substrate described in any one of [1] to
[10] , the metal layer may include a main layer containing a metal material and an intermediate layer located between the main layer and the adhering layer, containing a metal material and thinner than the main layer.
[0021]
[12] In the through electrode substrate described in
[11] , the main layer and the intermediate layer may contain the same metal material.
[0022]
[13] In the through electrode substrate described in any one of [1] to
[12] , the adhering layer may include a first adhering layer located on the first surface, and the metal layer may include a first metal layer located on the first adhering layer.
[0023]
[14] In the through electrode substrate described in
[13] , the via metal layer may have a central thickness at the central position in the thickness direction of the substrate, and the ratio of the thickness of the first metal layer to the central thickness of the via metal layer may be 1.50 or less.
[0024]
[15] In the through electrode substrate described in
[13] or
[14] , it may further include: a first wiring layer including a first insulating layer partially covering the first metal layer and a first conductive layer connected to the first metal layer.
[0025]
[16] In the through electrode substrate described in
[15] , the first conductive layer may include copper, aluminum, nickel, gold, or tungsten.
[0026]
[17] In the through electrode substrate described in
[15] or
[16] , the first insulating layer may include silicon oxide, silicon nitride, or polyimide.
[0027]
[18] In the through electrode substrate described in any one of
[13] to
[17] , the adhering layer may include a second adhering layer located on the second surface, and the metal layer may include a second metal layer located on the second adhering layer.
[0028]
[19] In the through electrode substrate described in
[18] , it may further include: a second wiring layer including a second insulating layer partially covering the second metal layer and a second conductive layer connected to the second metal layer.
[0029]
[20] In the through electrode substrate described in any one of [1] to
[19] , it may further include a semiconductor element, a sensor, an optical component, or a high-frequency component.
[0030]
[21] A method for manufacturing a through-electrode substrate includes: a preparation step of preparing a substrate including a first surface, a second surface opposite to the first surface, and a through-hole penetrating from the first surface to the second surface; an adhering layer formation step of forming an adhering layer on the surface of the substrate; and a metal layer formation step of forming a metal layer on the adhering layer. The through-hole includes side walls reaching from the first surface to the second surface, and the side walls include: a first end connected to the first surface; and a second end connected to the second surface. The adhering layer formation step includes: a film formation step of forming a hole-adhering layer by chemical vapor growth, the hole-adhering layer being located between the side walls and the metal layer so as to reach from the first end to the second end of the side walls. The metal layer formation step includes a step of forming a hole metal layer in the through-hole on the hole-adhering layer.
[0031]
[22] In the method for manufacturing a through-electrode substrate according to
[21] , it is also possible that the metal layer formation step includes a step of forming an intermediate layer on the adhering layer by electroless plating; and a step of forming a main body layer on the intermediate layer by electroplating.
[0032]
[23] In the method for manufacturing a through-electrode substrate according to
[21] or
[22] , it is also possible that the film formation step is carried out in an environment of 100 °C or higher.
[0033]
[24] In the method for manufacturing a through-electrode substrate according to any one of
[21] to
[23] , it is also possible that the adhering layer formation step includes: an annealing step of heating the adhering layer at a temperature higher than the temperature of the film formation step after the film formation step.
[0034]
[25] In the method for manufacturing a through-electrode substrate according to any one of
[21] to
[24] , it is also possible that the preparation step includes: a through-hole formation step of forming the through-hole in the substrate.
[0035]
[26] A substrate is used in the method for manufacturing a through-electrode substrate according to any one of
[21] to
[25] . The substrate includes: a first surface; a second surface opposite to the first surface; and a through-hole penetrating from the first surface to the second surface. The through-hole includes side walls reaching from the first surface to the second surface, and the side walls include: a first end connected to the first surface; and a second end connected to the second surface.
[0036] According to an embodiment of the present disclosure, peeling of the hole metal layer from the side walls of the through-holes of the substrate can be suppressed. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] Figure 1 is a cross-sectional view showing a through-electrode substrate according to an embodiment.
[0038] Figure 2 It is a cross-sectional view showing the hole adhesion layer and the hole metal layer that penetrate the electrode substrate.
[0039] Figure 3 It is a cross-sectional view for explaining the thickness of the hole adhesion layer and the hole metal layer.
[0040] Figure 4 It is a cross-sectional view showing an example of a substrate having a through hole formed therein.
[0041] Figure 5 It is a cross-sectional view showing an example of the adhesion layer forming process.
[0042] Figure 6 It is a view showing an example of a film forming apparatus for forming the adhesion layer.
[0043] Figure 7 It is a cross-sectional view showing an example of the metal layer forming process.
[0044] Figure 8 It is a cross-sectional view showing an example of the metal layer forming process.
[0045] Figure 9 It is a cross-sectional view showing an example of the metal layer forming process.
[0046] Figure 10 It is a cross-sectional view showing an example of the metal layer forming process.
[0047] Figure 11 It is a cross-sectional view showing a modified example of the through electrode substrate.
[0048] Figure 12 It is a cross-sectional view showing a modified example of the through electrode substrate.
[0049] Figure 13 It is a cross-sectional view showing a modified example of the through electrode substrate.
[0050] Figure 14 It is a cross-sectional view showing a modified example of the through electrode substrate.
[0051] Figure 15 It is a cross-sectional view showing a modified example of the through electrode substrate.
[0052] Figure 16 It is a cross-sectional view showing a modified example of the through electrode substrate.
[0053] Figure 17A It is a cross-sectional view showing an example of the manufacturing method of the through electrode substrate.
[0054] Figure 17B It is a cross-sectional view showing an example of the manufacturing method of the through electrode substrate.
[0055] Figure 17C It is a cross-sectional view showing an example of a manufacturing method of a through electrode substrate.
[0056] Figure 18A It is a cross-sectional view showing a modified example of a through electrode substrate.
[0057] Figure 18B It is a cross-sectional view showing a modified example of a through electrode substrate.
[0058] Figure 19 It is a cross-sectional view showing a modified example of an adhering layer.
[0059] Figure 20 It is a cross-sectional view showing a modified example of an adhering layer.
[0060] Figure 21 It is a cross-sectional view showing a modified example of an adhering layer.
[0061] Figure 22 It is a cross-sectional view showing a modified example of a through electrode substrate.
[0062] Figure 23 It is a view showing an example of an article equipped with a through electrode substrate.
[0063] Figure 24 It is an image showing the adhering layer in Example 1.
[0064] Figure 25 It is a chart showing the analysis results of the adhering layer and the substrate in Example 1.
[0065] Figure 26 It is a table showing the formation conditions of the adhering layer and the results of the peeling test in Example 2.
[0066] Figure 27 It is a view showing the method of the peeling test in Example 2.
[0067] Figure 28A It is an image showing an example of the adhering layer of Example 2.
[0068] Figure 28B It is a view showing the analysis results of an example of the adhering layer of Example 2.
[0069] Figure 29A It is an image showing an example of the adhering layer of Example 2.
[0070] Figure 29B It is a view showing the analysis results of an example of the adhering layer of Example 2. Detailed implementation manners
[0071] The structure of the through - electrode substrate and its manufacturing method will be described in detail with reference to the accompanying drawings. The following - described embodiments are examples of the embodiments of the present disclosure, and the present disclosure is not construed as being limited to these embodiments. In this specification, terms such as "substrate", "base material", "sheet", "film" are not mutually distinguished only based on the difference in name. For example, "substrate" is a concept that also includes members that can be called sheets, films, etc. The so - called "surface" refers to the surface that is consistent with the planar direction of the target plate - like member when the target plate - like member is observed as a whole and globally. The so - called normal direction used for a plate - like member refers to the normal direction to the surface of the member. Regarding terms such as "parallel", "orthogonal", etc., which are used for shapes, geometric conditions, and the degree of determining them in this specification, as well as values of lengths, angles, etc., they are not restricted to a strict meaning and are interpreted to include a range that can be expected to have the same function.
[0072] In this specification, when multiple candidates for upper limit values and multiple candidates for lower limit values are given for a certain parameter, the numerical range of this parameter can be formed by combining any one candidate for the upper limit value and any one candidate for the lower limit value. For example, consider the case where it is described that "Parameter B is, for example, A1 or more, may also be A2 or more, and may also be A3 or more. Parameter B is, for example, A4 or less, may also be A5 or less, and may also be A6 or less." In this case, the numerical range of Parameter B can be A1 or more and A4 or less, can also be A1 or more and A5 or less, can also be A1 or more and A6 or less, can also be A2 or more and A4 or less, can also be A2 or more and A5 or less, can also be A2 or more and A6 or less, can also be A3 or more and A4 or less, can also be A3 or more and A5 or less, and can also be A3 or more and A6 or less.
[0073] In the accompanying drawings referred to in this embodiment, the same reference numerals or similar reference numerals are assigned to the same parts or parts having the same function, and repeated descriptions thereof are sometimes omitted. In addition, there are cases where, for the sake of convenience of explanation, the dimensional ratio of the drawings is different from the actual ratio and a part of the structure is omitted from the drawings.
[0074] Describe the embodiments of the present disclosure. Figure 1 It is a cross - sectional view showing an example of the through - electrode substrate 10. The through - electrode substrate 10 includes a substrate 12, an adhesion layer 20, and a metal layer 30.
[0075] (Substrate)
[0076] The substrate 12 includes a first surface 13 and a second surface 14 located on the opposite side of the first surface 13. In addition, the substrate 12 includes a through hole 15 that penetrates the substrate 12 from the first surface 13 to the second surface 14. The substrate 12 may include a plurality of through holes 15. The through hole 15 includes a side wall 16 that reaches the second surface 14 from the first surface 13. The side wall 16 extends in a direction intersecting the in-plane direction of the first surface 13 between the first surface 13 and the second surface 14. The first end 161 where the side wall 16 is connected to the first surface 13 and the second end 162 where the side wall 16 is connected to the second surface 14.
[0077] The substrate 12 includes an insulating inorganic material. For example, the substrate 12 is a glass substrate, a quartz substrate, a sapphire substrate, a resin substrate, a silicon substrate, a silicon carbide substrate, an aluminum oxide (Al 2 O 3 ), a substrate, an aluminum nitride (AlN) substrate, a zirconia (ZrO 2 ), or a substrate obtained by laminating these substrates. The substrate 12 may partially include a substrate containing a conductive material such as an aluminum substrate or a stainless steel substrate.
[0078] As an example of the glass used in the substrate 12, alkali-free glass and the like can be cited. Alkali-free glass refers to glass that does not contain alkali components such as sodium and potassium. Alkali-free glass contains, for example, boric acid in place of the alkali components. In addition, alkali-free glass contains, for example, alkaline earth metal oxides such as calcium oxide and barium oxide.
[0079] The thickness T0 of the substrate 12 can be, for example, 100 μm or more, can be 200 μm or more, and can also be 300 μm or more. The thickness T0 of the substrate 12 is, for example, 800 μm or less, can be 600 μm or less, and can also be 400 μm or less.
[0080] Figure 2 is a cross-sectional view showing an enlarged view of the through hole 15. The dimension of the through hole 15 in the in-plane direction of the first surface 13 is also referred to as the width of the through hole 15. In Figure 2 , the reference numeral R1 represents the width of the through hole 15 in the first surface 13, and the reference numeral R2 represents the width of the through hole 15 in the second surface 14.
[0081] The through hole 15 may include a portion whose width varies corresponding to the position in the thickness direction of the substrate 12. For example, the through hole 15 may include a portion whose width becomes smaller as it goes from the first surface 13 toward the central position in the thickness direction of the substrate 12. In addition, the through hole 15 may include a portion whose width becomes smaller as it goes from the second surface 14 toward the central position in the thickness direction of the substrate 12. In this case, the width of the through hole 15 becomes the smallest at the central portion in the thickness direction of the substrate 12. The so-called "central position" is the position in the thickness direction of the substrate 12 that is at an equal distance from the first surface 13 and the second surface 14. The distance in the thickness direction of the substrate 12 from the first surface 13 to the central position is equal to the distance in the thickness direction of the substrate 12 from the second surface 14 to the central position. The so-called "central portion" includes the central position in the thickness direction of the substrate 12, the range from the central position to 0.1×T0 on the first surface 13 side, and the range from the central position to 0.1×T0 on the second surface 14 side. The reference numeral T0 represents the thickness of the substrate 12 as described above. The minimum value of the width of the through hole 15 is represented by the reference numeral R0.
[0082] The width R1 of the through hole 15 in the first surface 13 is, for example, 20 μm or more, may be 30 μm or more, and may also be 40 μm or more. The width R1 of the through hole 15 in the first surface 13 is, for example, 150 μm or less, may be 100 μm or less, and may also be 60 μm or less. The numerical range of the width R2 of the through hole 15 in the second surface 14 may be the same as the numerical range of the width R1. The numerical range of the width R0 may be the same as the numerical range of the width R1.
[0083] In Figure 2 , the reference numeral L1 represents a straight line connecting the first end 161 and the second end 162 of the side wall 16. The portion of the side wall 16 between the first end 161 and the second end 162 may be located at a position closer to the inside. "Inside" means the direction approaching the center point of the through hole 15 in a plan view.
[0084] The shape of the through hole 15 in a plan view is not particularly limited. For example, the shape of the through hole 15 in a plan view may be circular or may not be circular. When the shape of the through hole 15 in a plan view is circular, the above-mentioned width R1 and width R2 are the diameter of the through hole 15 in the first surface 13 and the diameter of the through hole 15 in the second surface 14. When the shape of the through hole 15 in a plan view is not circular, the above-mentioned width R1 and width R2 are defined in the direction in which the size of the through hole 15 in a plan view becomes the largest. For example, when the shape of the through hole 15 in a plan view is elliptical, the above-mentioned width R1 and width R2 are defined in the direction of the major axis of the ellipse.
[0085] The ratio of the thickness T0 of the substrate 12 to the width R0, i.e., T0 / R0, is also referred to as the aspect ratio of the through-hole 15. The aspect ratio of the through-hole 15 is, for example, 3.0 or more, and may be 4.0 or more, or may be 5.0 or more. The aspect ratio of the through-hole 15 is, for example, 15.0 or less, and may be 12.0 or less, or may be 10.0 or less.
[0086] The side wall 16 of the through-hole 15 may have a rough surface. The roughness of the side wall 16 can contribute to the improvement of the adhesion of the adhesion layer 20 to the side wall 16. The arithmetic mean roughness Ra of the side wall 16 is, for example, 0.05 nm or more, and may be 0.10 nm or more. The arithmetic mean roughness Ra of the side wall 16 is, for example, 1.0 μm or less, and may be 0.5 μm or less. The arithmetic mean roughness Ra is defined based on JIS B0601:2013.
[0087] (Adhesion layer)
[0088] The adhesion layer 20 is located between the substrate 12 and the metal layer 30. The adhesion layer 20 is a layer for improving the adhesion between the substrate 12 and the metal layer 30. The adhesion layer 20 at least includes a hole adhesion layer 23. The hole adhesion layer 23 extends from the first end 161 to the second end 162 of the side wall 16 on the side wall 16.
[0089] The adhesion layer 20 may not include the first adhesion layer 21 located on the first surface 13. The first adhesion layer 21 may be connected to the hole metal layer 33 or may not be connected to the hole metal layer 33. For example, the first adhesion layer 21 may include a layer connected to the hole adhesion layer 23 and a layer not connected to the hole adhesion layer 23.
[0090] The adhesion layer 20 may include the second adhesion layer 22 located on the second surface 14. The second adhesion layer 22 may be connected to the hole adhesion layer 23 or may not be connected to the hole adhesion layer 23. For example, the second adhesion layer 22 may include a layer connected to the hole adhesion layer 23 and a layer not connected to the hole adhesion layer 23.
[0091] The adhesion layer 20 has a high adhesion to the substrate 12 compared to the metal layer 30. That is, the adhesion between the adhesion layer 20 and the substrate 12 is higher than the adhesion between the metal layer 30 and the substrate 12. For example, the peel strength of the adhesion layer 20 with respect to the substrate 12 is higher than the peel strength of the metal layer 30 with respect to the substrate 12. By having such an adhesion layer 20 located between the substrate 12 and the metal layer 30, peeling of the metal layer 30 from the substrate 12 can be suppressed.
[0092] The material of the adhering layer 20 is selected corresponding to the materials of the substrate 12 and the metal layer 30. The adhering layer 20 may have insulating properties. The adhering layer 20 contains, for example, a metal oxide. Examples of the metal oxide are titanium oxide, zinc oxide, aluminum oxide, tantalum oxide, magnesium oxide, hafnium oxide, tin oxide, etc. The chemical formula of titanium oxide is, for example, TiO 2 . The chemical formula of zinc oxide is, for example, ZnO. The chemical formula of aluminum oxide is, for example, Al 2 O 3 . The chemical formula of tantalum oxide is, for example, Ta 2 O 5 , etc. The chemical formula of magnesium oxide is, for example, MgO. The chemical formula of hafnium oxide is, for example, HfO 2 . The chemical formula of tin oxide is, for example, SnO 2 . The metal oxide of the adhering layer 20 may be an oxide of the metal material described later that constitutes the metal layer 30.
[0093] The adhering layer 20 may contain a metal oxide in a crystalline state. By improving the crystallinity of the metal oxide, the adhesion of the adhering layer 20 to the substrate 12 can be improved. When the metal oxide of the adhering layer 20 is titanium oxide, the crystal of titanium oxide may be anatase type. Whether the metal oxide is in a crystalline state is judged based on the electron diffraction image of the adhering layer 20. The electron diffraction image of the metal oxide in a crystalline state contains a plurality of diffraction spots regularly arranged along at least one direction.
[0094] (Metal layer)
[0095] The metal layer 30 is a layer containing a metal material. The metal layer 30 has electrical conductivity. The metal layer 30 transmits electric power, electrical signals, etc. inside the through-hole electrode substrate 10. The metal layer 30 may be electrically connected to terminals, electrodes, connectors, etc. of a wiring substrate, a semiconductor element, etc. connected to the through-hole electrode substrate 10.
[0096] The metal layer 30 at least contains a via metal layer 33. The via metal layer 33 is located in the through-hole 15 of the substrate 12. The via metal layer 33 extends in the thickness direction of the substrate 12 so as to reach from the first surface 13 to the second surface 14. The via adhering layer 23 of the above-mentioned adhering layer 20 is located between the side wall 16 of the through-hole 15 and the via metal layer 33.
[0097] The metal layer 30 contains a first metal layer 31 located on the first surface 13. The first metal layer 31 may or may not be connected to the via metal layer 33. For example, the first metal layer 31 may contain a layer connected to the via metal layer 33 and a layer not connected to the via metal layer 33. The first adhering layer 21 of the above-mentioned adhering layer 20 is located between the first surface 13 of the substrate 12 and the first metal layer 31.
[0098] The metal layer 30 may include a second metal layer 32 located on the second surface 14. The second metal layer 32 may or may not be connected to the via metal layer 33. For example, the second metal layer 32 may include a layer connected to the via metal layer 33 and a layer not connected to the via metal layer 33. The second adjacent layer 22 adjacent to the layer 20 is located between the second surface 14 of the substrate 12 and the second metal layer 32.
[0099] Examples of the metal material of the metal layer 30 are metals such as copper, aluminum, nickel, gold, tungsten, or alloys of these metals.
[0100] The metal layer 30 may be composed of one layer or may include multiple layers as Figure 2 shown. For example, the metal layer 30 may include a main layer 35 and an intermediate layer 36. Both the main layer 35 and the intermediate layer 36 include the above-mentioned metal material. The intermediate layer 36 is located between the main layer 35 and the adjacent layer 20. The intermediate layer 36 may also be in contact with both the main layer 35 and the adjacent layer 20.
[0101] The intermediate layer 36 may be thinner than the main layer 35. The metal material of the intermediate layer 36 may be the same as or different from the metal material of the main layer 35. When the metal material of the intermediate layer 36 is the same as the metal material of the main layer 35, it may sometimes be impossible to visually identify the boundary between the main layer 35 and the intermediate layer 36.
[0102] Refer to Figure 3 to illustrate the thickness of the adjacent layer 20 and the thickness of the metal layer 30.
[0103] The reference numeral Z31 represents the thickness of the first adjacent layer 21. The reference numeral Z32 represents the thickness of the second adjacent layer 22. The reference numeral Z33 represents the thickness of the via adjacent layer 23 at the central position in the thickness direction of the substrate 12. The thickness of the via adjacent layer 23 at the central position is also referred to as the central thickness. The reference numeral Z34 represents the thickness of the via adjacent layer 23 at the position of the first surface 13 of the substrate 12. The thickness of the via adjacent layer 23 at the position of the first surface 13 is also referred to as the end thickness.
[0104] The ratio of the end thickness Z34 to the central thickness Z33 of the hole-adjacent layer 23, i.e., Z34 / Z33, is, for example, 1.10 or less, may be 1.08 or less, and may also be 1.05 or less. Z34 / Z33 is, for example, 0.95 or more, may be 0.98 or more, and may also be 1.00 or more. Generally, the closer to the central position in the thickness direction of the substrate 12, the more difficult it is to form the hole-adjacent layer 23. In particular, when the aspect ratio of the through hole 15 is high, or when the thickness of the adjacent layer 20 is small, it is difficult to form the hole-adjacent layer 23. For example, a situation where the hole-adjacent layer 23 is not formed on a part of the side wall 16 is likely to occur. On the part of the side wall 16 where the hole-adjacent layer 23 is not formed, peeling of the metal layer 33 from the side wall 16 is likely to occur.
[0105] The ratio of the end thickness Z34 to the central thickness Z33 being 1.10 or less means that the hole-adjacent layer 23 is formed without omission over the entire region of the side wall 16. For this reason, the adhesion of the metal layer 30 to the substrate 12 is improved over the entire region of the side wall 16. For this reason, even when the aspect ratio of the through hole 15 is high or the thickness of the adjacent layer 20 is small, peeling of the hole metal layer 33 from the side wall 16 can be suppressed.
[0106] The numerical range of the ratio of the thickness Z31 of the first adjacent layer 21 to the central thickness Z33 of the hole-adjacent layer 23, i.e., Z31 / Z33, may be the same as the above-described numerical range of Z34 / Z33. The numerical range of the ratio of the thickness Z32 of the second adjacent layer 22 to the central thickness Z33 of the hole-adjacent layer 23, i.e., Z32 / Z33, may be the same as the above-described numerical range of Z34 / Z33.
[0107] The central thickness Z33 of the hole-adjacent layer 23 is, for example, 5.0 nm or more, may be 8.0 nm or more, and may also be 10.0 nm or more. The central thickness Z33 of the hole-adjacent layer 23 may be, for example, 100 nm or less, may be 60 nm or less, and may also be 40 nm or less.
[0108] The reference sign V31 represents the thickness of the first metal layer 31. The reference sign V32 represents the thickness of the second metal layer 32. The reference sign V33 represents the thickness of the hole metal layer 33 at the central position in the thickness direction of the substrate 12. The thickness of the hole metal layer 33 at the central position is also referred to as the central thickness. The reference sign V34 represents the thickness of the hole metal layer 33 at the position of the first surface 13 of the substrate 12.
[0109] The ratio of the thickness V31 of the first metal layer 31 to the central thickness V33 of the hole metal layer 33, i.e., V31 / V33, is, for example, 1.50 or less, may be 1.40 or less, and may also be 1.30 or less. V31 / V33 is, for example, 0.95 or more, may be 1.00 or more, and may also be 1.05 or more.
[0110] The ratio of the thickness V32 of the second metal layer 32 to the central thickness V33 of the via metal layer 33, i.e., the value range of V32 / V33, can be the same as the above-mentioned value range of V31 / V33. The ratio of the thickness V34 of the via metal layer 33 in the first surface 13 to the central thickness V33 of the via metal layer 33, i.e., the value range of V34 / V33, can be the same as the above-mentioned value range of V31 / V33.
[0111] The central thickness V33 of the via metal layer 33 is, for example, 0.5 μm or more, may be 1.0 μm or more, and may also be 3.0 μm or more. The central thickness V33 of the via metal layer 33 is, for example, 30 μm or less, may be 20 μm or less, and may also be 10 μm or less.
[0112] Reference numeral X31 represents the thickness of the main layer 35 of the first metal layer 31. Reference numeral X32 represents the thickness of the main layer 35 of the second metal layer 32. Reference numeral X33 represents the thickness of the main layer 35 of the via metal layer 33 at the central position in the thickness direction of the substrate 12. Reference numeral X34 represents the thickness of the main layer 35 of the via metal layer 33 at the position of the first surface 13 of the substrate 12.
[0113] The ratio of the thickness X31 of the main layer 35 of the first metal layer 31 to the thickness X33 of the main layer 35 of the via metal layer 33 at the central position, i.e., the value range of X31 / X33, can be the same as the above-mentioned value range of V31 / V33. The ratio of the thickness X32 of the main layer 35 of the second metal layer 32 to the thickness X33 of the main layer 35 of the via metal layer 33 at the central position, i.e., the value range of X32 / X33, can be the same as the above-mentioned value range of V31 / V33. The ratio of the thickness X34 of the main layer 35 of the via metal layer 33 in the first surface 13 to the thickness X33 of the main layer 35 of the via metal layer 33 at the central position, i.e., the value range of X34 / X33, can be the same as the above-mentioned value range of V31 / V33.
[0114] The thickness X33 of the main layer 35 of the via metal layer 33 at the central position is, for example, 0.5 μm or more, may be 1.0 μm or more, and may also be 3.0 μm or more. The thickness X33 of the main layer 35 of the via metal layer 33 at the central position is, for example, 30 μm or less, may be 20 μm or less, and may also be 10 μm or less.
[0115] Reference numeral Y31 represents the thickness of the intermediate layer 36 of the first metal layer 31. Reference numeral Y32 represents the thickness of the intermediate layer 36 of the second metal layer 32. Reference numeral Y33 represents the thickness of the intermediate layer 36 of the hole metal layer 33 at the center position in the thickness direction of the substrate 12. Reference numeral Y34 represents the thickness of the intermediate layer 36 of the hole metal layer 33 at the position of the first surface 13 of the substrate 12.
[0116] The ratio of the thickness Y31 of the intermediate layer 36 of the first metal layer 31 to the thickness Y33 of the intermediate layer 36 of the hole metal layer 33 at the central position, i.e., Y31 / Y33, is, for example, 2.0 or more, or 3.0 or more, or 4.0 or more. Y31 / Y33 is, for example, 15.0 or less, or 10.0 or less, or 8.0 or less. As described later, the intermediate layer 36 is formed, for example, by electroless plating. For this reason, the thickness Y33 of the intermediate layer 36 of the hole metal layer 33 at the central position is easy to become smaller than the thickness Y31 of the intermediate layer 36 of the first metal layer 31. The ratio of the thickness Y32 of the intermediate layer 36 of the second metal layer 32 to the thickness Y33 of the intermediate layer 36 of the hole metal layer 33 at the central position, i.e., the numerical range of Y32 / Y33, can be the same as the above-mentioned numerical range of Y31 / Y33. The numerical range of the ratio of the thickness Y34 of the intermediate layer 36 of the porous metal layer 33 in the first surface 13 to the thickness Y33 of the intermediate layer 36 of the porous metal layer 33 at the center position, i.e., Y34 / Y33, may be the same as the above-mentioned numerical range of Y31 / Y33.
[0117] The thickness Y33 of the intermediate layer 36 of the hole metal layer 33 at the central position is, for example, 5.0 nm or more, or 8.0 nm or more, or 10.0 nm or more. The thickness Y33 of the intermediate layer 36 of the hole metal layer 33 at the central position is, for example, 200 nm or less, or 100 nm or less, or 50 nm or less.
[0118] The thickness of the adhesion layer 20 and the metal layer 30 is calculated based on an image of a cross section of the through-electrode substrate 10 obtained by an electron microscope. The thickness of the first adhesion layer 21 and the first metal layer 31 is measured at a position 10 mm away from the first end 161 in the in-plane direction of the first surface 13. The thickness of the second adhesion layer 22 and the second metal layer 32 is measured at a position 10 mm away from the second end 162 in the in-plane direction of the second surface 14.
[0119] (Method for manufacturing through-electrode substrate)
[0120] Next, an example of a method of manufacturing the through-electrode substrate 10 will be described.
[0121] (Preparation process)
[0122] Preparation process for preparing a substrate 12 having a through-hole 15. The preparation process includes a through-hole formation process described later. The through-hole formation process can be carried out by the person who manufactures the final through-hole electrode substrate 10. Alternatively, the person who manufactures the final through-hole electrode substrate 10 can obtain the substrate 12 having the through-hole 15 from a third party.
[0123] (Through-hole formation process)
[0124] In the through-hole formation process, first, a substrate 12 without the through-hole 15 is prepared. Next, a resist layer is provided on at least one of the first surface 13 and the second surface 14. Then, an opening is provided at a position corresponding to the through-hole 15 in the resist layer. Next, the substrate 12 is processed at the opening of the resist layer. Thus, as Figure 4 shown, the through-hole 15 can be formed in the substrate 12. The through-hole 15 includes a side wall 16 reaching from the first surface 13 to the second surface 14. As a method for processing the substrate 12, a dry etching method, a wet etching method, etc. can be used. The dry etching method is a reactive ion etching method, a deep reactive ion etching method, etc.
[0125] The through-hole 15 can also be formed in the substrate 12 by irradiating the substrate 12 with a laser. In this case, the resist layer may not be provided. As the laser, an excimer laser, an Nd:YAG laser, a femtosecond laser, etc. can be used. In the case of using an Nd:YAG laser, the fundamental wave with a wavelength of 1064 nm, the second harmonic with a wavelength of 532 nm, the third harmonic with a wavelength of 355 nm, etc. can be used.
[0126] In addition, laser irradiation and wet etching can also be appropriately combined. Specifically, first, a modified layer is formed in the region of the substrate 12 where the through-hole 15 should be formed by laser irradiation. Next, the substrate 12 is immersed in hydrofluoric acid, etc., to etch the modified layer. Thus, the through-hole 15 can be formed in the substrate 12.
[0127] In addition to this, the through-hole 15 can also be formed in the substrate 12 by sandblasting the substrate 12 with an abrasive.
[0128] (Adhesive layer formation process)
[0129] Next, as Figure 5 shown, an adhesive layer formation process for forming an adhesive layer 20 on the surface of the substrate 12 is carried out. The adhesive layer 20 is formed at least on the side wall 16 of the through-hole 15. The adhesive layer 20 can also be formed on the first surface 13. The adhesive layer 20 can also be formed on the second surface 14. The adhesive layer 20 can also be formed on the side surface 17 of the substrate 12. The side surface 17 is the surface that determines the outer edge of the substrate 12 in a top view.
[0130] The adhering layer formation process includes a film formation process of forming an adhering layer 20 on the surface of the substrate 12 by chemical vapor deposition (CVD). In the film formation process, the adhering layer 20 can also be formed on the surface of the substrate 12 by atomic layer deposition (ALD). Atomic layer deposition is a film formation method that utilizes the chemical reaction of a source gas generated on the surface of the substrate 12. Atomic layer deposition is a type of chemical vapor deposition, i.e., the so-called CVD. By using atomic layer deposition, the adhering layer 20 can be stably formed on the surface of the substrate 12. For example, the adhering layer 20 can be formed without omission over the entire region of the sidewall 16.
[0131] In the film formation process, the adhering layer 20 can also be formed on the surface of the substrate 12 by chemical vapor deposition other than atomic layer deposition.
[0132] An example of the film formation process for explaining the case of forming the adhering layer 20 by atomic layer deposition is described. The film formation process includes multiple film formation steps. One film formation step includes a first supply step, a first purge step, a second supply step, and a second purge step.
[0133] In the first supply step, a source gas containing a first reactant is supplied to the substrate 12. The first reactant is also called a precursor. The first reactant is, for example, a compound containing a metal that constitutes the metal oxide of the adhering layer 20. The first reactant can be a compound of the metal that constitutes the metal oxide of the adhering layer 20 and an organic substance.
[0134] The first reactant reacts self-regulatingly with the surface of the substrate 12. For example, the reaction of the first reactant occurs only at multiple reactive sites on the surface of the substrate 12. By the reaction of the first reactant, a film containing the first reactant is formed on the surface of the substrate 12. When all the reactive sites on the surface of the substrate 12 are covered by the first reactant, the growth of the film stops.
[0135] Next, the first purge step is performed. In the first purge step, the first reactant remaining around the substrate 12 is removed. For example, the source gas containing the first reactant is discharged to the outside of the chamber of the film formation apparatus used for performing the film formation process.
[0136] Next, the second supply step is performed. In the second supply step, a source gas containing a second reactant is supplied to the substrate 12. The second reactant is an oxygen molecule, a water molecule, etc. The second reactant can contain reactive oxygen radicals.
[0137] In the second supply process, the surface ligands of the first reactant that constitutes the film are replaced by oxygen. That is, an oxidation reaction occurs. As a result, a metal oxide film is formed on the surface of the substrate 12. When all the surface ligands are replaced by oxygen, the oxidation reaction stops.
[0138] Next, a second purge process is performed. In the second purge process, the second reactant remaining around the substrate 12 is removed. For example, the source gas containing the second reactant is discharged to the outside of the chamber of the film forming apparatus used for performing the film forming process.
[0139] The thickness of the metal oxide film formed by one film forming process is, for example, 0.20 nm or less, may be 0.15 nm or less, and may also be 0.10 nm or less. By controlling the number of film forming processes, the thickness of the adhesion layer 20 can be controlled.
[0140] As described above, since self-regulation of the reaction is achieved in atomic layer deposition, a uniform and dense adhesion layer 20 with defects such as pinholes suppressed can be obtained. In addition, since reactions occur between multiple reactive sites on the surface of the substrate 12 and the adhesion layer 20, the adhesion of the adhesion layer 20 to the substrate 12 is improved.
[0141] Atomic layer deposition also has the advantage that the adhesion layer 20 can be formed at a low temperature compared to other chemical vapor growth methods such as plasma CVD. Atomic layer deposition also has the advantage that the adhesion layer 20 can be formed on the sidewall 16 of the through hole 15 having a high aspect ratio compared to other chemical vapor growth methods such as plasma CVD. For example, atomic layer deposition can form the adhesion layer 20 on the sidewall 16 of the through hole 15 having an aspect ratio of 100 or more.
[0142] Figure 6 FIG. is an example of a film forming apparatus 50 used for performing a film forming process. The film forming apparatus 50 includes a chamber 51 that houses the substrate 12. The above-described film forming process is repeatedly performed in the chamber 51.
[0143] As Figure 6 shown, the chamber 51 can house a plurality of substrates 12. In this case, the film forming process is performed on the plurality of substrates 12 together. As a result, the productivity of the through electrode substrate 10 can be improved.
[0144] The film forming process can be performed in a high temperature environment. The temperature of the film forming process can be adjusted corresponding to the reaction temperature of the first reactant and the reaction temperature of the second reactant. The temperature of the film forming process is, for example, 100 °C or more, may be 120 °C or more, and may also be 150 °C or more. The temperature of the film forming process is, for example, 250 °C or less, may be 220 °C or less, and may also be 200 °C or less. The temperature of the film forming process can be the atmosphere temperature inside the chamber 51.
[0145] The step of forming the adhesion layer may include an annealing step performed after the film forming step. The annealing step heats the adhesion layer 20 at a temperature higher than the temperature of the film forming step. The temperature of the annealing step may also be adjusted so that crystallization of the metal oxide contained in the adhesion layer 20 progresses. The temperature of the annealing step is, for example, 150°C or higher, may be 200°C or higher, and may also be 250°C or higher. The temperature of the annealing step is, for example, 600°C or lower, may be 550°C or lower, and may also be 500°C or lower. When the metal oxide contained in the adhesion layer 20 is titanium oxide, the temperature of the annealing step may be 400°C or lower.
[0146] The difference between the temperature of the film forming step and the temperature of the annealing step is, for example, 50°C or higher, may be 100°C or higher, and may also be 150°C or higher. The difference between the temperature of the film forming step and the temperature of the annealing step is, for example, 500°C or lower, may be 400°C or lower, and may also be 300°C or lower.
[0147] The annealing step may be performed in an atmosphere of an inert gas. The concentration of the inert gas in the atmosphere is, for example, 90% or higher, may be 95% or higher, may also be 98% or higher, and may further be 99% or higher. The inert gas may be nitrogen gas, or may be a noble gas such as argon gas or helium gas.
[0148] The annealing step can promote the diffusion of the metal atoms constituting the metal oxide of the adhesion layer 20 into the interior of the substrate 12. The substrate 12 may include a surface layer, and the surface layer contains the metal constituting the metal oxide of the adhesion layer 20. The surface layer is a thin layer constituting the surface of the substrate 12 such as the side wall 16. By the diffusion of the metal atoms into the interior of the substrate 12, the adhesion of the adhesion layer 20 to the substrate 12 can be improved.
[0149] Based on the results of analyzing the composition of a sample including the substrate 12 and the adhesion layer 20 by X-ray photoelectron spectroscopy, it is determined whether the surface layer of the substrate 12 contains the metal constituting the metal oxide of the adhesion layer 20. Specifically, when M22 / M21 at the boundary position P1 described later is equal to or higher than the determination threshold, it is determined that the surface layer of the substrate 12 contains the metal atoms constituting the metal oxide of the adhesion layer 20. That is, it is determined that the surface layer of the substrate 12 contains the same metal atoms as the metal atoms constituting the metal oxide of the adhesion layer 20. The boundary position P1 is the position where the atomic concentration of the main component of the substrate 12 becomes 50% of the maximum atomic concentration. When the substrate 12 contains glass, the main component is silicon. M21 is the maximum atomic concentration of the metal constituting the metal oxide of the adhesion layer 20. M22 is the atomic concentration of the metal constituting the metal oxide of the adhesion layer 20 at the boundary position P1. The determination threshold is, for example, 0.20, may be 0.30, and may also be 0.50.
[0150] The thickness T10 of the surface layer is, for example, 2.0 nm or more, may be 3.0 nm or more, and may also be 4.0 nm or more. It is expected that the greater the thickness T10 of the surface layer, the higher the adhesion of the adhering layer 20 to the substrate 12. The thickness T10 of the surface layer is, for example, 20.0 nm or less, may be 15.0 nm or less, and may also be 10.0 nm or less. The thickness T10 of the surface layer is the distance in the thickness direction of the substrate 12 from the boundary position P1 described later to the inner boundary position P2. The inner boundary position P2 is the position where the concentration of the metal constituting the metal oxide of the adhering layer 20 becomes 0.10 times the maximum atomic concentration M21.
[0151] The concentration of the metal constituting the metal oxide of the adhering layer 20 is calculated by X-ray photoelectron spectroscopy. In X-ray photoelectron spectroscopy, while etching the object in the thickness direction by ion sputter etching, the photoelectrons emitted from the object by the irradiation of X-rays are detected. The thickness T10 of the surface layer is calculated by converting the time difference of ion sputter etching between the boundary position P1 and the inner boundary position P2 into a distance based on the etching rate.
[0152] (Metal layer forming process)
[0153] Next, a metal layer forming process of forming a metal layer 30 on the adhering layer 20 is performed. The metal layer forming process may include an intermediate layer forming process, a resist layer forming process, a main layer forming process, a resist layer removing process, and an intermediate layer removing process.
[0154] Figure 7 It is a cross-sectional view showing an example of the intermediate layer forming process. In the intermediate layer forming process, an intermediate layer 36 is formed on the adhering layer 20.
[0155] In the intermediate layer forming process, the intermediate layer 36 can also be formed on the adhering layer 20 by electroless plating. For example, the substrate 12 on which the adhering layer 20 is formed can be immersed in an electroless plating solution.
[0156] The intermediate layer 36 can also be formed by a method other than electroless plating. For example, the intermediate layer 36 can also be formed by a physical vapor deposition (PVD) method. Examples of the physical vapor deposition method are evaporation, sputtering, etc.
[0157] The intermediate layer forming process may include an intermediate layer annealing process of heating the intermediate layer 36. The temperature of the intermediate layer annealing process is, for example, 150 °C or more, may be 200 °C or more, and may also be 230 °C or more. The temperature of the intermediate layer annealing process is, for example, 350 °C or less, may be 300 °C or less, and may also be 270 °C or less.
[0158] The intermediate layer annealing process can be carried out in an atmosphere of an inert gas. The concentration of the inert gas in the atmosphere is, for example, 90% or more, and can also be 95% or more, 98% or more, or even 99% or more. The inert gas can be nitrogen gas, or can also be a noble gas such as argon gas or helium gas.
[0159] Figure 8 It is a cross-sectional view showing an example of the resist layer forming process. In the resist layer forming process, a first resist layer 41 is partially formed on the intermediate layer 36 located on the first surface 13, and a second resist layer 42 is partially formed on the intermediate layer 36 located on the second surface 14. The first resist layer 41 is provided to cover the position where the first metal layer 31 is to be formed. The second resist layer 42 is provided to cover the position where the second metal layer 32 is not formed. As the material of the resist layers 41 and 42, a photosensitive material such as a dry film resist containing an acrylic resin can be used.
[0160] Figure 9 It is a cross-sectional view showing an example of the main body layer forming process. In the intermediate layer forming process, the main body layer 35 is formed on the intermediate layer 36 in the area where the resist layers 41 and 42 are not formed. The main body layer forming process is carried out so that the main body layer 35 is not formed on the intermediate layer 36 located on the side surface 17.
[0161] The main body layer forming process can also form the main body layer 35 on the intermediate layer 36 by electroplating. For example, the substrate 12 on which the intermediate layer 36 and the resist layers 41 and 42 are formed can be immersed in an electroplating solution. By passing an electric current through the intermediate layer 36, the main body layer 35 is deposited on the intermediate layer 36.
[0162] The main body layer 35 can also be formed by a method other than electroplating. For example, the main body layer 35 can be formed by a physical film forming method (Physical Vapor Deposition; PVD). Examples of the physical film forming method are evaporation plating method, sputtering method, etc.
[0163] In the case of using a physical film forming method, the metal layer 30 can also be composed of a single layer. For example, the metal layer 30 can only contain only 1 layer formed by a physical film forming method.
[0164] The main body layer forming process can include a main body layer annealing process for heating the main body layer 35. The temperature of the main body layer annealing process is, for example, 150 °C or more, and can also be 200 °C or more, or even 250 °C or more. The temperature of the main body layer annealing process is, for example, 600 °C or less, and can also be 550 °C or less, or even 500 °C or less. The temperature of the main body layer annealing process can be higher than the temperature of the intermediate layer annealing process.
[0165] The main layer annealing process can be carried out in an atmosphere of an inert gas. The concentration of the inert gas in the atmosphere is, for example, 90% or more, and can also be 95% or more, 98% or more, or even 99% or more. The inert gas can be nitrogen gas, or noble gases such as argon gas and helium gas.
[0166] Figure 10 It is a cross-sectional view showing an example of the resist layer removing process. In the resist layer removing process, the resist layers 41 and 42 are removed. Next, the intermediate layer removing process is carried out. In the intermediate layer removing process, as Figure 10 shown, the intermediate layer 36 overlapping the resist layers 41 and 42 in plan view is removed. Thus, the through electrode substrate 10 is obtained.
[0167] Next, the adhering layer removing process can be carried out. In the adhering layer removing process, the intermediate layer 36 overlapping the resist layers 41 and 42 in plan view can be removed. Thus, the Figure 1 through electrode substrate 10 shown is obtained.
[0168] In the present embodiment, the adhering layer 20 can improve the adhesion between the substrate 12 and the metal layer 30. For this reason, peeling of the via metal layer 33 from the side wall 16 of the through hole 15 can be suppressed.
[0169] The above-described embodiment can be variously modified. Hereinafter, the modified examples will be described with reference to the drawings as needed. In the following description and the drawings used in the following description, for the parts having the same configuration as those in the above-described embodiment, the same reference numerals as those used for the corresponding parts in the above-described embodiment are used. The repeated description is omitted. In addition, when it is clear that the effects obtained in the above-described embodiment can also be obtained in the modified example, the description thereof may sometimes be omitted.
[0170] (First Modified Example)
[0171] Figure 11 It is a cross-sectional view showing the through electrode substrate 10 in the first modified example. The width of the through hole 15 of the substrate 12 may be fixed from the first surface 13 to the second surface 14. In this case, the width R1 of the through hole 15 in the first surface 13 is the same as the width R2 of the through hole 15 in the second surface 14. In addition, the minimum value R0 of the width of the through hole 15 is also the same as the width R1 and the width R2.
[0172] (Second Modified Example)
[0173] Figure 12FIG. 0 is a cross-sectional view showing the through-electrode substrate 10 in the second modified example. The width of the through-hole 15 may decrease as going from the first surface 13 to the second surface 14. In this case, the width R1 of the through-hole 15 in the first surface 13 is larger than the width R2 of the through-hole 15 in the second surface 14. The minimum value R0 of the width of the through-hole 15 may be the width R2 of the through-hole 15 in the second surface 14.
[0174] (Third Modified Example)
[0175] Figure 13 FIG. 7 is a cross-sectional view showing the through-electrode substrate 10 in the third modified example. The width of the through-hole 15 may increase as going from the first surface 13 to the second surface 14. In this case, the width R1 of the through-hole 15 in the first surface 13 is smaller than the width R2 of the through-hole 15 in the second surface 14. The minimum value R0 of the width of the through-hole 15 may be the width R1 of the through-hole 15 in the first surface 13.
[0176] (Fourth Modified Example)
[0177] Figure 14 FIG. 14 is a cross-sectional view showing the through-electrode substrate 10 in the fourth modified example. The through-hole 15 may include a portion where the width becomes larger as going from the first surface 13 to the central position in the thickness direction of the substrate 12. In addition, the through-hole 15 may include a portion where the width becomes larger as going from the second surface 14 to the central position in the thickness direction of the substrate 12. In this case, the width of the through-hole 15 becomes the largest at the central portion in the thickness direction of the substrate 12. The minimum value R0 of the width of the through-hole 15 may be the width R1 of the through-hole 15 in the first surface 13 or the width R2 of the through-hole 15 in the second surface 14.
[0178] (Fifth Modified Example)
[0179] Figure 15 FIG. 21 is a cross-sectional view showing the through-electrode substrate 10 in the fifth modified example. In the above-described embodiments and the first to fourth modified examples, examples where there is a gap in the through-hole 15 are shown. Specifically, an example where there is a space between the via metal layers 33 on the side walls 16 facing each other in the in-plane direction of the first surface 13 is shown. In this case, as shown in Figure 15 FIG. 23, the through-electrode substrate 10 may include an insulating layer 19 located between the via metal layers 33 facing each other in the in-plane direction of the first surface 13.
[0180] The insulating layer 19 contains an insulating material. The insulating layer 19 may contain, for example, polyimide.
[0181] (Sixth Modified Example)
[0182] Figure 16is a cross-sectional view showing the through-electrode substrate 10 in the sixth modification. As Figure 16 shown, the via metal layer 33 can continuously expand in the in-plane direction between the side walls 16 opposed in the in-plane direction of the first surface 13.
[0183] Explanation Figure 16 An example of the formation process of the via metal layer 33 shown. In this modification, as in Figure 9 the case of the above-described embodiment shown, the via metal layer 33 is formed along the side wall 16 of the through hole 15. For example, the main layer 35 of the via metal layer 33 is formed by electrolytic plating.
[0184] If electrolytic plating is further continued from the Figure 9 state shown, as Figure 17A shown, in a part of the through hole 15, the through hole 15 is blocked by the via metal layer 33. For example, in the central portion in the thickness direction of the substrate 12, a via metal layer 33 that continuously expands in the in-plane direction of the first surface 13 is formed. The part of the via metal layer 33 that blocks the through hole 15 is also referred to as the blocking portion 331.
[0185] If electrolytic plating is further continued from the Figure 9 state shown, as Figure 17B shown, the blocking portion 331 grows in the thickness direction of the substrate 12. By continuously performing electrolytic plating until the end faces of the blocking portion 331 in the thickness direction of the substrate 12 reach the first surface 13 and the second surface 14, the Figure 16 via metal layer 33 shown is obtained.
[0186] The electrolytic plating for forming the via metal layer 33 may also end in a state where the end faces of the blocking portion 331 in the thickness direction of the Figure 17B substrate 12 shown do not reach the first surface 13 and the second surface 14. That is, the through-electrode substrate 10 may include a via metal layer 33 including the blocking portion 331 whose end faces in the thickness direction of the substrate 12 do not reach the first surface 13 and the second surface 14. The through-electrode substrate 10 having the Figure 17B via metal layer 33 shown is used for sales or use.
[0187] As Figure 17C shown, the through-electrode substrate 10 may include an insulating layer 19 located between the via metal layers 33 opposed in the in-plane direction of the first surface 13. The insulating layer 19 may be in contact with the end faces of the blocking portion 331 in the thickness direction of the substrate 12.
[0188] (Seventh Modification)
[0189] Figure 18A And Figure 18BFIG. 0 is a cross-sectional view showing the through-electrode substrate 10 in the seventh modification. The adhering layer 20 may include not only the portion between the substrate 12 and the metal layer 30 but also the portion that does not overlap with the metal layer 30. For example, the first adhering layer 21 may include not only the portion between the substrate 12 and the first metal layer 31 but also the portion that does not overlap with the first metal layer 31 when viewed from above. For example, the first adhering layer 21 may extend over the entire area of the first surface 13. For example, the second adhering layer 22 may include not only the portion between the substrate 12 and the second metal layer 32 but also the portion that does not overlap with the second metal layer 32 when viewed from above. For example, the second adhering layer 22 may extend over the entire area of the second surface 14. "Viewed from above" means observing the object along the normal direction of the first surface 13.
[0190] In this modification, the adhering layer 20 has insulating properties. For example, the adhering layer 20 contains the above-mentioned metal oxide having insulating properties. Since the adhering layer 20 has insulating properties, even when the adhering layer 20 includes a portion that does not overlap with the metal layer 30, electrical short circuits in the metal layer 30 are prevented.
[0191] In the case where the above-mentioned adhering layer removing process is not performed, Figure 18A and Figure 18B the through-electrode substrate 10 shown in FIG. 10 can be obtained. According to this modification, since the adhering layer removing process is not required, the manufacturing cost of the through-electrode substrate 10 is reduced.
[0192] (Eighth Modification)
[0193] Figure 19 FIG. 17 is a cross-sectional view showing the through-electrode substrate 10 in the eighth modification. The thickness Z32 of the second adhering layer 22 on the second surface 14 may be different from the thickness Z31 of the first adhering layer 21 on the first surface 13. For example, the thickness Z32 of the second adhering layer 22 may be smaller than the thickness Z31 of the first adhering layer 21. Such a thickness difference is achieved by forming the second adhering layer 22 through a process different from the process of forming the first adhering layer 21. For example, the process of forming the first adhering layer 21 is performed in a state covering the second surface 14, and the process of forming the second adhering layer 22 is performed in a state covering the first surface 13. In this case, the thickness difference is achieved by adjusting the conditions of the two processes. The two processes may both be atomic layer deposition processes.
[0194] The ratio Z32 / Z31 of the thickness Z32 of the second adhering layer 22 to the thickness Z31 of the first adhering layer 21 is, for example, 0.01 or more, may be 0.10 or more, and may also be 0.30 or more. Z32 / Z31 is, for example, 0.90 or less, may be 0.80 or less, and may also be 0.60 or less.
[0195] Although not shown, the thickness Z32 of the second adhering layer 22 may also be greater than the thickness Z31 of the first adhering layer 21. In this case, the ratio of the thickness Z31 of the first adhering layer 21 to the thickness Z32 of the second adhering layer 22, i.e., Z31 / Z32, is, for example, 0.01 or more, may be 0.10 or more, and may also be 0.30 or more. Z31 / Z32 is, for example, 0.90 or less, may be 0.80 or less, and may also be 0.60 or less.
[0196] (The ninth modification example)
[0197] Figure 20 FIG. 7 is a cross-sectional view showing the through electrode substrate 10 in the ninth modification example. The adhering layer 20 includes the first adhering layer 21 on the first surface 13 and the hole adhering layer 23 on the side wall 16, but may not include the second adhering layer 22 on the second surface 14. Figure 20 The shown through electrode substrate 10 is obtained, for example, by performing an atomic layer deposition process in a state of covering the second surface 14.
[0198] Although not shown, the adhering layer 20 may also include the second adhering layer 22 on the second surface 14 and the hole adhering layer 23 on the side wall 16, but does not include the first adhering layer 21 on the first surface 13.
[0199] (The tenth modification example)
[0200] Figure 21 FIG. 19 is a cross-sectional view showing the through electrode substrate 10 in the tenth modification example. The adhering layer 20 may also include a plurality of layers. For example, as Figure 21 shown, the adhering layer 20 may also include a lower adhering layer 201 and an upper adhering layer 202.
[0201] The lower adhering layer 201 may be in contact with the substrate 12. For example, the lower adhering layer 201 of the first adhering layer 21 may be in contact with the first surface 13, the lower adhering layer 201 of the second adhering layer 22 may be in contact with the second surface 14, and the lower adhering layer 201 of the hole adhering layer 23 may be in contact with the side wall 16.
[0202] The upper adhering layer 202 may be in contact with the metal layer 30. For example, the upper adhering layer 202 of the first adhering layer 21 may be in contact with the first metal layer 31, the upper adhering layer 202 of the second adhering layer 22 may be in contact with the second metal layer 32, and the upper adhering layer 202 of the hole adhering layer 23 may be in contact with the hole metal layer 33.
[0203] The upper adhering layer 202 may be in contact with the lower adhering layer 201. Although not shown, the adhering layer 20 may also include an intermediate adhering layer located between the lower adhering layer 201 and the upper adhering layer 202.
[0204] The metal oxide contained in the upper adhesion layer 202 and the metal oxide contained in the lower adhesion layer 201 may also be different. By using different metal oxides, the upper adhesion layer 202 and the lower adhesion layer 201 can perform different functions.
[0205] The lower adhesion layer 201 is a layer for suppressing the peeling of the adhesion layer 20 from the substrate 12. Preferably, the lower adhesion layer 201 has a higher adhesion to the substrate 12 than the upper adhesion layer 202. For example, the peeling strength of the lower adhesion layer 201 with respect to the substrate 12 is higher than the peeling strength of the lower adhesion layer 201 with respect to the substrate 12.
[0206] The upper adhesion layer 202 is a layer for performing at least one of the first function or the second function.
[0207] The first function is a function such as suppressing the peeling of the metal layer 30 from the adhesion layer 20. When the upper adhesion layer 202 has the first function, the upper adhesion layer 202 has a higher adhesion to the metal layer 30 than the lower adhesion layer 201. For example, the peeling strength of the metal layer 30 with respect to the upper adhesion layer 202 is higher than the peeling strength of the metal layer 30 with respect to the lower adhesion layer 201.
[0208] The second function is a function such as suppressing the dissolution of the adhesion layer 20 in a chemical. When the upper adhesion layer 202 has the second function, the upper adhesion layer 202 has a higher resistance to chemicals such as acidic solutions than the lower adhesion layer 201. For example, the upper adhesion layer 202 passes the chemical test described below, but the lower adhesion layer 201 fails the chemical test.
[0209] In the chemical test, a sample having the adhesion layer 20 including the lower adhesion layer 201 and the upper adhesion layer 202 is immersed in a test solution. The test solution is a liquid simulating an etching solution for etching a layer of copper. The test solution is 5% hydrogen peroxide / 5% sulfuric acid. In the chemical test, the sample is immersed in the test solution at room temperature (25 °C) for 5 minutes. When a layer remains after the 5-minute immersion, the layer is determined to be qualified. When the layer dissolves and disappears during the 5-minute immersion, the layer is determined to be unqualified. The upper adhesion layer 202 can be defined as a layer that can pass the chemical test. The lower adhesion layer 201 can be defined as a layer that cannot pass the chemical test.
[0210] The lower adhesion layer 201 contains, for example, a metal oxide having adhesion to the substrate 12. For example, when the substrate 12 contains glass, the lower adhesion layer 201 may contain metal oxides such as zinc oxide, aluminum oxide, and hafnium oxide.
[0211] Aluminum oxide and hafnium oxide have adhesiveness to glass, but lack adhesiveness to metals such as copper. When the lower adhesion layer 201 contains aluminum oxide or hafnium oxide, it is preferable that the upper adhesion layer 202 has the above-mentioned first function. The upper adhesion layer 202 having the first function may contain, for example, metal oxides such as titanium oxide and tantalum oxide. Examples of combinations of materials constituting the lower adhesion layer 201 and the upper adhesion layer 202 are shown below.
[0212] (Lower adhesion layer 201, upper adhesion layer 202) = (Al 2 O 3 , TiO 2 ), (HfO 2 , TiO 2 ), (Al 2 O 3 , Ta 2 O 5 ), (HfO 2 , Ta 2 O 5 )
[0213] Zinc oxide and magnesium oxide have adhesiveness to glass, but lack resistance to drugs. When the lower adhesion layer 201 contains zinc oxide or magnesium oxide, it is preferable that the upper adhesion layer 202 has the above-mentioned second function. The upper adhesion layer 202 having the second function may contain, for example, metal oxides such as titanium oxide and tantalum oxide.
[0214] (Lower adhesion layer 201, upper adhesion layer 202) = (ZnO, TiO 2 ), (MgO, TiO 2 ), (ZnO, Ta 2 O 5 ), (MgO, Ta 2 O 5 )
[0215] Both the lower adhesion layer 201 and the upper adhesion layer 202 can be formed by atomic layer deposition.
[0216] The thickness of the upper adhesion layer 202 may be the same as or different from the thickness of the lower adhesion layer 201.
[0217] (11th modified example)
[0218] Figure 22FIG. 0 is a cross-sectional view showing the through-electrode substrate 10 in the 11th modified example. The through-electrode substrate 10 may include a first wiring layer 60 located on the first surface 13. The first wiring layer 60 includes a first insulating layer 61 and a first conductive layer 62. The first insulating layer 61 may partially cover the first metal layer 31. The first insulating layer 61 may extend in the in-plane direction between two adjacent first metal layers 31 in the in-plane direction of the first surface 13. The first conductive layer 62 may be connected to the first metal layer 31. A part of the first conductive layer 62 may be located on the first insulating layer 61.
[0219] The first insulating layer 61 contains an insulating material. The first insulating layer 61 may contain an organic material or an inorganic material. The first insulating layer 61 may include an organic layer containing an organic material and an inorganic layer containing an inorganic material. The organic layer and the inorganic layer may overlap in the thickness direction. Examples of the organic material are polyimide and the like. Examples of the inorganic material are silicon oxide, silicon nitride, and the like.
[0220] The first conductive layer 62 contains a conductive material. The first conductive layer 62 may contain a metal material. Examples of the metal material of the first conductive layer 62 are metals such as copper, aluminum, nickel, gold, tungsten, or alloys of these metals.
[0221] The first wiring layer 60 may include two or more first insulating layers 61 and two or more first conductive layers 62 alternately stacked in the thickness direction.
[0222] As Figure 22 shown, the through-electrode substrate 10 may include a second wiring layer 65 located on the second surface 14. The second wiring layer 65 includes a second insulating layer 66 and a second conductive layer 67. The second insulating layer 66 may partially cover the second metal layer 32. The second insulating layer 66 may extend in the in-plane direction between two adjacent second metal layers 32 in the in-plane direction of the second surface 14. The second conductive layer 67 may be connected to the second metal layer 32. A part of the second conductive layer 67 may be located on the second insulating layer 66.
[0223] The second insulating layer 66 contains an insulating material in the same manner as the first insulating layer 61. The second insulating layer 66 may contain an organic material or an inorganic material. The second insulating layer 66 may include an organic layer containing an organic material and an inorganic layer containing an inorganic material. The organic layer and the inorganic layer may overlap in the thickness direction. Examples of the organic material are polyimide and the like. Examples of the inorganic material are silicon oxide, silicon nitride, and the like.
[0224] The second conductive layer 67 contains a conductive material. The second conductive layer 67 may contain a metal material. Examples of the metal material of the second conductive layer 67 are metals such as copper, aluminum, nickel, gold, tungsten, or alloys of these metals.
[0225] The second wiring layer 65 may include two or more second insulating layers 66 and two or more second conductive layers 67 alternately stacked in the thickness direction.
[0226] The through electrode substrate 10 may form passive components. For example, the first metal layer 31, the first insulating layer 61, and the first conductive layer 62 may form a capacitor. For example, the second metal layer 32, the second insulating layer 66, and the second conductive layer 67 may form a capacitor. For example, the first metal layer 31, the second metal layer 32, and the via metal layer 33 may form an inductor.
[0227] The through electrode substrate 10 may include semiconductor elements. The semiconductor elements may include terminals electrically connected to the first conductive layer 62 of the first wiring layer 60. The through electrode substrate 10 having semiconductor elements is also referred to as a semiconductor substrate.
[0228] The through electrode substrate 10 may include sensors. The through electrode substrate 10 having sensors is also referred to as a sensor substrate.
[0229] The through electrode substrate 10 may include optical components. The optical components may be components that emit light or components that receive light. The through electrode substrate 10 having optical components is also referred to as an optical substrate.
[0230] The through electrode substrate 10 may include high-frequency components. The high-frequency components may be components that transmit high-frequency signals or components that receive high-frequency signals. The through electrode substrate 10 having high-frequency components is also referred to as a high-frequency substrate.
[0231] Figure 23 FIG. is a diagram showing an example of an article on which the through electrode substrate 10 is mounted. The through electrode substrate 10 can be used in various articles. For example, it is mounted on a notebook personal computer 110, a tablet terminal 120, a mobile phone 130, a smart phone 140, a digital video camera 150, a digital camera 160, a digital clock 170, a server 180, etc.
[0232] Almost modified examples with respect to the above-described embodiments have been described, and of course, multiple modified examples can be appropriately combined and applied to the above-described embodiments.
[0233] Examples
[0234] Next, the embodiments of the present disclosure will be described in more detail with reference to examples, but the embodiments of the present disclosure are not limited to the following description of the examples as long as they do not exceed the gist thereof.
[0235] (Example 1)
[0236] As the substrate 12, a glass substrate with a thickness of 380 μm is prepared. Next, a through-hole 15 with a diameter of 50 μm is formed in the substrate 12. Next, a conformal layer 20 containing zinc oxide is formed on the surface of the substrate 12 by atomic layer deposition. The thickness of the conformal layer 20 is 10 nm. The film formation temperature of the conformal layer 20 is 100 °C or higher and 250 °C or lower.
[0237] Next, an annealing process for heating the conformal layer 20 is performed. The temperature of the annealing process is 500 °C or higher.
[0238] Next, an intermediate layer 36 containing copper is formed on the conformal layer 20 by electroless plating. Next, an intermediate layer annealing process for heating the intermediate layer 36 is performed. The temperature of the intermediate layer annealing process is 250 °C.
[0239] Next, a main layer 35 containing copper is formed on the intermediate layer 36 by electroplating. Next, a main layer annealing process for heating the main layer 35 is performed. The temperature of the main layer annealing process is 350 °C or higher. Thus, the through-hole electrode substrate 10 is fabricated.
[0240] The hole conformal layer 23 and the hole metal layer 33 formed on the side wall 16 of the through-hole 15 are observed using a transmission electron microscope. The obtained image is shown in Figure 24 shown. In Figure 24 a white dotted line is drawn at the boundary between the hole conformal layer 23 and the hole metal layer 33.
[0241] Separate from the observation using the transmission electron microscope, at the stage after the intermediate layer annealing process and before the main layer formation process, the composition of a sample including the substrate 12 and the conformal layer 20 is analyzed by X-ray photoelectron spectroscopy. Figure 25 is a chart showing the analysis results. As the analysis apparatus, a scanning X-ray photoelectron spectroscopy apparatus PHI5000VersaProbeIII made by PHI is used.
[0242] The acquisition conditions of the spectrum are as follows.
[0243] Incident X-ray: Al Kα (monochromatized X-ray, hv = 1486.6 eV)
[0244] X-ray output: 50 W (15 kV, 3.3 mA)
[0245] X-ray beam diameter: 200 μm
[0246] X-ray scan area (surface XPS): 600 μm × 300 μm
[0247] X-ray scan area (depth direction XPS): no scan
[0248] Optoelectronic capture angle: 45 degrees
[0249] Charge neutralization: Electron neutralization gun, low-acceleration Ar + Ion irradiation
[0250] The conditions for ion sputter etching are as follows.
[0251] Ion species: Ar + (2.0 keV)
[0252] Acceleration voltage: 2.0 kV
[0253] Emission current: 7.0 mA
[0254] Etching range (area of the ion beam grid): 2 mm × 2 mm
[0255] Etching rate (SiO 2 conversion): 6 nm / min
[0256] Rotation of the sample: Not implemented
[0257] In Figure 25 , the horizontal axis represents the time of ion sputter etching, and the vertical axis represents the atomic concentration of the detected element. The reference numeral G1 represents the spectrum of silicon. The reference numeral G2 represents the spectrum of zinc. The reference numeral P1 represents the boundary position. The boundary position P1 is the position where the atomic concentration of silicon, which is the main component of the substrate 12, becomes 50% of the maximum atomic concentration M11. That is, the atomic concentration M12 of silicon at the boundary position P1 is 50% of the maximum atomic concentration M11.
[0258] The reference numeral M21 represents the maximum atomic concentration of the metal, which is the metal constituting the metal oxide of the adjacent layer 20, i.e., zinc. The reference numeral M22 represents the atomic concentration of the metal, which is the metal constituting the metal oxide of the adjacent layer 20, at the boundary position P1. As Figure 25 shown, the ratio M22 / M21 of the atomic concentration M22 at the boundary position P1 to the maximum atomic concentration M21 is 0.50 or more. If the metal constituting the metal oxide of the adjacent layer 20 is included, the surface layer of the substrate 12 is determined.
[0259] The surface layer containing the metal constituting the metal oxide of the adjacent layer 20 has a thickness T10. The thickness T10 is the distance in the thickness direction of the substrate 12 from the boundary position P1 to the inner boundary position P2. The inner boundary position P2 is the position where the concentration M23 of the metal constituting the metal oxide of the adjacent layer 20 becomes 0.10 times the maximum atomic concentration M21.
[0260] The thickness T10 is calculated by converting the time difference of ion sputter etching between the boundary position P1 and the inner boundary position P2 into a distance based on the etching rate. In Example 1, the thickness T10 is 4.9 nm.
[0261] (Example 2)
[0262] As the substrate 12, a glass substrate with a thickness of 380 μm is prepared. Next, a through-hole 15 with a diameter of 50 μm is formed in the substrate 12. Next, an adherent layer 20 containing titanium oxide is formed on the surface of the substrate 12 by atomic layer deposition. The thickness of the adherent layer 20 is 10 nm.
[0263] The film formation temperature of the adherent layer 20 is T11 or T12. Both the temperature T11 and the temperature T12 are in the range of 100°C or higher and 250°C or lower. The temperature T12 is higher than the temperature T11. As Figure 26 shown, in Samples 1 and 3, the film formation temperature of the adherent layer 20 is T11. In Samples 2 and 4, the film formation temperature of the adherent layer 20 is T12.
[0264] Next, in Samples 3 and 4, an annealing process of heating the adherent layer 20 is performed. The temperature T2 of the annealing process is higher than 250°C.
[0265] Next, a copper-containing intermediate layer 36 is formed on the adherent layer 20 by electroless plating. Next, an intermediate layer annealing process of heating the intermediate layer 36 is performed. The temperature of the intermediate layer annealing process is 250°C.
[0266] Next, a copper-containing main layer 35 is formed on the intermediate layer 36 by electroplating. Next, a main layer annealing process of heating the main layer 35 is performed. The temperature of the main layer annealing process is 350°C or higher. In this way, the through-hole electrode substrate 10 is fabricated. The thickness of the metal layer 30 including the main layer 35 and the intermediate layer 36 is 20 μm.
[0267] Next, a peel test of the metal layer 30 of Samples 1 to 4 was carried out based on JIS K 6854-1. Figure 27 is a diagram showing the method of the peel test. The peel test is carried out in an environment of 25°C. Samples 1 to 4 have a rectangular outline with a short side of 10 mm in a top view.
[0268] As Figure 27 shown, a part of the metal layer 30 is peeled off from the adherent layer 20. In addition, the adherent layer 20 and the substrate 12 overlapping the peeled metal layer 30 are supported by the first support roller 72. In addition, the second support roller 73 and the clamp 74 are adjusted so that the peeled metal layer 30 and the metal layer 30 on the adherent layer 20 form a 90-degree angle.
[0269] While maintaining an angle of 90 degrees, move the clamp 74 upward by 50 mm. Calculate the average value of the load applied to the clamp 74 during the movement as the peel strength of the metal layer 30. Show the results in Figure 26 shown.
[0270] As Figure 26 shown, in Samples 3 to 4 that have undergone the annealing process, the peel strength is 0.40 N / 10 mm or more. In particular, in Sample 4 with a film formation temperature of T12, the peel strength is 3.00 N / 10 mm or more. In Samples 3 to 4, it is considered that metal oxides in a crystalline state are at least partially formed in the adherent layer 20 through the annealing process. On the other hand, in Samples 1 to 2, it is considered that amorphous metal oxides occupy most of the adherent layer 20.
[0271] Figure 28A Represents an image obtained by observing the adherent layer 20 containing metal oxides in a crystalline state using a transmission electron microscope (TEM). Figure 28A The white part indicated by reference numeral 25 in represents titanium oxide in a crystalline state.
[0272] Figure 28B Represents an electron diffraction pattern of the adherent layer 20 containing metal oxides in a crystalline state. Figure 28B The electron diffraction pattern shown is Figure 28A the analysis result of the area indicated by reference numeral OP in. As Figure 28B shown, a plurality of diffraction spots regularly arranged along the direction D1 are observed. The conditions for measuring the electron diffraction pattern are as follows.
[0273] ・Diffraction method: Ultra-micro electron diffraction method
[0274] ・Apparatus: JEOL transmission electron microscope JEM-ARM200F
[0275] ・Accelerating voltage: 200 kV
[0276] ・Camera length: 0.8 m
[0277] ・Beam diameter: 1 nm
[0278] Figure 29A Represents an image obtained by observing the adherent layer 20 without metal oxides in a crystalline state using a transmission electron microscope.
[0279] Figure 29B Represents an electron diffraction pattern of the adherent layer 20 without metal oxides in a crystalline state. Figure 29B The electron diffraction pattern shown isFigure 29A The analysis results of the area indicated by the reference symbol OP in FIG. Figure 29B As shown, a plurality of regularly arranged diffraction spots are not observed.
[0280] -Explanation of symbols-
[0281] 10: Through electrode substrate
[0282] 12: Substrate
[0283] 13: Page 1
[0284] 14: Side 2
[0285] 15: Through hole
[0286] 16: Sidewall
[0287] 161: End 1
[0288] 162: End 2
[0289] 20: Close-fitting layer
[0290] 201: Lower side cling layer
[0291] 202: Upper side close fitting layer
[0292] 21: First close-fitting layer
[0293] 22: Second clinging layer
[0294] 23: Hole-tight layer
[0295] 30: Metal layer
[0296] 31: 1st metal layer
[0297] 32: 2nd metal layer
[0298] 33: Hole metal layer
[0299] 331: Locking part
[0300] 35: Main layer
[0301] 36: Middle layer
[0302] 41: 1st resist layer
[0303] 42: Second resist layer
[0304] 50: Film forming device
[0305] 51: Chamber
[0306] 60: 1st wiring layer
[0307] 61: First insulation layer
[0308] 62: First conductive layer
[0309] 65: Second wiring layer
[0310] 66: Second insulating layer
[0311] 67: Second conductive layer
[0312] 71: Sample
[0313] 72: First support roller
[0314] 73: Second support roller
[0315] 74: Clamp.
Claims
1. A through - electrode substrate, characterized in that, it comprises: a substrate, which includes a first surface, a second surface located on the opposite side of the first surface, and a through - hole penetrating from the first surface to the second surface; a metal layer, which at least includes a hole metal layer located in the through - hole; and a bonding layer, which is located between the substrate and the metal layer and contains a metal oxide, the through - hole includes side walls reaching from the first surface to the second surface, the side walls include: a first end connected to the first surface; and a second end connected to the second surface, the bonding layer includes a hole bonding layer, and the hole bonding layer is located between the side walls and the hole metal layer so as to reach from the first end to the second end of the side walls.
2. The through - electrode substrate according to claim 1, wherein, the through - hole has an aspect ratio of 3.0 or more, the aspect ratio is the ratio of the thickness of the substrate to the minimum value of the width of the through - hole.
3. The through - electrode substrate according to claim 1, wherein, the metal oxide is titanium oxide, zinc oxide, aluminum oxide, tantalum oxide or magnesium oxide.
4. The through - electrode substrate according to claim 1, wherein, the bonding layer includes the metal oxide in a crystalline state.
5. The through - electrode substrate according to claim 1, wherein, the electron diffraction pattern of the metal oxide in the bonding layer includes a plurality of diffraction spots regularly arranged along at least one direction.
6. The through - electrode substrate according to claim 1, wherein, the hole bonding layer has a central thickness at the central position in the thickness direction of the substrate and an end thickness at the position of the first surface of the substrate, the ratio of the end thickness to the central thickness is 1.10 or less.
7. The through - electrode substrate according to claim 1, wherein, the bonding layer includes: a lower bonding layer in contact with the substrate; and an upper bonding layer in contact with the metal layer.
8. The through - electrode substrate according to claim 7, wherein, the metal oxide contained in the lower bonding layer is different from the metal oxide contained in the upper bonding layer.
9. The through - electrode substrate according to any one of claims 1 to 8, wherein, the substrate includes a surface layer constituting the surface of the side walls, the surface layer includes metal atoms of the metal oxide constituting the bonding layer.
10. The through - electrode substrate according to any one of claims 1 to 8, wherein, the metal layer includes copper, aluminum, nickel, gold or tungsten.
11. The through - electrode substrate according to any one of claims 1 to 8, wherein, the metal layer includes: a main layer containing a metal material; and an intermediate layer located between the main layer and the bonding layer, containing a metal material and thinner than the main layer.
12. The through - electrode substrate according to claim 11, wherein, the main layer and the intermediate layer contain the same metal material.
13. The through - electrode substrate according to any one of claims 1 to 8, wherein, the bonding layer includes a first bonding layer located on the first surface, the metal layer includes a first metal layer located on the first bonding layer.
14. The through electrode substrate according to claim 13, wherein, the hole metal layer has a central thickness at the central position in the thickness direction of the substrate, the ratio of the thickness of the first metal layer to the central thickness of the hole metal layer is 1.50 or less.
15. The through electrode substrate according to claim 13, wherein, the through electrode substrate includes: a first wiring layer including a first insulating layer that partially covers the first metal layer and a first conductive layer connected to the first metal layer.
16. The through electrode substrate according to claim 15, wherein, the first conductive layer includes copper, aluminum, nickel, gold, or tungsten.
17. The through electrode substrate according to claim 15, wherein, the first insulating layer includes silicon oxide, silicon nitride, or polyimide.
18. The through electrode substrate according to claim 13, wherein, the adhering layer includes a second adhering layer located on the second surface, the metal layer includes a second metal layer located on the second adhering layer.
19. The through electrode substrate according to claim 18, wherein, the through electrode substrate includes: a second wiring layer including a second insulating layer that partially covers the second metal layer and a second conductive layer connected to the second metal layer.
20. The through electrode substrate according to any one of claims 1 to 8, wherein, the through electrode substrate includes a semiconductor element, a sensor, an optical component, or a high-frequency component.
21. A method for manufacturing a through electrode substrate, characterized in that, it includes: a preparation step of preparing a substrate including a first surface, a second surface opposite to the first surface, and a through hole penetrating from the first surface to the second surface; an adhering layer formation step of forming an adhering layer on the surface of the substrate; and a metal layer formation step of forming a metal layer on the adhering layer, the through hole includes side walls reaching from the first surface to the second surface, the side walls include: a first end connected to the first surface; and a second end connected to the second surface, the adhering layer formation step includes: a film formation step of forming a hole adhering layer by chemical vapor deposition, the hole adhering layer being located between the side walls and the metal layer so as to reach from the first end to the second end of the side walls, the metal layer formation step includes the following steps: forming a hole metal layer located in the through hole on the hole adhering layer.
22. The method for manufacturing a through electrode substrate according to claim 21, wherein, the metal layer formation step includes the following steps: forming an intermediate layer on the adhering layer by electroless plating; and forming a main body layer on the intermediate layer by electroplating.
23. The method for manufacturing a through electrode substrate according to claim 21, wherein, the film formation step is carried out in an environment of 100 °C or higher.
24. The method for manufacturing a through electrode substrate according to any one of claims 21 to 23, wherein, the adhering layer formation step includes: an annealing step of heating the adhering layer at a temperature higher than the temperature of the film formation step after the film formation step.
25. The manufacturing method of the through-electrode substrate according to any one of claims 21 to 23, wherein, the preparation process includes: a through-hole forming process for forming the through-hole in the substrate.
26. A substrate used in the manufacturing method of the through-electrode substrate according to any one of claims 21 to 23, characterized in that the substrate includes: a first surface; a second surface located on the opposite side of the first surface; and a through-hole penetrating from the first surface to the second surface, the through-hole includes side walls reaching from the first surface to the second surface, the side walls include: a first end connected to the first surface; and a second end connected to the second surface.
Citation Information
Patent Citations
Hermetic metallized vias with improved reliability
JP2022519287A