Low-voltage fault arc digital waveform generating device

Abstract

The invention discloses a low-voltage fault arc digital waveform generation device. The device comprises a fault arc waveform generation module, a signal amplification module and an adjustment feedback module. The fault arc waveform generation module and the signal amplification module are used for restoring and outputting an original storage waveform and randomly calling multi-dimensional arc data according to an instruction of an upper computer; and the adjustment feedback module is used for controlling the real-time feedback adjustment of the output signal to ensure that the output signal is not distorted. Therefore, the fault arc waveform generation module and the signal amplification module are used for restoring and outputting the original storage waveform, the multi-dimensional arc data are randomly called according to the instruction of the upper computer, the adjustment feedback module is used for controlling the real-time feedback adjustment of the output signal, and it is ensured that the output signal is not distorted. Load current arc waveform digitization is realized, and the arc waveform can be randomly called to detect the monitor.

Description

Technical Field

[0001] The present invention relates to the technical field of low - voltage fault arc protection, and more specifically, to a low - voltage fault arc digital waveform generating device. Background Art

[0002] More than 80% of electrical fires are caused by fault arcs, seriously affecting the safe and stable operation of the power grid. As a scientific research technology to prevent the harm of fault arcs from expanding, it is very important to judge whether the fault arc monitor can perform well in simulation protection. The research on the performance detection devices and methods of fault arc monitors in different scenarios is also extremely important to ensure that the monitoring performance of fault arc monitors can be detected conveniently and comprehensively, so that the fault arc monitors can truly guarantee the safe operation of equipment on the power grid side and user side, prevent fire accidents, and improve the safety and economy of system operation.

[0003] From the current research, the performance detection devices of fault arc monitors mostly use the combination of actual household loads and arc generators. There are a large number of household appliance models, which cannot cover all of them, resulting in false negative situations of the monitors and high costs of the detection devices. Summary of the Invention

[0004] According to the present invention, a low - voltage fault arc digital waveform generating device is provided to solve the technical problems that the performance detection devices of fault arc monitors mostly use the combination of actual household loads and arc generators, there are a large number of household appliance models, which cannot cover all of them, resulting in false negative situations of the monitors and high costs of the detection devices.

[0005] According to the first aspect of the present invention, a low - voltage fault arc digital waveform generating device is provided. The device includes a fault arc waveform generating module, a signal amplifying module, and an adjustment feedback module;

[0006] The fault arc waveform generating module and the signal amplifying module are used for the restoration output of the original stored waveform and arbitrarily retrieving multi - dimensional arc data according to the host computer instruction;

[0007] The adjustment feedback module is used for controlling the real - time feedback adjustment of the output signal to ensure that the output signal is distortion - free.

[0008] Optionally, the fault arc waveform generating module includes a memory, an SDRAM controller, an address generator, a data buffer, a D / A converter, a low - pass filter, and a host computer display module;

[0009] The memory is used for storing the original load waveform data.

[0010] Optionally, the SDRAM controller is respectively connected to a memory, an address generator, and a data buffer, and is configured to receive the signal address to be read sent by the address generator and transmit the read data to the data buffer for caching.

[0011] Optionally, the address generator is respectively connected to the SDRAM controller and the host computer display module, and is configured to receive user instructions and retrieve the data required by the user.

[0012] Optionally, the data buffer is respectively connected to the SDRAM controller and the D / A converter, and is configured to temporarily store the data required by the user.

[0013] Optionally, the D / A converter is respectively connected to the D / A converter and the low-pass filter, and is configured to convert the read data from a digital signal to an analog signal.

[0014] Optionally, the low-pass filter is configured to filter out signal components higher than the cut-off frequency;

[0015] The host computer display module is configured to issue instructions to facilitate user operation.

[0016] Optionally, the signal amplification module includes a preamplifier circuit and a power amplifier;

[0017] The preamplifier circuit is configured to convert a current signal into a voltage signal and perform amplification processing;

[0018] The power amplifier is configured to boost the power of the analog signal and reproduce high-frequency signal components.

[0019] Optionally, the adjustment feedback module includes a sampling resistor module and a signal conditioning module;

[0020] The sampling resistor module is configured to sample the output current signal to obtain a sampled current signal.

[0021] Optionally, the signal conditioning module is respectively connected to the SDRAM controller of the fault arc waveform generation module and the sampling resistor module, and is configured to feedback the sampled current signal to the controller for real-time closed-loop control to ensure that the output signal is distortion-free.

[0022] Thus, through the restoration output of the original stored waveform by the fault arc waveform generation module and the signal amplification module, and by arbitrarily retrieving multi-dimensional arc data according to the host computer instructions, and through the adjustment feedback module for real-time feedback adjustment control of the output signal to ensure that the output signal is distortion-free. The digitization of the load current arc waveform is realized, and the arc waveform can be arbitrarily called to detect the monitor. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The exemplary embodiments of the present invention can be more fully understood by referring to the following drawings:

[0024] Figure 1 Schematic diagram of a low - voltage fault arc digital waveform generating device according to this embodiment. Specific embodiments

[0025] Now, exemplary embodiments of the present invention will be introduced with reference to the accompanying drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. These embodiments are provided to disclose the present invention in detail and completely, and to fully convey the scope of the present invention to those skilled in the relevant technical field. The terms in the exemplary embodiments shown in the drawings are not limitations on the present invention. In the drawings, the same unit / element uses the same reference numeral.

[0026] Unless otherwise specified, the terms used herein (including technical terms) have the ordinary meaning understood by those skilled in the relevant technical field. Additionally, it can be understood that the terms defined in the commonly used dictionary should be understood to have a meaning consistent with the context of their relevant fields, and should not be understood as idealized or overly formal meanings.

[0027] According to a first aspect of the present invention, a low - voltage fault arc digital waveform generating device is provided. The device includes a fault arc waveform generating module, a signal amplification module, and an adjustment feedback module.

[0028] The fault arc waveform generating module and the signal amplification module are used for the restoration output of the original stored waveform and arbitrarily retrieving multi - dimensional arc data according to the host computer instruction.

[0029] The adjustment feedback module is used for controlling the real - time feedback adjustment of the output signal to ensure that the output signal is distortion - free.

[0030] Optionally, the fault arc waveform generating module includes a memory, an SDRAM controller, an address generator, a data buffer, a D / A converter, a low - pass filter, and a host computer display module.

[0031] The memory is used for storing the original load waveform data.

[0032] Optionally, the SDRAM controller is respectively connected to the memory, the address generator, and the data buffer, and is used for receiving the signal address to be read sent by the address generator and transmitting the read data to the data buffer for caching.

[0033] Optionally, the address generator is respectively connected to the SDRAM controller and the host computer display module, and is used for receiving user instructions and retrieving the data required by the user.

[0034] Optionally, the data buffer is respectively connected to the SDRAM controller and the D / A converter for temporarily storing the data required by the user.

[0035] Optionally, the D / A converter is respectively connected to the D / A converter and the low-pass filter for converting the read data from a digital signal into an analog signal.

[0036] Optionally, the low-pass filter is used to filter out the signal components higher than the cut-off frequency;

[0037] The host computer display module is used to issue instructions to facilitate user operation.

[0038] Optionally, the signal amplification module includes a pre-amplification circuit and a power amplifier;

[0039] The pre-amplification circuit is used to convert the current signal into a voltage signal and perform amplification processing;

[0040] The power amplifier is used to boost the power of the analog signal and reproduce the high-frequency signal components.

[0041] Optionally, the adjustment feedback module includes a sampling resistor module and a signal conditioning module;

[0042] The sampling resistor module is used to sample the output current signal to obtain a sampled current signal.

[0043] Optionally, the signal conditioning module is respectively connected to the SDRAM controller and the sampling resistor module of the fault arc waveform generation module for feeding back the sampled current signal to the controller for real-time closed-loop control to ensure that the output signal is distortion-free.

[0044] Specifically, as Figure 1 shown, the fault arc waveform generation module, the signal amplification module, the adjustment feedback module, and the host computer display module are connected in sequence to form a test loop.

[0045] The fault arc waveform generation module includes a memory, an SDRAM controller, an address generator, a data buffer, a D / A converter, a low-pass filter, and a host computer. The memory is connected to the SDRAM controller and transmits the stored original load waveform data to the SDRAM controller. The SDRAM is respectively connected to the address generator and the data buffer, receives the signal address to be read sent by the address generator, and transmits the read data to the data buffer for caching. The D / A converter is connected to the data buffer and converts the read data from a digital signal into an analog signal. The low-pass filter is connected to the D / A converter and is used to filter out the signal components higher than the cut-off frequency. The host computer display module is connected to the address generator and is used to issue instructions to facilitate user operation.

[0046] The signal amplification module includes a preamplification circuit and a power amplifier. The preamplification circuit is connected to the low-pass filter, converts the transmitted current signal into a voltage signal, and amplifies and processes it. The power amplifier is connected to the preamplification circuit, boosts the power of the analog signal, reproduces the high-frequency signal components, removes the switching harmonics, and achieves the effect of being consistent with the original waveform of the real load.

[0047] The adjustment feedback module includes a sampling module and a signal conditioning module. The sampling module is connected to the power amplifier and samples the output current signal. The signal conditioning module is respectively connected to the sampling module and the SDRAM controller, feeds back the sampled current signal to the SDRAM controller for real-time closed-loop control, and ensures that the output signal is distortion-free.

[0048] Thus, through the restoration output of the original stored waveform by the fault arc waveform generation module and the signal amplification module, and by arbitrarily retrieving multi-dimensional arc data according to the host computer instruction, and through the adjustment feedback module for real-time feedback adjustment of the output signal for control, it is ensured that the output signal is distortion-free. The digitization of the load current arc waveform is realized, and the arc waveform can be arbitrarily called to detect the monitor.

[0049] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The solutions in the embodiments of the present application can be implemented in various computer languages, for example, object-oriented programming languages such as Java and interpreted scripting languages such as JavaScript.

[0050] The present application is described with reference to the flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each flow and / or block in the flowchart and / or block diagram, and the combination of flows and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate a device for implementing the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0051] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to operate in a particular manner, such that the instructions stored in the computer-readable memory produce a manufacture including an instruction device that implements the functions specified in one or more of the procedures Figure 1 one or more procedures and / or blocks Figure 1 specified in the block or blocks.

[0052] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, whereby the instructions executed on the computer or other programmable apparatus provide steps for implementing the functions specified in one or more of the procedures Figure 1 one or more procedures and / or blocks Figure 1 specified in the block or blocks.

[0053] Although the preferred embodiments of the present application have been described, additional changes and modifications can be made by those skilled in the art once they learn of the basic inventive concept. Therefore, the appended claims are intended to be construed to include the preferred embodiments as well as all changes and modifications that fall within the scope of the present application.

[0054] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application is also intended to include these modifications and variations.

Claims

1. A low voltage fault arc digital waveform generating device, characterized in that: The device comprises a fault arc waveform generating module, a signal amplifying module and an adjusting feedback module; The fault arc waveform generation module and the signal amplification module are used to restore and output the original stored waveform, and to retrieve multi-dimensional arc data arbitrarily according to the host computer instruction; The adjustment feedback module is used to control the real-time feedback adjustment of the output signal to ensure that the output signal is not distorted.

2. The low-voltage fault arc digital waveform generating device according to claim 1, characterized in that: The fault arc waveform generating module includes a memory, an SDRAM controller, an address generator, a data buffer, a D / A converter, a low-pass filter, and a host computer display module; The memory is used to store original load waveform data.

3. The low-voltage fault arc digital waveform generating device according to claim 2, characterized in that: The SDRAM controller is connected to the memory, the address generator and the data buffer respectively, and is used for receiving the signal address to be read sent by the address generator, and transmitting the read data to the data buffer for buffering.

4. The low-voltage fault arc digital waveform generating device according to claim 2, characterized in that: The address generator is connected to the SDRAM controller and the upper computer display module respectively, and is used to receive user instructions and retrieve data required by the user.

5. The low-voltage fault arc digital waveform generating device according to claim 2, characterized in that: The data buffer is connected to the SDRAM controller and the D / A converter respectively, and is used for temporarily storing the data required by the user.

6. The low-voltage fault arc digital waveform generating device according to claim 2, characterized in that: The D / A converter is connected to the D / A converter and the low-pass filter respectively, and is used to convert the read data from a digital signal to an analog signal.

7. The low-voltage fault arc digital waveform generating device according to claim 2, characterized in that: A low-pass filter is used to filter out signal components above the cutoff frequency; The upper computer display module is used to issue instructions to facilitate user operation.

8. The low-voltage fault arc digital waveform generating device according to claim 1, characterized in that: The signal amplification module includes a preamplification circuit and a power amplifier; The preamplifier circuit is used to convert the current signal into a voltage signal and amplify it; The power amplifier is used to increase the power of the analog signal and reproduce the high-frequency signal component.

9. The low-voltage fault arc digital waveform generating device according to claim 1, characterized in that: The regulation feedback module includes a sampling resistor module and a signal conditioning module; The sampling resistor module is used to sample the output current signal to obtain a sampled current signal.

10. The low-voltage fault arc digital waveform generating device according to claim 9, characterized in that: The signal conditioning module is respectively connected to the SDRAM controller and the sampling resistor module of the fault arc waveform generating module, and is used to feed back the sampling current signal to the controller for real-time closed-loop control to ensure that the output signal is not distorted.

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