Power supply voltage and communication serial port multiplexing circuit and sensor chip

Abstract

The invention discloses a power supply voltage and communication serial port multiplexing circuit, and the circuit comprises a power supply voltage-to-serial port receiving module which works under the bias of a low-voltage power supply VCC and is used for converting a power supply voltage VDD into a logic low-voltage level signal DataOut; wherein the logic low-voltage level signal DataOut is supplied to the sensor chip; the voltage reduction and output sink current module is used for converting the power supply voltage VDD into low-voltage power supply VCC; wherein the low-voltage power supply VCC supplies power to the power supply voltage-to-serial port receiving module and the sensor chip. The invention also discloses a sensor chip comprising the multiplexing circuit. Power supply and signal multiplexing is realized, a large input voltage range is satisfied, a peripheral circuit is simplified, and a serial port transmit-receive function is realized.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and particularly relates to a power supply voltage and communication serial port multiplexing circuit and a sensor chip. Background Art

[0002] In the field of integrated sensors, sensors and the host computer are usually in different positions of the machine. The communication between traditional sensors and the host computer relies on a multi-bit data bus. The data bus is driven by the sensor chip, and the driving voltage is usually 3 - 5V. With the complexity of system design and the increase in sensors, the anti-interference ability, physical size, and transmission distance of the bus will be limited by the serial port transceiver mode and communication protocol. The communication protocol of traditional sensor chips depends on peripheral circuits with stronger driving capabilities, and with the continuous increase in the number of sensors in intelligent products, it is not conducive to the miniaturization and intelligence of the final product. Reducing the bus complexity and increasing the maximum number of sensors mounted have become problems that need to be solved urgently.

[0003] The interface design of integrated sensor chips includes a power supply part and a signal part. The development of the power supply module tends to have a larger voltage input range and stronger noise isolation ability. The development of communication signals tends to have a larger bandwidth, stronger anti-interference ability, and longer transmission distance. In existing electrical signal transmission solutions, twisted pairs are often used to transmit electrical signals. Due to their reliable common-mode interference resistance ability and stable physical characteristics, they are widely used in scenarios such as network cables and video communication cables for electrical signal transmission within 0 - 100 meters. The core function of twisted pairs is to apply external interference signals to both wires simultaneously, and the introduced noise is common-mode noise, which can be eliminated in subsequent circuits. In traditional sensor power supply solutions, sensor power supply depends on independent power lines and voltage generation circuits, and the power lines are independent of signal transmission lines. The overall redundancy of power lines, signal lines, and peripheral circuits places higher requirements on the reliability and stability of the non-circuit part of the product. Summary of the Invention

[0004] In order to solve the problems of circuit structure redundancy in the design of conventional circuits and sensor chips, and the complexity of peripheral circuits relied on by sensor chips, the present invention provides a power supply voltage and communication serial port multiplexing circuit and a sensor chip to achieve power and signal multiplexing, meet a large input voltage range, simplify peripheral circuits, and implement serial port transceiver functions.

[0005] The technical solution adopted by the present invention is as follows: In the first aspect, the present application provides a power supply voltage and communication serial port multiplexing circuit, which is applied to a sensor chip. The multiplexing circuit includes: The power supply voltage to serial port receiving module operates under the bias of the low-voltage power supply VCC and is used to convert the power supply voltage VDD into a logic low-level signal DataOut. Among them, the logic low-level signal DataOut is supplied to the sensor chip. The buck and output sink current module is used to convert the power supply voltage VDD into the low-voltage power supply VCC. Among them, the low-voltage power supply VCC is supplied to the power supply voltage to serial port receiving module and the sensor chip.

[0006] As an alternative technical solution, the power supply voltage to serial port receiving module includes a filtering and comparing circuit and a threshold control circuit. The filtering and comparing circuit includes a low-pass filter, a comparator, and voltage-dividing resistors R2 and R3. The power supply voltage VDD is input to the first input terminal of the comparator after being divided by R2 and R3. The power supply voltage VDD is input to the second input terminal of the comparator after being divided by R2 and R3 and then filtered by the low-pass filter. The output terminal of the comparator is connected to the input terminal of the threshold control circuit.

[0007] As an alternative technical solution, the low-pass filter includes a resistor R1 and a capacitor C1, and the comparator includes MOS transistors M1, M2, M3, and M4. The low-pass filter formed by the resistor R1 and the capacitor C1 is connected between one end of the resistor R3 and the gate of the transistor M2. The other end of the resistor R3 and one end of the capacitor C1 are both grounded to GND. The resistors R2 and R3 are connected in series between the power supply voltage VDD and the ground GND. The low-voltage end of the resistor R2 is connected to the gate of the transistor M1. The transistors M1 and M2 form a differential input pair. The transistors M3 and M4 form a current mirror structure. The sources of M1 and M2 are connected. The drains of M1 and M2 are respectively connected to the drains of M3 and M4. The sources of M3 and M4 are both grounded. The gate of M3 is short-circuited to the drain.

[0008] As an alternative technical solution, the filtering and comparing circuit further includes a constant current source I1. The negative pole of the constant current source I1 is connected to the sources of the transistors M1 and M2, and the positive pole of the constant current source I1 is connected to the low-voltage power supply VCC.

[0009] As an alternative technical solution, the threshold control circuit includes a buffer B1 and an inverter N1. The drain of the transistor M4 is connected to the input terminal of the buffer B1. The output terminal of the buffer B1 is connected to the input terminal of the inverter N1. The output terminal of the buffer B1 outputs the logic low-level signal DataOut.

[0010] As an alternative technical solution, the threshold control circuit further includes MOS transistors M5 and M6. The gate of transistor M5 is connected to the Vref+ terminal and the Vref- terminal respectively through switches K1 and K3. The gate of transistor M6 is connected to the Vref+ terminal and the Vref- terminal respectively through switches K2 and K4. The sources of transistors M5 and M6 are connected. The drains of transistors M5 and M6 are connected to the drains of transistors M2 and M1 respectively.

[0011] As an alternative technical solution, the threshold control circuit further includes a constant current source I2. The negative pole of the constant current source I2 is connected to the sources of transistors M5 and M6, and the positive pole of the constant current source I2 is connected to the low-voltage power supply VCC.

[0012] As an alternative technical solution, the step-down and output sink current module includes MOS transistors M7, M8, M9, M10, resistors R4, R5, a capacitor C2, and an operational amplifier. Among them, transistors M7 and M8 form a current mirror structure, and the sources of transistors M7 and M8 are both connected to the power supply voltage VDD. The drain of transistor M8 is connected to the source of transistor M9. The drain of transistor M9 is connected to the drain of transistor M10. The source of transistor M10 is grounded to GND. Resistors R4 and R5 are connected in series between the drain of transistor M9 and GND, and the low-voltage end of resistor R4 is connected to the non-inverting input terminal of the operational amplifier. Capacitor C2 is connected between the drain of transistor M9 and the non-inverting input terminal of the operational amplifier. The inverting input terminal of the operational amplifier is connected to the Vref terminal, and the drain of transistor M9 is connected to the VCC terminal.

[0013] As an alternative technical solution, the step-down and output sink current module further includes constant current sources I3 and I4. Among them, the positive pole of the constant current source I3 is connected to the drain of transistor M7, and the negative pole is grounded. The positive pole of the constant current source I4 is connected to the drain of transistor M7 through the Ctrl switch, and the negative pole is grounded.

[0014] In a second aspect, the present application also discloses a sensor chip, which includes the multiplexing circuit disclosed in the first aspect above.

[0015] The beneficial effects of the present invention are as follows: 1. The present application provides a multiplexing circuit for power supply voltage and communication serial port. By using the sensor chip of the present invention, the working voltage can reach 18V and is protected against overvoltage up to +20V. The chip can operate normally and output signals within a wide working voltage range, and at the same time can effectively protect the internal circuit structure and prevent chip failure caused by electrostatic discharge.

[0016] 2. Programmable input / output communication signals on the power supply voltage pin can significantly reduce the number of pins on the host computer connector. Only two power supply lines can be used to provide power supply voltage and serial port communication functions, and can support a duplex asynchronous communication protocol.

[0017] 3. The present invention can be widely used in various sensor chips, with strong anti-interference ability and strong applicability. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 FIG. is a circuit block diagram of a power supply voltage and communication serial port multiplexing circuit in an exemplary embodiment.

[0019] Figure 2 FIG. is a circuit schematic diagram of a power supply voltage to serial port receiving module in an exemplary embodiment.

[0020] Figure 3 FIG. is a circuit schematic diagram of a step-down and output sink current module in an exemplary embodiment.

[0021] Figure 4 FIG. is a communication schematic diagram between a sensor using the multiplexing circuit of this embodiment and a host computer in an exemplary embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0022] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Components of the embodiments of the present invention described and illustrated herein generally may be arranged and designed in a variety of different configurations. Therefore, the detailed description of the embodiments of the present invention provided herein is not intended to limit the scope of the claimed invention, but is merely representative of selected embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0023] Embodiment As Figure 1 shown, the present application provides a power supply voltage and communication serial port multiplexing circuit, which is applied to a sensor chip. The multiplexing circuit includes a power supply voltage to serial port receiving module 1 and a step-down and output sink current module 2. The power supply voltage to serial port receiving module 1 operates under the bias of a low-voltage power supply VCC and is used to convert the power supply voltage VDD into a logic low-level signal DataOut; wherein, the logic low-level signal DataOut is supplied to the sensor chip. The step-down and output sink current module 2 is used to convert the power supply voltage VDD into a low-voltage power supply VCC; wherein, the low-voltage power supply VCC is supplied to the power supply voltage to serial port receiving module 1 and the sensor chip.

[0024] Specifically, as Figure 2As shown, the power supply voltage to serial port receiving module 1 includes a filtering and comparing circuit 101 and a threshold control circuit 102. The filtering and comparing circuit 101 includes a low-pass filter, a comparator, and voltage-dividing resistors R2 and R3. The power supply voltage VDD is divided by R2 and R3 and then input to the first input terminal of the comparator. The power supply voltage VDD is divided by R2 and R3 and then filtered by the low-pass filter and input to the second input terminal of the comparator. The output terminal of the comparator is connected to the input terminal of the threshold control circuit.

[0025] As an alternative implementation, the low-pass filter includes a resistor R1 and a capacitor C1, and the comparator includes MOS transistors M1, M2, M3, and M4. The low-pass filter formed by the resistor R1 and the capacitor C1 is connected between one end of the resistor R3 and the gate of the transistor M2. The other end of the resistor R3 and one end of the capacitor C1 are both grounded to GND. The resistors R2 and R3 are connected in series between the power supply voltage VDD and the ground GND. The low-voltage end of the resistor R2 is connected to the gate of the transistor M1. The transistors M1 and M2 form a differential input pair, and the transistors M3 and M4 form a current mirror structure. The sources of M1 and M2 are connected, the drains of M1 and M2 are respectively connected to the drains of M3 and M4, the sources of M3 and M4 are both grounded, and the gate of M3 is short-circuited to the drain.

[0026] As an alternative implementation, the filtering and comparing circuit 101 further includes a constant current source I1. The negative electrode of the constant current source I1 is connected to the sources of the transistors M1 and M2, and the positive electrode of the constant current source I1 is connected to the low-voltage power supply VCC.

[0027] As an alternative implementation, the threshold control circuit 102 includes a buffer B1 and an inverter N1. The drain of the transistor M4 is connected to the input terminal of the buffer B1, the output terminal of the buffer B1 is connected to the input terminal of the inverter N1, and the output terminal of the buffer B1 outputs the logic low voltage level signal DataOut.

[0028] As an alternative implementation, the threshold control circuit 102 further includes MOS transistors M5 and M6. The gate of the transistor M5 is connected to the Vref+ terminal and the Vref- terminal through switches K1 and K3 respectively. The gate of the transistor M6 is connected to the Vref+ terminal and the Vref- terminal through switches K2 and K4 respectively. The sources of the transistors M5 and M6 are connected. The drains of the transistors M5 and M6 are respectively connected to the drains of the transistors M2 and M1. Among them, the switches K2 and K3 are controlled by the output signal of the buffer B1 and the switches K1 and K4 are controlled by the output signal of the inverter N1.

[0029] As an alternative embodiment, the threshold control circuit 102 further includes a constant current source I2. The negative electrode of the constant current source I2 is connected to the sources of transistors M5 and M6, and the positive electrode of the constant current source I2 is connected to the low-voltage power supply VCC.

[0030] As an alternative embodiment, as Figure 3 shown, the step-down and output sink current module 2 includes MOS transistors M7, M8, M9, M10, resistors R4, R5, a capacitor C2, and an operational amplifier. Among them, transistors M7 and M8 form a current mirror structure, and the sources of transistors M7 and M8 are both connected to the power supply voltage VDD. The drain of transistor M8 is connected to the source of transistor M9. The drain of transistor M9 is connected to the drain of transistor M10. The source of transistor M10 is grounded to GND. Resistors R4 and R5 are connected in series between the drain of transistor M9 and GND, and the low-voltage end of resistor R4 is connected to the non-inverting input terminal of the operational amplifier. Capacitor C2 is connected between the drain of transistor M9 and the non-inverting input terminal of the operational amplifier. The inverting input terminal of the operational amplifier is connected to the Vref terminal. The drain of transistor M9 is connected to the VCC terminal.

[0031] As an alternative embodiment, the step-down and output sink current module 2 further includes constant current sources I3 and I4. Among them, the positive electrode of the constant current source I3 is connected to the drain of transistor M7, and the negative electrode is grounded. The positive electrode of the constant current source I4 is connected to the drain of transistor M7 through a Ctrl switch, and the negative electrode is grounded.

[0032] In this embodiment, as Figure 1 and Figure 2 shown, the power supply voltage to serial port receiving module 1 mainly has two functions: (1) extracting signals through voltage division and filtering and inputting them into the internal logic control circuit of the chip, and (2) implementing the hysteresis threshold control function. The function of the voltage division and filtering part is to suppress the low-frequency part of the input signal, so that the input signal must meet a specific slew rate SR and the input frequency is greater than the frequency at this slew rate to be regarded as a valid signal. The main structure of the voltage division and filtering part is to reduce the voltage to the effective input range of the operational amplifier through resistor (R2, R3) voltage division, and filter the low-frequency signal through a first-order filter. Then compare the original voltage (i.e., the voltage at the X port) with the filtered voltage (i.e., the voltage at the Y port). When the difference between the two voltages exceeds a certain threshold voltage, it causes the comparator to flip. The role of the hysteresis threshold control is to regard voltage changes within a certain range as input disturbances, improving the input anti-interference ability. Avoid false triggering phenomena caused by interference of non-ideal signals on the input line and small changes in the module input. The structure of the threshold control circuit is that the output generated by a pair of differential pairs (i.e., the drain outputs of M5 and M6) is input into the second stage of the comparator (i.e., the drains of M1 and M2), so that the comparator requires a larger input to flip. After the comparator flips, the threshold is then controlled to flip to the threshold voltage required for the next comparator flip.

[0033] AsFigure 3 The circuit structure of the step-down and output sink current module 2 is shown. It outputs control through the serial port to generate logical sink current (i.e., I3 and I4) using the current mirror formed by M7 and M8, and controls the output voltage VCC using the negative feedback operational amplifier structure controlled by the reference voltage Vref. The negative feedback operational amplifier structure is as follows: The reference voltage Vref is input to the inverting terminal of the operational amplifier, the output of the operational amplifier is input to the gate of the output transistor M10, the source of the output transistor M10 is grounded, the drain outputs VCC, and the output VCC is input to the non-inverting terminal of the operational amplifier through the voltage-dividing resistors R4 and R5 to form a negative feedback structure.

[0034] The step-down and output sink current module 2 mainly has two functions: (1) Provide a fixed, reliable, and stable output voltage VCC for the internal circuit, reducing the ripple noise from the power supply. Isolate the high voltage from the internal circuit to achieve the functions of a wide power supply voltage input range of 4 - 18V and a high power supply rejection ratio. (2) Change the overall power consumption of the circuit based on the communication protocol output, that is, increase the sink current, output in the form of high and low power consumption of the overall chip as the chip output, and output the serial port signal to the host computer in the form of a current signal. It consists of a group of controllable high-voltage current mirrors (M7, M8), voltage-dividing sampling resistors (R4, R5), and a compensation circuit (C2) to form a negative feedback network to achieve the step-down and voltage-stabilizing functions, and control the output of the controllable high-voltage current mirror to control the magnitude of the sink current of the module.

[0035] To better understand this embodiment, the following further circuit analysis is carried out on this embodiment.

[0036] As Figure 2 shown, the power supply voltage to serial port reception module 1 includes a filter comparison circuit 101 and a threshold control circuit 102. The threshold control circuit 102 controls the input configuration of the reference voltage to achieve the input hysteresis function, and it forms a hysteresis threshold comparison circuit with the filter comparison circuit 101. The programmable input of the power supply voltage VDD is achieved through the hysteresis threshold comparison circuit. The condition for the input rising edge to satisfy the slew rate SR (i.e., the voltage conversion rate Slew Rate) is:

[0037] Among them, is the step response signal of the VDD port, is the threshold voltage, is the time, (▪)represents taking the natural logarithm. Sufficient time needs to be accumulated to trigger the comparator to flip. At the same time, after triggering the comparator to flip, the threshold is inverted to detect the falling edge. This design can reduce the situation of logical input errors caused by interference, noise, etc., and ensure the integrity of the signal.

[0038] According to Kirchhoff's voltage and current laws, a first-order differential equation can be listed, and by solving the equation, the expression of the first-order low-pass filter can be obtained. The expression of the transient differential signal at the input port of the operational amplifier is:

[0039] The threshold control circuit 102 controls the input configuration of the reference voltage to achieve the input hysteresis function. Threshold control can make the input of the voltage have a certain input tolerance, avoiding the output voltage from being unstable due to being too sensitive to non-serial signal changes in the power supply voltage caused by environmental factors. Its working process is that when the input is a rising edge, the transient voltage at port X is greater than that at port Y, and at this time, the output is high level, is low level, is high level. The threshold control circuit injects current into the comparator output load to enhance the high level. At this time, when the falling edge arrives, the voltage difference between port Y and port X needs to be greater than the voltage difference between Vref+ and Vref- to change the output state of the comparator, and the same is true for the rising edge.

[0040] According to the threshold voltage and the transient transfer formula, the minimum slew rate of the power supply voltage input rising edge can be calculated. It should satisfy:

[0041] Through calculation, the rise / fall time should satisfy:

[0042] The input voltage slew rate should satisfy:

[0043] According to the circuit structure, the larger Vt is, the better the suppression effect on the competitive hazards in the digital signal. The control of the maximum rise time of the power supply voltage can be changed by changing the capacitance and resistance values of RC ( ).

[0044] Such as Figure 3 is the detailed structure of the step-down and output sink current module 2: I4 is controlled by the Ctrl switch controlled by the serial port output. I4 and I3 merge to the drain of M7. The drain and gate of M7 are connected to form a diode connection. The gate of M7 and the gate of M8 are connected to form a current mirror. M8 copies the current of M7 and outputs it from the drain to the source of M9. The gate of M9 is controlled by Vb. The drain output of M9 is used as VCC to supply power to other circuit modules. VCC is divided by R4 and R5 and fed back to the non-inverting input terminal of the operational amplifier. There is a capacitor C2 between the non-inverting input terminal of the operational amplifier and VCC for frequency compensation. The output of the operational amplifier is connected to the gate of the output transistor M10. The drain terminal of M10 is connected to VCC to control the output voltage. The negative terminal of the operational amplifier is controlled by the input Vref. The source of M10 is connected to the ground GND.

[0045] The step-down and output sinking current module 2 consists of a logic-controlled current generating current mirror and a group of voltage stabilizing circuits. It converts the input power supply voltage VDD higher than 5V into a 3.4V voltage VCC for internal power supply. Among them, Vref, I4, and I3 are all provided by the internal reference source of the chip, and the ctrl signal is provided by the serial port logic output. The current mirror uses high-voltage MOS transistors. The characteristic of high-voltage MOS transistors is that the drain can carry a large voltage, while the gate-source terminal cannot withstand a large voltage. Since the M7 transistor is the load transistor and M8 is the pressure-bearing transistor for generating current, in the actual circuit, the Vds voltages of M7 and M8 are quite different, and the channel length modulation effect of the M8 transistor is relatively serious. Therefore, the M9 transistor is added to form a cascode structure, which can reduce the large current range caused by the channel length modulation effect. In order to make the output VCC be 3.4V, most of the voltage needs to be borne at the drain of the M9 transistor when the power supply voltage is high.

[0046] Among them, the selection of Vb needs to make M8 and M9 both work in the saturation region. For M8, there is:

[0047] Among them, is the gate-source voltage of transistor M8, is the threshold voltage of transistor M8, i.e., the power supply voltage VDD, is the gate-source voltage of transistor M9, is the source potential of transistor M9; for M9, there is:

[0048] Among them, is the threshold voltage of transistor M9; according to the equations of M8 and M9, we can get: (1) According to the above equation, we can obtain The minimum voltage value is:

[0049] If the power supply voltage is too small, it will cause the current to decrease rapidly.

[0050] According to equation (1), it can be known that under the large current mode and small conditions, it is the most extreme condition for Vb. In the large current mode, and are relatively large. In order to reduce and , the sizes of M8 and M9 should be increased as much as possible under the condition that the area requirement is met.

[0051] Vref is selected as: .

[0052] As Figure 1 shown, the above two modules form the main part of the host computer communication transceiver circuit applicable to high voltage and medium distance. The power supply voltage VDD is input to the power supply voltage to serial port receiving module 1 and parsed into a logic low voltage level signal DataOut, which is input to the internal logic control circuit of the chip. The internal logic control circuit of the chip outputs a logic low voltage to the step-down and output sink current module 2, which is converted into a sink current signal for output. The step-down and output sink current module 2 also generates a low voltage power supply VCC to supply power to other internal modules of the chip and the power supply voltage to serial port receiving module 1.

[0053] In summary, power supply and communication with the host computer can be achieved by using two external interfaces. As Figure 4 shown, the peripheral circuit Ve of the host computer single chip microcomputer generates a high voltage level signal, which is input to the twisted pair through the equivalent resistance Re of the voltage source and the output impedance . The twisted pair serves as the VDD and GND of the sensor. The transceiver circuit inside the sensor can be equivalent to a current source Ictrl controlled by the serial port output. By changing the current flowing through the twisted pair, the communication function can be achieved.

[0054] In another embodiment, the present application also discloses a sensor chip, which includes the multiplexing circuit disclosed in the above embodiment.

[0055] The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application. Any technical solution falling within the scope defined by the claims of the present invention falls within the protection scope of the present invention.

[0056] The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application. Any technical solution falling within the scope defined by the claims of the present invention falls within the protection scope of the present invention.

Claims

1. A power supply voltage and communication serial port multiplexing circuit, the multiplexing circuit is applied to a sensor chip, characterized in that: The multiplexing circuit comprises: A power supply voltage to serial port receiving module, working under the bias of the low voltage power supply VCC, is used to convert the power supply voltage VDD into a logic low voltage level signal DataOut; wherein the logic low voltage level signal DataOut is supplied to the sensor chip; The step-down and output current sink module is used to convert the power supply voltage VDD into a low-voltage power supply VCC; wherein the low-voltage power supply VCC supplies the power supply voltage to the serial port receiving module and the sensor chip.

2. The power supply voltage and communication serial port multiplexing circuit according to claim 1, characterized in that: The power supply voltage to serial port receiving module includes a filtering comparison circuit and a threshold control circuit. The filtering comparison circuit includes a low-pass filter, a comparator and voltage-dividing resistors R2 and R3. The power supply voltage VDD is input to the first input terminal of the comparator after being divided by R2 and R3. The power supply voltage VDD is input to the second input terminal of the comparator after being divided by R2 and R3 and filtered by the low-pass filter. The output terminal of the comparator is connected to the input terminal of the threshold control circuit.

3. The power supply voltage and communication serial port multiplexing circuit according to claim 2, characterized in that: The low-pass filter includes a resistor R1 and a capacitor C1, and the comparator includes MOS tubes M1, M2, M3, and M4; the low-pass filter formed by the resistor R1 and the capacitor C1 is connected between one end of the resistor R3 and the gate of the tube M2, and the other end of the resistor R3 and one end of the capacitor C1 are both grounded GND; the resistors R2 and R3 are connected in series between the power supply voltage VDD and the ground GND, the low-voltage end of the resistor R2 is connected to the gate of the tube M1, the tubes M1 and M2 form a differential input pair, the tubes M3 and M4 form a current mirror structure, the sources of M1 and M2 are connected, the drains of M1 and M2 are respectively connected to the drains of M3 and M4, the sources of M3 and M4 are both grounded, and the gate and drain of M3 are short-circuited.

4. The power supply voltage and communication serial port multiplexing circuit according to claim 3, characterized in that: The filtering and comparing circuit further comprises a constant current source I1 , a negative electrode of the constant current source I1 is connected to the source electrodes of the tubes M1 and M2 , and a positive electrode of the constant current source I1 is connected to the low voltage power supply VCC.

5. The power supply voltage and communication serial port multiplexing circuit according to claim 3 or 4, characterized in that: The threshold control circuit includes a buffer B1 and an inverter N1, the drain of the tube M4 is connected to the input end of the buffer B1, the output end of the buffer B1 is connected to the input end of the inverter N1, and the output end of the buffer B1 outputs the logic low voltage level signal DataOut.

6. The power supply voltage and communication serial port multiplexing circuit according to claim 5, characterized in that: The threshold control circuit also includes MOS tubes M5 and M6. The gate of tube M5 is connected to the Vref+ terminal and the Vref- terminal through switches K1 and K3 respectively. The gate of tube M6 is connected to the Vref+ terminal and the Vref- terminal through switches K2 and K4 respectively. The sources of tubes M5 and M6 are connected. The drains of tubes M5 and M6 are connected to the drains of tubes M2 and M1 respectively.

7. The power supply voltage and communication serial port multiplexing circuit according to claim 6, characterized in that: The threshold control circuit further includes a constant current source I2, a negative electrode of the constant current source I2 is connected to the source electrodes of the tubes M5 and M6, and a positive electrode of the constant current source I2 is connected to the low voltage power supply VCC.

8. The power supply voltage and communication serial port multiplexing circuit according to claim 1, characterized in that: The step-down and output current sinking module comprises MOS tubes M7, M8, M9, M10, resistors R4, R5, capacitor C2 and an operational amplifier; wherein the tubes M7 and M8 form a current mirror structure, and the sources of the tubes M7 and M8 are both connected to the power supply voltage VDD, the drain of the tube M8 is connected to the source of the tube M9, the drain of the tube M9 is connected to the drain of the tube M10, the source of the tube M10 is grounded GND, the resistors R4 and R5 are connected in series between the drain of the tube M9 and the ground GND, the low voltage end of the resistor R4 is connected to the in-phase end of the operational amplifier, the capacitor C2 is connected between the drain of the tube M9 and the in-phase end of the operational amplifier, the inverting end of the operational amplifier is connected to the Vref terminal, and the drain of the tube M9 is connected to the VCC terminal.

9. The power supply voltage and communication serial port multiplexing circuit according to claim 8, characterized in that: The step-down and output current sinking module also includes constant current sources I3 and I4; wherein the positive electrode of the constant current source I3 is connected to the drain of the tube M7, and the negative electrode is grounded; the positive electrode of the constant current source I4 is connected to the drain of the tube M7 through the Ctrl switch, and the negative electrode is grounded.

10. A sensor chip, characterized in that: Comprising the multiplexing circuit as described in any one of claims 1-9.

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