Quick-response PTC circuit protection device

Abstract

The invention relates to a quick-response PTC circuit protection device. Comprising a dielectric substrate layer, first and second high resistance layers disposed in spaced apart relationship on a top surface of the substrate layer to define a gap therebetween, a PTC layer disposed on the top surface of the substrate layer in the gap and in contact with the first and second high resistance layers, a mask layer covering a top surface of the PTC layer and portions of top surfaces of the first and second high resistance layers, a conductive first terminal covering a first longitudinal end of the base layer and an outermost end of the first high resistance layer remote from the PTC layer, and a conductive second terminal covering a second longitudinal end of the base layer and an outermost end of the second high resistance layer remote from the PTC layer.

Description

FIELD OF THE DISCLOSURE

[0001] The present disclosure generally relates to the field of circuit protection devices. More specifically, the present disclosure relates to a circuit protection device that includes a positive temperature coefficient element and is configured to respond quickly to an overcurrent condition. BACKGROUND OF THE DISCLOSURE

[0002] Fuses are commonly used as circuit protection devices and are typically installed between a power source and components in a circuit to be protected. Conventional fuses include a fusible element disposed within a hollow, electrically insulating fuse body. In the event of a fault condition, such as an overcurrent condition, the fusible element melts or otherwise separates to interrupt the flow of current through the fuse.

[0003] When the fusible element of a fuse separates due to an overcurrent condition, an arc may sometimes propagate through the air between the separated portions of the fusible element (e.g., through evaporated particles of the melted fusible element). If not extinguished, this arc may allow a substantial amount of subsequent current to flow from the power source to the protected components in the circuit, resulting in damage to the protected components despite the physical disconnection of the fusible element.

[0004] One solution that has been implemented to eliminate arcs in fuses is to replace the fusible element of the fuse with a positive temperature coefficient (PTC) element. A PTC element is formed from a PTC material, which consists of conductive particles suspended in a non-conductive medium (e.g., a polymer). The PTC material exhibits a relatively low resistance within a normal operating temperature range. However, when the temperature of the PTC material exceeds the normal operating temperature range and reaches a "trip temperature," such as may be caused by an excessive current flowing through the PTC material, the resistance of the PTC material increases sharply. This increase in resistance alleviates or prevents the flow of current through the PTC element. Subsequently, when the PTC material cools (e.g., when the overcurrent condition subsides), the resistance of the PTC material decreases, and the PTC element becomes conductive again. The PTC element thus acts as a resettable fuse. Since the PTC element does not physically disconnect in the manner of a fusible element, there is no opportunity for arc formation or propagation.

[0005] The time required for a PTC element to heat up and reach its trip temperature in response to an overcurrent condition is typically referred to as the "trip time." The trip time of conventional PTC circuit protection devices is typically on the order of several seconds. However, there is an increasing need for PTC circuit protection devices with a much faster trip time on the order of, for example, tens or hundreds of milliseconds. It is in view of these and other factors that the present improvements may be useful. SUMMARY OF THE DISCLOSURE

[0006] This summary is provided to introduce some concepts in a simplified form that will be further described in the detailed description below. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to assist in determining the scope of the claimed subject matter.

[0007] A positive temperature coefficient (PTC) circuit protection device according to an embodiment of the present disclosure may include a dielectric base layer, first and second high-resistance layers disposed on the top surface of the base layer in a spaced-apart relationship to define a gap therebetween, a PTC layer disposed on the top surface of the base layer in the gap and in contact with the first high-resistance layer and the second high-resistance layer, a mask layer covering the top surface of the PTC and portions of the top surfaces of the first and second high-resistance layers, a conductive first terminal covering the first longitudinal end of the base layer and the outermost end of the first high-resistance layer remote from the PTC layer, and a conductive second terminal covering the second longitudinal end of the base layer and the outermost end of the second high-resistance layer remote from the PTC layer.

[0008] A PTC circuit protection device according to another embodiment of the present disclosure may include a dielectric base layer, a PTC layer disposed on the top surface of the base layer, first and second high-resistance layers disposed on the top surface of the PTC layer in a spaced-apart relationship to define a gap therebetween, the PTC layer having an effective portion directly below the gap, a mask layer covering the top surfaces of the first and second high-resistance layers and covering the PTC layer in the gap, a conductive first terminal covering the first longitudinal end of the base layer and the outermost end of the first high-resistance layer remote from the PTC layer, and a conductive second terminal covering the second longitudinal end of the base layer and the outermost end of the second high-resistance layer remote from the PTC layer.

[0009] A PTC circuit protection device according to another embodiment of the present disclosure may include a dielectric base layer having a first hole and a second hole formed therethrough, first and second high-resistance layers disposed on the top surface of the base layer in a spaced-apart relationship to define a gap therebetween, wherein the first high-resistance layer has a first contact portion extending into the first hole and the second high-resistance layer has a second contact portion extending into the second hole, a PTC layer disposed on top of the first and second high-resistance layers and having an effective portion extending into the gap, a mask layer covering the top surface of the PTC layer, a conductive first terminal disposed on the bottom surface of the base layer and in contact with the first contact portion of the first high-resistance layer, and a conductive second terminal disposed on the bottom surface of the base layer and in contact with the second contact portion of the second high-resistance layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1A is a perspective view showing a circuit protection device according to an exemplary embodiment of the present disclosure;

[0011] Figure 1B is showing Figure 1AExploded view of the circuit protection device shown in;

[0012] Figure 2A is a perspective view showing a circuit protection device according to another exemplary embodiment of the present disclosure;

[0013] Figure 2B shows Figure 2A the exploded view of the circuit protection device shown in;

[0014] Figure 3A is a perspective view showing a circuit protection device according to another exemplary embodiment of the present disclosure;

[0015] Figure 3B shows Figure 3A a cross-sectional view of the circuit protection device shown in.

[0016] Figure 3C shows Figure 2A the exploded view of the circuit protection device shown in. Detailed Description

[0017] Exemplary embodiments of a circuit protection device according to the present disclosure will now be described more fully hereinafter with reference to the accompanying drawings. However, the circuit protection device may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will convey certain exemplary aspects of the circuit protection device to those skilled in the art.

[0018] Referring to Figure 1A and Figure 1B , a perspective view and an exploded view showing a positive temperature coefficient (PTC) circuit protection device 10 (hereinafter referred to as "device 10") according to an exemplary embodiment of the present disclosure are shown. For convenience and clarity, terms such as "front", "rear", "top", "bottom", "upper", "lower", "above", "below", "lateral", "longitudinal", etc. may be used herein to describe the relative placement and orientation of the various components of device 10, each component relative to the Figure 1A and Figure 1B geometry and orientation of device 10 as it appears in. The terms will include the specifically mentioned words, their derivatives, and words of similar meaning.

[0019] Device 10 may include a planar base layer 12 having first and second high resistance layers 14a, 14b disposed on its top surface in a longitudinally spaced-apart arrangement to define a gap 16 therebetween. As Figure 1A best shown, the outermost longitudinal edges of the first and second high resistance layers 14a, 14b may be flush with the corresponding longitudinal edges of the base layer 12. The present disclosure is not limited thereto.

[0020] The base layer 12 may be formed of a dielectric material such as FR-4, ceramic, etc. The first and second high-resistance layers 14a, 14b may be formed of a high-resistance conductive material. In a non-limiting example, the first and second high-resistance layers 14a, 14b may be metal foils made of nickel-phosphorus plated with copper. In another non-limiting example, the first and second high-resistance layers 14a, 14b may be metal foils made of nickel-chromium alloy. More generally, the first and second high-resistance layers 14a, 14b may be formed of a material having a resistivity in the range of 10 0 Ohm / to 10 3 Ohm / .

[0021] In various embodiments, the base layer 12 and the first and second high-resistance layers 14a, 14b may respectively have castellations 15a, 15b and 17a, 17b formed in their outermost longitudinal ends. The present disclosure is not limited thereto.

[0022] The device 10 may further include a PTC layer or plate 18 (hereinafter referred to as "PTC layer 18") disposed on the base layer 12 in the gap 16 and in contact with the first and second high-resistance layers 14a, 14b. The PTC layer 18 may be formed of any type of PTC material, which is composed of conductive particles suspended in a non-conductive medium (e.g., polymer PTC material, ceramic PTC material, etc.) and is formulated to have a resistance that increases as the temperature of the PTC element 18 increases. In particular, the PTC layer 18 may have a predetermined "trip temperature" at which the resistance of the PTC layer 18 rapidly and sharply increases (e.g., in a non-linear manner) to substantially block the current passing through it. In a non-limiting exemplary embodiment of the device 10, the trip temperature of the PTC layer 18 may be in the range of 50 degrees Celsius to 220 degrees Celsius. In various embodiments, the PTC layer 18 may be applied to the base layer 12 in a solid or liquid state during the manufacture of the device 10. The present disclosure is not limited thereto.

[0023] The device 10 may further include a mask layer 20 disposed on top of the PTC layer 18 and the first and second high-resistance layers 14a, 14b. In various embodiments, the mask layer 20 may be made of epoxy resin. The present disclosure is not limited thereto. As Figure 1A best shown, the outermost longitudinal edges of the mask layer 20 may completely cover the PTC layer 18, but may extend longitudinally shorter than the outermost longitudinal edges of the first and second high-resistance layers 14a, 14b, thereby exposing portions of the top surfaces of the first and second high-resistance layers 14a, 14b for terminal electroplating, as further described below.

[0024] The apparatus 10 may further include third and fourth high-resistance layers 22a, 22b and a mask layer 24 disposed on the lower side of the base layer 12. The third and fourth high-resistance layers 22a, 22b and the mask layer 24 are substantially mirror images of the first and second high-resistance layers 14a, 14b and the mask layer 20 on the top side of the base layer 12. It is desirable for the mask layer 20 to fill the gap 25 between the third and fourth high-resistance layers 22a, 22b because there is no PTC layer on the lower side of the base layer 12. The third and fourth high-resistance layers 22a, 22b and the mask layer 24 are provided to facilitate process uniformity during the manufacture of the apparatus 10 and may be omitted from the apparatus 10 in various embodiments without departing from the scope of the present disclosure.

[0025] The apparatus 10 may further include conductive first and second terminals 26a, 26b formed on its longitudinal ends to facilitate electrical connection of the apparatus 10 within a circuit (e.g., surface mounting the apparatus 10 on a circuit board). The first terminal 26a may cover the exposed portion of the top surface of the first high-resistance layer 14a; the recessed portions of the corresponding longitudinal edges of the first high-resistance layer 14a, the base layer 12, and the third high-resistance layer 22a; and the exposed portion of the bottom surface of the third high-resistance layer 22a. Similarly, the second terminal 26b may cover the exposed portion of the top surface of the second high-resistance layer 14b; the recessed portions of the corresponding longitudinal edges of the second high-resistance layer 14b, the base layer 12, and the fourth high-resistance layer 22b; and the exposed portion of the bottom surface of the fourth high-resistance layer 22b.

[0026] During normal operation, the apparatus 10 may be connected in a circuit between a power source and a load (e.g., via soldering connections of the first and second terminals 26a, 26b to corresponding terminals on a circuit board), and current may flow from the first terminal 26a through the apparatus 10, to the first high-resistance layer 14a, to the PTC layer 18, to the second high-resistance layer 14b, to the second terminal 26b, or vice versa.

[0027] When an overcurrent condition occurs, where the current flowing through the apparatus 10 causes the PTC element 18 to reach a temperature within its normal trip temperature range, the resistance of the PTC element 18 may increase rapidly and substantially block the current flowing through it, thereby protecting the connected circuit components from damage that the overcurrent condition might otherwise cause. Once the overcurrent condition subsides and the PTC element 18 cools to a temperature below its normal trip temperature range, the PTC element 18 may become conductive again, and the apparatus 10 may resume normal operation.

[0028] Advantageously, the amount of PTC material in the PTC layer 18 of the device 10 is significantly less than the amount of PTC material used in a conventional PTC circuit protection device of similar size. For example, the amount of PTC material in the PTC layer 18 can range from 0.1 milligrams to 1 milligram, or be about 10% or less of the amount of PTC material used in a conventional PTC circuit protection device of similar size. Accordingly, the heat capacity of the PTC layer 18 is greatly reduced relative to a conventional PTC circuit protection device, resulting in a significantly faster tripping time relative to a conventional PTC circuit protection device of similar size. For example, the device 10 can have a tripping time in the range of 10 -1 milliseconds to 10 3 milliseconds. The present disclosure is not limited thereto. Further, due to the first and second high-resistance layers 14a, 14b, the device 10 can exhibit a relatively high resistance, similar to a conventional PTC circuit protection device of similar size, even though the amount of PTC material has been reduced. Additionally, the resistance of the device 10 can be easily adjusted / modified by changing the geometry (e.g., width and / or thickness) of the first and second high-resistance layers 14a, 14b. Still further, during an overcurrent condition in the device 10, the first and second high-resistance layers 14a, 14b can act as heaters, which accelerate the heating of the PTC layer 18, thereby further reducing the tripping time of the device 10.

[0029] Reference Figure 2A and Figure 2B , shows a perspective view and an exploded view of another PTC circuit protection device 110 (hereinafter referred to as "device 110") illustrating an exemplary embodiment in accordance with the present disclosure. For convenience and clarity, terms such as "front", "rear", "top", "bottom", "upper", "lower", "above", "below", "lateral", "longitudinal", etc. may be used herein to describe the relative placement and orientation of the various components of the device 110, each component relative to the geometry and orientation of the device 110 as it appears in Figure 2A and Figure 2B . The terms will include the specifically mentioned words, their derivatives, and words of similar meaning.

[0030] The device 110 can include a planar base layer 112, a planar PTC layer 118 having a central active portion 118a (described in more detail hereinafter) disposed on top of the base layer 112, and first and second high-resistance layers 114a, 114b disposed on top of the PTC layer 118 in a longitudinally spaced-apart arrangement to define a gap 116 therebetween, wherein the active portion 118a of the PTC layer 118 is located directly below the gap 116. As Figure 2AAs best shown, the base layer 112 and the PTC layer 118 can have substantially the same length and width, and the outermost longitudinal edges of the first and second high-resistance layers 114a, 114b can be flush with the corresponding longitudinal edges of the base layer 12 and the PTC layer 18. The present disclosure is not limited thereto.

[0031] The base layer 112 can be formed of a dielectric material such as FR-4, ceramics, etc. The PTC layer 118 can be formed of any type of PTC material (e.g., polymer PTC material, ceramic PTC material, etc.) that is formulated to have a resistance that increases as the temperature of the PTC element 118 increases. In particular, the PTC layer 118 can have a predetermined "trip temperature" above which the resistance of the PTC layer 118 rapidly and sharply increases (e.g., in a non-linear manner) to substantially block the current passing therethrough. In a non-limiting exemplary embodiment of the device 110, the trip temperature of the PTC layer 118 can be in the range of 50 degrees Celsius to 220 degrees Celsius. In various embodiments, the PTC layer 118 can be applied to the base layer 12 in a solid or liquid state during the manufacture of the device 10. The present disclosure is not limited thereto.

[0032] The first and second high-resistance layers 114a, 114b can be formed of a high-resistance conductive material. In a non-limiting example, the first and second high-resistance layers 114a, 114b can be metal foils made of nickel-phosphorus plated with copper. In another non-limiting example, the first and second high-resistance layers 114a, 114b can be metal foils made of nickel-chromium alloy. More generally, the first and second high-resistance layers 114a, 114b can be formed of a material having a surface resistivity in the range of 10 0 Ohm / square to 10 3 Ohm / square.

[0033] In various embodiments, the base layer 112, the PTC layer 118, and the first and second high-resistance layers 114a, 114b can respectively have grooves 115a, 115b, 117a, 117b and 119a, 119b formed in their outermost longitudinal ends. The present disclosure is not limited thereto.

[0034] The device 110 can further include a mask layer 120 disposed on top of the first and second high-resistance layers 114a, 114b and within the gap 116. In various embodiments, the mask layer 120 can be made of epoxy resin. The present disclosure is not limited thereto. As Figure 2A best shown, the outermost longitudinal edges of the mask layer 120 can extend longitudinally to be shorter than the outermost longitudinal edges of the first and second high-resistance layers 114a, 114b, thereby exposing portions of the top surfaces of the first and second high-resistance layers 114 for terminal electroplating, as further described below.

[0035] The device 110 may also include third and fourth high-resistance layers 122a, 122b and a mask layer 124 disposed on the lower side of the base layer 112, which are substantially mirror images of the first and second high-resistance layers 114a, 114b and the mask layer 120 on top of the PTC layer 112. The third and fourth high-resistance layers 122a, 122b and the mask layer 124 are provided to facilitate process uniformity during the manufacture of the device 110 and may be omitted from the device 110 in various embodiments without departing from the scope of the present disclosure.

[0036] The device 110 may also include conductive first and second terminals 126a, 126b formed on its longitudinal ends to facilitate electrical connection of the device 110 within a circuit (e.g., surface mounting the device 110 on a circuit board). The first terminal 126a may cover the exposed portion of the top surface of the first high-resistance layer 114a; the groove portions of the corresponding longitudinal edges of the first high-resistance layer 114a, the PTC layer 118, the base layer 112 and the third high-resistance layer 122a, and the exposed portion of the bottom surface of the third high-resistance layer 122a. Similarly, the second terminal 126b may cover the exposed portion of the top surface of the second high-resistance layer 114b; the groove portions of the corresponding longitudinal edges of the second high-resistance layer 114b, the PTC layer 118, the base layer 112 and the fourth high-resistance layer 122b, and the exposed portion of the bottom surface of the fourth high-resistance layer 122b.

[0037] During normal operation, the device 110 may be connected in a circuit between a power supply and a load (e.g., via soldering connections of the first and second terminals 126a, 126b to corresponding terminals on a circuit board), and current may flow from the first terminal 126a through the device 110, to the first high-resistance layer 114a, to the active portion 118a of the PTC layer 118, to the second high-resistance layer 114b, to the second terminal 126b, or vice versa. Since the PTC layer 118 exhibits a much greater resistance than the first and second high-resistance layers 114a, 114b (i.e., even when the PTC layer 118 is in a normal, non-tripped state), current will flow through the first and second high-resistance layers 114, 114b and will not directly short-circuit through the PTC layer 118. That is, current will not flow through the PTC layer 118 except by bridging the active portion 118a of the first and second high-resistance layers 114a, 114b.

[0038] When an overcurrent condition occurs, where the current flowing through device 110 causes the PTC element 118 to reach a temperature within its normal trip temperature range, the resistance of the PTC element 118 may rapidly increase and substantially block the current flowing through it, thereby protecting the connected circuit components from damage that the overcurrent condition might otherwise cause. Once the overcurrent condition subsides and the PTC element 118 cools to a temperature below its normal trip temperature range, the PTC element 118 can become conductive again, and device 110 can resume normal operation.

[0039] Advantageously, the amount of PTC material in the effective portion 118a of the PTC layer 118 of device 110 is significantly less than the amount of PTC material used in a conventional PTC circuit protection device of a similar size. For example, the amount of PTC material in the effective portion 118a can be in the range of 0.1 milligrams to 1 milligram, or about 10% or less of the amount of PTC material used in a conventional PTC circuit protection device of a similar size. Accordingly, the heat capacity of the effective portion 118a of the PTC layer 118 is greatly reduced relative to conventional PTC circuit protection devices, resulting in a significantly faster trip time relative to conventional PTC circuit protection devices of a similar size. For example, device 110 can have a trip time in the range of 10 -1 milliseconds to 10 3 milliseconds. The present disclosure is not limited thereto. Additionally, due to the first and second high-resistance layers 114a, 114b, device 10 can exhibit a relatively high resistance, similar to a conventional PTC circuit protection device of a similar size, even though the amount of PTC material has been reduced. Further, the resistance of device 110 can be easily adjusted / modified by changing the geometry (e.g., width and / or thickness) of the first and second high-resistance layers 114a, 114b. Still further, during an overcurrent condition in device 110, the first and second high-resistance layers 114a, 114b can act as heaters, which accelerate the heating of the effective portion 118a of the PTC layer 118, thereby further reducing the trip time of device 110.

[0040] Reference Figures 3A - 3C , a perspective view, a cross-sectional view, and an exploded view of another PTC circuit protection device 210 (hereinafter referred to as "device 210") illustrating an exemplary embodiment in accordance with the present disclosure are shown. For convenience and clarity, terms such as "front", "rear", "top", "bottom", "upper", "lower", "above", "below", "lateral", "longitudinal", etc. may be used herein to describe the relative placement and orientation of the various components of device 210, with each component relative to the geometry and orientation of device 210 as it appears in Figures 3A - 3C . The terms will include the specifically mentioned words, their derivatives, and words having similar meanings.

[0041] The device 210 may include a planar base layer 212 having first and second holes or vias 213, 215 formed therethrough, wherein the first and second holes 213, 215 are spaced apart from each other along the length of the base layer 212. The device may further include first and second high-resistance layers 214a, 214b disposed on the top surface of the base layer 212 in a longitudinally spaced-apart arrangement to define a gap 216 therebetween. The first and second high-resistance layers 214a, 214b may include respective first contact portions 217a and second contact portions 217b extending into the first hole 213 and the second hole 215 in the base layer 212, respectively.

[0042] The device 210 may further include a PTC layer 218 disposed on top of the first and second high-resistance layers 214a, 214b and having a central active portion 218a (described in more detail below) extending into the gap 216. As Figure 3A and Figure 3B best shown, the base layer 212 and the PTC layer 218 may have substantially the same length and width, and the outermost longitudinal edges of the first and second high-resistance layers 214a, 214b may be flush with the corresponding longitudinal edges of the base layer 212 and the PTC layer 218. The present disclosure is not limited thereto.

[0043] The base layer 212 may be formed of a dielectric material such as FR-4, ceramic, etc. The PTC layer 218 may be formed of any type of PTC material (e.g., polymer PTC material, ceramic PTC material, etc.) that is formulated to have a resistance that increases as the temperature of the PTC element 218 increases. In particular, the PTC layer 218 may have a predetermined "trip temperature" above which the resistance of the PTC layer increases rapidly and steeply (e.g., in a non-linear manner) to substantially block the current therethrough. In a non-limiting exemplary embodiment of the device 210, the trip temperature of the PTC layer 218 may be in the range of 50 degrees Celsius to 220 degrees Celsius. In various embodiments, the PTC layer 218 may be applied to the base layer 112 in a solid or liquid state during the manufacture of the device 110. The present disclosure is not limited thereto.

[0044] The first and second high-resistance layers 214a, 214b may be formed of a high-resistance conductive material. In a non-limiting example, the first and second high-resistance layers 214a, 214b may be metal foils made of nickel-phosphorus plated with copper. In another non-limiting example, the first and second high-resistance layers 214a, 214b may be metal foils made of nickel-chromium alloy. More generally, the first and second high-resistance layers 214a, 214b may have a surface resistivity in 10 0 Ohm / to 10 3formed of materials within the Ohm / range.

[0045] The device 210 may further include a mask layer 220 disposed on top of the PTC layer 218. In various embodiments, the mask layer 220 may be made of epoxy resin. As Figure 3A best shown, the mask layer 220 may have substantially the same length and width as the PTC layer 218 and may completely cover the PTC layer 218. The present disclosure is not limited thereto.

[0046] The device 210 may further include conductive first and second terminals 226a, 226b that are disposed on the bottom surface of the base layer 212 in a longitudinally spaced arrangement to facilitate electrical connection of the device 210 within a circuit (e.g., surface mounting the device 210 on a circuit board). As Figure 3B best shown, the first terminal 226a may contact a first contact portion 217a of the first high resistance layer 214a, and the second terminal 226b may contact a second contact portion 217b of the second high resistance layer 214.

[0047] During normal operation, the device 210 may be connected in a circuit between a power source and a load (e.g., via soldering connections of the first and second terminals 226a, 226b to corresponding terminals on a circuit board), and current may flow from the first terminal 226a through the device 210, to the first high resistance layer 214a, to the effective portion 218a of the PTC layer 218, to the second high resistance layer 214b, to the second terminal 226b, or vice versa.

[0048] When an overcurrent condition occurs, wherein the current flowing through the device 210 causes the PTC element 218 to reach a temperature within its normal trip temperature range, the resistance of the PTC element 218 may rapidly increase and substantially block the current flowing therethrough, thereby protecting the connected circuit components from damage that the overcurrent condition might otherwise cause. Once the overcurrent condition subsides and the PTC element 218 cools to a temperature below its normal trip temperature range, the PTC element 218 may become conductive again, and the device 210 may resume normal operation.

[0049] Advantageously, the amount of PTC material in the effective portion 218a of the PTC layer 218 of the device 210 is significantly less than the amount of PTC material used in a conventional PTC circuit protection device of similar size. For example, the amount of PTC material in the effective portion 218a can range from 0.1 milligrams to 1 milligram, or be about 10% or less of the amount of PTC material used in a conventional PTC circuit protection device of similar size. Accordingly, the heat capacity of the effective portion 218a of the PTC layer 218 is greatly reduced relative to a conventional PTC circuit protection device, resulting in a significantly faster trip time relative to a conventional PTC circuit protection device of similar size. For example, the device 210 can have a trip time in the range of 10 -1 milliseconds to 10 3 milliseconds. The present disclosure is not limited to this. Further, due to the first and second high resistance layers 214a, 214b, the device 210 can exhibit a relatively high resistance, similar to a conventional PTC circuit protection device of similar size, even though the amount of PTC material has been reduced. Additionally, the resistance of the device 210 can be easily adjusted / modified by changing the geometry (e.g., width and / or thickness) of the first and second high resistance layers 214a, 214b. Still further, during an overcurrent condition in the device 210, the first and second high resistance layers 114a, 114b can act as heaters, which accelerate the heating of the effective portion 218a of the PTC layer 218, thereby further reducing the trip time of the device 210.

[0050] As used herein, an element or step recited in the singular and preceded by the word "a" or "an" should be understood as not excluding plural elements or steps, unless such exclusion is explicitly recited. Additionally, a reference to "one embodiment" of the present disclosure is not to be construed as excluding the existence of additional embodiments that also incorporate the recited features.

[0051] While the present disclosure has been referenced to certain embodiments, many modifications, alterations, and changes to the described embodiments are possible without departing from the breadth and scope of the present disclosure as defined in the appended claims. Accordingly, it is intended that the present disclosure not be limited to the described embodiments, but rather that it have the full scope defined by the language of the following claims and their equivalents.

Claims

1. A positive temperature coefficient (PTC) circuit protection device, comprising: a dielectric base layer; a first high-resistance layer and a second high-resistance layer, which are disposed on the top surface of the base layer in a spaced-apart relationship to define a gap therebetween; a PTC layer, which is disposed on the top surface of the base layer in the gap and is in contact with the first high-resistance layer and the second high-resistance layer; a mask layer, which covers the top surface of the PTC layer and a part of the top surfaces of the first high-resistance layer and the second high-resistance layer; a conductive first terminal, which covers the first longitudinal end of the base layer and the outermost end of the first high-resistance layer away from the PTC layer; and a conductive second terminal, which covers the second longitudinal end of the base layer and the outermost end of the second high-resistance layer away from the PTC layer.

2. The PTC circuit protection device according to claim 1, wherein the conductive first terminal extends on the exposed portion of the top surface of the first high-resistance layer, and wherein the conductive second terminal extends on the exposed portion of the top surface of the second high-resistance layer.

3. The PTC circuit protection device according to claim 1, wherein the trip temperature of the PTC layer is in the range of 50 degrees Celsius to 220 degrees Celsius.

4. The PTC circuit protection device according to claim 1, wherein the amount of PTC material in the PTC layer is in the range of 0.1 mg to 1 mg.

5. The PTC circuit protection device according to claim 1, wherein The first high-resistance layer and the second high-resistance layer are formed of a material having a resistivity in the range of 10 0 Ohm / to 10 3 Ohm / .

6. The PTC circuit protection device according to claim 1, wherein the first high-resistance layer and the second high-resistance layer are metal foils made of nickel-phosphorus plated with copper.

7. The PTC circuit protection device according to claim 1, wherein the first high-resistance layer and the second high-resistance layer are metal foils made of nickel-chromium alloy.

8. The PTC circuit protection device according to claim 1, wherein the mask layer is made of epoxy resin.

9. A positive temperature coefficient (PTC) circuit protection device, comprising: a dielectric base layer; a PTC layer, which is disposed on the top surface of the base layer; a first high-resistance layer and a second high-resistance layer, which are disposed on the top surface of the PTC layer in a spaced-apart relationship to define a gap therebetween, and the PTC layer has an effective portion directly below the gap; a mask layer, which covers the top surfaces of the first high-resistance layer and the second high-resistance layer and covers the PTC layer in the gap; a conductive first terminal, which covers the first longitudinal end of the base layer and the outermost end of the first high-resistance layer away from the PTC layer; and a conductive second terminal, which covers the second longitudinal end of the base layer and the outermost end of the second high-resistance layer away from the PTC layer.

10. The PTC circuit protection device according to claim 9, wherein the conductive first terminal extends on the exposed portion of the top surface of the first high-resistance layer, and wherein the conductive second terminal extends on the exposed portion of the top surface of the second high-resistance layer.

11. The PTC circuit protection device according to claim 9, wherein, the trip temperature of the PTC layer is in the range of 50 degrees Celsius to 220 degrees Celsius.

12. The PTC circuit protection device according to claim 9, wherein, the amount of PTC material in the effective part of the PTC layer is in the range of 0.1 mg to 1 mg.

13. The PTC circuit protection device according to claim 9, wherein, The first high-resistance layer and the second high-resistance layer are formed of a material having a resistivity in the range of 10 0 Ohm / square to 10 3 Ohm / square.

14. The PTC circuit protection device according to claim 9, wherein, the first high-resistance layer and the second high-resistance layer are metal foils made of nickel-phosphorus plated with copper.

15. The PTC circuit protection device according to claim 9, wherein, the first high-resistance layer and the second high-resistance layer are metal foils made of nickel-chromium alloy.

16. The PTC circuit protection device according to claim 9, wherein, the PTC layer is formed of a polymeric PTC material.

17. A positive temperature coefficient (PTC) circuit protection device, comprising: a dielectric base layer having a first hole and a second hole formed therethrough; a first high-resistance layer and a second high-resistance layer disposed on the top surface of the base layer in a spaced-apart relationship to define a gap therebetween, wherein the first high-resistance layer has a first contact portion extending into the first hole, and the second high-resistance layer has a second contact portion extending into the second hole; a PTC layer disposed on top of the first high-resistance layer and the second high-resistance layer and having an effective portion extending into the gap; a mask layer covering the top surface of the PTC layer; a conductive first terminal disposed on the bottom surface of the base layer and in contact with the first contact portion of the first high-resistance layer; and a conductive second terminal disposed on the bottom surface of the base layer and in contact with the second contact portion of the second high-resistance layer.

18. The PTC circuit protection device according to claim 17, wherein, the trip temperature of the PTC layer is in the range of 50 degrees Celsius to 220 degrees Celsius.

19. The PTC circuit protection device according to claim 17, wherein, the amount of PTC material in the effective part of the PTC layer is in the range of 0.1 mg to 1 mg.

20. The PTC circuit protection device according to claim 17, wherein, The first high-resistance layer and the second high-resistance layer are formed of a material having a resistivity in the range of 10 0 Ohm / square to 10 3 Ohm / square.

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