A dual power automatic transfer switch control circuit, control method and electronic equipment

Abstract

The present invention discloses a dual-power automatic transfer switch control circuit, control method and electronic device. The phase difference between the common power supply and the backup power supply is monitored in real time by a phase synchronization detection circuit. When the motor drive circuit starts to perform the switching action, the microprocessor dynamically adjusts the voltage action threshold and the frequency action threshold according to the power phase signal output by the phase synchronization detection circuit within a preset time period. This dynamic adjustment mechanism can avoid the influence of voltage and frequency abnormalities caused by transient current on the logical judgment of the microprocessor, effectively reduce the frequency of erroneous switching of the dual power supplies, and ensure that the load can obtain power supply continuously and stably. During the switching transition period, the phase window information of the used power supply and the shelved power supply is compared in real time to identify the phase difference between the residual voltage and the backup power supply. By dynamically adjusting the voltage / frequency action threshold, the misjudgment caused by transient impact current is avoided, thereby preventing the PC-level ATSE from malfunctioning under non-fault conditions.

Description

Technical Field

[0001] The present invention relates to the technical field of power supply and distribution, and in particular to a dual-power automatic transfer switch control circuit, a control method and electronic equipment. Background Art

[0002] Dual power automatic transfer switching equipment (ATSE) is used to automatically switch to the backup power source when the main power source fails or becomes unstable, ensuring the continuity and stability of power supply. ATSE can operate under different rated voltages, achieving flexible power switching to meet various practical application requirements.

[0003] ATSEs include PC-class ATSEs (load switch type) and CB-class ATSEs (circuit breaker type). PC-class ATSEs use load switches as actuators and lack short-circuit protection. However, they offer high reliability and fast switching speeds (typically less than 100ms), making them suitable for applications with stringent switching time requirements and loads sensitive to power outages. CB-class ATSEs use circuit breakers as actuators and offer both short-circuit and overload protection, but with relatively slow switching speeds (typically 1-2 seconds), making them suitable for applications requiring short-circuit protection.

[0004] Whether PC-class or CB-class ATSE, the core function is to monitor the status of the primary and backup power sources in real time. When a power source fails (such as voltage anomalies, frequency anomalies, or power outages), the ATSE automatically switches the load to the other power source within a set timeframe. When a PC-class ATSE rapidly switches from the primary to the backup power source, the residual voltage at the load (such as the induced electromotive force of a motor or the residual charge of a capacitor) can be significantly out of phase with the backup power source. Coupled with the extremely fast switching speed of the PC-class ATSE, the two voltages haven't yet decayed to a synchronized state, resulting in a larger transient current (inrush current). This transient current can affect the detection of power supply signals by the dual-power automatic transfer switch (ATS), potentially interfering with the switch's logic. For example, if the backup power source is also faulty, the PC-class ATSE could switch to a disconnected state or switch back to the faulty primary power source, potentially preventing the PC-class ATSE from ensuring power continuity and stability.

[0005] In view of this, it is urgent to design a dual power automatic transfer switch control circuit and control method to effectively avoid the impact of the inrush current generated by PC-level ATSE switching on the logic judgment of the dual power automatic transfer switch device. Summary of the Invention

[0006] In order to solve the above problems, the present invention provides a dual power automatic transfer switch control circuit, a control method and an electronic device.

[0007] In a first aspect of the present invention, a dual-power automatic transfer switch control circuit is provided, comprising a microprocessor, two power supply voltage sampling circuits, two power supply frequency sampling circuits and a motor drive circuit, wherein the input ends of the two power supply voltage sampling circuits are respectively connected to a normal power supply and a backup power supply, the two power supply voltage sampling circuits respectively output power supply voltage signals to the microprocessor, the input ends of the two power supply frequency sampling circuits are respectively connected to a normal power supply and a backup power supply, the two power supply frequency sampling circuits respectively output power supply frequency signals to the microprocessor, the microprocessor outputs a switching action signal to the motor drive circuit to control power switching, and further comprising a phase synchronization detection circuit, the input ends of the phase synchronization detection circuit being respectively connected to a normal power supply and a backup power supply, the phase synchronization detection circuit outputting a power phase signal to the microprocessor; when the motor drive circuit starts to perform a switching action, the microprocessor dynamically adjusts a voltage action threshold and a frequency action threshold according to the power phase signal output by the phase synchronization detection circuit within a preset time period.

[0008] In a second aspect of the present invention, a dual power automatic transfer switch control method is provided, which uses the dual power automatic transfer switch control circuit described above, comprising:

[0009] Real-time acquisition of the voltage signal of the power supply in use, the voltage signal of the power supply on hold, the frequency signal of the power supply in use, the frequency signal of the power supply on hold, the phase signal of the power supply in use, and the phase signal of the power supply on hold;

[0010] Determine whether the power supply voltage signal deviates from the voltage action threshold within a first delay time, and determine whether the power supply frequency signal deviates from the frequency action threshold within a second delay time;

[0011] If the power supply voltage signal deviates from the normal voltage threshold within the first delay time or the power supply frequency signal deviates from the normal frequency threshold within the second delay time, a switching action signal is generated;

[0012] Retrieving the active power phase signal and the on-hold power phase signal respectively according to a preset time window to obtain active power phase window information and on-hold power phase window information;

[0013] Taking the generation time of the switching action signal as the starting time, the voltage action threshold and the frequency action threshold are adjusted according to the commissioning power phase window information and the shelving power phase window information during the subsequent power switching transition period.

[0014] In a third aspect of the present invention, an electronic device is provided, comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the above-mentioned dual power automatic transfer switch control method when executing the computer program.

[0015] Compared with the prior art, the technical solution provided by the present invention has the following beneficial effects:

[0016] When a PC-level ATSE switches, due to the extremely fast switching speed, the phase difference between the residual voltage at the load end and the newly connected power supply voltage may cause a large transient current. The dual-power automatic transfer switch control circuit of the present invention not only monitors voltage and frequency, but also adds phase synchronization detection. The phase difference between the normal power supply and the backup power supply is monitored in real time through the phase synchronization detection circuit. When the motor drive circuit starts to perform the switching action, the microprocessor dynamically adjusts the voltage action threshold and the frequency action threshold within a preset time period according to the power phase signal output by the phase synchronization detection circuit. This dynamic adjustment mechanism can avoid the influence of voltage and frequency abnormalities caused by transient current on the logical judgment of the microprocessor, effectively reduce the frequency of dual power supply erroneous switching, and ensure that the load can obtain continuous and stable power supply.

[0017] The dual-power automatic transfer switch control method of the present invention obtains the phase signals of the active power supply and the idle power supply in real time, takes the phase difference into consideration during switching, optimizes the dual-power switching logic, and identifies the phase difference between the residual voltage and the backup power supply by comparing the phase window information of the active power supply and the idle power supply in real time during the switching transition period. By dynamically adjusting the voltage / frequency action threshold, misjudgment caused by transient impact current is avoided, thereby preventing the PC-level ATSE from malfunctioning in non-fault conditions. The protection parameters are dynamically adjusted in the critical period after switching, allowing short-term impact current to pass through while restoring the standard threshold after stabilization, thus balancing the needs of fast switching and electrical safety.

[0018] The dual-power automatic transfer switch control method of the present invention corrects the voltage / frequency action threshold through phase window information, effectively distinguishes between real power failures and switching transient interference, improves the stability of the equipment under complex working conditions, avoids repeated switching caused by inrush current, reduces mechanical and electrical stress, and extends the service life of the ATSE and load equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a block diagram of a dual power automatic transfer switch control circuit according to an embodiment of the present invention.

[0020] Figure 2 This is a block diagram of a phase synchronization detection circuit according to an embodiment of the present invention.

[0021] Figure 3 This is a schematic diagram of a step-down isolation circuit according to an embodiment of the present invention.

[0022] Figure 4 This is a schematic diagram of a low-pass filter circuit according to an embodiment of the present invention.

[0023] Figure 5This is a schematic diagram of an operational amplifier buffer circuit according to an embodiment of the present invention.

[0024] Figure 6 This is a block diagram of a power supply voltage sampling circuit according to an embodiment of the present invention.

[0025] Figure 7 This is a schematic diagram of a differential sampling circuit according to an embodiment of the present invention.

[0026] Figure 8 This is a block diagram of a power frequency sampling circuit according to an embodiment of the present invention.

[0027] Figure 9 This is a schematic diagram of a second-order filtering and anti-interference circuit according to an embodiment of the present invention.

[0028] Figure 10 This is a flow chart of a dual power automatic transfer switch control method according to an embodiment of the present invention.

[0029] Figure 11 Schematic diagram of an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0030] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0031] Example 1

[0032] Combined with attachment Figure 1 The technical solution of the present invention is a dual-power automatic transfer switch control circuit, including a microprocessor 10, two power supply voltage sampling circuits 20, two power supply frequency sampling circuits 30 and a motor drive circuit 40. The input ends of the two power supply voltage sampling circuits 20 are respectively connected to a normal power supply 60 and a backup power supply 70. The two power supply voltage sampling circuits 20 respectively output power supply voltage signals to the microprocessor 10. The input ends of the two power supply frequency sampling circuits 30 are respectively connected to the normal power supply 60 and the backup power supply 70. The two power supply frequency sampling circuits 30 respectively output power supply frequency signals to the microprocessor 10. The microprocessor 10 outputs a switching action signal to the motor drive circuit 40 to control power switching.

[0033] The dual power automatic transfer switch control circuit further includes a phase synchronization detection circuit 50, the input ends of which are connected to a normal power supply 60 and a backup power supply 70, respectively, and the phase synchronization detection circuit 50 outputs a power phase signal to the microprocessor 10;

[0034] When the motor driving circuit 40 starts to perform the switching operation, the microprocessor 10 dynamically adjusts the voltage action threshold and the frequency action threshold according to the power phase signal output by the phase synchronization detection circuit 50 within a preset period.

[0035] In this embodiment, the two power supply voltage sampling circuits 20 and the two power supply frequency sampling circuits 30 respectively perform voltage sampling and frequency sampling on the primary power supply 60 and the backup power supply 70. When the primary power supply 60 and the backup power supply 70 are three-phase, the power supply voltage sampling circuits 20 and the power supply frequency sampling circuits 30 are internally provided with a corresponding number of sampling sub-circuits as needed.

[0036] In this embodiment, the phase synchronization detection circuit 50 includes detection of two, four, or six phase voltages. For example, when the phase synchronization detection circuit 50 is configured as a two-phase circuit, the phase synchronization detection circuit 50 can detect phase A of the normal power supply 60 and phase A of the backup power supply 70; when the phase synchronization detection circuit 50 is configured as a six-phase circuit, the phase synchronization detection circuit 50 can detect three phases, A, B, C, and D of the normal power supply 60 and three phases, A, B, C, and D of the backup power supply 70.

[0037] In this embodiment, the microprocessor 10 is used to receive the normal / backup power supply voltage signal, the normal / backup power supply frequency signal and the normal / backup power supply phase signal, and control the power supply switching and dynamically adjust the voltage action threshold and the frequency action threshold according to the above signals.

[0038] In this embodiment, the motor drive circuit 40 is an execution circuit for switching power supplies. When the microprocessor 10 outputs a switching action signal to the motor drive circuit 40, the motor drive circuit 40 operates to drive the motor to rotate forward or reverse, thereby completing the power switching or separation of the current circuit. For the specific structure and operation mode of the dual power automatic transfer switch, please refer to the patent previously applied for by the applicant, which discloses an operating mechanism of a dual power automatic transfer switch in Chinese patent publication number CN119626811A.

[0039] In this embodiment, when the PC-level ATSE performs power switching, due to the extremely fast switching speed, the phase difference between the residual voltage at the load end and the newly connected power voltage may cause a large transient current. The dual-power automatic transfer switch control circuit of the present invention not only monitors voltage and frequency, but also adds phase synchronization detection. The phase synchronization detection circuit 50 monitors the phase difference between the normal power supply 60 and the backup power supply 70 in real time. When the motor drive circuit 40 starts to perform the switching action, the microprocessor 10 dynamically adjusts the voltage action threshold and the frequency action threshold within a preset time period according to the power phase signal output by the phase synchronization detection circuit 50. This dynamic adjustment mechanism can prevent voltage and frequency abnormalities caused by transient current from affecting the logical judgment of the microprocessor, effectively reduce the frequency of erroneous switching of dual power supplies, and ensure that the load can obtain continuous and stable power supply.

[0040] In this embodiment, as shown in the attached Figure 2 As shown, the phase synchronization detection circuit 50 includes a step-down isolation circuit 51, a low-pass filter circuit 52, an operational amplifier buffer circuit 53 and an analog-to-digital conversion circuit 54. The input end of the step-down isolation circuit 51 is connected to the phase voltage of the normal power supply 60 / backup power supply 70, the output end of the step-down isolation circuit 51 is connected to the input end of the low-pass filter circuit 52, the output end of the low-pass filter circuit 52 is connected to the input end of the operational amplifier buffer circuit 53, the output end of the operational amplifier buffer circuit 53 is connected to the input end of the analog-to-digital conversion circuit 54, and the output end of the analog-to-digital conversion circuit 54 is connected to the input end of the microprocessor 10.

[0041] In this embodiment, as shown in the attached Figure 3As shown, the step-down isolation circuit 51 includes a first resistor R1, a second resistor R2, a third resistor R3, a varistor RV, a first transient voltage suppressor diode TVS1, a first capacitor C1, a second capacitor C2 and a voltage transformer T1, wherein the first end of the first resistor R1 is connected to the first end of the primary side of the voltage transformer T1, and the second end of the first resistor R1 and the second end of the primary side of the voltage transformer T1 are respectively connected to the phase voltage of the normal power supply / backup power supply. signal_in, the varistor RV is connected in parallel at both ends of the primary side of the voltage transformer T1, the first transient voltage suppressor diode TVS1, the second resistor R2 and the first capacitor C1 are respectively connected in parallel at both ends of the secondary side of the voltage transformer T1, the first end of the secondary side of the voltage transformer T1 is connected to the first end of the third resistor R3, the second end of the secondary side of the voltage transformer T1 is connected to the first end of the second capacitor C2, the second end of the third resistor R3 is connected to the second end of the second capacitor C2, and the second end of the third resistor R3 outputs the signal signal_sd. The first resistor R1 prevents transient current from impacting the primary side of the voltage transformer T1. The varistor RV and the first transient voltage suppressor diode TVS1 respectively perform overvoltage protection on the primary and secondary sides of the voltage transformer T1.

[0042] In this embodiment, as shown in the attached Figure 4 As shown, the low-pass filter circuit 52 includes a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a third capacitor C3, a fourth capacitor C4 and a first operational amplifier U1, wherein the first end of the fourth resistor R4 is connected to the second end of the second capacitor C2, the second end of the fourth resistor R4 is respectively connected to the first end of the third capacitor C3 and the first end of the fifth resistor R5, the second end of the fifth resistor R5 is respectively connected to the first end of the fourth capacitor C4 and the non-inverting input terminal of the first operational amplifier U1, the second end of the third capacitor C3 and the second end of the fourth capacitor C4 are both grounded, the output end of the first operational amplifier U1 is respectively connected to the inverting input terminal of the first operational amplifier U1 and the first end of the sixth resistor R6, the second end of the sixth resistor R6 is grounded, and the output end of the first operational amplifier U1 outputs the filtered signal signal_lpf; the low-pass filter circuit 52 reduces high-frequency glitches and improves sampling accuracy by smoothing signal edges.

[0043] In this embodiment, as shown in the attached Figure 5As shown, the operational amplifier buffer circuit 53 includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a fifth capacitor C5, and a second operational amplifier U2. The first end of the seventh resistor R7 is connected to the output end of the first operational amplifier U1, the second end of the seventh resistor R7 is connected to the non-inverting input end of the second operational amplifier U2, the first end of the eighth resistor R8 is respectively connected to the inverting input end of the second operational amplifier U2 and the first end of the ninth resistor R9, the second end of the eighth resistor R8 is grounded, the output end of the second operational amplifier U2 is respectively connected to the second end of the ninth resistor R9 and the first end of the tenth resistor R10, the second end of the tenth resistor R10 is respectively connected to the first end of the fifth capacitor C5 and the input end of the analog-to-digital conversion circuit, the second end of the fifth capacitor C5 is grounded, and the second end of the tenth resistor R10 outputs the signal signal_ba after operational amplification. The operational amplifier buffer circuit 53 protects the signal source through high-impedance input and low-impedance output, while isolating interference to ensure the fidelity and stability of the sampled signal.

[0044] In this embodiment, in order to meet the high precision and high real-time requirements for power phase signal sampling, the analog-to-digital conversion circuit 54 selects ADS5500, AD9253 or AD7609 analog-to-digital conversion chips.

[0045] In this embodiment, as shown in the attached Figure 6 As shown, the power supply voltage sampling circuit 20 includes a differential sampling circuit 21, an anti-aliasing filter circuit 22 and a secondary isolation circuit 23. The input end of the differential sampling circuit 21 is connected to the output end of the step-down isolation circuit 51, the output end of the differential sampling circuit 21 is connected to the input end of the anti-aliasing filter circuit 22, the output end of the anti-aliasing filter circuit 22 is connected to the input end of the secondary isolation circuit 23, and the output end of the secondary isolation circuit 23 is connected to the input end of the microprocessor 10; the anti-aliasing filter circuit 22 prevents aliasing distortion caused by undersampling of high-frequency signals during the sampling process, and can use a passive RC filter to form a simple low-pass network, which is suitable for low-frequency application scenarios of the power grid; the secondary isolation circuit 23 can use optoelectronic isolation, such as optocouplers with models PC817 and ISO130.

[0046] In this embodiment, as shown in the attached Figure 7As shown, the differential sampling circuit 21 includes an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a sixth capacitor C6 and a third operational amplifier U3, wherein the eleventh resistor R11 and the twelfth resistor R12 are connected in series, the thirteenth resistor R13 and the fourteenth resistor R14 are connected in series, the first end of the eleventh resistor R11 and the first end of the thirteenth resistor R13 are connected to the output end of the step-down isolation circuit 51, the first end of the twelfth resistor R12 and the first end of the fourteenth resistor R14 are connected to a common ground, and the The second end of the eleventh resistor R11 is connected to the non-inverting input terminal of the third operational amplifier U3, the second end of the thirteenth resistor R13 is respectively connected to the inverting input terminal of the third operational amplifier U3 and the first end of the fifteenth resistor R15, the output end of the third operational amplifier U3 is respectively connected to the second end of the fifteenth resistor R15 and the first end of the sixteenth resistor R16, the second end of the sixteenth resistor R16 is respectively connected to the input end of the anti-aliasing filter circuit and the first end of the sixth capacitor C6, the second end of the sixth capacitor C6 is grounded, and the second end of the sixteenth resistor R16 outputs the differential signal signal_ds.

[0047] In this embodiment, as shown in the attached Figure 8 As shown, the power supply frequency sampling circuit 30 includes a second-order filtering and anti-interference circuit 31 and a zero-crossing detection circuit 32. The input end of the second-order filtering and anti-interference circuit 31 is connected to the output end of the step-down isolation circuit 51, the output end of the second-order filtering and anti-interference circuit 31 is connected to the input end of the zero-crossing detection circuit 32, and the output end of the zero-crossing detection circuit 32 is connected to the input end of the microprocessor 10; the zero-crossing detection circuit 32 can use an operational amplifier comparator to compare the stepped-down signal with the reference voltage to collect the zero-crossing point, or use a chip with an integrated zero-crossing detection function (such as BM1Z) to collect the zero-crossing point.

[0048] In this embodiment, as shown in the attached Figure 9As shown, the second-order filtering anti-interference circuit 31 includes a seventeenth resistor R17, an eighteenth resistor R18, a seventh capacitor C7, an eighth capacitor C8 and a second transient voltage suppression diode TVS2. The seventeenth resistor R17 and the eighteenth resistor R18 are connected in series, the first end of the seventeenth resistor R17 is connected to the output end of the step-down isolation circuit, the second end of the seventeenth resistor R17 is connected to the first end of the seventh capacitor C7, the first end of the eighteenth resistor R18 is respectively connected to the first end of the eighth capacitor C8 and the negative electrode of the second transient voltage suppression diode TVS2, the second end of the seventh capacitor C7, the second end of the eighth capacitor C8 and the positive electrode of the second transient voltage suppression diode TVS2 are all grounded, and the first end of the eighteenth resistor R18 outputs the filtered signal signal_sof.

[0049] In this embodiment, the power supply voltage sampling circuit 20 , the power supply frequency sampling circuit 30 , and the phase synchronization detection circuit 50 reuse the step-down isolation circuit 51 , effectively reducing the configuration of components.

[0050] Example 2

[0051] Combined with attachment Figure 10 The technical solution of the present invention is a dual power automatic transfer switch control method, which adopts the dual power automatic transfer switch control circuit described in Example 1, including:

[0052] Step S100, acquiring in real time a voltage signal of an active power supply, a voltage signal of a suspended power supply, a frequency signal of an active power supply, a frequency signal of a suspended power supply, a phase signal of an active power supply, and a phase signal of a suspended power supply;

[0053] Step S200, determining whether the power supply voltage signal deviates from the voltage action threshold within a first delay time, and determining whether the power supply frequency signal deviates from the frequency action threshold within a second delay time;

[0054] Step S300, if the power supply voltage signal deviates from the normal voltage threshold within the first delay time or the power supply frequency signal deviates from the normal frequency threshold within the second delay time, generating a switching action signal;

[0055] Step S400, respectively retrieving the active power phase signal and the on-hold power phase signal according to a preset time window to obtain active power phase window information and on-hold power phase window information;

[0056] Step S500 , starting from the generation time of the switching action signal, adjusting the voltage action threshold and the frequency action threshold according to the used power phase window information and the shelved power phase window information during the subsequent power switching transition period.

[0057] In this embodiment, the dual power automatic transfer switch control method can be used for both automatic transfer and automatic restoration and automatic transfer without automatic restoration. Therefore, the distinction is made between the used power supply and the shelved power supply instead of the normal power supply and the standby power supply.

[0058] In this embodiment, during normal operation, the voltage action threshold and the frequency action threshold both have upper and lower limits, and both are fixed values.

[0059] In this embodiment, the first delay time and the second delay time are set to different values ​​according to different application scenarios. The first delay time is usually 1 to 3 seconds, and the second delay time is usually 1 to 5 seconds.

[0060] In this embodiment, the preset time window includes a window start time and a window end time; when the power supply voltage signal is abnormal, the window start time is the time when the power supply voltage signal deviates from the normal voltage threshold, and the window end time is before the dual power supplies complete the switching action, and the power supply phase signal is intercepted with the preset time window to obtain the power supply phase window information; when the power supply frequency signal is abnormal, the window start time is the time when the power supply frequency signal deviates from the normal frequency threshold, and the window end time is before the dual power supplies complete the switching action, and the shelved power supply phase signal is intercepted with the preset time window to obtain the shelved power supply phase window information.

[0061] In this embodiment, when the power supply voltage signal is abnormal, the preset time window is longer than the first delay time, and the length of the preset time window is half of the first delay time plus the dual power switching action time; when the power supply frequency signal is abnormal, the preset time window is longer than the second delay time, and the length of the preset time window is half of the second delay time plus the dual power switching action time.

[0062] In this embodiment, the dual power switching action time is the minimum action time calibrated by the product before leaving the factory.

[0063] In this embodiment, when the switching action signal is triggered by the abnormality of the power supply voltage signal, the zero-crossing time stamp set of the power supply phase window information is extracted. , extract the zero-crossing timestamp set of the shelved power phase window information , calculate the average time difference between the zero crossing points of the power supply in use and the power supply in standby mode , according to the zero-crossing average time difference To calculate the phase difference between the active power supply and the standby power supply ;

[0064] According to the phase difference To adjust the upper and lower limits of the voltage action threshold,

[0065] The upper limit of the voltage action threshold is , formula (1),

[0066] The lower limit of the voltage action threshold is , formula (2),

[0067] In formula (1) and formula (2), is the upper limit of the initial voltage action threshold, is the lower limit of the initial voltage action threshold, is the first voltage regulation coefficient, is the upper limit of the voltage action threshold after adjustment, is the lower limit of the adjusted voltage action threshold; The range is 0.30~0.45;

[0068] According to the phase difference To adjust the upper and lower limits of the frequency action threshold,

[0069] The upper limit of the frequency action threshold is , formula (3),

[0070] The lower limit of the frequency action threshold is , formula (4),

[0071] In formula (3) and formula (4), is the upper limit of the initial frequency action threshold, is the lower limit of the initial frequency action threshold, is the first frequency adjustment coefficient, is the upper limit of the frequency action threshold after adjustment, is the lower limit of the frequency action threshold after adjustment; The range is 0.05~0.15.

[0072] In this embodiment, when the switching action signal is triggered by the abnormality of the power supply voltage signal, the last zero-crossing time stamp in the power supply phase window information is extracted. , extract the last zero-crossing timestamp in the shelved power phase window information , calculate the zero-crossing time difference between the power supply in use and the power supply in standby , according to the zero-crossing time difference To calculate the phase difference between the active power supply and the standby power supply ;

[0073] According to the phase difference To adjust the upper and lower limits of the voltage action threshold,

[0074] The upper limit of the voltage action threshold is , formula (5),

[0075] The lower limit of the voltage action threshold is , formula (6),

[0076] In formula (5) and formula (6), is the upper limit of the initial voltage action threshold, is the lower limit of the initial voltage action threshold, is the second voltage regulation coefficient, is the upper limit of the voltage action threshold after adjustment, is the lower limit of the adjusted voltage action threshold; The range is 0.15~0.25;

[0077] According to the phase difference To adjust the upper and lower limits of the frequency action threshold,

[0078] The upper limit of the frequency action threshold is , formula (7),

[0079] The lower limit of the frequency action threshold is , formula (8),

[0080] In formula (7) and formula (8), is the upper limit of the initial frequency action threshold, is the lower limit of the initial frequency action threshold, is the second frequency adjustment coefficient, is the upper limit of the frequency action threshold after adjustment, is the lower limit of the frequency action threshold after adjustment; The range is 0.10~0.20.

[0081] In this embodiment, the method further includes determining whether the shelved power supply voltage signal deviates from the voltage action threshold within a first delay time, and determining whether the shelved power supply frequency signal deviates from the frequency action threshold within a second delay time;

[0082] If both the active power supply voltage signal and the idle power supply voltage signal deviate from the normal voltage threshold within the first delay time, or both the active power supply frequency signal and the idle power supply frequency signal deviate from the normal frequency threshold within the second delay time, a dual-split action signal is generated.

[0083] In this embodiment, when both the used power supply and the shelved power supply are in abnormal status, a dual-action signal is executed, that is, both power supplies are disconnected at the same time to prevent current backflow or equipment damage.

[0084] The dual-power automatic transfer switch control method of the present invention obtains the phase signals of the active power supply and the idle power supply in real time, takes the phase difference into consideration during switching, optimizes the dual-power switching logic, and identifies the phase difference between the residual voltage and the backup power supply by comparing the phase window information of the active power supply and the idle power supply in real time during the switching transition period. By dynamically adjusting the voltage / frequency action threshold, misjudgment caused by transient impact current is avoided, thereby preventing the PC-level ATSE from malfunctioning in non-fault conditions. The protection parameters are dynamically adjusted in the critical period after switching, allowing short-term impact current to pass through while restoring the standard threshold after stabilization, thus balancing the needs of fast switching and electrical safety.

[0085] The dual-power automatic transfer switch control method of the present invention corrects the voltage / frequency action threshold through phase window information, effectively distinguishes between real power failures and switching transient interference, improves the stability of the equipment under complex working conditions, avoids repeated switching caused by inrush current, reduces mechanical and electrical stress, and extends the service life of the ATSE and load equipment.

[0086] Example 3

[0087] Combined with attachment Figure 11 The technical solution of the present invention is an electronic device, including a processor 1 and a memory 2, wherein the memory 2 stores a computer program, and when the processor 1 executes the computer program, the steps of the dual power automatic transfer switch control method described in Example 2 are implemented.

[0088] It should also be noted that, in this specification, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.

[0089] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A dual power automatic transfer switch control circuit, comprising a microprocessor, two power supply voltage sampling circuits, two power supply frequency sampling circuits, and a motor drive circuit, wherein the input ends of the two power supply voltage sampling circuits are respectively connected to a normal power supply and a backup power supply, the two power supply voltage sampling circuits respectively output power supply voltage signals to the microprocessor, the input ends of the two power supply frequency sampling circuits are respectively connected to a normal power supply and a backup power supply, the two power supply frequency sampling circuits respectively output power supply frequency signals to the microprocessor, and the microprocessor outputs a switching action signal to the motor drive circuit to control power switching, characterized in that: It also includes a phase synchronization detection circuit, the input ends of which are respectively connected to the normal power supply and the backup power supply, and the phase synchronization detection circuit outputs a power phase signal to the microprocessor; the phase synchronization detection circuit monitors the phase difference between the normal power supply and the backup power supply in real time, and when the motor drive circuit starts to perform the switching action, the microprocessor dynamically adjusts the voltage action threshold and the frequency action threshold according to the power phase signal output by the phase synchronization detection circuit within a preset time period.

2. A dual power automatic transfer switch control circuit according to claim 1, characterized in that: The phase synchronization detection circuit includes a step-down isolation circuit, a low-pass filtering circuit, an operational amplifier buffer circuit and an analog-to-digital conversion circuit. The input end of the step-down isolation circuit is connected to the phase voltage of a common power supply or a backup power supply, the output end of the step-down isolation circuit is connected to the input end of the low-pass filtering circuit, the output end of the low-pass filtering circuit is connected to the input end of the operational amplifier buffer circuit, the output end of the operational amplifier buffer circuit is connected to the input end of the analog-to-digital conversion circuit, and the output end of the analog-to-digital conversion circuit is connected to the input end of the microprocessor.

3. A dual power automatic transfer switch control circuit according to claim 2, characterized in that: The step-down isolation circuit includes a first resistor, a second resistor, a third resistor, a varistor, a first transient voltage suppression diode, a first capacitor, a second capacitor, and a voltage transformer, wherein the first end of the first resistor is connected to the first end of the primary side of the voltage transformer, the second end of the first resistor and the second end of the primary side of the voltage transformer are respectively connected to the phase voltage of the normal power supply or the backup power supply, the varistor is connected in parallel to the two ends of the primary side of the voltage transformer, the first transient voltage suppression diode, the second resistor, and the first capacitor are respectively connected in parallel to the two ends of the secondary side of the voltage transformer, the first end of the secondary side of the voltage transformer is connected to the first end of the third resistor, the second end of the secondary side of the voltage transformer is connected to the first end of the second capacitor, and the second end of the third resistor is connected to the second end of the second capacitor; The low-pass filter circuit includes a fourth resistor, a fifth resistor, a sixth resistor, a third capacitor, a fourth capacitor, and a first operational amplifier, wherein the first end of the fourth resistor is connected to the second end of the second capacitor, the second end of the fourth resistor is respectively connected to the first end of the third capacitor and the first end of the fifth resistor, the second end of the fifth resistor is respectively connected to the first end of the fourth capacitor and the non-inverting input terminal of the first operational amplifier, the second end of the third capacitor and the second end of the fourth capacitor are both grounded, the output end of the first operational amplifier is respectively connected to the inverting input terminal of the first operational amplifier and the first end of the sixth resistor, and the second end of the sixth resistor is grounded; The operational amplifier buffer circuit includes a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, a fifth capacitor, and a second operational amplifier. The first end of the seventh resistor is connected to the output end of the first operational amplifier, the second end of the seventh resistor is connected to the non-inverting input end of the second operational amplifier, the first end of the eighth resistor is respectively connected to the inverting input end of the second operational amplifier and the first end of the ninth resistor, the second end of the eighth resistor is grounded, the output end of the second operational amplifier is respectively connected to the second end of the ninth resistor and the first end of the tenth resistor, the second end of the tenth resistor is respectively connected to the first end of the fifth capacitor and the input end of the analog-to-digital conversion circuit, and the second end of the fifth capacitor is grounded.

4. A dual power automatic transfer switch control circuit according to claim 2, characterized in that: The power supply voltage sampling circuit includes a differential sampling circuit, an anti-aliasing filter circuit and a secondary isolation circuit, wherein the input end of the differential sampling circuit is connected to the output end of the step-down isolation circuit, the output end of the differential sampling circuit is connected to the input end of the anti-aliasing filter circuit, the output end of the anti-aliasing filter circuit is connected to the input end of the secondary isolation circuit, and the output end of the secondary isolation circuit is connected to the input end of the microprocessor; The differential sampling circuit includes an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a sixth capacitor, and a third operational amplifier. The eleventh resistor and the twelfth resistor are connected in series, and the thirteenth resistor and the fourteenth resistor are connected in series. The first end of the eleventh resistor and the first end of the thirteenth resistor are connected to the output end of the step-down isolation circuit, the first end of the twelfth resistor and the first end of the fourteenth resistor are connected to a common ground, the second end of the eleventh resistor is connected to the non-inverting input end of the third operational amplifier, the second end of the thirteenth resistor is respectively connected to the inverting input end of the third operational amplifier and the first end of the fifteenth resistor, the output end of the third operational amplifier is respectively connected to the second end of the fifteenth resistor and the first end of the sixteenth resistor, the second end of the sixteenth resistor is respectively connected to the input end of the anti-aliasing filter circuit and the first end of the sixth capacitor, and the second end of the sixth capacitor is grounded.

5. A dual power automatic transfer switch control circuit according to claim 2, characterized in that: The power supply frequency sampling circuit includes a second-order filter anti-interference circuit and a zero-crossing detection circuit, the input end of the second-order filter anti-interference circuit is connected to the output end of the step-down isolation circuit, the output end of the second-order filter anti-interference circuit is connected to the input end of the zero-crossing detection circuit, and the output end of the zero-crossing detection circuit is connected to the input end of the microprocessor; The second-order filtering and anti-interference circuit includes a seventeenth resistor, an eighteenth resistor, a seventh capacitor, an eighth capacitor, and a second transient voltage suppression diode. The seventeenth resistor and the eighteenth resistor are connected in series, the first end of the seventeenth resistor is connected to the output end of the step-down isolation circuit, the second end of the seventeenth resistor is connected to the first end of the seventh capacitor, the first end of the eighteenth resistor is respectively connected to the first end of the eighth capacitor and the cathode of the second transient voltage suppression diode, and the second end of the seventh capacitor, the second end of the eighth capacitor, and the anode of the second transient voltage suppression diode are all grounded.

6. A dual power automatic transfer switch control method, characterized in that: The dual power automatic transfer switch control circuit according to any one of claims 1 to 5 is used, and the dual power automatic transfer switch control method is used for both automatic transfer and automatic reset dual power automatic transfer switches and automatic transfer and non-automatic reset dual power automatic transfer switches, comprising: Real-time acquisition of the voltage signal of the power supply in use, the voltage signal of the power supply on hold, the frequency signal of the power supply in use, the frequency signal of the power supply on hold, the phase signal of the power supply in use, and the phase signal of the power supply on hold; Determine whether the power supply voltage signal deviates from the voltage action threshold within a first delay time, and determine whether the power supply frequency signal deviates from the frequency action threshold within a second delay time; If the power supply voltage signal deviates from the normal voltage threshold within the first delay time or the power supply frequency signal deviates from the normal frequency threshold within the second delay time, a switching action signal is generated; Retrieving the active power phase signal and the on-hold power phase signal respectively according to a preset time window to obtain active power phase window information and on-hold power phase window information; Taking the generation time of the switching action signal as the starting time, the voltage action threshold and the frequency action threshold are adjusted according to the commissioning power phase window information and the shelving power phase window information during the subsequent power switching transition period.

7. A dual power automatic transfer switch control method according to claim 6, characterized in that: The preset time window includes a window start time and a window end time; when the power supply voltage signal is abnormal, the window start time is the time when the power supply voltage signal deviates from the normal voltage threshold, and the window end time is before the dual power supplies complete the switching action, and the power supply phase signal is intercepted with the preset time window to obtain the power supply phase window information; when the power supply frequency signal is abnormal, the window start time is the time when the power supply frequency signal deviates from the normal frequency threshold, and the window end time is before the dual power supplies complete the switching action, and the shelved power supply phase signal is intercepted with the preset time window to obtain the shelved power supply phase window information.

8. A dual power automatic transfer switch control method according to claim 6, characterized in that: When the switching action signal is triggered by the abnormality of the power supply voltage signal, the zero-crossing time stamp set of the power supply phase window information is extracted. , extract the zero-crossing timestamp set of the shelved power phase window information , calculate the average time difference between the zero crossing points of the power supply in use and the power supply in standby mode , according to the zero-crossing average time difference To calculate the phase difference between the active power supply and the standby power supply According to the phase difference To adjust the upper and lower limits of the voltage action threshold, the upper limit of the voltage action threshold is , the lower limit of the voltage action threshold is ,in, is the upper limit of the initial voltage action threshold, is the lower limit of the initial voltage action threshold, is the first voltage adjustment coefficient; according to the phase difference To adjust the upper and lower limits of the frequency action threshold, the upper limit of the frequency action threshold is , the lower limit of the frequency action threshold is ,in, is the upper limit of the initial frequency action threshold, is the lower limit of the initial frequency action threshold, is the first frequency adjustment coefficient.

9. A dual power automatic transfer switch control method according to claim 6, characterized in that: When the switching action signal is triggered by the abnormality of the power supply voltage signal, the last zero-crossing time stamp in the power supply phase window information is extracted. , extract the last zero-crossing timestamp in the shelved power phase window information , calculate the zero-crossing time difference between the power supply in use and the power supply in standby , according to the zero-crossing time difference To calculate the phase difference between the active power supply and the standby power supply According to the phase difference To adjust the upper and lower limits of the voltage action threshold, the upper limit of the voltage action threshold is , the lower limit of the voltage action threshold is ,in, is the upper limit of the initial voltage action threshold, is the lower limit of the initial voltage action threshold, is the second voltage adjustment coefficient; according to the phase difference To adjust the upper and lower limits of the frequency action threshold, the upper limit of the frequency action threshold is , the lower limit of the frequency action threshold is ,in, is the upper limit of the initial frequency action threshold, is the lower limit of the initial frequency action threshold, is the second frequency adjustment coefficient.

10. A dual power automatic transfer switch control method according to claim 6, characterized in that: Determining whether the shelved power supply voltage signal deviates from a voltage action threshold within a first delay time, and determining whether the shelved power supply frequency signal deviates from a frequency action threshold within a second delay time; If both the active power supply voltage signal and the idle power supply voltage signal deviate from the normal voltage threshold within the first delay time, or both the active power supply frequency signal and the idle power supply frequency signal deviate from the normal frequency threshold within the second delay time, a dual-split action signal is generated.

11. An electronic device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the dual power automatic transfer switch control method according to any one of claims 6 to 10 are implemented.

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