Signal route tampering method and test system

Abstract

The invention relates to a signal route tampering method and a test system. The method is applied to a routing module. The first end of the routing module is connected with the communication bus, the second end of the routing module is in communication connection with the control module to be tested, the communication bus is further connected with an upper computer and other routing modules, and the routing module and the upper computer are both connected with the PCI control bus; the method comprises the following steps: acquiring signal configuration information sent by an upper computer from a PCI (Peripheral Component Interconnect) control bus; when a signal to be transmitted is received, the signal to be transmitted is tampered or intercepted according to the signal configuration information; the to-be-transmitted signal comes from the communication bus or the to-be-tested control module; and carrying out forwarding processing on the tampered signal. By the adoption of the method, signals between the control modules and between the control modules and the upper computer can be tampered or intercepted, bidirectional tampering of the signals is achieved, verification of functions of the control modules or the system is facilitated in an injection mode, and the test efficiency of the control modules is improved.

Description

Technical Field

[0001] This application relates to the technical field of vehicle testing, and particularly to a signal routing tampering method and a testing system. Background Art

[0002] With the development of automotive intelligence, the complexity of vehicle systems has gradually increased, specifically manifested as an increase in system functions, the number of in-vehicle control modules, and communication bandwidth. The functional maturity of control modules and the communication reliability between control modules directly determine the safety and reliability of vehicles. In order to comprehensively verify control modules, during the current bench testing based on the VT system, control modules are generally connected to each other and to the host computer through a physical bus, and the signals exchanged are directly received and sent through a physical link, making it impossible to intercept and process signals, resulting in the inability to verify the functions of control modules or systems by injection. Summary of the Invention

[0003] Based on this, in view of the above technical problems, it is necessary to provide a signal routing tampering method and a testing system that can tamper with or intercept signals between control modules and between control modules and the host computer, facilitating the verification of the functions of control modules or systems by injection.

[0004] In a first aspect, this application provides a signal routing tampering method. The method is applied to a routing module; a first end of the routing module is connected to a communication bus, a second end of the routing module is communicatively connected to a control module under test, the communication bus is also connected to a host computer and other routing modules, and both the routing module and the host computer are connected to a PCI control bus; the method includes:

[0005] Obtain signal configuration information sent by the host computer from the PCI control bus;

[0006] When receiving a signal to be transmitted, tamper with or intercept the signal to be transmitted according to the signal configuration information; the signal to be transmitted comes from the communication bus or the control module under test;

[0007] Forward the tampered signal for processing.

[0008] In one embodiment, the tampering with or intercepting the signal to be transmitted according to the signal configuration information includes:

[0009] Read the processing identifier in the signal configuration information;

[0010] When the processing identifier is an interception identifier, intercept the signal to be transmitted;

[0011] When the processing identifier is the tampering identifier, according to the tampering strategy indicated by the tampering identifier, read the corresponding tampering parameter from the signal configuration information;

[0012] Tamper the signal to be transmitted according to the tampering parameter.

[0013] In one embodiment, the tampering strategy includes a numerical tampering strategy; the step of reading the corresponding tampering parameter from the signal configuration information according to the tampering strategy indicated by the tampering identifier includes:

[0014] Read the signal value from the signal configuration information according to the numerical tampering strategy;

[0015] Use the read signal value as the tampering parameter.

[0016] In one embodiment, the tampering strategy includes a delayed transmission strategy; the step of reading the corresponding tampering parameter from the signal configuration information according to the tampering strategy indicated by the tampering identifier includes:

[0017] Read the transmission time parameter from the signal configuration information according to the delayed transmission strategy;

[0018] Use the read transmission time parameter as the tampering parameter.

[0019] In one embodiment, after obtaining the signal configuration information sent by the host computer from the PCI control bus, the method further includes:

[0020] Read the processing identifier in the signal configuration information;

[0021] When the processing identifier is the simulation identifier, generate a simulation signal according to the signal configuration information;

[0022] Forward the simulation signal.

[0023] In a second aspect, the present application further provides a signal routing tampering method. The method is applied to a host computer; the host computer and the first ends of M routing modules are both connected to a communication bus, the second ends of the M routing modules are communicatively connected to M control modules to be tested, and the host computer and the M routing modules are both connected to a PCI control bus; the method includes:

[0024] Send signal configuration information to at least one of the M routing modules through the PCI control bus;

[0025] Wherein, the signal configuration information is used to instruct the routing module to tamper with or intercept the signal to be transmitted, and forward the tampered signal; the signal to be transmitted comes from the communication bus or the connected control module to be tested.

[0026] In one embodiment, the host computer is provided with N interface models corresponding to N signal types; the method further includes:

[0027] Sending the signal configuration information generated by the target interface model to the target routing module through the PCI control bus; the target interface model corresponds to the target signal type, and the target routing module receives the signal to be transmitted that matches the target signal type.

[0028] In one embodiment, the method further includes:

[0029] During the hardware-in-the-loop test, receiving the model generation file;

[0030] Parsing the model generation file to obtain N model generation data; the model generation data includes signal types;

[0031] Generating N interface models corresponding to N signal types according to the N model generation data.

[0032] In one embodiment, the method further includes:

[0033] Receiving model adjustment data;

[0034] Adjusting the interface model according to the model adjustment data.

[0035] In a third aspect, the present application further provides a test system. The test system includes a host computer, M routing modules, and M control modules to be tested. The first ends of the host computer and the M routing modules are both connected to the communication bus. The second ends of the M routing modules are communicatively connected to the M control modules to be tested. The host computer and the M routing modules are both connected to the PCI control bus; wherein:

[0036] The host computer is configured to send signal configuration information to at least one of the M routing modules through the PCI control bus;

[0037] The routing module is configured to obtain the signal configuration information sent by the host computer from the PCI control bus; when receiving the signal to be transmitted, tampering with or intercepting the signal to be transmitted according to the signal configuration information; the signal to be transmitted comes from the communication bus or the connected control module to be tested; forwarding the tampered signal.

[0038] The above-mentioned signal routing tampering method and test system, the method is applied to a routing module; the first end of the routing module is connected to a communication bus, the second end of the routing module is communicatively connected to a control module to be tested, and a host computer and other routing modules are also connected to the communication bus. Both the routing module and the host computer are connected to a PCI control bus; signal configuration information sent by the host computer is obtained from the PCI control bus; when a signal to be transmitted is received, the signal to be transmitted is tampered with or intercepted according to the signal configuration information; the signal to be transmitted comes from the communication bus or the control module to be tested; the tampered signal is forwarded, and the signals between control modules and between the control module and the host computer can be tampered with or intercepted, realizing two-way tampering of signals, facilitating the verification of the functions of the control module or system by injection, and improving the test efficiency of the control module. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 FIG. is the internal structure diagram of the device to which the signal routing tampering method is applied in an embodiment;

[0040] Figure 2 FIG. is the structural block diagram of a traditional test system;

[0041] Figure 3 FIG. is the schematic flow chart of the signal routing tampering method in an embodiment;

[0042] Figure 4 FIG. is the schematic flow chart of the signal routing tampering method in another embodiment;

[0043] Figure 5 FIG. is the structural block diagram of the signal routing tampering system in an embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0044] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0045] As Figure 1 shown, an internal structure diagram of a computer device is provided. The computer device may be a host computer, and its internal structure diagram may be as Figure 1As shown in the figure. The computer device includes a processor, a memory, an input / output interface (Input / Output, abbreviated as I / O), and a communication interface. Among them, the processor, the memory, and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and external devices. The communication interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, it realizes a signal routing tampering method applied to a host computer.

[0046] Those skilled in the art can understand that Figure 1 the structure shown in the figure is only a block diagram of some structures related to the solution of this application, and does not constitute a limitation on the computer device to which the solution of this application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine some components, or have different component arrangements.

[0047] As Figure 2 shown, generally, multiple control modules need to be integrated based on the VT system test bench. The traditional test system mainly directly connects the control module under test to the CAN bus through a physical connection method. Other controllers related to the function of the control module under test (with signal interaction) are all implemented through a host computer simulation model, and the signal is forwarded to the CAN physical bus through the CAN module (CAN Rx / Tx).

[0048] The traditional test system has the following problems:

[0049] 1. Mainly, the host computer simulation signal and the bus signal are associated manually to realize the signal path. For the signal that needs to be tampered with, a debug model is also added manually on the signal link. For a system with thousands of signals, each signal is processed manually, and the workload is very large. Moreover, the communication matrix will also be continuously iteratively updated with the project development, and the manual adjustment method also has a certain error rate.

[0050] 2. The connection between the control modules to be tested is through a physical bus method, and the interacting signals are directly received and sent through the physical link, and the signals cannot be intercepted and processed, resulting in the inability to verify the functions of the control module or system through the injection method.

[0051] In view of the above technical problems, the present application provides a signal routing tampering method applied to a routing module, which can tamper with or intercept signals between control modules and between a control module and a host computer, realizing two-way tampering of signals, facilitating the verification of the functions of a control module or a system by means of injection, and improving the test efficiency of the control module. The present application also provides a signal routing tampering method applied to a host computer, which solves the problems of low manual modification efficiency and easy errors by automatically generating a tamperable interface model.

[0052] In one embodiment, as Figure 3 shown, a signal routing tampering method is provided, and the method is applied to a routing module; a first end of the routing module is connected to a communication bus, a second end of the routing module is communicatively connected to a control module under test, a host computer and other routing modules are also connected to the communication bus, and both the routing module and the host computer are connected to a PCI control bus; the method includes:

[0053] Step 302, obtain signal configuration information sent by the host computer from the PCI control bus.

[0054] Among them, the host computer and multiple routing modules are interconnected through a communication bus, each routing module is connected to a control module under test, the host computer is arranged on a VT bench, and other routing modules refer to routing modules set in the system other than the current routing module. The communication bus can be a CAN (Controller Area Network) bus, a LIN (Local Interconnect Network) bus, an FR (Flex Ray) bus, an Ethernet, etc., and the communication connection manner between the routing module and the control module under test can also be a CAN bus, a LIN bus, an FR bus, an Ethernet, etc. In this embodiment, the CAN bus is taken as an example for illustration. A CAN physical channel is formed between the routing module and the communication bus, and another CAN physical channel is formed between the routing module and the control module under test. For the routing module, among the two connected CAN physical channels, one CAN physical channel is used to receive CAN signals, and the other CAN physical channel is used to send CAN signals.

[0055] The host computer is provided with a simulation model, and at least one routing signal configuration information is generated under the setting of a tester. The host computer, as a PCI master device, sends the signal configuration information to the corresponding at least one routing module through the PCI control bus. The routing module, as a PCI slave device, obtains the signal configuration information from the PCI control bus.

[0056] Step 304, when a signal to be transmitted is received, tamper with or intercept the signal to be transmitted according to the signal configuration information; the signal to be transmitted is from the communication bus or the control module under test.

[0057] Among them, for different test requirements, the signal configuration information transmitted on the PCI control bus is different. Under the control of the signal configuration information, the routing module tampers with or intercepts the received signal to be transmitted according to the processing method indicated by the signal configuration information. The tampering methods can be tampering with the physical value of the signal, delaying the transmission of the signal, changing the signal sending object, etc. When the signal to be transmitted is from the communication bus, the signal flows from the communication bus through the routing module to the control module under test; when the signal to be transmitted is from the control module under test, the signal flows from the control module under test through the routing module to the communication bus. The routing module in this embodiment can tamper with or intercept the bidirectional transmitted signals under the control of the host computer.

[0058] Step 306, perform a forwarding process on the tampered signal.

[0059] Among them, determine the sending target of the tampered signal. When the sending target is the control module under test, forward the tampered signal to the control module under test through the CAN physical channel between the routing module and the control module under test. When the sending target is the host computer, another routing module or another control module under test, broadcast the tampered signal on the CAN bus through the CAN physical channel between the routing module and the communication bus.

[0060] The above signal routing tampering method is applied to the routing module; the first end of the routing module is connected to the communication bus, the second end of the routing module is communicatively connected to the control module under test, the communication bus is also connected with a host computer and other routing modules, and both the routing module and the host computer are connected to the PCI control bus; the method includes: obtaining the signal configuration information sent by the host computer from the PCI control bus; when a signal to be transmitted is received, tamper with or intercept the signal to be transmitted according to the signal configuration information; the signal to be transmitted is from the communication bus or the control module under test; perform a forwarding process on the tampered signal. Using this method can tamper with or intercept the signals between control modules and between the control module and the host computer, realize bidirectional tampering of signals, facilitate verifying the functions of the control module or system by injection, and improve the test efficiency of the control module.

[0061] In one embodiment, tampering with or intercepting the signal to be transmitted according to the signal configuration information includes: reading the processing identifier in the signal configuration information; when the processing identifier is the interception identifier, intercepting the signal to be transmitted; when the processing identifier is the tampering identifier, reading the corresponding tampering parameter from the signal configuration information according to the tampering strategy indicated by the tampering identifier; and tampering with the signal to be transmitted according to the tampering parameter.

[0062] Among them, the processing identifier is used to represent the signal processing method, including the interception identifier and the tampering identifier. There are multiple tampering identifiers, and different tampering identifiers correspond to different tampering strategies. In one implementation, the signal configuration information is a string containing multiple characters. The host computer and the routing module pre-agree on the storage location of each type of information in the signal configuration information. After receiving the signal configuration information, the processing identifier is read according to the pre-agreed storage location. For example, the first bit of the signal configuration information is the processing identifier bit. After receiving the signal configuration information, the first bit is read to determine the processing identifier. If the processing identifier bit stores "0", it represents the interception identifier. If the processing identifier bit stores a non-zero value, it represents the tampering identifier. The tampering identifier "1" corresponds to the first tampering strategy, the tampering identifier "2" corresponds to the second tampering strategy, and so on. The storage location of the tampering parameter used by each tampering strategy in the signal configuration information is different. According to the storage location corresponding to the tampering strategy, the corresponding tampering parameter is read from the signal configuration information, and the transmission parameter of the signal to be transmitted is tampered with according to the tampering parameter and the tampering strategy.

[0063] In one embodiment, the tampering strategy includes a numerical tampering strategy; reading the corresponding tampering parameter from the signal configuration information according to the tampering strategy indicated by the tampering identifier includes: reading the signal value from the signal configuration information according to the numerical tampering strategy; and using the read signal value as the tampering parameter.

[0064] Among them, the numerical tampering strategy is used to tamper with the physical value of the signal to be transmitted. The signal value is read from the signal configuration information according to the storage location corresponding to the numerical tampering strategy, and the physical value of the signal to be transmitted is tampered with according to the read signal value. For example, the 2nd to 17th bits of the signal configuration information are the signal value bits, and the 2nd to 17th bits are read to determine the signal value.

[0065] In one embodiment, the tampering strategy includes a delay sending strategy; reading the corresponding tampering parameter from the signal configuration information according to the tampering strategy indicated by the tampering identifier includes: reading the sending time parameter from the signal configuration information according to the delay sending strategy; and using the read sending time parameter as the tampering parameter.

[0066] Among them, the delay sending strategy is used to tamper with the sending time of the signal to be transmitted. The sending time parameter is read from the signal configuration information according to the storage location corresponding to the delay sending strategy, and the signal to be transmitted is controlled to be sent with a delay according to the read sending time parameter. For example, bits 18 to 33 of the signal configuration information are the sending time bits, and bits 18 to 33 are read to determine the sending time parameter.

[0067] In one embodiment, the tampering strategy includes a routing tampering strategy; according to the tampering strategy indicated by the tampering identifier, reading the corresponding tampering parameter from the signal configuration information includes: reading the sending target parameter from the signal configuration information according to the routing tampering strategy; using the read sending target parameter as the tampering parameter.

[0068] Among them, the routing tampering strategy is used to tamper with the receiver ID of the signal to be transmitted. The sending target parameter is read from the signal configuration information according to the storage location corresponding to the routing tampering strategy, and the receiver ID of the signal to be transmitted is modified according to the read sending target parameter. For example, bits 34 to 49 of the signal configuration information are the sending target parameter bits, and bits 34 to 49 are read to determine the sending target parameter.

[0069] In one embodiment, after step 302, the method further includes: reading the processing identifier in the signal configuration information; when the processing identifier is an analog identifier, generating an analog signal according to the signal configuration information; forwarding the analog signal.

[0070] Among them, the routing module simulates the signals of the host computer or the control module to be tested under the control of the signal configuration information. In one implementation, the routing module tampers with or intercepts the received signals under the control of the host computer. In another implementation, the routing module performs signal simulation under the control of the host computer.

[0071] In one embodiment, as Figure 4 shown, a signal routing tampering method is provided. The method is applied to a host computer; the first ends of the host computer and M routing modules are both connected to a communication bus, the second ends of the M routing modules are communicatively connected to M control modules to be tested, and the host computer and the M routing modules are both connected to a PCI control bus; the method includes:

[0072] Step 402, sending signal configuration information to at least one of the M routing modules through the PCI control bus.

[0073] Among them, the signal configuration information is used to instruct the routing module to tamper with or intercept the received signal to be transmitted, and forward the tampered signal; the signal to be transmitted comes from the communication bus or the connected control module under test.

[0074] In the traditional test system, for the signals that need to be tampered with, a debug model is manually added to the signal link. For a system with thousands of signals, each signal is processed manually, which is extremely laborious. Moreover, the communication matrix will also be continuously iterated and updated during project development, and there is also a certain error rate in the manual adjustment method.

[0075] In this embodiment, M routing modules are set on the routes of M control modules under test, where M is greater than or equal to 1. The routing module is controlled by the host computer to automatically tamper with or intercept the signal. Compared with the manual adjustment method, the signal modification efficiency is high and the error rate is reduced.

[0076] The above signal routing tampering method is applied to the host computer; the host computer and the first ends of the M routing modules are both connected to the communication bus, the second ends of the M routing modules are communicatively connected to the M control modules under test, and the host computer and the M routing modules are both connected to the PCI control bus; the method includes sending the signal configuration information to at least one of the M routing modules through the PCI control bus; the signal configuration information is used to instruct the routing module to tamper with or intercept the received signal to be transmitted, and forward the tampered signal; the signal to be transmitted comes from the communication bus or the connected control module under test. By using this method, the routing module can be controlled by the host computer to tamper with or intercept the signals between the control modules and between the control module and the host computer, realizing two-way tampering of the signals, facilitating the verification of the functions of the control module or system by means of injection, improving the test efficiency of the control module. Compared with the manual adjustment method, the signal modification efficiency is high and the error rate is reduced.

[0077] In one embodiment, the host computer is provided with N interface models corresponding to N signal types; the method further includes: sending the signal configuration information generated by the target interface model to the target routing module through the PCI control bus; the target interface model corresponds to the target signal type, and the target routing module receives the signal to be transmitted that matches the target signal type.

[0078] Among them, N is greater than or equal to 1, the signal types can be distinguished by signal names, each routing module corresponds to at least one signal type, and each signal type corresponds to an interface model in the host computer, and the host computer controls the routing module through the interface model.

[0079] In one embodiment, the method further includes: during a hardware-in-the-loop test, receiving a model generation file; parsing the model generation file to obtain N model generation data; the model generation data includes signal types; generating N interface models corresponding to the N signal types according to the N model generation data.

[0080] Among them, the signal routing tampering method of this embodiment is applied to HIL (Hardware-in-the-Loop) testing. HIL testing is an important verification method for system integration testing in the development process of automotive vehicle control strategies. The model generation file includes a CAN communication matrix, which can be an excel file. Automatically read all information of the signals in the excel file, including signal names (i.e., signal types), message names, default values, etc., and automatically generate interface models for all signals, such as simulink interface models, so as to control the routing module to forward signals, integrate and download the interface models and simulation models to the real-time processor of the host computer, and control the routing module through the CANoe tool of the host computer to achieve tamperable CAN signal routing.

[0081] In one embodiment, the method further includes: receiving model adjustment data; adjusting the interface model according to the model adjustment data.

[0082] Among them, configure the model adjustment data using the MATLAB workspace, adjust the simulation interface model through the model adjustment data, and provide an adjustment strategy for the interface model, facilitating testers to adjust the signal forwarding routing of the routing module by adjusting the interface model during the test.

[0083] It should be understood that although the steps in the flowcharts involved in the above-described embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear indication in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-described embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or alternately with at least a part of other steps or steps or stages in other steps.

[0084] Based on the same inventive concept, an embodiment of the present application further provides a signal routing tampering system for implementing the signal routing tampering method involved above. The implementation solutions provided by this system to solve problems are similar to the implementation solutions recorded in the above method. Therefore, the specific limitations in one or more embodiments of the signal routing tampering system provided below can refer to the limitations on the signal routing tampering method in the above text, and will not be repeated here.

[0085] In one embodiment, as Figure 5 shown, a signal routing tampering system is provided. The test system includes a host computer 10, M routing modules 20, and M control modules 30 to be tested. The first ends of the host computer 10 and the M routing modules 20 are both connected to a communication bus. The second ends of the M routing modules 20 are communicatively connected to the M control modules 30 to be tested. The host computer 10 and the M routing modules 20 are both connected to a PCI control bus. Among them:

[0086] The host computer 10 is configured to send signal configuration information to at least one of the M routing modules 20 through the PCI control bus.

[0087] The routing module 20 is configured to obtain the signal configuration information sent by the host computer 10 from the PCI control bus; in the case of receiving a signal to be transmitted, tamper with or intercept the signal to be transmitted according to the signal configuration information; the signal to be transmitted comes from the communication bus or the connected control module 30 to be tested; and forward the tampered signal.

[0088] In one implementation, referring to Figure 5 , the signal routing of the control module A to be tested is assigned two CAN bus channels (CAN Rx / Tx), namely channel 1 and channel 2; the signal routing of the control module B to be tested is assigned two CAN bus channels (CAN Rx / Tx), namely channel 3 and channel 4; the signal routing of the control module C to be tested is assigned two CAN bus channels (CAN Rx / Tx), namely channel 5 and channel 6. The CAN bus channels (CAN Rx / Tx) are used for receiving and sending CAN data. The CAN bus channel of the control module A to be tested is connected to channel 1, the CAN bus channel of the control module B to be tested is connected to channel 3, and the CAN bus channel of the control module C to be tested is connected to channel 5. The VT bench CAN channel channel 7 is connected to channel 2, channel 4, and channel 6 to complete the physical connection. Figure 5Only a test system with 3 signal routings is shown. In a specific implementation, more or fewer signal routings can also be set, and this embodiment does not limit this.

[0089] In the above test system, the host computer sends signal configuration information to at least one of the M routing modules through the PCI control bus; the routing module obtains the signal configuration information sent by the host computer from the PCI control bus; when receiving a signal to be transmitted, the signal to be transmitted is tampered with or intercepted according to the signal configuration information; the signal to be transmitted comes from the communication bus or the connected control module under test; the tampered signal is forwarded. It can tamper with or intercept signals between control modules and between a control module and the host computer, realizing two-way signal tampering, facilitating the verification of the functions of the control module or system by means of injection, improving the test efficiency of the control module. Compared with the manual adjustment method, the signal modification efficiency is high and the error rate is reduced.

[0090] In one embodiment, the routing module 20 is further configured to read a processing identifier in the signal configuration information; when the processing identifier is an interception identifier, intercept the signal to be transmitted; when the processing identifier is a tampering identifier, read corresponding tampering parameters from the signal configuration information according to the tampering strategy indicated by the tampering identifier; tamper with the signal to be transmitted according to the tampering parameters.

[0091] In one embodiment, the tampering strategy includes a numerical tampering strategy; the routing module 20 is further configured to read a signal value from the signal configuration information according to the numerical tampering strategy; use the read signal value as a tampering parameter.

[0092] In one embodiment, the tampering strategy includes a delayed sending strategy; the routing module 20 is further configured to read a sending time parameter from the signal configuration information according to the delayed sending strategy; use the read sending time parameter as a tampering parameter.

[0093] In one embodiment, the routing module 20 is further configured to read a processing identifier in the signal configuration information; when the processing identifier is an analog identifier, generate an analog signal according to the signal configuration information; forward the analog signal.

[0094] In one embodiment, the host computer 10 is provided with N interface models corresponding to N signal types; the host computer 10 is further configured to send the signal configuration information generated by the target interface model to the target routing module 20 through the PCI control bus; the target interface model corresponds to the target signal type, and the target routing module 20 receives the signal to be transmitted that matches the target signal type.

[0095] In one embodiment, the host computer 10 is further configured to receive a model generation file during a hardware-in-the-loop test; parse the model generation file to obtain N model generation data; the model generation data includes signal types; generate N interface models corresponding to the N signal types according to the N model generation data.

[0096] In one embodiment, the host computer 10 is further configured to receive model adjustment data; adjust the interface model according to the model adjustment data.

[0097] Each module in the above signal routing tampering system can be implemented in whole or in part by software, hardware, and combinations thereof. Each of the above modules can be embedded in or independent of a processor in a computer device in hardware form, or stored in a memory in a computer device in software form, so that the processor can call and execute the operations corresponding to each of the above modules.

[0098] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use, and processing of the relevant data need to comply with relevant regulations.

[0099] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, database, or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memories. Non-volatile memories can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memories can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc. The databases involved in the embodiments provided in the present application can include at least one of relational databases and non-relational databases. Non-relational databases can include distributed databases based on blockchain, etc., without limitation. The processors involved in the embodiments provided in the present application can be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, data processing logics based on quantum computing, etc., without limitation.

[0100] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0101] The above-described embodiments only represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the patent scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A signal routing tampering method, characterized in that, the method is applied to a routing module; a first end of the routing module is connected to a communication bus, a second end of the routing module is communicatively connected to a to-be-tested control module, a host computer and other routing modules are further connected to the communication bus, and both the routing module and the host computer are connected to a PCI control bus; the method includes: Obtaining signal configuration information sent by the host computer from the PCI control bus; When receiving a to-be-transmitted signal, tampering with or intercepting the to-be-transmitted signal according to the signal configuration information; the to-be-transmitted signal is from the communication bus or the to-be-tested control module; Performing a forwarding process on the tampered signal.

2. The method according to claim 1, characterized in that, the tampering with or intercepting the to-be-transmitted signal according to the signal configuration information includes: Reading a processing identifier in the signal configuration information; When the processing identifier is an interception identifier, intercepting the to-be-transmitted signal; When the processing identifier is a tampering identifier, reading corresponding tampering parameters from the signal configuration information according to the tampering strategy indicated by the tampering identifier; Tampering with the to-be-transmitted signal according to the tampering parameters.

3. The method according to claim 2, characterized in that, the tampering strategy includes a numerical tampering strategy; the reading corresponding tampering parameters from the signal configuration information according to the tampering strategy indicated by the tampering identifier includes: Reading a signal value from the signal configuration information according to the numerical tampering strategy; Using the read signal value as the tampering parameter.

4. The method according to claim 2, characterized in that, the tampering strategy includes a delayed sending strategy; the reading corresponding tampering parameters from the signal configuration information according to the tampering strategy indicated by the tampering identifier includes: Reading a sending time parameter from the signal configuration information according to the delayed sending strategy; Using the read sending time parameter as the tampering parameter.

5. The method according to any one of claims 1 to 4, characterized in that, after obtaining the signal configuration information sent by the host computer from the PCI control bus, the method further includes: Reading a processing identifier in the signal configuration information; When the processing identifier is an analog identifier, generating an analog signal according to the signal configuration information; Forwarding the analog signal.

6. A signal routing tampering method, characterized in that, the method is applied to a host computer; a first end of the host computer and M routing modules are both connected to a communication bus, a second end of the M routing modules is communicatively connected to M to-be-tested control modules, and both the host computer and the M routing modules are connected to a PCI control bus; the method includes: Sending signal configuration information to at least one of the M routing modules through the PCI control bus; wherein the signal configuration information is used to instruct the routing module to tamper with or intercept a to-be-transmitted signal received and perform a forwarding process on the tampered signal; the to-be-transmitted signal is from the communication bus or a connected to-be-tested control module.

7. The method according to claim 6, wherein, the host computer is provided with N interface models corresponding to N signal types; the method further includes: sending the signal configuration information generated by the target interface model to the target routing module through the PCI control bus; the target interface model corresponds to the target signal type, and the target routing module receives the signal to be transmitted that matches the target signal type.

8. The method according to claim 7, wherein, the method further includes: during the hardware-in-the-loop test, receiving the model generation file; analyzing the model generation file to obtain N model generation data; the model generation data includes signal types; generating N interface models corresponding to N signal types according to the N model generation data.

9. The method according to claim 7, wherein, the method further includes: receiving model adjustment data; adjusting the interface model according to the model adjustment data.

10. A test system, wherein, the test system includes a host computer, M routing modules, and M control modules to be tested. The first ends of the host computer and the M routing modules are both connected to the communication bus. The second ends of the M routing modules are communicatively connected to the M control modules to be tested. The host computer and the M routing modules are both connected to the PCI control bus; wherein: the host computer is configured to send signal configuration information to at least one of the M routing modules through the PCI control bus; the routing module is configured to obtain the signal configuration information sent by the host computer from the PCI control bus; when receiving the signal to be transmitted, tampering with or intercepting the signal to be transmitted according to the signal configuration information; the signal to be transmitted comes from the communication bus or the connected control module to be tested; and forwarding the tampered signal.

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