Three-layer heat flow coupling model of non-Newtonian fluid chip radiator and design method thereof
By using non-Newtonian fluid and three-layer heat flow coupling model in liquid-cooled radiator for topological optimization, an efficient chip radiator was designed, which solved the problem of insufficient cooling performance in the existing technology and achieved a more efficient heat dissipation effect.
Patent Information
- Application Number
- CN202510150560.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-11
- Publication Date
- 2025-06-03
AI Technical Summary
The cooling performance of existing liquid-cooled radiators is limited by the thermal dissipation efficiency of Newtonian fluid and the insufficient optimization of the two-dimensional heat flow coupling model, which is difficult to meet the needs of efficient heat dissipation.
A non-Newtonian fluid is used as a coolant and a three-layer heat flow coupling model is constructed. The optimized two-dimensional channel structure is designed through topological optimization, stretched into a three-dimensional runner, combining the bottom plate and the top plate to form an efficient radiator.
It significantly improves the cooling performance of the chip radiator, reduces the calculation cost, and ensures the accuracy and versatility of the optimized design.
Smart Images

Figure CN120086912A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of chip cooling, and relates to a three-layer heat flow coupling model of a non-Newtonian fluid chip radiator and a design method thereof. Background Art
[0002] With the continuous development of electronic chips towards high efficiency and miniaturization, the heat generation of electronic chips is increasing continuously. If heat cannot be dissipated in time, the continuous high-temperature environment will cause the reliability of the chips to decline, and further lead to a significant reduction in their service life; in extreme cases, it may even cause the core of the chips to melt down, thus bringing serious safety problems. Therefore, in order to ensure that electronic chips can dissipate heat in time, an efficient cooling device must be equipped. A cooling system with excellent performance is of great significance for maintaining the efficient and stable operation of electronic chips.
[0003] Currently, the mainstream cooling methods for electronic chips mainly include air cooling, liquid cooling, heat pipe cooling, etc. Among them, liquid-cooled radiators have the advantages of high heat dissipation efficiency, stable heat dissipation effect, low cost, etc., and are widely used in various chips. In such devices, the heat generated by the heat source is first transferred to the coolant in the cooling channel by heat conduction through the metal substrate, and then taken out of the radiator by convective heat transfer. The structure of the cooling channel is an important factor affecting the cooling performance of the liquid-cooled radiator. In order to improve the cooling performance of the radiator, it is necessary to optimize the structure of the cooling channel. The existing main structure improvement methods include heuristic design methods, trial improvement methods, and size parameter optimization methods that rely on the intuition and experience of designers.
[0004] Although these methods have certain engineering practical value, they are all limited by the initial configuration and parameters, etc., and it is difficult to design to achieve excellent performance of the equipment. Compared with traditional methods, the topology optimization method has higher design freedom and can achieve a large improvement in equipment performance. In recent years, the rapid development of additive manufacturing technology has provided a practical processing solution for the preparation of complex channels, enabling those cooling channels with excellent performance but complex structures obtained by topology optimization to be more widely applied in actual engineering projects. Currently, the mainstream heat flow coupling models used for topology optimization of cooling channels mainly include the classical full three-dimensional heat flow coupling model and the classical two-dimensional heat flow coupling model. When using the classical full three-dimensional heat flow coupling model for topology optimization, due to the huge computational amount of numerical solution, it is often difficult to meet the efficiency requirements in engineering practice. On the contrary, if the classical two-dimensional heat flow coupling model is adopted, although the computational amount is small, due to the insufficient consideration of the flow and heat transfer effects on the channel wall surface in the height direction, the optimization result may not be accurate enough. In addition to the structure of the cooling channel, the coolant is also an important factor affecting the cooling performance of the radiator. The coolants of traditional liquid-cooled radiators are mostly Newtonian fluids, and the heat dissipation efficiency is limited. Summary of the Invention
[0005] The purpose of the present invention is to overcome the above-mentioned disadvantages of the prior art, and provides a three-layer heat flow coupling model and a design method thereof for a non-Newtonian fluid chip radiator, and the radiator designed by this method has a relatively high heat dissipation efficiency.
[0006] To achieve the above object, the present invention discloses a design method for a three-layer heat flow coupling model of a non-Newtonian fluid chip radiator, including the following steps:
[0007] According to the actual working conditions of the chip, determine the heat source application method, environmental parameters and boundary conditions during the radiator design process, and determine the structural dimension parameters of the radiator;
[0008] Adopt a power-law non-Newtonian fluid as the coolant of the chip radiator;
[0009] Construct a three-layer heat flow coupling model of the non-Newtonian fluid chip radiator;
[0010] Based on the three-layer heat flow coupling model, according to the performance requirements of the chip radiator, determine the objective function of the optimization problem, and construct a three-layer topology optimization model of the chip radiator;
[0011] Perform iterative optimization on the three-layer topology optimization model of the chip radiator to obtain an optimized two-dimensional channel structure;
[0012] Stretch the optimized two-dimensional channel structure into a three-dimensional flow channel, and combine the three-dimensional flow channel with the bottom plate and the top plate to obtain a non-Newtonian fluid chip radiator.
[0013] A further improvement of the design method for the three-layer heat flow coupling model of the non-Newtonian fluid chip radiator of the present invention lies in:
[0014] Furthermore, adopt a variational dimension reduction method to construct a three-layer heat flow coupling model of the non-Newtonian fluid chip radiator.
[0015] Furthermore, based on the density method, construct a three-layer topology optimization model of the chip radiator.
[0016] Furthermore, use the moving asymptote algorithm to perform iterative optimization on the three-layer topology optimization model of the chip radiator to obtain an optimized two-dimensional channel structure.
[0017] Furthermore, the process of adopting the variational dimension reduction method to construct a three-layer heat flow coupling model of the non-Newtonian fluid chip radiator is as follows:
[0018] Construct a quasi-three-dimensional flow equation of the chip radiator;
[0019] Construct a three-layer heat transfer equation of the chip radiator;
[0020] Based on the quasi-three-dimensional flow equation of the chip heat sink and the three-layer heat transfer equation of the chip heat sink, a three-layer thermal-fluid coupling model of the non-Newtonian fluid chip heat sink is constructed.
[0021] Furthermore, the quasi-three-dimensional flow equation of the chip heat sink is:
[0022]
[0023] Where:
[0024]
[0025] Where B(p, q) is the Euler integral of the first kind B function, S 1 , S 2 , S 3 and S 4 are all adjustment parameters of the flow equation, ρ is the fluid density, p represents the two-dimensional pressure field in the central cross-section of the intermediate channel, u = [u 1 , u 2 T represents the two-dimensional velocity field in the intermediate layer, n is the power-law exponent of the power-law non-Newtonian fluid, and H m is half of the height of the intermediate channel.
[0026] Furthermore, the three-layer heat transfer equation of the chip heat sink is:
[0027]
[0028] Where:
[0029]
[0030]
[0031] Where k s is the thermal conductivity of the solid, k f is the thermal conductivity of the fluid, C is the specific heat capacity of the fluid, e is the adjustment parameter of the interlayer heat transfer coefficient, W is the adjustment parameter of the heat transfer equation, T b represents the two-dimensional temperature field in the central cross-section of the bottom plate, T t represents the two-dimensional temperature field in the central cross-section of the top plate, T 2 represents the two-dimensional temperature field in the intermediate layer, q 0 represents the heat flux input by the heat source, H b represents half of the height of the bottom plate, H t represents half of the height of the top plate, h b-1 represents the heat transfer coefficient between the bottom layer and interface 1, h 1-2 represents the heat transfer coefficient between interface 1 and the intermediate layer, h 2-3 represents the heat transfer coefficient between the middle layer and the interface 3. The interface between the bottom plate and the middle channel is interface 1, and the interface between the middle channel and the top plate is interface 3, h b-2 and h 2-t respectively represent the heat transfer coefficient between the bottom layer and the middle layer and the heat transfer coefficient between the middle layer and the top layer.
[0032] Furthermore, the process of constructing the three-layer topology optimization model of the chip radiator based on the density method is as follows:
[0033] Construct the flow equation as:
[0034]
[0035] where F is the virtual body force term, and F is:
[0036] F = -α max (1 - γ q )u (7)
[0037] where α max is the maximum value of the body force, and q is the penalty parameter;
[0038] Construct the heat transfer equation as:
[0039]
[0040] where k(γ) is the effective thermal conductivity, h′ b-2 is the effective heat transfer coefficient between the bottom layer and the middle layer, and h′ 2-t is the effective heat transfer coefficient between the middle layer and the top layer.
[0041] Furthermore, the effective thermal conductivity k(γ), the effective heat transfer coefficient h′ b-2 between the bottom layer and the middle layer, and the effective heat transfer coefficient h′ 2-t between the middle layer and the top layer are respectively:
[0042]
[0043] k(γ) = k f γ q + k s (1 - γ q ) (10)
[0044] where h′ 1-2 represents the effective heat transfer coefficient between interface 1 and the middle layer, and h′ 2-3 represents the effective heat transfer coefficient between the middle layer and interface 3.
[0045] The present invention discloses a three - layer thermal - flow coupling model of a non - Newtonian fluid chip radiator, which is designed based on the design method of the three - layer thermal - flow coupling model of the non - Newtonian fluid chip radiator.
[0046] The present invention has the following beneficial effects:
[0047] When the three - layer thermal - flow coupling model of the non - Newtonian fluid chip radiator and its design method of the present invention are specifically operated, according to the actual working conditions of the chip, determine the heat source application method, environmental parameters, and boundary conditions of the radiator, and determine the structural dimension parameters of the radiator; select the power - law non - Newtonian fluid as the coolant of the radiator; construct the three - layer thermal - flow coupling model of the non - Newtonian fluid chip radiator; according to the performance requirements of the chip radiator, determine the objective function of the optimization problem, and construct the three - layer topology optimization model of the chip radiator; perform iterative optimization on the three - layer topology optimization model of the chip radiator to obtain the optimized two - dimensional channel structure; stretch the optimized two - dimensional channel structure into a three - dimensional flow channel, and combine the three - dimensional flow channel with the bottom plate and the top plate to obtain the chip radiator. It should be noted that the present invention does not rely on the experience of designers, has strong versatility, and can significantly improve the cooling performance of the radiator. In addition, the present invention uses the power - law non - Newtonian fluid as the coolant of the chip radiator, which can improve the cooling performance of the chip radiator.
[0048] Furthermore, the present invention uses the three - layer thermal - flow coupling model for topology optimization, which can greatly reduce the calculation cost, ensure sufficient accuracy at the same time, and achieve a more efficient optimization design. Brief Description of the Drawings
[0049] The specification drawings forming a part of the present invention are used to provide a further understanding of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation to the present invention. In the drawings:
[0050] Figure 1 is the flow chart of the design method of the non - Newtonian fluid chip radiator in this example;
[0051] Figure 2 is the schematic diagram of the topology optimization geometric model;
[0052] Figure 3 is the two - dimensional flow channel structure diagram obtained by topology optimization;
[0053] Figure 4 is the structure diagram of the three - dimensional flow channel;
[0054] Figure 5 is the schematic diagram of the non - Newtonian fluid chip radiator. Detailed Embodiments
[0055] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part rather than all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.
[0056] In the description of the present invention, it should be understood that the terms "include" and "comprise" indicate the presence of the described features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or their combinations.
[0057] It should also be understood that the terms used in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include the plural forms.
[0058] It should be further understood that the term " / and" as used in the specification of the present invention and the appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in the present invention generally represents an "or" relationship between the contextually related objects.
[0059] It should be understood that although the terms first, second, third, etc. may be used in the embodiments of the present invention to describe preset ranges, etc., these preset ranges should not be limited to these terms. These terms are only used to distinguish the preset ranges from each other. For example, without departing from the scope of the embodiments of the present invention, the first preset range may also be referred to as the second preset range, and similarly, the second preset range may also be referred to as the first preset range.
[0060] Depending on the context, the word "if" as used herein may be interpreted as "when" or "while" or "in response to determining" or "in response to detecting". Similarly, depending on the context, the phrase "if determined" or "if detected (stated condition or event)" may be interpreted as "when determined" or "in response to determining" or "when detected (stated condition or event)" or "in response to detecting (stated condition or event)".
[0061] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Usually, the components described and shown in the accompanying drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.
[0062] Various structural schematic diagrams according to the disclosed embodiments of the present invention are shown in the accompanying drawings. These figures are not drawn to scale, where for the purpose of clear expression, some details are enlarged and some details may be omitted. The shapes of various regions and layers shown in the figures and their relative sizes and positional relationships are merely exemplary. In practice, there may be deviations due to manufacturing tolerances or technical limitations, and those skilled in the art can design regions / layers with different shapes, sizes, and relative positions according to actual needs.
[0063] Embodiment 1
[0064] Reference Figure 1 , the three - layer thermal - flow coupling model design method of the non - Newtonian fluid chip radiator described in the present invention includes the following steps:
[0065] 1) According to the actual working conditions of the chip, determine the heat source application method, environmental parameters, and boundary conditions during the radiator design process, and determine the structural dimension parameters of the radiator;
[0066] 2) Use a power - law non - Newtonian fluid as the coolant of the chip radiator;
[0067] 3) Construct a three - layer thermal - flow coupling model of the non - Newtonian fluid chip radiator;
[0068] 4) According to the performance requirements of the chip radiator, determine the objective function of the optimization problem and construct a three - layer topology optimization model of the chip radiator;
[0069] 5) Iteratively optimize the three - layer topology optimization model of the chip radiator to obtain an optimized two - dimensional channel structure;
[0070] 6) Stretch the optimized two - dimensional channel structure into a three - dimensional flow channel, and combine the three - dimensional flow channel with the bottom plate and the top plate to obtain a chip radiator.
[0071] In this embodiment, a variational dimensionality reduction method is adopted to construct a three-layer heat-fluid coupling model of a non-Newtonian fluid chip radiator.
[0072] In this embodiment, a three-layer topology optimization model of the chip radiator is constructed based on the density method.
[0073] In this embodiment, the process of constructing a three-layer heat-fluid coupling model of a non-Newtonian fluid chip radiator by using the variational dimensionality reduction method is as follows:
[0074] 31) Use the variational dimensionality reduction method to construct a quasi-three-dimensional flow equation of the chip radiator;
[0075] 32) Construct a three-layer heat transfer equation of the chip radiator;
[0076] 33) According to the quasi-three-dimensional flow equation of the chip radiator and the three-layer heat transfer equation of the chip radiator, construct a three-layer heat-fluid coupling model of the non-Newtonian fluid chip radiator.
[0077] It should be noted that referring to Figure 2 , the non-Newtonian fluid chip radiator is composed of a bottom plate, an intermediate channel and a top plate. Let the central cross-section of the bottom plate be the bottom layer, the central cross-section of the intermediate channel be the intermediate layer, and the central cross-section of the top plate be the top layer. The interface between the bottom plate and the intermediate channel is interface 1, and the interface between the intermediate channel and the top plate is interface 3.
[0078] Specifically, the specific process of constructing a quasi-three-dimensional flow equation of the chip radiator by using the variational dimensionality reduction method is as follows:
[0079] According to the characteristics of the power-law non-Newtonian fluid, the three-dimensional velocity field in the intermediate channel can be expressed as:
[0080]
[0081]
[0082] Among them, represents the three-dimensional flow velocity field of the intermediate channel, u = [u 1 , u 2 T represents the two-dimensional velocity field in the intermediate layer, and are the three standard basis vectors of the three-dimensional Cartesian coordinate system, f 1 (z) is the velocity-related profile function in the height direction of the intermediate channel, n is the power-law index of the power-law non-Newtonian fluid, and H m is half of the height of the intermediate channel;
[0083] The apparent viscosity of the power-law non-Newtonian fluid is:
[0084]
[0085] Among them, K is the consistency coefficient, γ is the shear rate, and the expression of γ is:
[0086] γ = (2D ij D ij ) 1 / 2 (14)
[0087] Among them, D ij is the strain rate tensor, and the expression of D ij is:
[0088]
[0089] Among them, the subscripts i, j = 1, 2, 3 respectively represent the three Cartesian coordinate components of the three-dimensional problem. Substituting equations (11), (14), and (15) into equation (13), the expanded form of the apparent viscosity of the power-law non-Newtonian fluid is obtained as:
[0090]
[0091] Among them, the subscripts α, β = 1, 2 respectively represent the two Cartesian coordinate components of the two-dimensional problem in the intermediate layer, and the apparent viscosity is further simplified to:
[0092]
[0093] Among them, is the apparent viscosity of the power-law non-Newtonian fluid, f 2 (z) is the viscosity-related profile function in the height direction of the intermediate channel, μ represents the viscosity function in the intermediate layer, and the expressions of f 2 (z) and μ are respectively:
[0094]
[0095]
[0096] Suppose the pressure is uniformly distributed in the height direction in the intermediate channel, and the three-dimensional pressure field is:
[0097]
[0098] Among them, represents the three-dimensional pressure field of the intermediate channel, and p represents the two-dimensional pressure field in the intermediate layer;
[0099] The three-dimensional flow equation of the intermediate channel is:
[0100]
[0101] Among them, ρ is the fluid density, represents a three-dimensional gradient operator, is the stress tensor, is the unit tensor;
[0102] Set the inlet pressure to Δp at the inlet of the middle channel, the outlet pressure to 0 at the outlet, and the other boundaries to no-slip boundaries; introduce the three-dimensional test velocity and the three-dimensional test pressure to obtain the weak form of the flow control equation (21):
[0103] Find such that:
[0104]
[0105] where, and are the feasible regions of the three-dimensional velocity and the three-dimensional test velocity respectively; and are the feasible regions of the three-dimensional pressure and the three-dimensional test pressure respectively; according to the arbitrariness of the test function and the flow velocity and pressure distribution form in the middle channel, where the three-dimensional velocity and the three-dimensional test velocity are expressed as:
[0106]
[0107] where, and ω(x, y) are two-dimensional test functions; simplify the triple integral to a double integral, and integrate the f 1 (z) and f 2 (z) terms that depend on z in the weak form; further reduce the weak form equation to a strong form equation according to the arbitrariness of the test function, and obtain the quasi-three-dimensional flow equation in the middle layer as:
[0108]
[0109] where:
[0110]
[0111] where B(p, q) is the Euler integral of the first kind B function, and S 1 , S 2 , S 3 and S 4 are all adjustment parameters of the flow equation.
[0112] In this embodiment, the specific process of constructing the three-layer heat transfer equation of the chip radiator by using the variational dimensionality reduction method is as follows:
[0113] The three characteristic temperature layers in the middle channel are respectively:
[0114]
[0115] Among them, represents the three-dimensional temperature field in the middle channel, and T 1 represents the two-dimensional temperature field in interface 1, and T 2 represents the two-dimensional temperature field in the middle layer, and T 3 represents the two-dimensional temperature field in interface 2;
[0116] It is assumed that the temperature distribution form in the middle channel satisfies the adaptive second-order temperature distribution, and the temperature at any point in the middle channel can be obtained by interpolation calculation from the temperatures of the intersection points of the cross-sectional line in the z direction passing through this point and the three characteristic temperature layers;
[0117] Using the second-order Lagrangian interpolation function to represent the temperature curve, the three-dimensional temperature field in the middle channel can be expressed as:
[0118]
[0119] Expand the formula (27) into the form:
[0120]
[0121] Let the temperature-related profile function f 3 (z) of the middle channel, and its expression is:
[0122]
[0123] In the radiator, the heat source is input at the bottom of the bottom plate, and the top of the top plate is an adiabatic boundary. The three-dimensional temperature fields of the bottom plate and the top plate are respectively:
[0124]
[0125]
[0126] Among them, represents the three-dimensional temperature field in the bottom plate, represents the three-dimensional temperature field in the top plate; q0 represents the heat flux input by the heat source, and H b represents half of the height of the bottom plate, and k s represents the thermal conductivity of the solid;
[0127] For the middle channel, the three-dimensional convective heat transfer control equation is:
[0128]
[0129] Among them, C represents the specific heat capacity of the fluid, and k f represents the thermal conductivity of the fluid; after introducing the three-dimensional test temperature the weak form of the three-dimensional convective heat transfer equation is obtained;
[0130] Find such that:
[0131]
[0132] Among them, and respectively represent the feasible regions of the three-dimensional temperature and the three-dimensional test temperature ;
[0133] According to the arbitrariness of the test function and the temperature distribution form in the intermediate channel, the three-dimensional test temperature is expressed as:
[0134]
[0135] Among them, θ is the two-dimensional test function; the triple integral is simplified to a double integral, and the integration with respect to z is performed in the weak form, and then the weak form is restored to the strong form, and the two-dimensional convective heat transfer equation of the intermediate layer is obtained as:
[0136]
[0137] Among them, e is the adjustment parameter of the interlayer heat transfer coefficient, and the value of e changes with the different power-law exponents n. The same method is used for the bottom plate and the top plate, and the two-dimensional heat transfer equations of the bottom layer and the top layer are obtained respectively as:
[0138]
[0139]
[0140] Among them, k s represents the thermal conductivity of the solid; according to the simplified heat transfer equations of the bottom layer, the intermediate layer and the top layer, the heat transfer coefficients h b-1 between the bottom layer and the interface 1, h 1-2 between the interface 1 and the intermediate layer, and h 2-3 between the intermediate layer and the interface 3 are respectively:
[0141]
[0142] Let the unified heat transfer coefficient h b-2 between the bottom layer and the intermediate layer and the unified heat transfer coefficient h 2-t between the intermediate layer and the top layer be respectively:
[0143]
[0144] Considering the thermal coupling between layers, according to the conservation of heat flux, it satisfies:
[0145] h b-2 (T b -T 2 ) = h 1-2 (T 1 -T 2 ) = h b - 1 (T b -T 1 ) (40)
[0146] h 2-t (T 2 -T t ) = h 2-3 (T 2 -T 3 ) (41)
[0147] At this time, the heat transfer equations for the three layers become:
[0148]
[0149] Based on the quasi-three-dimensional flow equation and the three-layer heat transfer equation, a three-layer thermal-fluid coupling model of the radiator is constructed.
[0150] In this embodiment, the specific process of constructing the three-layer topology optimization model of the chip radiator is as follows:
[0151] Topology optimization is carried out using the density method. The design variable γ is introduced, and its value range is [0, 1]. When the design variable γ takes 1, it represents the fluid, and when the design variable γ takes 0, it represents the solid; and the flow and heat transfer control equations are processed accordingly:
[0152] In equation (24), a virtual body force term F is added, and the flow control equation becomes:
[0153]
[0154] Among them, the expression of the virtual body force term F is:
[0155] F = -α max (1 - γ q )u (44)
[0156] Among them, α max represents the maximum value of the body force, and q is the penalty parameter;
[0157] Introduce the effective thermal conductivity k(γ) into the heat transfer control equation (42), and the heat transfer control equation becomes:
[0158]
[0159] where.
[0160]
[0161] where, h′ b-2 represents the effective heat transfer coefficient between the bottom layer and the middle layer, h′ 2-t represents the effective heat transfer coefficient between the middle layer and the top layer, h′ 1-2 represents the effective heat transfer coefficient between the interface 1 and the middle layer, h′ 2-3 represents the effective heat transfer coefficient between the middle layer and the interface 3;
[0162] Interpolate the thermal conductivity of the material using an exponential interpolation function, and the expression of the effective thermal conductivity k(γ) is:
[0163] k(γ) = k f γ q + k s (1 - γ q ) (47)
[0164] According to the performance requirements of the chip radiator, select the average temperature of the bottom layer as the objective function of the optimization problem.
[0165] Use the moving asymptote algorithm to iteratively optimize the three-layer topology optimization model of the chip radiator to obtain the optimized two-dimensional channel structure.
[0166] Stretch the optimized two-dimensional channel structure into a three-dimensional flow channel, and combine the three-dimensional flow channel with the bottom plate and the top plate to obtain a complete chip radiator.
[0167] Example Two
[0168] This example includes the following steps:
[0169] 1) Determine the heat source intensity, environmental parameters, and boundary conditions for topology optimization;
[0170] Specifically, determine that the power of the heat source is 20 W according to the actual working conditions of the chip;
[0171] According to the actual working environment of the chip, set the environmental temperature to room temperature 293.15 K, the initial temperature of the fluid is also 293.15 K, the outlet uses a boundary condition with a static pressure of 0, and the inlet pressure is set to 50 Pa;
[0172] The heat flux is input from the bottom boundary of the bottom plate, and the top of the top plate is set as an adiabatic boundary condition.
[0173] 2) Determine the geometric dimensions of the radiator;
[0174] Determine the planar dimension of the radiator to be 20 mm × 20 mm according to the planar dimension of the chip, and set the thicknesses of the radiator bottom plate, middle channel, and top plate to be 1 mm, 2 mm, and 1 mm respectively.
[0175] 3) Select an aqueous solution of carboxymethyl cellulose (CMC) with a concentration of 100 ppm as the coolant of the radiator. Its power-law index n is 0.9512, the consistency coefficient K is 0.00383 [kg / m·s 2-n , the density ρ is 1000 [kg / m 3 , the thermal conductivity k f is 0.7 [W / (m·K)], and the specific heat capacity C is 4100 [J / kg·K]; select aluminum alloy as the solid material, with a density of 2700 [kg / m 3 , the thermal conductivity k s is 160 [W / (m·K)], and the specific heat capacity is 900 [J / kg·K].
[0176] 4) Use the variational dimension reduction method to construct a three-layer thermal-fluid coupling model of the radiator. The simplified flow equation and the three-layer heat transfer equation are:
[0177] Among them, the flow equation is:
[0178]
[0179] Among them, the heat transfer equation is:
[0180]
[0181] In this embodiment, the values of the adjusted parameters are: S 1 = 0.93 [mm], S 2 = 1.31 [mm], S 3 = 1.09 [mm], S 4 = 2.89 [1 / mm], W = 0.57, e = 2.2.
[0182] 5) Select the average temperature of the bottom layer as the objective function, use the density method for topology optimization. When the design variable γ takes 1, it represents the fluid, and when the design variable γ takes 0, it represents the solid. Add a virtual body force term F to the flow equation;
[0183] F = -α max (1 - γ q )u
[0184] The value of the maximum body force α max is taken as 2×10 7[Pa·s / m 2 , the value of the penalty parameter q is 3;
[0185] Interpolate the thermal conductivity of the material using an interpolation function:
[0186] k(γ) = k f γ q + k s (1 - γ q )
[0187] where k(γ) is the effective thermal conductivity after interpolation, and the effective thermal conductivity is used to replace the thermal conductivity of the solid and fluid in the heat transfer equation.
[0188] 7) The optimization algorithm is the moving asymptotes optimization algorithm. Use the Helmholtz-type partial differential equation to filter the porosity field of the design domain. Set the maximum number of iterations to 200 times and the convergence accuracy to 1E-3 for optimization iteration.
[0189] 8) After obtaining the optimization result, set the projection threshold to 0.5. Obtain a clear flow channel structure through projection processing. Vertically stretch the flow channel structure by 2 mm in the height direction to obtain a three-dimensional flow channel structure. Assemble a bottom plate and a top plate with a height of 1 mm each on the top and bottom of the three-dimensional flow channel structure to obtain a complete non-Newtonian fluid chip radiator. Refer to Figure 3 、 Figure 4 and Figure 5 .
[0190] Example 3
[0191] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the steps of the three-layer heat flow coupling model design method for the non-Newtonian fluid chip radiator. For example, it includes: determining the heat source application method, environmental parameters, and boundary conditions during the radiator design process according to the actual working conditions of the chip, and determining the structural dimension parameters of the radiator; using a power-law non-Newtonian fluid as the coolant for the chip radiator; constructing a three-layer heat flow coupling model for the non-Newtonian fluid chip radiator; based on the three-layer heat flow coupling model, determining the objective function of the optimization problem according to the performance requirements of the chip radiator, and constructing a three-layer topology optimization model for the chip radiator; performing iterative optimization on the three-layer topology optimization model of the chip radiator to obtain an optimized two-dimensional channel structure; stretching the optimized two-dimensional channel structure into a three-dimensional flow channel, and combining the three-dimensional flow channel with the bottom plate and the top plate to obtain a non-Newtonian fluid chip radiator. Among them, the memory may include internal memory, such as high-speed random access memory, and may also include non-volatile memory, such as at least one disk memory, etc.; the processor, network interface, and memory are interconnected through an internal bus, which can be an Industry Standard Architecture bus, a Peripheral Component Interconnect standard bus, an Extended Industry Standard Architecture bus, etc., and the bus can be divided into an address bus, a data bus, a control bus, etc. The memory is used to store programs. Specifically, the program may include program code, and the program code includes computer operation instructions. The memory may include internal memory and non-volatile memory, and provide instructions and data to the processor.
[0192] Embodiment Four
[0193] A computer-readable storage medium stores a computer program which, when executed by a processor, implements the steps of the three-layer heat flow coupling model design method for a non-Newtonian fluid chip radiator. For example, it includes: determining the heat source application method, environmental parameters, and boundary conditions during the radiator design process according to the actual working conditions of the chip, and determining the structural dimension parameters of the radiator; using a power-law non-Newtonian fluid as the coolant for the chip radiator; constructing a three-layer heat flow coupling model for the non-Newtonian fluid chip radiator; based on the three-layer heat flow coupling model, determining the objective function of the optimization problem according to the performance requirements of the chip radiator, and constructing a three-layer topology optimization model for the chip radiator; performing iterative optimization on the three-layer topology optimization model of the chip radiator to obtain an optimized two-dimensional channel structure; stretching the optimized two-dimensional channel structure into a three-dimensional flow channel, and combining the three-dimensional flow channel with the bottom plate and the top plate to obtain a non-Newtonian fluid chip radiator. Specifically, the computer-readable storage medium includes but is not limited to, for example, volatile memory and / or non-volatile memory. The volatile memory may include random access memory (RAM) and / or cache memory, etc. The non-volatile memory may include read-only memory (ROM), hard disk, flash memory, optical disc, magnetic disk, etc.
[0194] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk memory, CD-ROM, optical memory, etc.) containing computer-usable program code.
[0195] The present application is described with reference to the flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each flow and / or block in the flowchart and / or block diagram, and the combination of flows and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing devices generate means for implementing the functions specified in one Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.
[0196] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to operate in a particular manner, such that the instructions stored in the computer-readable memory produce a manufacture including an instruction device that implements the functions specified in one or more of the processes Figure 1 or blocks Figure 1 specified in one or more of the processes and / or blocks.
[0197] These computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, whereby the instructions executed on the computer or other programmable apparatus provide steps for implementing the functions specified in one or more of the processes Figure 1 or blocks Figure 1 specified in one or more of the processes and / or blocks.
[0198] Other embodiments of the present invention will be readily apparent to those skilled in the art upon consideration of the specification and disclosure of the invention. This application is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the invention and including such departures from the present disclosure as come within known or customary practice in the art to which the invention pertains and which are not disclosed herein. The specification and examples are to be considered exemplary only, with the true scope and spirit of the invention being indicated by the following claims.
[0199] It should be understood that the present invention is not limited to the exact construction described above and shown in the drawings, and various modifications and changes may be made without departing from its scope. The scope of the present invention is limited only by the appended claims.
[0200] The above are only the preferred embodiments of the present invention and do not impose any limitation on the present invention. Any simple modifications, changes, and equivalent structural changes made to the above embodiments according to the technical essence of the present invention still fall within the scope of the technical solution of the present invention.
Claims
1. A design method for a three-layer thermal-fluid coupling model of a non-Newtonian fluid chip heat sink, characterized in that: The following steps are involved: According to the actual working conditions of the chip, determine the heat source application method, environmental parameters and boundary conditions in the heat sink design process, and determine the structural size parameters of the heat sink; A power-law non-Newtonian fluid is used as the coolant for the chip heat sink; Construct a three-layer thermal-fluid coupling model of a non-Newtonian fluid chip heat sink; Based on the three-layer thermal flow coupling model and the performance requirements of the chip heat sink, the objective function of the optimization problem is determined, and a three-layer topology optimization model of the chip heat sink is constructed; Iteratively optimizing the three-layer topology optimization model of the chip heat sink to obtain an optimized two-dimensional channel structure; The optimized two-dimensional channel structure is stretched into a three-dimensional flow channel, and the three-dimensional flow channel is combined with a bottom plate and a top plate to obtain a non-Newtonian fluid chip heat sink.
2. The design method of the three-layer thermal-fluid coupling model of the non-Newtonian fluid chip heat sink according to claim 1 is characterized in that: A three-layer thermal-fluid coupling model of non-Newtonian fluid chip heat sink is constructed using variational dimensionality reduction method.
3. The design method of the three-layer thermal-fluid coupling model of the non-Newtonian fluid chip heat sink according to claim 1 is characterized in that: Based on the density method, a three-layer topology optimization model of the chip heat sink is constructed.
4. The design method of the three-layer thermal-fluid coupling model of the non-Newtonian fluid chip heat sink according to claim 1 is characterized in that: The three-layer topology optimization model of the chip heat sink is iteratively optimized using a moving asymptote algorithm to obtain an optimized two-dimensional channel structure.
5. The design method of the three-layer thermal-fluid coupling model of the non-Newtonian fluid chip heat sink according to claim 2 is characterized in that: The process of constructing a three-layer thermal-fluid coupling model of a non-Newtonian fluid chip heat sink using a variational dimensionality reduction method is as follows: Construct the quasi-three-dimensional flow equations for chip heat sinks; Construct the three-layer heat transfer equation of the chip heat sink; According to the quasi-three-dimensional flow equation of the chip heat sink and the three-layer heat transfer equation of the chip heat sink, a three-layer thermal-fluid coupling model of the non-Newtonian fluid chip heat sink is constructed.
6. The design method of the three-layer thermal-fluid coupling model of the non-Newtonian fluid chip heat sink according to claim 5 is characterized in that: The quasi-three-dimensional flow equation of the chip heat sink is: in: Where B(p, q) is the first kind of Euler integral B function, S1, S2, S3 and S4 are the adjustment parameters of the flow equation, ρ is the fluid density, p represents the two-dimensional pressure field in the central section of the middle channel, u = [u1, u2] T represents the two-dimensional velocity field in the middle layer, n is the power law index of the power-law non-Newtonian fluid, H m It is half the height of the middle channel.
7. The design method of the three-layer thermal-fluid coupling model of the non-Newtonian fluid chip heat sink according to claim 5 is characterized in that: The three-layer heat transfer equation of the chip heat sink is: in: Among them, k s is the thermal conductivity of the solid, k f is the thermal conductivity of the fluid, C is the specific heat capacity of the fluid, e is the adjustment parameter of the interlayer heat transfer coefficient, W is the adjustment parameter of the heat transfer equation, T b represents the two-dimensional temperature field in the center section of the bottom plate, T t represents the two-dimensional temperature field in the center section of the top plate, T2 represents the two-dimensional temperature field in the middle layer, q0 represents the heat flux input by the heat source, H b Indicates half of the base height, H t Indicates half of the top plate height, h b-1 represents the heat transfer coefficient between the bottom layer and the interface 1, h 1-2 represents the heat transfer coefficient between interface 1 and the middle layer, h 2-3 represents the heat transfer coefficient between the middle layer and the interface 3. The interface between the bottom plate and the middle channel is interface 1, and the interface between the middle channel and the top plate is interface 3. b-2 and h 2-t They represent the heat transfer coefficient between the bottom layer and the middle layer and between the middle layer and the top layer, respectively.
8. The design method of the three-layer thermal-fluid coupling model of the non-Newtonian fluid chip heat sink according to claim 3 is characterized in that: The process of constructing a three-layer topology optimization model of a chip heat sink based on the density method is as follows: The flow equation is constructed as: Among them, F is the virtual body force term, F is: F=-a max (1-c q )u (7) Among them, α max is the maximum value of the body force, q is the penalty parameter; The heat transfer equation is constructed as: Where k(γ) is the effective thermal conductivity, h′ b-2 is the effective heat transfer coefficient between the bottom layer and the middle layer, h′ 2-t is the effective heat transfer coefficient between the middle layer and the top layer.
9. The design method of the three-layer thermal-fluid coupling model of the non-Newtonian fluid chip heat sink according to claim 8, characterized in that: Effective thermal conductivity k(γ), effective heat transfer coefficient h′ between the bottom layer and the middle layer b-2 and the effective heat transfer coefficient h′ between the middle layer and the top layer 2-t They are: k(γ)=k f c q +k s (1-c q ) (10) Among them, h′ 1-2 represents the effective heat transfer coefficient between interface 1 and the middle layer, h′ 2-3 Represents the effective heat transfer coefficient between the intermediate layer and the interface 3.
10. A three-layer thermal-fluid coupling model of a non-Newtonian fluid chip heat sink, characterized in that: The heat sink is designed based on the design method of the three-layer thermal-fluid coupling model of the non-Newtonian fluid chip heat sink described in any one of claims 1-9.