PCIe test device with universality and method thereof

Abstract

A universal PCIe test device and a universal PCIe test method are provided, a unit to be tested and a universal adapter card device are electrically connected through an intermediary card and a connecting line, and the universal adapter card device comprises a plurality of connectors used for connecting a virtual PCIe card and an input / output carrier plate and providing power needed by the intermediary card and the input / output carrier plate. The controller executes a plurality of test instructions so as to test a signal to be tested on a circuit loop formed by the unit to be tested, the intermediary card, the connecting line, the universal adapter card device and the virtual PCIe card, the universal adapter card device tests a differential signal, a grounding signal and a conventional input / output signal, and the virtual PCIe card is used for testing the signal to be tested on a circuit loop formed by the unit to be tested, the intermediary card, the connecting line, the universal adapter card device and the virtual PCIe card. And the unconventional input / output is transmitted to the input / output carrier plate for testing, so that the technical effects of improving the testing efficiency and reducing the testing cost are achieved.

Description

Technical Field

[0001] The present invention relates to a PCIe testing device and a method thereof, in particular to a universal PCIe testing device and a method thereof. Background Art

[0002] In recent years, with the popularization and vigorous development of semiconductor technology, various electronic products have sprung up like mushrooms after rain. However, electronic products have many components and complex circuits. How to ensure the quality of the products has always been one of the problems that manufacturers are eager to solve.

[0003] Generally speaking, to ensure that the product is good, various testing methods are used. Taking the traditional test server as an example, the first method is to use the server's motherboard with installed components, such as hard disks of various specifications for testing; the second method uses a special adapter card with components for testing. However, the first method has the disadvantages of time-consuming testing and high cost; the second method requires customized development for each specification, so it also has the disadvantages of time-consuming and high cost. Therefore, the traditional method has the problems of low testing efficiency and high testing cost. Therefore, there is an urgent need for a solution that can reduce the customized development time, increase the reusability of the adapter card, and reduce the testing cost.

[0004] In summary, it can be seen that the existing technology has long had the problem of low testing efficiency and high testing cost, so it is necessary to propose improved technical means to solve this problem. Summary of the invention

[0005] The invention discloses a universal PCIe testing device and a method thereof.

[0006] First, the present invention discloses a universal PCIe test device, which is applied in the environment of testing a unit under test (UUT). The unit under test is connected to multiple dummy storage devices and includes a test interface to provide multiple test signals. The test interface has a slot for power connection. The PCIe test device includes: an intermediary card, an input / output carrier board and a universal adapter card device. One end of the intermediary card allows insertion into a slot that meets the specifications, and the other end of the intermediary card is connected to a corresponding connection line; the input / output carrier board includes an input / output connector, a SATA connector and a power connector to receive multiple out-of-band (Sideband) signals to perform functional testing, wherein the out-of-band signals include IIC functions, clock signals and unconventional input / output signals. Next, in the part of the universal adapter card device, it includes: multiple connectors and a controller. The connector includes a first connector, a second connector, a third connector, a fourth connector and a fifth connector, wherein the first connector is a PCIe interface for connecting a virtual PCIe card, the first connector and the second connector are electrically connected to each other through a plurality of first wires, and the second connector is connected to the connection wires, so that when the intermediate card is inserted into one of the slots, the universal adapter card device, the intermediate card and the unit to be tested are electrically connected to each other, the second connector and the third connector are electrically connected to each other through a plurality of second wires, the third connector and the input / output connector are electrically connected to each other, the fourth connector and the SATA connector are electrically connected to each other, and the fifth connector and the power connector are electrically connected to each other to provide power to the intermediate card and the input / output carrier; and the controller is electrically connected to the connectors and executes a plurality of test instructions so that the universal adapter card device tests a plurality of differential signals, a plurality of ground signals and out-of-band signals provided by the unit to be tested as test signals, wherein when the out-of-band signal is unconventional, the out-of-band signal is sequentially transmitted to the input / output carrier through the second connector, the second wire, the third connector and the input / output connector to perform a functional test.

[0007] In addition, the present invention also discloses a universal PCIe testing method, which is applied in an environment of testing a unit to be tested, wherein the unit to be tested is connected to multiple virtual storage devices, and includes a test interface to provide multiple test signals, wherein the test interface has a corresponding slot for electrical connection, and the steps include: inserting one end of an intermediary card into the slot that meets the specifications, and connecting the other end of the intermediary card to a corresponding connecting line; electrically connecting the connecting line to a universal adapter card device, and the universal adapter card device includes multiple connectors and a controller, wherein the connector includes a first connector, a second connector, a third connector, a fourth connector and a fifth connector, wherein the first connector and the second connector are electrically connected to each other through multiple first wires, and the second connector and the third connector are electrically connected to each other through multiple second wires, and when the connecting line is connected to the second connector and the intermediary card is inserted into one of the slots, the universal adapter card device, the intermediary card and the unit to be tested are electrically connected to each other Electrically connecting; electrically connecting an input / output carrier board and a universal adapter card device to each other, wherein the input / output carrier board includes an input / output connector, a SATA connector and a power connector, the input / output connector and a third connector are electrically connected to each other, the SATA connector and a fourth connector are electrically connected to each other, and the power connector and a fifth connector are electrically connected to each other to provide power to the intermediate card and the input / output carrier board; connecting a first connector of a PCIe interface to a virtual PCIe card; and a controller executing a plurality of test instructions so that the universal adapter card device tests a plurality of differential signals, a plurality of ground signals and a plurality of out-of-band signals provided by a unit under test as test signals, wherein when the out-of-band signal is unconventional, the out-of-band signal is sequentially transmitted to the input / output carrier board through a second connector, a second wire, a third connector and the input / output connector to perform a functional test, wherein the out-of-band signal includes an IIC function, a clock signal and an unconventional input / output signal.

[0008] The device and method disclosed in the present invention are as described above. The difference from the prior art is that the present invention electrically connects the unit to be tested and the universal adapter card device through an intermediate card and a connecting line. The universal adapter card device includes multiple connectors for connecting the virtual PCIe card and the input / output carrier board, and providing the power required by the intermediate card and the input / output carrier board. The controller then executes multiple test instructions to test the signal to be tested on the circuit loop formed by the unit to be tested, the intermediate card, the connecting line, the universal adapter card device and the virtual PCIe card. The universal adapter card device tests differential signals, ground signals and conventional input / output signals, and transmits unconventional input / output to the input / output carrier board for testing.

[0009] Through the above technical means, the present invention can achieve the technical effect of improving test efficiency and reducing test costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 FIG. 4 is a device block diagram of a universal PCIe test device of the present invention.

[0011] Figure 2A and Figure 2B The present invention is a flowchart of a universal PCIe testing method.

[0012] Figure 3 A schematic diagram of using multiple intermediary cards to perform testing simultaneously in accordance with the present invention.

[0013] Figure 4 It is a schematic diagram of the pin locations of the connecting wires according to the present invention.

[0014] Description of reference numerals:

[0015] 100: PCIe test device

[0016] 101: Unit under test

[0017] 102: Virtual storage device

[0018] 103: Slot

[0019] 110: Intermediary Card

[0020] 111: Connection line

[0021] 120: Input / output carrier board

[0022] 121: Input / output connector

[0023] 122: SATA connector

[0024] 123: Power connector

[0025] 130,130a,130b: Universal riser card device

[0026] 131: Connector

[0027] 131a: First connector

[0028] 131b: Second connector

[0029] 131c: Third connector

[0030] 131d: Fourth connector

[0031] 131e: Fifth connector

[0032] 132: Controller

[0033] 133a: First conductor

[0034] 133b: Second wire

[0035] 310a: First Intermediary Card

[0036] 310b: Second intermediary card

[0037] 411: Connection line

[0038] Step 210: Insert one end of at least one intermediary card into a slot that matches the specification, and connect the other end of each intermediary card to a corresponding connection line.

[0039] Step 220: electrically connecting the connection line to a universal adapter card device, the universal adapter card device comprising a plurality of connectors and a controller, wherein the connector comprises a first connector, a second connector, a third connector, a fourth connector and a fifth connector, the first connector and the second connector are electrically connected to each other via a plurality of first wires, the second connector and the third connector are electrically connected to each other via a plurality of second wires, when the connection line is connected to the second connector and the intermediary card is inserted into one of the slots, the universal adapter card device, the intermediary card and the unit under test are electrically connected to each other

[0040] Step 230: electrically connecting the input / output carrier board and the universal riser card device, wherein the input / output carrier board includes an input / output connector, a SATA connector, and a power connector, the input / output connector and the third connector are electrically connected to each other, the SATA connector and the fourth connector are electrically connected to each other, and the power connector and the fifth connector are electrically connected to each other to provide power to the intermediate card and the input / output carrier board

[0041] Step 240: Connect the first connector of the PCIe interface to the virtual PCIe card

[0042] Step 250: The controller executes a plurality of test instructions to enable the universal adapter card device to test a plurality of differential signals, a plurality of ground signals, and a plurality of sideband signals provided by the unit under test as test signals, wherein when the sideband signal is unconventional, the sideband signal is sequentially transmitted to the input / output carrier through the second connector, the second wire, the third connector, and the input / output connector to perform a functional test, wherein the sideband signal includes an IIC function, a clock signal, and an unconventional input / output signal. DETAILED DESCRIPTION

[0043] The following will describe the implementation methods of the present invention in detail with reference to the accompanying drawings and embodiments, so that the implementation process of how the present invention applies technical means to solve technical problems and achieve technical effects can be fully understood and implemented accordingly.

[0044] Please read first Figure 1 , Figure 1The block diagram of the device of the universal PCIe test device of the present invention is applied in the environment of testing the unit under test 101. The unit under test 101 is connected to multiple virtual storage devices 102 and includes a test interface (i.e., PCIe interface) to provide multiple test signals. The test interface has a corresponding slot 103 (such as MICO, Slimline connector, etc.) for power connection. The PCIe test device 100 includes an intermediary card 110, an input / output carrier board 120, and a universal adapter card device 130. Among them, one end of the intermediary card 110 allows insertion into the slot 103 that meets the specifications, and the other end of the intermediary card 110 is connected to the corresponding connection line 111. In actual implementation, the present invention does not limit the type of the slot 103, that is, various slot types that can provide the intermediary card 110 for insertion do not deviate from the application scope of the present invention.

[0045] The input / output carrier board 120 includes an input / output connector 121, a SATA connector 122, and a power connector 123. The input / output carrier board 120 is used to receive multiple out-of-band signals to perform functional tests, wherein the out-of-band signals include IIC functions, clock signals (CLK), and unconventional input / output signals. That is, the input / output carrier board 120 is responsible for testing signals with related functions, such as: IIC, CLK, SPI (Serial Peripheral Interface) / UART (Universal Asynchronous Receiver / Transmitter), JTAG (Joint Test Action Group), power (Power) and other signals.

[0046] Next, the universal riser card device 130 includes: a plurality of connectors 131 and a controller 132. The connectors 131 include a first connector 131a, a second connector 131b, a third connector 131c, a fourth connector 131d, and a fifth connector 131e. The first connector 131a is a standard PCIe interface for connecting a virtual PCIe card, which can be tested by boundary scan. In actual implementation, the virtual PCIe card is an interface card that is inserted into the first connector 131a to simulate an actual PCIe interface card, thereby allowing the PCIe interface to be tested.

[0047] The first connector 131a and the second connector 131b are electrically connected to each other through a plurality of first wires 133a, and the second connector 131b is connected to the connection wires, so that when the intermediary card 110 is inserted into one of the slots 103, the universal adapter card device 130, the intermediary card 110 and the unit under test 101 are electrically connected to each other, the second connector 131b and the third connector 131c are electrically connected to each other through a plurality of second wires 133b, the third connector 131c is electrically connected to the input / output connector 121, the fourth connector 131d is electrically connected to the SATA connector 122, and the fifth connector 131e is electrically connected to the power connector 123 to provide power to the intermediary card 110 and the input / output carrier 120. In actual implementation, these connectors may be MCIO (Mini Cooledge IO), Slimline, etc.

[0048] The controller 132 is electrically connected to the connector 131 and executes a plurality of test instructions, so that the universal adapter card device 130 tests a plurality of differential signals, a plurality of ground signals and an out-of-band signal provided by the unit under test 101 as test signals. When the out-of-band signal is abnormal, the universal adapter card device 130 sequentially transmits the out-of-band signal to the input / output carrier 120 through the second connector 131b, the second wire 133b, the third connector 131c and the input / output connector 121 to perform a functional test. Taking the test of differential signal as an example, the virtual PCIe card, the first connector 131a of the universal adapter card device 130, the first wire 133a and the second connector 131b, the connecting wire 111, the intermediate card 110, the unit under test 101 and the virtual storage device 102 form a signal loop in sequence, the virtual PCIe card sends a test vector on the transmission line (TX) of the differential signal for the virtual storage device 102 to receive, and the virtual storage device 102 sends a test vector on the receiving line (RX) of the differential signal for the virtual PCIe card to receive, so as to complete the differential signal test. Taking the test of ground signal as an example, the ground pin of the unit under test 101 can be electrically connected to the ground pin of the virtual PCIe card through the intermediate card 110 and its corresponding connecting wire 111, and after sending a high potential, it is ensured to return to a low potential. Taking the test of out-of-band signals as an example, assuming that the connection line 111 includes a first IIC signal and a second IIC signal, when testing the IIC function of the out-of-band signal, the controller 132 allocates the first IIC signal to the fourth connector 131d, i.e., the IIC connection pin (IICConnect) and the input / output (Dummy PCIe IO) of the virtual PCIe card, and allocates the second IIC signal to the input / output (or called Retimer IO) of the virtual PCIe card and the third connector 131c (IO Connect); assuming that the connection line 111 includes a first clock signal and a second clock signal, the controller 132 allocates the first clock signal to the clock pin (Dummy PCIe CLK) and the output / input pin (Dummy PCIe IO) of the virtual PCIe card, and allocates the second clock signal to the input / output pin (Dummy PCIe IO) of the virtual PCIe card and the third connector 131c. In addition, when the out-of-band signal is abnormal, the input / output carrier 120 can perform an integrated bus circuit (Inter-Integrated Circuit, IIC) functional test and a serial peripheral interface (Serial Peripheral Interface, SPI) / universal asynchronous receiver / transmitter (UART) functional test, etc., which will be further explained later with reference to the accompanying drawings.It should be particularly noted that, as mentioned above, the input / output carrier board 120 is responsible for testing signals with related functions, while the universal adapter card device 130 is responsible for testing conventional input / output signals, such as: enable signal (Enable, EN), power good signal (Power Good, PG), reset signal (Reset, RST), PCIe reset (PCIeReset, PRST), etc.

[0049] It should be particularly noted that, in actual implementation, the present invention can be partially or completely implemented based on hardware, for example, it can be implemented by hardware elements such as integrated circuit chips, system on chip (SoC), field programmable gate array (FPGA), complex programmable logic device (CPLD), etc. The test instructions can be written by assembly language instructions, instruction set architecture instructions, machine instructions, machine-related instructions, microinstructions, firmware instructions, or any combination of one or more programming languages, and the programming languages ​​include object-oriented programming languages, such as Common Lisp, Python, C++, Objective-C, Smalltalk, Delphi, Java, Swift, C#, Perl, Ruby and PHP, etc., and conventional procedural programming languages, such as C language or similar programming languages.

[0050] See also Figure 2A and Figure 2B , Figure 2A and Figure 2BThe method flow chart of the universal PCIe testing method of the present invention is applied in the environment of testing a unit under test 101, wherein the unit under test 101 is connected to a plurality of virtual storage devices 102 and includes a test interface to provide a plurality of test signals, wherein the test interface has a corresponding slot 103 for electrical connection, and the steps include: inserting one end of an intermediate card 110 into the slot 103 that meets the specifications, and connecting the other end of the intermediate card 110 to a corresponding connection line 111 (step 210); electrically connecting the connection line 111 to a universal adapter card device 130, wherein the universal adapter card device 130 includes a plurality of connectors 131 and a controller 132, wherein the connector 131 includes a first connector 131a, a second connector 131b, a third connector 131c, a fourth connector 131d and a fifth connector 131e, the first connector 131a and the second connector 131b are electrically connected to each other through a plurality of first wires 133a, and the second connector 131b and the third connector 131c are electrically connected to each other through a plurality of second wires 133b, when the connecting wire 111 is connected to the second connector 131b and the intermediary card 110 is inserted into one of the slots 103, the universal adapter card device 130, the intermediary card 110 and the unit under test are electrically connected to each other. 101 are electrically connected to each other (step 220); the input / output carrier 120 and the universal riser card device 130 are electrically connected to each other, wherein the input / output carrier 120 includes an input / output connector 121, a SATA connector 122 and a power connector 123, the input / output connector 121 and the third connector 131c are electrically connected to each other, the SATA connector 122 and the fourth connector 131d are electrically connected to each other, and the power connector 123 and the fifth connector 131e are electrically connected to each other to provide power to the intermediate card 110 and the input / output carrier 120 (step 230); the first A connector 131a is connected to a virtual PCIe card (step 240); and the controller 132 executes multiple test instructions to enable the universal adapter card device 130 to test multiple differential signals, multiple ground signals and multiple out-of-band signals provided by the unit under test 101 as test signals, wherein when the out-of-band signal is unconventional, the out-of-band signal is sequentially transmitted to the input / output carrier 120 through the second connector 131b, the second wire 133b, the third connector 131c and the input / output connector 121 to perform a functional test, and the out-of-band signal includes an IIC function, a clock signal and an unconventional input / output signal (step 250).Through the above steps, the unit under test 101 and the universal riser card device 130 can be electrically connected through the intermediate card 110 and the connecting line 111. The universal riser card device 130 includes a plurality of connectors 131 for connecting the virtual PCIe card and the input / output carrier 120, and providing the power required by the intermediate card 110 and the input / output carrier 120. Then, the controller 132 executes a plurality of test instructions to test the signal under test on the circuit loop formed by the unit under test 101, the intermediate card 110, the connecting line 111, the universal riser card device 130 and the virtual PCIe card. The universal riser card device 130 tests differential signals, ground signals and conventional input / output signals, and transmits unconventional input / output signals to the input / output carrier 120 for testing.

[0051] The following match Figure 3 and Figure 4 The following description is given by way of example. Please refer to Figure 3 , Figure 3 Schematic diagram of using multiple intermediary cards to test simultaneously in the present invention. Figure 1 As shown, in addition to using a single intermediate card for testing, you can also Figure 3 As shown, multiple intermediary cards (such as the first intermediary card 310a and the second intermediary card 310b) and multiple universal adapter card devices (130a and 130b) are used to test multiple interfaces on the unit under test 101. These intermediary cards (such as the first intermediary card 310a and the second intermediary card 310b) can be of different specifications, such as MCIO to Slimline x8, Slimline x4 to x8, Nearstack to Slimline x8 or the like, for electrical connection with the unit under test 101. Among them, x4 and x8 refer to different bandwidths, such as four times the bandwidth and eight times the bandwidth.

[0052] like Figure 4 Indicated, Figure 4Schematic diagram of the connection line pins of the present invention. In actual implementation, the number of pins of the connection line 111 is less than or equal to 74, of which 32 are used to transmit differential signals, 24 are used to transmit ground signals, 4 (two groups) are used to transmit IIC signals, 4 (two groups) are used to transmit clock signals, and 10 are used to transmit other out-of-band signals, for a total of 74 wires corresponding to the same number of pins. In other words, the out-of-band signal can transmit two sets of IIC signals (i.e., the first IIC signal and the second IIC signal) through four wires, wherein the first IIC signal is preset to be allocated to the fourth connector 131d (i.e., IIC Connect) and the input / output (IO) of the virtual PCIe card (Dummy PCIe). When the IIC signal on the unit under test 101 has an IIC slave end (Slave), the fourth connector 131d is connected to the SATA connector 122 of the input / output carrier 120 to perform IIC read-write related tests; if the IIC signal on the unit under test 101 is simply transferred to the virtual storage device slot (e.g., NVMe Slot) of the unit under test 101, the virtual PCIe card and the virtual storage device (e.g., Dummy NVMe) are used to perform IO testing. In addition, the second IIC signal is preset to be assigned to the input / output of the virtual PCIe card and the third connector 131c (IOConnect). When the IIC signal on the unit under test 101 is simply transferred to the virtual storage device slot (such as: NVMe Slot) of the unit under test 101, the virtual PCIe card and the virtual storage device are also used to perform IO testing. Conversely, if there is an IIC slave end, the third connector 131c is connected to the input / output connector 121 of the input / output carrier 120 to perform IIC read-write related tests.

[0053] In addition, the out-of-band signal can also transmit two sets of clock (CLK) signals through 4 wires, namely: a first clock signal and a second clock signal, wherein the first clock signal is preset to be assigned to the CLK and IO pins of the virtual PCIe card. When there is a clock source (Clock Source) on the first clock signal on the unit under test 101, the clock test pin of the virtual PCIe card is used to read the 100M clock signal frequency. On the contrary, if the first clock signal on the unit under test 101 is simply transferred to the virtual storage device slot (such as NVMe Slot) of the unit under test 101, a virtual PCIe card (such as Dummy PCIe) and a virtual storage device (such as Dummy NVMe) are used to perform IO testing. Next, the second clock signal is preset to be assigned to the input / output (Dummy PCIe IO) of the virtual PCIe card and the third connector 131c. If the second clock signal on the unit under test 101 is simply transferred to the virtual storage device slot of the unit under test 101, the virtual PCIe card and the virtual storage device are used to perform IO testing. Conversely, if there is a clock source on the second clock signal on the unit under test 101, the third connector 131c and the connecting line are used to transfer to the clock test pin on the input / output connector 121 of the input / output carrier 120 to perform clock signal testing.

[0054] Finally, the out-of-band signal can also transmit other input / output signals through 10 wires, and is pre-assigned to the input / output of the virtual PCIe card and the third connector 131c. If these signals are just conventional EN, PG, RST, PRST and other related IO signals on the unit under test 101, the IO of the virtual PCIe card is used to perform the corresponding transceiver test. If the SIDEBAND Pin has IIC, CLK, SPI, JTAG, Power and other related functional tests on the UUT, the third connector is used with a connecting cable to transfer to the corresponding functional pins on the input / output connector 121 of the input / output carrier board 120 for related signal testing.

[0055] In summary, it can be seen that the difference between the present invention and the prior art lies in that the unit under test and the universal adapter card device are electrically connected through an intermediate card and a connecting line. The universal adapter card device includes multiple connectors for connecting a virtual PCIe card and an input / output carrier board, and providing power required by the intermediate card and the input / output carrier board. The controller then executes multiple test instructions to test the signal under test on the circuit loop formed by the unit under test, the intermediate card, the connecting line, the universal adapter card device and the virtual PCIe card. The universal adapter card device tests differential signals, ground signals and conventional input / output signals, and transmits unconventional input / outputs to the input / output carrier board for testing. This technical means can solve the problems existing in the prior art, thereby achieving the technical effect of improving test efficiency and reducing test costs.

[0056] Although the present invention is disclosed as above with the aforementioned embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of patent protection of the present invention shall be subject to the scope defined by the claims attached to this specification.

Claims

1. A universal PCIe test device, applied in an environment of testing a unit under test, wherein the unit under test is connected to a plurality of virtual storage devices and comprises at least one interface under test for providing a plurality of signals under test, wherein the interface under test has a corresponding slot for power supply connection, and the PCIe test device comprises: At least one intermediary card, one end of which allows insertion into the slot that matches the specification, and the other end of which is connected to a corresponding connection line; An input / output carrier board, including an input / output connector, a SATA connector, and a power connector, for receiving multiple out-of-band signals to perform functional testing. in, The out-of-band signals include IIC functions, clock signals, and unconventional input / output signals; as well as A universal riser card device, comprising: a plurality of connectors, the connectors comprising a first connector, a second connector, a third connector, a fourth connector and a fifth connector, wherein the first connector is a PCIe interface for connecting a virtual PCIe card, the first connector and the second connector are electrically connected to each other via a plurality of first wires, and the second connector is connected to the connection wires, so that when the intermediary card is inserted into one of the slots, the universal adapter card device, the intermediary card and the unit under test are electrically connected to each other, the second connector and the third connector are electrically connected to each other via a plurality of second wires, the third connector and the input / output connector are electrically connected to each other, the fourth connector and the SATA connector are electrically connected to each other, and the fifth connector and the power connector are electrically connected to each other to provide power to the intermediary card and the input / output carrier board; and A controller is electrically connected to the connector and executes a plurality of test instructions to enable the universal adapter card device to test a plurality of differential signals, a plurality of ground signals and the out-of-band signal provided by the unit under test as the test signal, wherein when the out-of-band signal is abnormal, the out-of-band signal is sequentially transmitted to the input / output carrier through the second connector, the second wire, the third connector and the input / output connector to perform a functional test.

2. According to claim 1, a universal PCIe test device, wherein when the controller tests the differential signal, the virtual PCIe card, the first connector of the universal adapter card device, the first wire and the second connector, the connecting line, the intermediate card, the unit to be tested and the virtual storage device sequentially form a signal loop, the virtual PCIe card sends a test vector on the transmission line of the differential signal for the virtual storage device to receive, and the virtual storage device sends the test vector on the receiving line of the differential signal for the virtual PCIe card to receive, so as to complete the differential signal test.

3. According to the universal PCIe testing device as described in claim 1, when the controller tests the ground signal, it electrically connects the ground pin of the unit under test to the ground pin of the virtual PCIe card through the intermediate card and its corresponding connecting line, and ensures that it returns to a low potential after issuing a high potential.

4. The universal PCIe test device according to claim 1, wherein the connection line comprises a first IIC signal and a second IIC signal, and the controller distributes the first IIC signal to the fourth connector and the input / output of the virtual PCIe card, and distributes the second IIC signal to the input / output of the virtual PCIe card and the third connector when testing the IIC function of the out-of-band signal.

5. According to the universal PCIe testing device as described in claim 1, the connecting line includes a first clock signal and a second clock signal, and the controller distributes the first clock signal to the clock pin and output / input pin of the virtual PCIe card, and distributes the second clock signal to the input / output of the virtual PCIe card and the third connector when testing the clock signal of the out-of-band signal.

6. A universal PCIe test method, applied in an environment of testing a unit under test, wherein the unit under test is connected to a plurality of virtual storage devices and comprises at least one interface under test for providing a plurality of signals under test, wherein the interface under test has a corresponding slot for electrical connection, wherein the steps include: Inserting one end of at least one intermediate card into the slot that matches the specification, and connecting the other end of the intermediate card to a corresponding connection line; The connecting line is electrically connected to a universal adapter card device, wherein the universal adapter card device comprises a plurality of connectors and a controller, wherein the connector comprises a first connector, a second connector, a third connector, a fourth connector and a fifth connector, wherein the first connector and the second connector are electrically connected to each other via a plurality of first wires, and the second connector and the third connector are electrically connected to each other via a plurality of second wires, and when the connecting line is connected to the second connector and the intermediary card is inserted into one of the slots, the universal adapter card device, the intermediary card and the unit under test are electrically connected to each other; The input / output carrier board is electrically connected to the universal riser card device, wherein the input / output carrier board comprises an input / output connector, a SATA connector and a power connector, the input / output connector and the third connector are electrically connected to each other, the SATA connector and the fourth connector are electrically connected to each other, and the power connector and the fifth connector are electrically connected to each other to provide power to the intermediate card and the input / output carrier board; Connecting the first connector of the PCIe interface to a virtual PCIe card; and The controller executes a plurality of test instructions to enable the universal adapter card device to test a plurality of differential signals, a plurality of ground signals and a plurality of out-of-band signals provided by the unit under test as the test signals, wherein when the out-of-band signals are unconventional, the out-of-band signals are sequentially transmitted to the input / output carrier through the second connector, the second wire, the third connector and the input / output connector to perform functional testing, and the out-of-band signals include IIC functions, clock signals and unconventional input / output signals.

7. According to claim 6, the universal PCIe testing method, wherein when the controller tests the differential signal, the virtual PCIe card, the first connector of the universal adapter card device, the first wire and the second connector, the connecting line, the intermediate card, the unit to be tested and the virtual storage device sequentially form a signal loop, the virtual PCIe card sends a test vector on the transmission line of the differential signal for the virtual storage device to receive, and the virtual storage device sends the test vector on the receiving line of the differential signal for the virtual PCIe card to receive, so as to complete the differential signal test.

8. According to the universal PCIe testing method of claim 6, when the controller tests the ground signal, the controller electrically connects the ground pin of the unit under test to the ground pin of the virtual PCIe card through the intermediate card and its corresponding connecting line, and ensures that the ground pin returns to a low potential after issuing a high potential.

9. The universal PCIe testing method according to claim 6, wherein the connection line comprises a first IIC signal and a second IIC signal, and the controller distributes the first IIC signal to the fourth connector and the input / output of the virtual PCIe card, and distributes the second IIC signal to the input / output of the virtual PCIe card and the third connector when testing the IIC function of the out-of-band signal.

10. According to the universal PCIe testing method of claim 6, wherein the connecting line comprises a first clock signal and a second clock signal, and when the controller tests the clock signal of the out-of-band signal, the controller distributes the first clock signal to the clock pin and the output / input pin of the virtual PCIe card, and distributes the second clock signal to the input / output pin of the virtual PCIe card and the third connector.

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