Computing power resource allocation method and device, computer readable storage medium and equipment

Abstract

The invention relates to the technical field of computing power resource scheduling, and provides a computing power resource allocation method, a computing power resource allocation device, a computer readable storage medium and electronic equipment. Allocating computing power resources to each virtual image processor in the plurality of virtual image processors according to the computing power demand information; the plurality of virtual image processors are obtained by virtualizing and dividing a target image processor; when the use condition of the computing power resource corresponding to any virtual image processor meets a preset resource use condition standard, obtaining state information of each other virtual image processor; and redistributing the computing power resource of the target virtual image processor of which the state information is in the idle state to any one virtual image processor. According to the invention, the flexibility and rationality of computing power resource allocation can be improved.

Description

Background Art

[0002] GPU (Graphics Processing Unit) virtualization technology refers to the collaboration of software and hardware to enable a physical GPU to be used simultaneously and independently by multiple virtual machines (VMs) or applications.

[0003] In the related technology, when computing power isolation is performed, resources can only be allocated according to the free competition of computing power or the static proportional allocation mechanism. However, once the above scheme is allocated, the computing power limit of each virtual graphics processor (vGPU) is relatively fixed, which easily leads to a waste of computing power resources.

[0004] In view of this, there is an urgent need in the art to develop a new computing resource allocation method and device.

[0005] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure. Summary of the invention

[0006] The purpose of the present disclosure is to provide a computing power resource allocation method, a computing power resource allocation device, a computer-readable storage medium and an electronic device, thereby at least to a certain extent overcoming the technical problem of easily causing waste of computing power resources due to the limitations of related technologies.

[0007] Other features and advantages of the present disclosure will become apparent from the following detailed description, or may be learned in part by the practice of the present disclosure.

[0008] According to a first aspect of the present disclosure, a computing resource allocation method is provided, comprising:

[0009] In each computing power planning period, computing power resources are allocated to each virtual image processor of a plurality of virtual image processors according to computing power demand information; the plurality of virtual image processors are obtained by virtualizing and dividing the target image processor;

[0010] When the usage of computing resources corresponding to any virtual image processor meets the preset resource usage standard, obtaining status information of each other virtual image processor;

[0011] The computing power resources of the target virtual image processor whose status information is in an idle state are allocated again to any one of the virtual image processors.

[0012] In an exemplary embodiment of the present disclosure, a user-mode interception library is mounted in each virtual image processor;

[0013] The user-mode interception library is used to intercept the task processing request sent to each virtual image processor, and when it is determined that the task processing request belongs to a computing power call request, send target indication information to the kernel module;

[0014] The target indication information is used to indicate that it is preliminarily determined that the virtual image processor is in a working state.

[0015] In an exemplary embodiment of the present disclosure, the acquiring the status information of each other virtual image processor includes:

[0016] Reading a status record maintained by the kernel module; the status record is used to record a status identifier corresponding to each other virtual image processor;

[0017] Based on the status identifier corresponding to each other virtual image processor, the status information of each other virtual image processor is determined.

[0018] In an exemplary embodiment of the present disclosure, the kernel module determines the state identifier corresponding to each virtual image processor based on the following method:

[0019] For each other virtual image processor, detecting whether target indication information sent by a user-mode interception library associated with the other virtual image processor is received;

[0020] If the target indication information is not received, determining that the other virtual image processor is in the idle state, and updating the state flag corresponding to the other virtual image processor to an idle flag;

[0021] If the target indication information is received, the state information of the other virtual image processors is determined according to the time difference between the receiving timestamp of the target indication information and the current timestamp, and the state identifier corresponding to the other virtual image processor is updated based on the determined state information.

[0022] In an exemplary embodiment of the present disclosure, determining the state information of the other virtual image processors according to the time difference between the receiving timestamp and the current timestamp of the target indication information includes:

[0023] In response to the time difference being less than a preset time threshold, determining that the other virtual image processor is in a working state;

[0024] In response to the time difference being not less than the preset duration threshold, it is determined that the other virtual image processor is in an idle state.

[0025] In an exemplary embodiment of the present disclosure, the method further includes:

[0026] In response to the state information of the other virtual image processors being in a working state, suspending a computing power resource usage process of any one of the virtual image processors within the computing power planning period.

[0027] In an exemplary embodiment of the present disclosure, after the computing power resources of the target virtual image processor whose status information is in an idle state are reallocated to any one of the virtual image processors, the method further includes:

[0028] Acquire the status information of the target virtual image processor in real time;

[0029] In response to determining that the target virtual image processor is changed to a working state, the computing power resources of the target virtual image processor are returned to the target virtual image processor.

[0030] According to a second aspect of the present disclosure, a computing resource allocation device is provided, comprising:

[0031] A computing power resource allocation module is used to allocate computing power resources to each virtual image processor of a plurality of virtual image processors according to computing power demand information in each computing power planning period; the plurality of virtual image processors are obtained by virtualizing and dividing the target image processor;

[0032] A status information acquisition module, used to acquire status information of each other virtual image processor when the usage of computing resources corresponding to any virtual image processor meets the preset resource usage standard;

[0033] The computing power resource reallocation module is used to reallocate the computing power resources of the target virtual image processor whose status information is in an idle state to any one of the virtual image processors.

[0034] According to a third aspect of the present disclosure, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the computing power resource allocation method described in the first aspect is implemented.

[0035] According to a fourth aspect of the present disclosure, an electronic device is provided, comprising: a processor; and a memory for storing executable instructions of the processor; wherein the processor is configured to execute the computing power resource allocation method described in the first aspect above by executing the executable instructions.

[0036] It can be seen from the above technical solutions that the computing power resource allocation method, computing power resource allocation device, computer-readable storage medium and electronic device in the exemplary embodiments of the present disclosure have at least the following advantages and positive effects:

[0037] In the technical solutions provided by some embodiments of the present disclosure, a target image processor is virtualized and divided to obtain multiple virtual image processors. In each computing power planning period, computing power resources are allocated to each of the multiple virtual image processors according to computing power demand information. When the usage of computing power resources corresponding to any virtual image processor meets the preset resource usage standard, the status information of each other virtual image processor is obtained, and the computing power resources of the target virtual image processor whose status information is in an idle state are reallocated to any virtual image processor. On the one hand, unused computing power resources can be temporarily allocated to other active vGPUs for use, which avoids resource waste and improves the overall resource utilization. Resource allocation is flexibly adjusted according to real-time workload conditions to ensure that available resources can be maximized in different time periods. Furthermore, busy vGPUs can obtain more computing power support, thereby speeding up task processing, reducing waiting time, and improving user experience. On the other hand, by automatically obtaining the status information of other vGPUs and reallocating resources, the need for manual intervention is reduced, the management complexity is reduced, and effective resource management can be achieved by maintaining only status information, thereby reducing system overhead.

[0038] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The accompanying drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification are used to explain the principles of the present disclosure. Obviously, the accompanying drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without creative work.

[0040] Figure 1 A schematic diagram showing a flow chart of a computing power resource allocation method in an embodiment of the present disclosure;

[0041] Figure 2 A schematic diagram showing a flow chart of how a kernel module determines a status identifier corresponding to each virtual image processor in an embodiment of the present disclosure;

[0042] Figure 3 A schematic diagram showing a process of determining whether to return computing resources to a target vGPU in an embodiment of the present disclosure;

[0043] Figure 4 The overall process diagram of the computing power resource allocation method in the embodiment of the present disclosure is shown;

[0044] Figure 5A schematic diagram showing the structure of a computing resource allocation device in an exemplary embodiment of the present disclosure is shown;

[0045] Figure 6 A schematic structural diagram of an electronic device in an exemplary embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0046] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as being limited to the examples set forth herein; on the contrary, these embodiments are provided so that the present disclosure will be more comprehensive and complete, and the concepts of the example embodiments are fully conveyed to those skilled in the art. The described features, structures, or characteristics may be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced while omitting one or more of the specific details, or other methods, components, devices, steps, etc. may be adopted. In other cases, known technical solutions are not shown or described in detail to avoid obscuring various aspects of the present disclosure.

[0047] The terms "a", "an", "the" and "said" are used in this specification to indicate the presence of one or more elements / components / etc.; the terms "including" and "having" are used to express an open-ended inclusion and mean that additional elements / components / etc. may exist in addition to the listed elements / components / etc.; the terms "first" and "second" etc. are used only as labels and are not intended to limit the quantity of their objects.

[0048] In addition, the accompanying drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings represent the same or similar parts, and their repeated descriptions will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities and do not necessarily correspond to physically or logically independent entities.

[0049] Existing GPU virtualization technology can only conduct free competition for computing power or allocate a certain proportion of computing power to a vGPU when isolating computing power. After a certain proportion is allocated, the restrictions are relatively strict. If the given computing power is not fully used, it may cause a waste of computing power. It cannot be dynamically adjusted according to business traffic and computing power requirements during model training or model inference, and it cannot effectively utilize idle computing power.

[0050] In the embodiments of the present disclosure, a computing resource allocation method is first provided, which at least to a certain extent overcomes the defect of the related technology that computing resources are easily wasted.

[0051] Figure 1A flow chart of a computing power resource allocation method in an embodiment of the present disclosure is shown. The execution subject of the computing power resource allocation method may be a server that performs computing power resource allocation.

[0052] refer to Figure 1 According to an embodiment of the present disclosure, a computing resource allocation method includes the following steps:

[0053] Step S110, in each computing power planning period, allocating computing power resources to each virtual image processor in the plurality of virtual image processors according to computing power demand information; the plurality of virtual image processors are obtained by virtualizing and dividing the target image processor;

[0054] Step S120, when the usage of computing resources corresponding to any one of the virtual image processors meets a preset resource usage standard, obtaining status information of each other virtual image processor;

[0055] Step S130: Allocate the computing power resources of the target virtual graphics processor whose status information is in an idle state to any virtual graphics processor again.

[0056] exist Figure 1 In the technical solution provided by the illustrated embodiment, a plurality of virtual image processors are obtained by virtualizing and dividing the target image processor. In each computing power planning period, computing power resources are allocated to each of the plurality of virtual image processors according to computing power demand information. When the usage of computing power resources corresponding to any virtual image processor meets the preset resource usage standard, the status information of each other virtual image processor is obtained, and the computing power resources of the target virtual image processor whose status information is in an idle state are allocated to any virtual image processor again. On the one hand, unused computing power resources can be temporarily allocated to other active vGPUs for use, which avoids resource waste and improves the overall resource utilization. Resource allocation is flexibly adjusted according to the real-time workload to ensure that available resources can be maximized in different time periods. Furthermore, busy vGPUs can obtain more computing power support, thereby speeding up task processing, reducing waiting time, and improving user experience. On the other hand, by automatically obtaining the status information of other vGPUs and reallocating resources, the need for manual intervention is reduced, the management complexity is reduced, and effective resource management can be achieved by maintaining only the status information, thereby reducing system overhead.

[0057] The following Figure 1 The specific implementation process of each step is described in detail:

[0058] Before step S110, it should be noted that the present disclosure may first virtualize and divide the target GPU based on GPU virtualization technology to obtain multiple independent virtual GPUs (vGPUs).

[0059] Afterwards, a user-mode hooking library can be mounted in each virtual GPU. A user-mode hooking library is a software tool or library that allows developers to intercept, modify, or enhance the behavior of applications in user space (also known as user state, which is the state in which applications usually run. In this state, programs cannot directly access hardware resources or execute privileged instructions). This library can affect the execution flow of a program by intercepting function calls or system calls without changing the original program code.

[0060] Specifically, the above-mentioned user-mode interception library can be a dynamic library of Linux, and its function is: it can intercept the task processing request sent to each virtual image processor based on the dlopen and dlsym technologies, and when it is judged that the task processing request is a computing power call request (referring to a request that requires loading computing power resources), it sends target indication information to the kernel module, and the target indication information is used to indicate the preliminary determination that the virtual GPU is currently in a working state.

[0061] The task processing request may be a CUDA (Compute Unified Device Architecture) request, which refers to a call initiated through a CUDA (Compute Unified Device Architecture) API, and is used to request execution of a parallel computing task on a GPU that supports CUDA.

[0062] The target indication information may be sent in the form of an input / output command (ie, an ioctl command), based on which the kernel module may be informed, and the user-mode interception library preliminarily determines that the virtual GPU may currently be in a non-idle state (ie, a working state).

[0063] In addition, the present disclosure can also load a kernel module in the Linux kernel, and the kernel module is a .ko file. It mounts a virtual device file in each vGPU by simulating a device file to allocate computing resources and achieve memory isolation and computing power isolation. By setting each vGPU to have a corresponding virtual device file, the independence and security between different vGPUs are ensured. The kernel module can also read the relevant status function of the target GPU driver to control whether the channel corresponding to the vGPU is enabled to control the start and stop of the program in the corresponding channel.

[0064] Next reference Figure 1 In step S110, in each computing power planning period, computing power resources are allocated to each virtual image processor in the multiple virtual image processors according to the computing power demand information.

[0065] In this step, within each computing power planning period, the computing power control module can allocate computing power resources to each vGPU in the multiple vGPUs according to the computing power demand information.

[0066] Among them, the above-mentioned computing power planning period can be a pre-configured period of time. For example, every 10 seconds can be a computing power planning period, or every 100 seconds can be set as a computing power planning period. The specific duration can be set according to actual conditions, and the present disclosure does not make any special limitations on this.

[0067] The above computing power demand information refers to data or indicators that describe and quantify how much processing power vGPU, etc., needs during the computing power planning period. This information is used to guide resource allocation, optimize system performance, and ensure that tasks can be completed within a predetermined time. For example, the computing power demand information can be predicted by analyzing historical computing power resource demand conditions, or it can be obtained by trend analysis based on historical computing power resource demand conditions. It can be set according to actual conditions, and this disclosure does not make special restrictions on it.

[0068] The computing power control module can allocate computing power resource shares to each vGPU according to the above computing power demand information. For example, assuming that the above computing power planning period is 10 seconds (one time slice per second, then 10 seconds corresponds to 10 time slices), assuming that there are 2 vGPUs in total (vGPU-A, vGPU-B and vGPU-C), and the computing power demand information indicates that vGPU-A needs to run deep learning training tasks, which is estimated to require 60% of the GPU computing power, while vGPU-B needs to run lightweight data analysis tasks, which is estimated to require 20% of the GPU computing power, and vGPU-C also needs to run lightweight data analysis tasks, which is estimated to require 20% of the GPU computing power. Then, illustratively, during the above computing power planning period, the kernel module can allocate 6 time slices to vGPU-A, 2 time slices to vGPU-B, and 2 time slices to vGPU-C.

[0069] After computing power resources for each vGPU, the computing power control module can monitor the computing power resource usage of each vGPU to determine whether there is a vGPU whose computing power resource usage reaches a preset resource usage standard (for example, the allocated time slice is used up).

[0070] In step S120, when the usage of computing resources corresponding to any one of the virtual image processors meets a preset resource usage standard, the status information of each other virtual image processor is obtained.

[0071] In this step, when the usage of computing resources corresponding to any virtual graphics processor (for example, vGPU-A) meets the preset resource usage standard, the computing power control module can obtain the status information of each other virtual graphics processor (ie, vGPU-B and vGPU-C).

[0072] Specifically, the status record maintained by the kernel module can be read, and the status record can be used to record the status identifier corresponding to each other virtual image processor (exemplarily, the status identifier can include an idle identifier and a busy identifier, and different status identifiers can correspond to different status flags, so that the corresponding status information can be obtained based on the status flags), and then, based on the status identifier corresponding to each other virtual image processor, the status information of each other virtual image processor is determined.

[0073] The kernel module may determine the status flag corresponding to each virtual image processor based on the following method:

[0074] refer to Figure 2 , Figure 2 A flow chart showing how the kernel module determines the status identifier corresponding to each virtual image processor in an embodiment of the present disclosure includes steps S201 to S203:

[0075] In step S201 , for each other virtual image processor, it is detected whether target indication information sent by a user-mode interception library associated with the other virtual image processor is received.

[0076] In this step, for each other vGPU (ie, vGPU-B and vGPU-C), it can be detected whether the target indication information sent by the user-mode interception library deployed therein is received.

[0077] In step S202, if the target indication information is not received, it is determined that the other virtual image processors are in an idle state, and the state flags corresponding to the other virtual image processors are updated to idle flags.

[0078] In this step, for the vGPU that has not received the target indication information, it can be determined that the vGPU is in an idle state, and the state flag corresponding to the vGPU is updated to an idle flag. Exemplarily, if the target indication information sent by the user-mode interception library associated with vGPU-B is not received, it can be determined that vGPU-B is in an idle state. Furthermore, the state flag corresponding to the vGPU can be updated to an idle flag.

[0079] In step S203, if the target indication information is received, the state information of other virtual image processors is determined according to the time difference between the receiving timestamp of the target indication information and the current timestamp, and the state identifiers corresponding to the other virtual image processors are updated based on the determined state information.

[0080] In this step, for the vGPU that receives the target indication information, the state information of the vGPU can be determined according to the time difference between the receiving timestamp of the target indication information and the current timestamp, and the state identifier corresponding to the vGPU is updated based on the determined state information. Exemplarily, if the target indication information sent by the user-mode interception library associated with vGPU-C is received, the receiving timestamp of the target indication information can be obtained from the timestamp record, for example: H, and then the current timestamp can be obtained, for example: C, and then the time difference between the above current timestamp C and the above receiving timestamp H can be obtained, that is, CH, and the state information of vGPU-C can be determined according to the comparison result between the time difference and the preset duration threshold.

[0081] Specifically, when it is determined that the above-mentioned time difference is less than a preset duration threshold (for example: 2 seconds, which can be set according to actual conditions, and the present disclosure does not make special limitations on this), it can be determined that the above-mentioned vGPU-C is in a working state, and then the status flag of the vGPU-C is updated to a busy flag. When the time difference is not less than the preset duration threshold (that is, when it is greater than or equal to the preset duration threshold), it can be determined that the above-mentioned vGPU-C is in an idle state, and the status flag of the vGPU-C is updated to an idle flag.

[0082] After determining the status of each other vGPU, you can then refer to Figure 1 In step S130, the computing power resources of the target virtual image processor whose status information is in an idle state are allocated to any virtual image processor again.

[0083] In this step, it is assumed that the target vGPU that is determined to be in an idle state is vGPU-B, so the control module can reallocate the computing resources of vGPU-B to vGPU-A for continued use. Therefore, the present disclosure can perform secondary allocation of idle computing resources, avoid resource waste, and ensure the rational use of computing resources.

[0084] It should be noted that if it is determined that the status information of other vGPUs are all in working status, the use of computing resources of vGPU-A in the above computing power planning period can be suspended.

[0085] In addition, after the computing power resources of the target vGPU (vGPU-B) whose status information is in an idle state are allocated to any vGPU (vGPU-A) again, the present disclosure can continue to monitor the status information of the target vGPU (vGPU-B) and determine whether to return the computing power resources to the target vGPU based on its status information.

[0086] refer to Figure 3 , Figure 3 A flowchart showing how to determine whether to return computing resources to a target vGPU in an embodiment of the present disclosure includes steps S301 and S302:

[0087] In step S301, the state information of the target virtual image processor is obtained in real time.

[0088] In this step, the kernel module can obtain the status information of vGPU-B in real time. Specifically, the status information of vGPU-B can be obtained in real time based on the status flag in the above status record, which will not be repeated here.

[0089] In step S302 , in response to determining that the target virtual image processor is changed to a working state, the computing power resources of the target virtual image processor are returned to the target virtual image processor.

[0090] In this step, if it is determined that vGPU-B has changed to a working state, the computing resources secondarily allocated to the above-mentioned vGPU-A can be returned to vGPU-B, thereby avoiding delays in the computing tasks of vGPU-B and ensuring that the relevant computing tasks of vGPU-B can be executed in a timely manner.

[0091] refer to Figure 4 , Figure 4 The overall flow diagram of the computing resource allocation method in the embodiment of the present disclosure is shown, including steps S401 to S414:

[0092] In step S401, start;

[0093] In step S402, the user-mode interception library is called;

[0094] In step S403, the user-mode interception library intercepts the CUDA request;

[0095] In step S404, it is determined whether it is a computing power related request;

[0096] If it is not a computing power call request, the process proceeds to step S405 and ends;

[0097] If it is a computing power call request, the process proceeds to step S406, where the user-mode interception library sends an ioctl command to the kernel module;

[0098] In step S407, it is determined whether the ioctl command is valid according to the received timestamp and the current timestamp;

[0099] If invalid, proceed to step S405;

[0100] If valid, the process proceeds to step S408, where the kernel module updates the flag bit of the vGPU in the idle state;

[0101] In step S409, the control module reads the flag bit;

[0102] In step S410, it is determined whether there is a target vGPU in an idle state among other vGPUs according to the flag bit;

[0103] If not, proceed to step S411 and use the previously allocated computing resources;

[0104] If yes, then go to step S412 and use the idle computing power;

[0105] In step S413, running a training or reasoning program;

[0106] In step S414, end.

[0107] Based on the above embodiments, the present disclosure has at least the following technical effects:

[0108] First, the present disclosure can combine the two states of kernel state and user state to more finely control the allocation and scheduling of computing resources between vGPUs at the operating system level, ensuring that computing resources can be dynamically adjusted according to actual needs;

[0109] Second, this solution introduces a key feature: when a vGPU (such as A) is idle, another vGPU (such as B) can temporarily borrow the unused computing power of A, thereby achieving 100% computing power utilization. Once A starts to need computing power again, A will regain its due 40% computing power share. This method not only solves the problem of resource waste that may be caused by traditional fixed-ratio allocation, but also maximizes the use of idle computing power while ensuring the basic computing power requirements of each vGPU, thereby improving the overall efficiency of image processor resource utilization. For tasks such as model training or inference, this flexibility helps speed up the computing process and may reduce the overall computing cost.

[0110] The present disclosure also provides a computing resource allocation device, Figure 5 A schematic diagram showing the structure of a computing resource allocation device in an exemplary embodiment of the present disclosure is shown; Figure 5As shown, the computing resource allocation device 500 may include a computing resource allocation module 510, a state information acquisition module 520 and a computing resource reallocation module 530. Among them:

[0111] A computing power resource allocation module 510 is used to allocate computing power resources to each virtual image processor of a plurality of virtual image processors according to computing power demand information in each computing power planning period; the plurality of virtual image processors are obtained by virtualizing and dividing the target image processor;

[0112] The status information acquisition module 520 is used to acquire the status information of each other virtual image processor when the usage of the computing resources corresponding to any virtual image processor meets the preset resource usage standard;

[0113] The computing power resource reallocation module 530 is used to reallocate the computing power resources of the target virtual image processor whose status information is in an idle state to any one of the virtual image processors.

[0114] In an exemplary embodiment of the present disclosure, a user-mode interception library is mounted in each virtual image processor;

[0115] The user-mode interception library is used to intercept the task processing request sent to each virtual image processor, and when it is determined that the task processing request belongs to a computing power call request, send target indication information to the kernel module;

[0116] The target indication information is used to indicate that it is preliminarily determined that the virtual image processor is in a working state.

[0117] In an exemplary embodiment of the present disclosure, the status information acquisition module 520 acquires the status information of each other virtual image processor, including:

[0118] Reading a status record maintained by the kernel module; the status record is used to record a status identifier corresponding to each other virtual image processor;

[0119] Based on the status identifier corresponding to each other virtual image processor, the status information of each other virtual image processor is determined.

[0120] In an exemplary embodiment of the present disclosure, the kernel module determines the state identifier corresponding to each virtual image processor based on the following method:

[0121] For each other virtual image processor, detecting whether target indication information sent by a user-mode interception library associated with the other virtual image processor is received;

[0122] If the target indication information is not received, determining that the other virtual image processor is in the idle state, and updating the state flag corresponding to the other virtual image processor to an idle flag;

[0123] If the target indication information is received, the state information of the other virtual image processors is determined according to the time difference between the receiving timestamp of the target indication information and the current timestamp, and the state identifier corresponding to the other virtual image processor is updated based on the determined state information.

[0124] In an exemplary embodiment of the present disclosure, the state information acquisition module 520 determines the state information of the other virtual image processor according to the time difference between the receiving timestamp and the current timestamp of the target indication information, including:

[0125] In response to the time difference being less than a preset time threshold, determining that the other virtual image processor is in a working state;

[0126] In response to the time difference being not less than the preset duration threshold, it is determined that the other virtual image processor is in an idle state.

[0127] In an exemplary embodiment of the present disclosure, the computing resource reallocation module 530 is configured to:

[0128] In response to the state information of the other virtual image processors being in a working state, suspending a computing power resource usage process of any one of the virtual image processors within the computing power planning period.

[0129] In an exemplary embodiment of the present disclosure, after reallocating the computing power resources of the target virtual image processor whose status information is in an idle state to any one of the virtual image processors, the computing power resource reallocation module 530 is configured to:

[0130] Acquire the status information of the target virtual image processor in real time;

[0131] In response to determining that the target virtual image processor is changed to a working state, the computing power resources of the target virtual image processor are returned to the target virtual image processor.

[0132] The specific details of each module in the above-mentioned computing power resource allocation device have been described in detail in the corresponding computing power resource allocation method, so they will not be repeated here.

[0133] It should be noted that, although several modules or units of the device for action execution are mentioned in the above detailed description, this division is not mandatory. In fact, according to the embodiments of the present disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. On the contrary, the features and functions of one module or unit described above can be further divided into multiple modules or units to be embodied.

[0134] In addition, although the steps of the method in the present disclosure are described in a specific order in the drawings, this does not require or imply that the steps must be performed in this specific order, or that all the steps shown must be performed to achieve the desired results. Additionally or alternatively, some steps may be omitted, multiple steps may be combined into one step, and / or one step may be decomposed into multiple steps, etc.

[0135] Through the description of the above implementation, it is easy for those skilled in the art to understand that the example implementation described here can be implemented by software, or by software combined with necessary hardware. Therefore, the technical solution according to the implementation of the present disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a USB flash drive, a mobile hard disk, etc.) or on a network, including several instructions to enable a computing device (which can be a personal computer, a server, a mobile terminal, or a network device, etc.) to execute the method according to the implementation of the present disclosure.

[0136] The present disclosure also provides a computer-readable storage medium, which may be included in the electronic device described in the above embodiments; or may exist independently without being assembled into the electronic device.

[0137] The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus or device, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to, an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In the present disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that may be used by or in conjunction with an instruction execution system, apparatus, or device.

[0138] Computer-readable storage media can send, propagate or transmit programs for use by or in conjunction with an instruction execution system, apparatus or device. The program code contained on the computer-readable storage medium can be transmitted using any appropriate medium, including but not limited to: wireless, wire, optical cable, RF, etc., or any suitable combination of the above.

[0139] The computer-readable storage medium carries one or more programs. When the one or more programs are executed by an electronic device, the electronic device implements the method described in the above embodiments.

[0140] In addition, an electronic device capable of implementing the above method is also provided in an embodiment of the present disclosure.

[0141] Those skilled in the art will appreciate that various aspects of the present disclosure may be implemented as systems, methods or program products. Therefore, various aspects of the present disclosure may be specifically implemented in the following forms, namely: complete hardware implementation, complete software implementation (including firmware, microcode, etc.), or a combination of hardware and software, which may be collectively referred to herein as "circuits", "modules" or "systems".

[0142] Refer to the following Figure 6 The electronic device 600 according to this embodiment of the present disclosure is described. Figure 6 The electronic device 600 shown is merely an example and should not bring any limitation to the functions and scope of use of the embodiments of the present disclosure.

[0143] like Figure 6 As shown, the electronic device 600 is in the form of a general computing device. The components of the electronic device 600 may include but are not limited to: at least one processor 610, at least one memory 620, a bus 630 connecting different system components (including the memory 620 and the processor 610), and a display 640.

[0144] The memory stores program codes, which can be executed by the processor 610, so that the processor 610 performs the steps according to various exemplary embodiments of the present disclosure described in the above “Exemplary Method” section of this specification. For example, the processor 610 can perform the following steps: Figure 1As shown in: Step S110, in each computing power planning period, computing power resources are allocated to each virtual image processor in the multiple virtual image processors according to the computing power demand information; the multiple virtual image processors are obtained by virtualizing and dividing the target image processor; Step S120, when the usage of the computing power resources corresponding to any virtual image processor meets the preset resource usage standard, the status information of each other virtual image processor is obtained; Step S130, the computing power resources of the target virtual image processor whose status information is in an idle state are allocated to any virtual image processor again.

[0145] The memory 620 may include a readable medium in the form of a volatile storage, such as a random access memory (RAM) 6201 and / or a cache memory 6202 , and may further include a read-only memory (ROM) 6203 .

[0146] The memory 620 may also include a program / utility 6204 having a set (at least one) of program modules 6205, such program modules 6205 including but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment.

[0147] Bus 630 may be a bus representing one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor, or a local bus using any of a variety of bus architectures.

[0148] The electronic device 600 may also communicate with one or more external devices 700 (e.g., keyboards, pointing devices, Bluetooth devices, etc.), may also communicate with one or more devices that enable a user to interact with the electronic device 600, and / or communicate with any device that enables the electronic device 600 to communicate with one or more other computing devices (e.g., routers, modems, etc.). Such communication may be performed via an input / output (I / O) interface 650. Furthermore, the electronic device 600 may also communicate with one or more networks (e.g., local area networks (LANs), wide area networks (WANs), and / or public networks, such as the Internet) via a network adapter 660. As shown, the network adapter 660 communicates with other modules of the electronic device 600 via a bus 630. It should be understood that, although not shown in the figure, other hardware and / or software modules may be used in conjunction with the electronic device 600, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, etc.

[0149] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. The present disclosure is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary technical means in the art that are not disclosed in the present disclosure. The description and examples are to be considered exemplary only, and the true scope and spirit of the present disclosure are indicated by the claims.

Claims

1. A computing resource allocation method, characterized in that: include: In each computing power planning period, computing power resources are allocated to each virtual image processor of the plurality of virtual image processors according to computing power demand information; The multiple virtual image processors are obtained by virtualizing and dividing the target image processor; When the usage of computing resources corresponding to any virtual image processor meets the preset resource usage standard, obtaining status information of each other virtual image processor; The computing power resources of the target virtual image processor whose status information is in an idle state are allocated again to any one of the virtual image processors.

2. The method according to claim 1, characterized in that A user-mode interception library is mounted in each virtual image processor; The user-mode interception library is used to intercept the task processing request sent to each virtual image processor, and when it is determined that the task processing request belongs to a computing power call request, send target indication information to the kernel module; The target indication information is used to indicate that it is preliminarily determined that the virtual image processor is in a working state.

3. The method according to claim 2, characterized in that The obtaining of status information of each other virtual image processor includes: Reading a status record maintained by the kernel module; the status record is used to record a status identifier corresponding to each other virtual image processor; Based on the status identifier corresponding to each other virtual image processor, the status information of each other virtual image processor is determined.

4. The method according to claim 3, characterized in that The kernel module determines the status identifier corresponding to each virtual image processor based on the following method: For each other virtual image processor, detecting whether target indication information sent by a user-mode interception library associated with the other virtual image processor is received; If the target indication information is not received, determining that the other virtual image processor is in the idle state, and updating the state flag corresponding to the other virtual image processor to an idle flag; If the target indication information is received, the state information of the other virtual image processors is determined according to the time difference between the receiving timestamp of the target indication information and the current timestamp, and the state identifier corresponding to the other virtual image processor is updated based on the determined state information.

5. The method according to claim 4, characterized in that The determining the state information of the other virtual image processors according to the time difference between the receiving timestamp and the current timestamp of the target indication information includes: In response to the time difference being less than a preset time threshold, determining that the other virtual image processor is in a working state; In response to the time difference being not less than the preset duration threshold, it is determined that the other virtual image processor is in an idle state.

6. The method according to claim 1, characterized in that The method further comprises: In response to the state information of the other virtual image processors being in working state, pausing the computing power resource usage process of any one of the virtual image processors in the computing power planning period.

7. The method according to any one of claims 1 to 5, characterized in that: After the computing power resources of the target virtual image processor whose status information is in an idle state are allocated again to any one of the virtual image processors, the method further includes: Acquire the status information of the target virtual image processor in real time; In response to determining that the target virtual image processor is changed to a working state, the computing power resources of the target virtual image processor are returned to the target virtual image processor.

8. A computing resource allocation device, characterized in that: include: A computing power resource allocation module is used to allocate computing power resources to each virtual image processor in the plurality of virtual image processors according to computing power demand information in each computing power planning period; The multiple virtual image processors are obtained by virtualizing and dividing the target image processor; A status information acquisition module, used to acquire status information of each other virtual image processor when the usage of computing resources corresponding to any virtual image processor meets the preset resource usage standard; The computing power resource reallocation module is used to reallocate the computing power resources of the target virtual image processor whose status information is in an idle state to any one of the virtual image processors.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the computing power resource allocation method described in any one of claims 1 to 7 is implemented.

10. An electronic device, characterized in that: include: processor; as well as A memory, configured to store executable instructions of the processor; The processor is configured to execute the computing resource allocation method described in any one of claims 1 to 7 by executing the executable instructions.

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