Signal path planning method and device

Abstract

The invention relates to a signal path planning method and device. The method comprises the following steps: acquiring a device layout grid chart of a circuit board; the device layout grid chart comprises a multi-layer device two-dimensional grid chart; determining a plurality of start-stop pin pairs according to the pin grid coordinates of each device in the circuit board in the device layout grid chart; and determining an optimal signal path between each start-stop pin pair based on the signal line loss condition and the signal line crosstalk condition. According to the method, a signal line loss condition and a signal line crosstalk condition are set, and a path which simultaneously meets the signal line loss condition and the signal line crosstalk condition is used as an optimal signal path between each start-stop pin pair, so that various restrictive factors of signal path planning are considered, and the optimal signal path planning is realized. The path meeting various conditions at the same time is selected as the optimal signal path, so that the path optimization work of an engineer is reduced, and the signal path planning efficiency is improved.

Description

Technical Field

[0001] The present application relates to the technical field of circuit board wiring planning, and in particular to a signal path planning method and device. Background Art

[0002] With the rapid development of informatization, the number of devices in servers continues to increase and the layout becomes increasingly dense.

[0003] In the related art, in order to maximize the performance of a server, it often takes a lot of time and effort to reasonably layout the components required in the server on a printed circuit board (PCB) and plan high-speed signal paths between the components.

[0004] However, in the related art, when planning high-speed signal paths between devices, there is a problem of low planning efficiency. Summary of the invention

[0005] Based on this, it is necessary to provide a signal path planning method and device to address the above technical problems, thereby improving the planning efficiency of the signal path.

[0006] In a first aspect, an embodiment of the present application provides a signal path planning method, including:

[0007] Obtaining a device layout grid diagram of a circuit board; the device layout grid diagram includes a two-dimensional grid diagram of multi-layer devices;

[0008] Determine a plurality of start and end pin pairs according to the pin grid coordinates of each device in the circuit board in the device layout grid diagram;

[0009] Based on the signal line loss condition and the signal line crosstalk condition, the optimal signal path between each start and end pin pair is determined.

[0010] In the signal path planning method provided in the embodiment of the present application, by obtaining the device layout grid diagram of the circuit board, the device layout grid diagram includes a two-dimensional grid diagram of multi-layer devices, and then according to the pin grid coordinates of each device in the circuit board in the device layout grid diagram, multiple start and end pin pairs are determined, and finally based on the signal line loss condition and the signal line crosstalk condition, the optimal signal path between each start and end pin pair is determined. In this method, by setting the signal line loss condition and the signal line crosstalk condition, the path that satisfies both the signal line loss condition and the signal line crosstalk condition is used as the optimal signal path between each start and end pin pair. In this way, various constraints on signal path planning are taken into account, and the path that satisfies various conditions at the same time is selected as the optimal signal path, which reduces the work of engineers to optimize the path and improves the efficiency of signal path planning.

[0011] In one embodiment, obtaining a device layout grid diagram of a circuit board includes:

[0012] Get a device layout image of a circuit board;

[0013] Gridding the device layout image to obtain a two-dimensional grid map of the device;

[0014] According to the layer number information of the circuit board, the device two-dimensional grid diagram is converted to obtain a device layout grid diagram composed of multi-layer device two-dimensional grid diagrams.

[0015] In the signal path planning method provided in the embodiment of the present application, the device layout image of the circuit board is obtained, and then the device layout image is gridded to obtain a two-dimensional device grid map, and finally the two-dimensional device grid map is converted according to the number of layers of the circuit board to obtain a device layout grid map composed of a multi-layer device two-dimensional grid map. In this method, an optional way to obtain a device layout grid map of a circuit board is provided, and by introducing the number of layers of the circuit board, the two-dimensional device grid map is converted into a three-dimensional grid map, that is, a device layout grid map including a two-dimensional device grid map of multiple layers is obtained.

[0016] In one embodiment, a plurality of start and end pin pairs are determined according to the pin grid coordinates of each device in the circuit board in the device layout grid diagram, including:

[0017] Determine a device within a preset range on the circuit board as a starting device;

[0018] Determine the pin of each starting device as the starting pin;

[0019] According to the layout relationship between the devices and the pin grid coordinates of the pins of the devices in the device layout grid diagram, the end pin corresponding to each start pin is determined to obtain a plurality of start and end pin pairs.

[0020] In the signal path planning method provided by the embodiment of the present application, by determining the device within the preset range on the circuit board as the starting device, and then determining the pin of each starting device as the starting pin, finally, according to the layout relationship between the devices and the pin grid coordinates of the pins of each device in the device layout grid diagram, the terminating pin corresponding to each starting pin is determined to obtain multiple start and end pin pairs. In this method, an optional method for quickly determining multiple start and end pin pairs is provided. By determining each starting device and the corresponding terminating device according to the layout relationship between the devices, and then based on the pin grid coordinates of the pins of each device in the device layout grid diagram, the pin grid coordinates of the terminating pin corresponding to each starting pin can be determined, and multiple start and end pin pairs can be obtained.

[0021] In one embodiment, determining an optimal signal path between each start-end pin pair based on a signal line loss condition and a signal line crosstalk condition includes:

[0022] Get the priority between each start and end pin pair;

[0023] Based on the signal line loss condition and the signal line crosstalk condition, the optimal signal path between each start and end pin pair is obtained in sequence according to the priority.

[0024] In the signal path planning method provided in the embodiment of the present application, the priority between each start and end pin pair is obtained, and then based on the signal line loss condition and the signal line crosstalk condition, the optimal signal path between each start and end pin pair is obtained in sequence according to the priority. In this method, by introducing the priority between each start and end pin pair, the optimal signal path between each start and end pin pair is obtained in sequence according to the priority between each start and end pin pair. In this way, it is avoided to return to modify the planned path when planning other signal paths, and the efficiency of signal path planning is further improved.

[0025] In one embodiment, based on the signal line loss condition and the signal line crosstalk condition, the optimal signal path between each start and end pin pair is obtained in order of priority, including:

[0026] For the start-end pin pair with the highest priority, according to the signal line loss condition, the optimal signal path between the start-end pin pair is obtained in the two-dimensional grid diagram of the first-layer device of the circuit board;

[0027] For the start-end pin pairs that are not the first priority, the optimal signal path between the start-end pin pairs is obtained in the two-dimensional grid diagram of all layer devices of the circuit board according to the signal line loss condition and the signal line crosstalk condition.

[0028] In the signal path planning method provided in the embodiment of the present application, for the start-end pin pair with the highest priority, the optimal signal path between the start-end pin pair is obtained in the two-dimensional grid diagram of the first-layer device of the circuit board according to the signal line loss condition; for the start-end pin pair with a non-first priority, the optimal signal path between the start-end pin pair is obtained in the two-dimensional grid diagram of all layers of the circuit board according to the signal line loss condition and the signal line crosstalk condition. In this method, since the start-end pin pair with the highest priority will not be affected by crosstalk, when determining the optimal signal path, it is only necessary for the signal path to meet the signal line loss condition, while the start-end pin pair with a non-first priority will be affected by crosstalk due to the existence of a planned signal path, so when determining the optimal signal path, it is necessary for the signal path to meet both the signal line loss condition and the signal line crosstalk condition.

[0029] In one embodiment, according to a signal line loss condition, obtaining an optimal signal path between a start and end pin pair in a two-dimensional grid diagram of first-layer devices of a circuit board includes:

[0030] In the first-layer device two-dimensional grid diagram, taking the start pin in the start and end pin pair as the starting point, a grid is moved along multiple preset directions to obtain multiple candidate grid nodes;

[0031] Obtain the loss cost value of each candidate grid node, and determine the candidate grid node that meets the signal line loss condition as the first path node of the start and end pin pair;

[0032] Continue to take the first path node as the starting point, and sequentially obtain the remaining path nodes of the start-end pin pair until moving to the end pin in the start-end pin pair, thereby obtaining the optimal signal path of the start-end pin pair.

[0033] In the signal path planning method provided by the embodiment of the present application, in the two-dimensional grid diagram of the first-layer device, the starting pin in the start-end pin pair is used as the starting point, and a grid is moved along multiple preset directions to obtain multiple candidate grid nodes, and then the loss cost value of each candidate grid node is obtained, and the candidate grid node that meets the signal line loss condition is determined as the first path node of the start-end pin pair, and finally, the first path node is continued as the starting point, and the remaining path nodes of the start-end pin pair are obtained in sequence until the end pin in the start-end pin pair is moved to obtain the optimal signal path of the start-end pin pair. In this method, an optional way is provided to quickly determine the optimal signal path between the start-end pin pair with the highest priority. By introducing the loss cost value, the optimal path is determined according to whether the loss cost value meets the signal line loss condition. In this way, the loss under the signal path can be guaranteed to be minimized.

[0034] In one embodiment, obtaining the loss cost value of each candidate grid node includes:

[0035] Determine the actual loss cost value of each candidate grid node according to the unit cost value of each preset direction; and determine the estimated loss cost value of each candidate grid node according to the grid coordinates of each candidate grid node and the pin grid coordinates of the end pin in the start and end pin pair;

[0036] The loss cost value of each candidate grid node is determined according to each actual loss cost value and each estimated loss cost value.

[0037] In the signal path planning method provided in the embodiment of the present application, the actual loss cost value of each candidate grid node is determined according to the unit cost value of each preset direction, and the estimated loss cost value of each candidate grid node is determined according to the grid coordinates of each candidate grid node and the pin grid coordinates of the terminating pin in the start-end pin pair, and then the loss cost value of each candidate grid node is determined according to each actual loss cost value and each estimated loss cost value. In this method, by determining the actual loss cost value and the estimated loss cost value of each candidate grid node, and then taking the sum of the actual loss cost value and the estimated loss cost value of each candidate grid node as the loss cost value of each candidate grid node, an optional way is provided for quickly determining the loss cost value of each candidate grid node.

[0038] In one embodiment, according to the signal line loss condition and the signal line crosstalk condition, obtaining the optimal signal path between the start and end pin pairs in the two-dimensional grid diagram of all layer devices of the circuit board includes:

[0039] Perform a candidate path search operation in the first-layer device two-dimensional grid diagram to obtain candidate signal paths of start and end pin pairs;

[0040] If the candidate signal path intersects with the planned signal path in the two-dimensional grid diagram of the first-layer device, then according to the layer order of the circuit board, jump to the next-layer device two-dimensional grid diagram in turn to perform the candidate path search operation to obtain a new candidate signal path, until the obtained new candidate signal path does not intersect with the planned signal path in the two-dimensional grid diagram of the device layer, and the optimal signal path between the start and end pin pairs is obtained.

[0041] In the signal path planning method provided in the embodiment of the present application, a candidate path search operation is performed in the first-layer device two-dimensional grid map to obtain a candidate signal path of the start-end pin pair; if the candidate signal path intersects with the planned signal path in the first-layer device two-dimensional grid map, then according to the layer order of the circuit board, the next-layer device two-dimensional grid map is jumped in sequence to perform a candidate path search operation to obtain a new candidate signal path, until the new candidate signal path obtained does not intersect with the planned signal path in the two-dimensional grid map of the layer device, and the optimal signal path between the start-end pin pair is obtained. In this method, for the start-end pin pairs that are not the first priority, a candidate signal path search is first performed in the first-layer device two-dimensional grid map. If the candidate signal path does not intersect with the path in the first-layer device two-dimensional grid map, the candidate signal path can be directly used as the optimal signal path. If the candidate signal path intersects with the path in the first-layer device two-dimensional grid map, it is necessary to continue searching for the candidate signal path in the next-layer device two-dimensional grid map until there is no intersection and the optimal signal path is obtained.

[0042] In one embodiment, the candidate path search operation includes:

[0043] Taking the starting pin in the start-end pin alignment as the starting point, a grid is moved along multiple preset directions to obtain multiple candidate grid nodes;

[0044] Obtaining the comprehensive cost value of each candidate grid node, and determining the candidate grid node that satisfies both the signal line loss condition and the signal line crosstalk condition as the first path node of the start and end pin pair;

[0045] Continue to take the first path node as the starting point, and sequentially obtain the remaining path nodes of the start-end pin pair until moving to the end pin in the start-end pin pair, thereby obtaining the candidate signal path of the start-end pin pair.

[0046] In the signal path planning method provided in the embodiment of the present application, the starting pin in the start-end pin pair is taken as the starting point, and a grid is moved along multiple preset directions to obtain multiple candidate grid nodes; the comprehensive cost value of each candidate grid node is obtained, and the candidate grid node that satisfies both the signal line loss condition and the signal line crosstalk condition is determined as the first path node of the start-end pin pair; the first path node is continued to be taken as the starting point, and the remaining path nodes of the start-end pin pair are obtained in sequence until the end pin in the start-end pin pair is moved to obtain the candidate signal path of the start-end pin pair. In this method, an optional way is provided for quickly obtaining candidate signal paths. By introducing a comprehensive cost value, the candidate signal path is determined according to whether the comprehensive cost value satisfies the signal line loss condition and the signal line crosstalk condition. In this way, it can ensure that the loss under the signal path is minimized, and it can also ensure that the path is minimized by the surrounding signal paths.

[0047] In one embodiment, obtaining the comprehensive cost value of each candidate grid node includes:

[0048] Determine the loss cost value of each candidate grid node according to the unit cost value of each preset direction, the grid coordinates of each candidate grid node and the pin grid coordinates of the termination pin;

[0049] Determine the crosstalk cost value of each candidate grid node according to the grid coordinates of each candidate grid node and the grid coordinates of the obstacle in the two-dimensional grid map of the current layer device; the grid coordinates of the obstacle represent the grid coordinates of each planned signal path in the two-dimensional grid map of the current layer device;

[0050] According to each loss cost value and each crosstalk cost value, a comprehensive cost value of each candidate grid node is determined.

[0051] In the signal path planning method provided in the embodiment of the present application, the loss cost value of each candidate grid node is determined according to the unit cost value of each preset direction, the grid coordinates of each candidate grid node and the pin grid coordinates of the termination pin, and then the crosstalk cost value of each candidate grid node is determined according to the grid coordinates of each candidate grid node and the obstacle grid coordinates in the two-dimensional grid map of the current layer device, and the obstacle grid coordinates represent the grid coordinates of each planned signal path in the two-dimensional grid map of the current layer device, and finally the comprehensive cost value of each candidate grid node is determined according to each loss cost value and each crosstalk cost value. In this method, by determining the loss cost value and crosstalk cost value of each candidate grid node, and then taking the sum of the loss cost value and the crosstalk cost value of each candidate grid node as the comprehensive cost value of each candidate grid node, an optional way is provided for quickly determining the comprehensive cost value of each candidate grid node.

[0052] In one embodiment, determining the crosstalk cost value of each candidate grid node according to the grid coordinates of each candidate grid node and the grid coordinates of obstacles in the two-dimensional grid map of the current layer device includes:

[0053] Determine the near-end crosstalk cost value of each candidate grid node according to the near-end crosstalk weight, the grid coordinates of each obstacle and the grid coordinates of each candidate grid node;

[0054] Determine the Far-End Crosstalk cost value of each candidate grid node according to the Far-End Crosstalk weight, the grid coordinates of each obstacle and the grid coordinates of each candidate grid node;

[0055] The crosstalk cost value of each candidate mesh node is determined according to each near-end crosstalk cost value and each far-end crosstalk cost value.

[0056] In the signal path planning method provided in the embodiment of the present application, the near-end crosstalk cost value of each candidate grid node is determined according to the near-end crosstalk weight, the grid coordinates of each obstacle and the grid coordinates of each candidate grid node, and then the far-end crosstalk cost value of each candidate grid node is determined according to the far-end crosstalk weight, the grid coordinates of each obstacle and the grid coordinates of each candidate grid node, and finally the crosstalk cost value of each candidate grid node is determined according to each near-end crosstalk cost value and each far-end crosstalk cost value. In this method, by determining the near-end crosstalk cost value and the far-end crosstalk cost value of each candidate grid node, and then taking the sum of the near-end crosstalk cost value and the far-end crosstalk cost value of each candidate grid node as the crosstalk cost value of each candidate grid node, an optional method is provided for quickly determining the crosstalk cost value of each candidate grid node.

[0057] In a second aspect, an embodiment of the present application further provides a signal path planning device, including:

[0058] A grid map acquisition module is used to acquire a device layout grid map of a circuit board; the device layout grid map includes a two-dimensional grid map of multi-layer devices;

[0059] A first determination module is used to determine a plurality of start and end pin pairs according to the pin grid coordinates of each device in the circuit board in the device layout grid diagram;

[0060] The second determination module is used to determine the optimal signal path between each start and end pin pair based on the signal line loss condition and the signal line crosstalk condition.

[0061] In a third aspect, the present application also provides a computer device, which includes a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps in any one of the embodiments of the first aspect when executing the computer program.

[0062] In a fourth aspect, the embodiments of the present application further provide a computer-readable storage medium, wherein a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps in any one of the embodiments of the first aspect are implemented.

[0063] In a fifth aspect, the embodiments of the present application further provide a computer program product, which includes a computer program, and when the computer program is executed by a processor, the steps in any one of the embodiments in the first aspect are implemented.

[0064] The above-mentioned signal path planning method and device obtain the device layout grid diagram of the circuit board, the device layout grid diagram includes a two-dimensional grid diagram of multi-layer devices, and then determine multiple start and end pin pairs according to the pin grid coordinates of each device in the circuit board in the device layout grid diagram, and finally determine the optimal signal path between each start and end pin pair based on the signal line loss condition and the signal line crosstalk condition. In this method, by setting the signal line loss condition and the signal line crosstalk condition, the path that satisfies both the signal line loss condition and the signal line crosstalk condition is used as the optimal signal path between each start and end pin pair. In this way, various constraints on signal path planning are taken into account, and the path that satisfies various conditions at the same time is selected as the optimal signal path, which reduces the work of engineers to optimize the path and improves the efficiency of signal path planning. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0066] Figure 1is an internal structure diagram of a computer device in one embodiment;

[0067] Figure 2 A schematic diagram of a flow chart of a signal path planning method in one embodiment;

[0068] Figure 3 A schematic diagram of a process for obtaining a device layout grid diagram in one embodiment;

[0069] Figure 4 A schematic diagram of a flow chart of determining a plurality of start and end pin pairs in one embodiment;

[0070] Figure 5 A schematic diagram of a flow chart for determining an optimal signal path in one embodiment;

[0071] Figure 6 A schematic diagram of a flow chart for determining an optimal signal path in another embodiment;

[0072] Figure 7 A schematic diagram of a flow chart for determining an optimal signal path in another embodiment;

[0073] Figure 8 A schematic diagram of a process for obtaining a loss cost value in one embodiment;

[0074] Fig. 9 A schematic diagram of a flow chart for determining an optimal signal path in another embodiment;

[0075] Fig.10 A schematic diagram of a flow chart of performing a candidate path search operation in one embodiment;

[0076] Fig.11 A schematic diagram of a process for obtaining a comprehensive cost value in one embodiment;

[0077] Fig.12 A schematic diagram of a process for determining a crosstalk cost value in one embodiment;

[0078] Fig.13 is a schematic diagram of a two-dimensional grid diagram of a device in one embodiment;

[0079] Fig.14 is a flow chart of a signal path planning method in another embodiment;

[0080] Fig.15 Schematic diagram of the structure of a signal path planning device in one embodiment. DETAILED DESCRIPTION

[0081] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0082] The signal path planning method provided in the embodiment of the present application can be applied to a computer device. The computer device can be a server, and its internal structure diagram can be as follows: Figure 1 As shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, referred to as I / O) and a communication interface. The processor, memory and input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and computer program in the non-volatile storage medium. The database of the computer device is used to store signal path planning data. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a signal path planning method is implemented. Those skilled in the art can understand that Figure 1 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0083] With the rapid development of informatization, the number of devices in servers continues to increase and the layout becomes increasingly dense.

[0084] In order to maximize the performance of the server, it often takes a lot of time and effort to properly layout the components required in the server on a printed circuit board (PCB) and plan high-speed signal paths between the components.

[0085] In the related technology, many Electronic Design Automation (EDA) software include the function of automatic wiring, but the underlying logic and algorithm of the automatic wiring function of these software are relatively simple, and can only realize simple electrical connections. The signal path planning completed in this way is not the optimal design from the perspective of multiple R&D engineers such as wiring engineers and signal integrity engineers. Therefore, after completing the path planning using EDA software, multiple engineers are required to continuously optimize and modify the design together, which makes the progress of signal path planning slow, and certain measures need to be taken to improve the planning efficiency of the signal path.

[0086] Based on this, the present application proposes a signal path planning method, which sets signal line loss conditions and signal line crosstalk conditions, and uses the path that satisfies both the signal line loss conditions and the signal line crosstalk conditions as the optimal signal path between each start and end pin pair. In this way, various constraints on signal path planning are taken into account, and the path that satisfies various conditions is selected as the optimal signal path, which reduces the work of engineers in optimizing the path and improves the efficiency of signal path planning.

[0087] It should be noted that the beneficial effects brought about by the embodiments of the present application or the technical problems solved are not limited to this one, but may also include other implicit or related problems. For details, please refer to the description of the following embodiments.

[0088] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0089] In an exemplary embodiment, Figure 2 As shown, a signal path planning method is provided, and the method is applied to a computer device as an example for description, including the following steps 201 to 203. Among them:

[0090] S201, obtaining a device layout grid diagram of a circuit board.

[0091] The device layout grid diagram includes a multi-layer device two-dimensional grid diagram. The device two-dimensional grid diagram can be obtained by gridding the layout image of the device, and multiple device two-dimensional grid diagrams are stacked to obtain a multi-layer device two-dimensional grid diagram.

[0092] Based on the above two-dimensional device grid map, a device layout grid map of the circuit board can be obtained. Exemplarily, the device layout image of the circuit board can be obtained first, and then the device layout image can be gridded to obtain a two-dimensional device grid map, and then a three-dimensional device layout grid map can be obtained based on multiple two-dimensional device grid maps.

[0093] S202, determining a plurality of start and end pin pairs according to the pin grid coordinates of each device in the circuit board in the device layout grid diagram.

[0094] The circuit board is provided with a plurality of devices, including a start device and a stop device, which can constitute a plurality of pairs of start and stop devices. The start pin of the start device in a pair of start and stop devices corresponds to the stop pin in the stop device one by one, so that a plurality of start and stop pin pairs can be obtained.

[0095] Acquire multiple starting devices in the circuit board, take the pins in each starting device as the starting pins, and then acquire the terminating pins corresponding to each starting pin based on a preset mapping relationship. Then, determine the device where each terminating pin is located according to each terminating pin. Finally, determine the pin grid coordinates of each starting pin and the pin grid coordinates of the terminating pin according to the pin grid coordinates of each device in the device layout grid diagram, and obtain multiple start and end pin pairs.

[0096] S203 , determining an optimal signal path between each start and end pin pair based on a signal line loss condition and a signal line crosstalk condition.

[0097] Among them, the signal line loss condition refers to the path between the start pin and the end pin with the minimum loss. The signal crosstalk condition refers to the path between the start pin and the end pin with the minimum crosstalk from the surrounding paths. The optimal signal path refers to the path between the start pin and the end pin, which satisfies both the signal line loss condition and the signal line crosstalk condition.

[0098] For any start-end pin pair, multiple paths between the start-end pin pair can be determined based on the pin grid coordinates of the start pin and the pin grid coordinates of the end pin in the start-end pin pair, and then the path that meets the signal line loss conditions and the signal line crosstalk conditions can be determined as the optimal signal path between the start-end pin pair.

[0099] In the signal path planning method provided in the embodiment of the present application, by obtaining the device layout grid diagram of the circuit board, the device layout grid diagram includes a two-dimensional grid diagram of multi-layer devices, and then according to the pin grid coordinates of each device in the circuit board in the device layout grid diagram, multiple start and end pin pairs are determined, and finally based on the signal line loss condition and the signal line crosstalk condition, the optimal signal path between each start and end pin pair is determined. In this method, by setting the signal line loss condition and the signal line crosstalk condition, the path that satisfies both the signal line loss condition and the signal line crosstalk condition is used as the optimal signal path between each start and end pin pair. In this way, various constraints on signal path planning are taken into account, and the path that satisfies various conditions at the same time is selected as the optimal signal path, which reduces the work of engineers to optimize the path and improves the efficiency of signal path planning.

[0100] The device layout grid diagram of the circuit board includes a multi-layer device two-dimensional grid diagram. The two-dimensional device grid diagram can be first obtained based on the device layout image of the circuit board, and then based on the number of wiring signal layers of the circuit board, a three-dimensional device layout grid diagram can be obtained. Based on this, in the following embodiment, a method for obtaining a device layout grid diagram is described.

[0101] In an exemplary embodiment, Figure 3 As shown, obtain the device layout grid diagram of the circuit board, including:

[0102] S301, obtaining a device layout image of a circuit board.

[0103] After the wiring engineer determines the layout of multiple devices in the circuit board, the device layout image in the circuit board design file can be exported through the electronic design automation software.

[0104] S302, gridding the device layout image to obtain a two-dimensional device grid map.

[0105] The size of the grid division can be set according to actual needs and is not limited here. For example, if the size of the circuit board is 40cm×40cm, the device layout image can be divided into a 40×40 grid, or a 400×400 grid, etc.

[0106] S303, converting the device two-dimensional grid diagram according to the layer number information of the circuit board to obtain a device layout grid diagram consisting of multiple layers of device two-dimensional grid diagrams.

[0107] The number of layers of the circuit board can be understood as the number of signal layers that can be wired on the circuit board.

[0108] The information on the number of layers that can be wired on the circuit board is obtained, and according to the information on the number of layers that can be wired on the circuit board, the two-dimensional device grid diagram is converted into a three-dimensional grid diagram, that is, a device layout grid diagram consisting of a two-dimensional grid diagram of multiple layers of devices is obtained.

[0109] In the signal path planning method provided in the embodiment of the present application, the device layout image of the circuit board is obtained, and then the device layout image is gridded to obtain a two-dimensional device grid map, and finally the two-dimensional device grid map is converted according to the number of layers of the circuit board to obtain a device layout grid map composed of a multi-layer device two-dimensional grid map. In this method, an optional way to obtain a device layout grid map of a circuit board is provided, and by introducing the number of layers of the circuit board, the two-dimensional device grid map is converted into a three-dimensional grid map, that is, a device layout grid map including a two-dimensional device grid map of multiple layers is obtained.

[0110] After obtaining the device layout grid diagram, the start pin and the end pin in the device layout grid diagram can be obtained to facilitate the subsequent determination of the optimal signal path between each start pin and each corresponding end pin. Based on this, the following embodiment describes a method for obtaining multiple start and end pin pairs.

[0111] In an exemplary embodiment, Figure 4 As shown, according to the pin grid coordinates of each device in the circuit board in the device layout grid diagram, multiple start and end pin pairs are determined, including:

[0112] S401, determining a device within a preset range on a circuit board as a starting device.

[0113] The devices within a preset range on the circuit board are obtained, and the corresponding positions in the device layout grid are determined according to the positions of the devices on the circuit board, and the devices at the corresponding positions are used as starting devices.

[0114] S402, determining the pins of each starting device as starting pins.

[0115] Use each pin in each starting device as the starting pin.

[0116] S403, determining the end pin corresponding to each start pin according to the layout relationship between the devices and the pin grid coordinates of the pins of each device in the device layout grid diagram, to obtain a plurality of start and end pin pairs.

[0117] A start-end pin pair includes a start pin and a corresponding end pin.

[0118] According to the layout relationship between each device, the terminating device corresponding to each starting device is determined, and then based on the preset mapping relationship, the terminating pin corresponding to each starting pin can be obtained. Then, according to each terminating pin, the terminating device where each terminating pin is located is determined. Finally, according to the pin grid coordinates of the pins of each device in the device layout grid diagram, the pin grid coordinates of each starting pin and the pin grid coordinates of the terminating pin are determined, and multiple start and end pin pairs are obtained.

[0119] In the signal path planning method provided by the embodiment of the present application, by determining the device within the preset range on the circuit board as the starting device, and then determining the pin of each starting device as the starting pin, finally, according to the layout relationship between the devices and the pin grid coordinates of the pins of each device in the device layout grid diagram, the terminating pin corresponding to each starting pin is determined to obtain multiple start and end pin pairs. In this method, an optional method for quickly determining multiple start and end pin pairs is provided. By determining each starting device and the corresponding terminating device according to the layout relationship between the devices, and then based on the pin grid coordinates of the pins of each device in the device layout grid diagram, the pin grid coordinates of the terminating pin corresponding to each starting pin can be determined, and multiple start and end pin pairs can be obtained.

[0120] When planning a signal path for multiple start and end pin pairs, the paths need to be planned according to a certain priority order. Based on this, the following embodiment describes a method for determining the optimal signal path between each start and end pin pair.

[0121] In an exemplary embodiment, Figure 5 As shown, based on the signal line loss condition and the signal line crosstalk condition, the optimal signal path between each start and end pin pair is determined, including:

[0122] S501, obtaining the priority between each start and end pin pair.

[0123] In one embodiment, the priority between each start and end pin pair can be obtained by calculating the distance between each start and end pin pair, and the longer the distance, the higher the priority. For example, the Euclidean distance between each start and end pin pair can be determined according to the following formula (1).

[0124]

[0125] Among them, x 1 ,y 1 and z 1 is the pin grid coordinate of the starting pin; x 2 ,y 2 and z 2 is the pin grid coordinate of the termination pin; d 1 is the Euclidean distance between the start pin and the end pin.

[0126] S502 , based on a signal line loss condition and a signal line crosstalk condition, optimal signal paths between each start and end pin pair are acquired in order of priority.

[0127] According to the pin grid coordinates of the starting pin in each start-end pin pair and the pin grid coordinates of each end pin, first obtain multiple paths between the start-end pin pair with the highest priority, and then determine the path that meets the signal line loss condition and the signal line crosstalk condition as the optimal signal path between the start-end pin pair; then, the optimal signal paths between other start-end pin pairs can be obtained in turn according to the priority and the above method.

[0128] In the signal path planning method provided in the embodiment of the present application, the priority between each start and end pin pair is obtained, and then based on the signal line loss condition and the signal line crosstalk condition, the optimal signal path between each start and end pin pair is obtained in sequence according to the priority. In this method, by introducing the priority between each start and end pin pair, the optimal signal path between each start and end pin pair is obtained in sequence according to the priority between each start and end pin pair. In this way, it is avoided to return to modify the planned path when planning other signal paths, and the efficiency of signal path planning is further improved.

[0129] For the start-end pin pair with the first priority, since there is no other signal path, it will not be affected by crosstalk, that is, it only needs to meet the signal line loss condition. For the start-end pin pair with a non-first priority, there is a planned signal path, which will be affected by crosstalk, that is, it needs to meet both the signal line loss condition and the signal line crosstalk condition. Based on this, the following is an example to illustrate the method of obtaining the optimal signal path between each start-end pin pair in order according to the priority.

[0130] In an exemplary embodiment, Figure 6 As shown, based on the signal line loss condition and the signal line crosstalk condition, the optimal signal path between each start and end pin pair is obtained in sequence according to the priority, including:

[0131] S601, for the start-end pin pair with the highest priority, according to the signal line loss condition, obtain the optimal signal path between the start-end pin pair in the two-dimensional grid diagram of the first-layer device of the circuit board.

[0132] For the start-end pin pair with the highest priority, there is no other signal path and it will not be affected by crosstalk. That is, it is only necessary to obtain the optimal signal path according to the signal line loss condition, and it is only necessary to perform path planning in the two-dimensional grid diagram of the first-layer device.

[0133] Based on the pin grid coordinates of the starting pin and the pin grid coordinates of the ending pin in the start-end pin pair, multiple signal paths can be obtained in the two-dimensional grid diagram of the first-layer device of the circuit board, and then the signal path that meets the signal line loss condition is determined as the optimal signal path for the start-end pin pair.

[0134] S602, for the start-end pin pair whose priority is not the first, according to the signal line loss condition and the signal line crosstalk condition, obtain the optimal signal path between the start-end pin pair in the two-dimensional grid diagram of all layer devices of the circuit board.

[0135] For the start-end pin pairs that are not the first in priority, since there is already a planned signal path, they will be affected by the crosstalk of the planned signal path. That is, it is necessary to obtain the optimal signal path based on both the signal line loss condition and the signal line crosstalk condition, and path planning needs to be performed in the two-dimensional grid diagram of all layer devices.

[0136] For any start-end pin pair that is not the first in priority, multiple signal paths can be obtained in the two-dimensional grid diagram of all devices on the circuit board based on the pin grid coordinates of the start pin and the pin grid coordinates of the end pin in the start-end pin pair. Then, the signal path that satisfies both the signal line loss condition and the signal line crosstalk condition is determined as the optimal signal path for the start-end pin pair.

[0137] In the signal path planning method provided in the embodiment of the present application, for the start-end pin pair with the highest priority, the optimal signal path between the start-end pin pair is obtained in the two-dimensional grid diagram of the first-layer device of the circuit board according to the signal line loss condition; for the start-end pin pair with a non-first priority, the optimal signal path between the start-end pin pair is obtained in the two-dimensional grid diagram of all layers of the circuit board according to the signal line loss condition and the signal line crosstalk condition. In this method, since the start-end pin pair with the highest priority will not be affected by crosstalk, when determining the optimal signal path, it is only necessary for the signal path to meet the signal line loss condition, while the start-end pin pair with a non-first priority will be affected by crosstalk due to the existence of a planned signal path, so when determining the optimal signal path, it is necessary for the signal path to meet both the signal line loss condition and the signal line crosstalk condition.

[0138] When determining the optimal signal path for the start and end pin pair with the highest priority, the loss cost value can be calculated, and the optimal path can be determined based on whether the loss cost value meets the signal line loss condition. Based on this, the following describes a method for determining the optimal signal path for the start and end pins with the highest priority through an embodiment.

[0139] In an exemplary embodiment, Figure 7 As shown, according to the signal line loss condition, the optimal signal path between the start and end pin pairs is obtained in the two-dimensional grid diagram of the first-layer device of the circuit board, including:

[0140] S701, in the first-layer device two-dimensional grid diagram, taking the start pin in the start and end pin pair as the starting point, moving one grid along multiple preset directions to obtain multiple candidate grid nodes.

[0141] In the first-layer device two-dimensional grid diagram, starting from the start pin in the start-end pin alignment, moving one grid along multiple preset directions can obtain multiple candidate grid nodes. The multiple preset directions may include up, down, left, right, upper left, lower left, upper right, and lower right.

[0142] It should be noted that when moving the grid, the grid coordinates where the components are located need to be avoided.

[0143] S702, obtaining the loss cost value of each candidate mesh node, and determining the candidate mesh node that meets the signal line loss condition as the first path node of the start-end pin pair.

[0144] The loss cost value represents the movement cost from the starting pin to each candidate grid node.

[0145] Moving to different positions corresponds to different loss cost values. By obtaining the loss cost value of each candidate grid node, the candidate grid node corresponding to the loss cost value that meets the signal line loss condition is determined as the first path node of the start and end pin pairs.

[0146] S703, continue to use the first path node as the starting point, and sequentially obtain the remaining path nodes of the start-end pin pair until moving to the end pin in the start-end pin pair, and obtain the optimal signal path of the start-end pin pair.

[0147] After determining the first path node, continue to use the first path node as the starting point and use the same acquisition method as step 702 to sequentially acquire the remaining path nodes of the start-end pin pair until moving to the end pin in the start-end pin pair to obtain the optimal signal path of the start-end pin pair.

[0148] In the signal path planning method provided by the embodiment of the present application, in the two-dimensional grid diagram of the first-layer device, the starting pin in the start-end pin pair is used as the starting point, and a grid is moved along multiple preset directions to obtain multiple candidate grid nodes, and then the loss cost value of each candidate grid node is obtained, and the candidate grid node that meets the signal line loss condition is determined as the first path node of the start-end pin pair, and finally, the first path node is continued as the starting point, and the remaining path nodes of the start-end pin pair are obtained in sequence until the end pin in the start-end pin pair is moved to obtain the optimal signal path of the start-end pin pair. In this method, an optional way is provided to quickly determine the optimal signal path between the start-end pin pair with the highest priority. By introducing the loss cost value, the optimal path is determined according to whether the loss cost value meets the signal line loss condition. In this way, the loss under the signal path can be guaranteed to be minimized.

[0149] The loss cost value may include an actual loss cost value and an estimated loss cost value. Based on this, the following describes a method for obtaining the loss cost value of each candidate grid node through an embodiment.

[0150] In an exemplary embodiment, Figure 8 As shown, the loss cost value of each candidate grid node is obtained, including:

[0151] S801, determining the actual loss cost value of each candidate grid node according to the unit cost value of each preset direction; and determining the estimated loss cost value of each candidate grid node according to the grid coordinates of each candidate grid node and the pin grid coordinates of the ending pin in the start-end pin pair.

[0152] Among them, the unit cost values ​​of different preset directions are different. For example, if the preset direction is up, down, left or right, the unit cost value is 1; if the preset direction is upper right, lower right, upper left or lower left, the unit cost value is 1.4.

[0153] The estimated loss cost value can be obtained by calculating the Manhattan distance between the grid coordinates of each candidate grid node and the pin grid coordinates of the ending pin in the start-end pin pair.

[0154] For any candidate grid node, first obtain the unit cost value of the direction of moving to the candidate grid node, and determine the unit cost value as the actual loss cost value of the candidate grid node. Then, obtain the grid coordinates of the candidate grid node and the pin grid coordinates of the terminating pin in the start-end pin pair, and obtain the estimated loss cost value of the candidate grid node by calculating the Manhattan distance between the grid coordinates of the candidate grid node and the pin grid coordinates of the terminating pin in the start-end pin pair.

[0155] S802: Determine the loss cost value of each candidate grid node according to each actual loss cost value and each estimated loss cost value.

[0156] For any candidate mesh node, the sum of the actual loss cost value and the estimated loss cost value of the candidate mesh node is determined as the loss cost value of the candidate mesh node.

[0157] In the signal path planning method provided in the embodiment of the present application, the actual loss cost value of each candidate grid node is determined according to the unit cost value of each preset direction, and the estimated loss cost value of each candidate grid node is determined according to the grid coordinates of each candidate grid node and the pin grid coordinates of the terminating pin in the start-end pin pair, and then the loss cost value of each candidate grid node is determined according to each actual loss cost value and each estimated loss cost value. In this method, by determining the actual loss cost value and the estimated loss cost value of each candidate grid node, and then taking the sum of the actual loss cost value and the estimated loss cost value of each candidate grid node as the loss cost value of each candidate grid node, an optional way is provided for quickly determining the loss cost value of each candidate grid node.

[0158] For the start-end pin pairs that are not the first priority, the path can be obtained in the first-layer device two-dimensional grid map first. If there is no intersection with the path in the first-layer device two-dimensional grid map, the optimal signal path can be directly found in the first-layer device two-dimensional grid map. If there is an intersection with the path in the first-layer device two-dimensional grid map, it is necessary to continue searching for the path in the next-layer device two-dimensional grid map. Based on this, the following is an example to illustrate the method of obtaining the optimal signal path for the start-end pin pairs that are not the first priority.

[0159] In an exemplary embodiment, Fig. 9 As shown, according to the signal line loss conditions and signal line crosstalk conditions, the optimal signal path between the start and end pin pairs is obtained in the two-dimensional grid diagram of all layer devices of the circuit board, including:

[0160] S901, performing a candidate path search operation in the first-layer device two-dimensional grid diagram to obtain candidate signal paths of start and end pin pairs.

[0161] Based on a preset candidate path search method, a candidate path search operation is performed in a two-dimensional grid diagram of first-layer devices to obtain candidate signal paths of start and end pin pairs.

[0162] S902, if the candidate signal path intersects with the planned signal path in the first-layer device two-dimensional grid diagram, then jump to the next-layer device two-dimensional grid diagram in sequence according to the layer order of the circuit board to perform the candidate path search operation to obtain a new candidate signal path, until the obtained new candidate signal path does not intersect with the planned signal path in the device two-dimensional grid diagram of the layer where it is located, and the optimal signal path between the start and end pin pairs is obtained.

[0163] Compare the candidate signal path with the planned signal path in the two-dimensional grid map of the first-layer device to determine whether the candidate signal path intersects with the planned signal path in the two-dimensional grid map of the first-layer device. For example, the grid coordinates in the candidate signal path and the grid coordinates of the planned signal path in the two-dimensional grid map of the first-layer device can be obtained, and the grid coordinates in the candidate signal path are compared with the grid coordinates of the planned signal path. If there are no identical grid coordinates, it is determined that the candidate signal path does not intersect with the planned signal path in the two-dimensional grid map of the first-layer device. If there are identical grid coordinates, it is determined that the candidate signal path intersects with the planned signal path in the two-dimensional grid map of the first-layer device.

[0164] Furthermore, if the candidate signal path intersects with the planned signal path in the two-dimensional grid diagram of the first-layer device, the next-layer device two-dimensional grid diagram is jumped to perform the candidate path search operation to obtain a new candidate signal path according to the layer order of the circuit board, until the obtained new candidate signal path does not intersect with the planned signal path in the two-dimensional grid diagram of the device layer, and the optimal signal path between the start and end pin pairs can be obtained.

[0165] In the signal path planning method provided in the embodiment of the present application, a candidate path search operation is performed in the first-layer device two-dimensional grid map to obtain a candidate signal path of the start-end pin pair; if the candidate signal path intersects with the planned signal path in the first-layer device two-dimensional grid map, then according to the layer order of the circuit board, the next-layer device two-dimensional grid map is jumped in sequence to perform a candidate path search operation to obtain a new candidate signal path, until the new candidate signal path obtained does not intersect with the planned signal path in the two-dimensional grid map of the layer device, and the optimal signal path between the start-end pin pair is obtained. In this method, for the start-end pin pairs that are not the first priority, a candidate signal path search is first performed in the first-layer device two-dimensional grid map. If the candidate signal path does not intersect with the path in the first-layer device two-dimensional grid map, the candidate signal path can be directly used as the optimal signal path. If the candidate signal path intersects with the path in the first-layer device two-dimensional grid map, it is necessary to continue searching for the candidate signal path in the next-layer device two-dimensional grid map until there is no intersection and the optimal signal path is obtained.

[0166] When obtaining the candidate signal paths of the start and end pin pairs, the comprehensive cost values ​​of the candidate grid nodes can also be calculated by moving the grid, and the candidate signal paths can be determined according to whether the loss cost values ​​meet the signal line loss conditions and the signal line crosstalk conditions. Based on this, the following describes a method for performing the candidate path search operation through an embodiment.

[0167] In an exemplary embodiment, Fig.10 As shown, the candidate path search operation includes:

[0168] S1001, taking the starting pin in the start and end pin alignment as the starting point, moving a grid along multiple preset directions to obtain multiple candidate grid nodes.

[0169] Taking the start pin in the start and end pin alignment as the starting point, a grid is moved along multiple preset directions to obtain multiple candidate grid nodes. The multiple preset directions may include up, down, left, right, upper left, lower left, upper right, and lower right. When moving the grid, the grid coordinates where each device is located need to be avoided.

[0170] S1002, obtaining the comprehensive cost value of each candidate mesh node, and determining the candidate mesh node that satisfies both the signal line loss condition and the signal line crosstalk condition as the first path node of the start-end pin pair.

[0171] The comprehensive cost value includes the loss cost value and the crosstalk cost value.

[0172] Moving to different positions corresponds to different comprehensive cost values. By obtaining the comprehensive cost value of each candidate grid node, the candidate grid node corresponding to the comprehensive cost value that satisfies both the signal line loss condition and the signal line crosstalk condition is determined as the first path node of the start and end pin pair.

[0173] S1003, continue to take the first path node as the starting point, and sequentially obtain the remaining path nodes of the start-end pin pair until moving to the end pin in the start-end pin pair, and obtain the candidate signal path of the start-end pin pair.

[0174] After determining the first path node, continue to use the first path node as the starting point and use the same acquisition method as step 1002 to sequentially acquire the remaining path nodes of the start-end pin pair until moving to the end pin in the start-end pin pair to obtain the candidate signal path of the start-end pin pair.

[0175] In the signal path planning method provided in the embodiment of the present application, the starting pin in the start-end pin pair is taken as the starting point, and a grid is moved along multiple preset directions to obtain multiple candidate grid nodes; the comprehensive cost value of each candidate grid node is obtained, and the candidate grid node that satisfies both the signal line loss condition and the signal line crosstalk condition is determined as the first path node of the start-end pin pair; the first path node is continued to be taken as the starting point, and the remaining path nodes of the start-end pin pair are obtained in sequence until the end pin in the start-end pin pair is moved to obtain the candidate signal path of the start-end pin pair. In this method, an optional way is provided for quickly obtaining candidate signal paths. By introducing a comprehensive cost value, the candidate signal path is determined according to whether the comprehensive cost value satisfies the signal line loss condition and the signal line crosstalk condition. In this way, it can ensure that the loss under the signal path is minimized, and it can also ensure that the path is minimized by the surrounding signal paths.

[0176] The comprehensive cost value includes a loss cost value and a crosstalk cost value. Based on this, the following describes a method for obtaining the comprehensive cost value of each candidate mesh node through an embodiment.

[0177] In an exemplary embodiment, Fig.11 As shown, the comprehensive cost value of each candidate grid node is obtained, including:

[0178] S1101, determining the loss cost value of each candidate grid node according to the unit cost value of each preset direction, the grid coordinates of each candidate grid node and the pin grid coordinates of the termination pin.

[0179] The loss cost value includes the actual loss cost value and the estimated loss cost value.

[0180] For any candidate grid node, the unit cost value of the direction of moving to the candidate grid node is obtained, and the unit cost value is determined as the actual loss cost value of the candidate grid node. Then, the grid coordinates of the candidate grid node and the pin grid coordinates of the terminating pin in the start-end pin pair are obtained, and the estimated loss cost value of the candidate grid node is obtained by calculating the Manhattan distance between the grid coordinates of the candidate grid node and the pin grid coordinates of the terminating pin in the start-end pin pair. Finally, the sum of the actual loss cost value and the estimated loss cost value of the candidate grid node is determined as the loss cost value of the candidate grid node.

[0181] S1102, determining the crosstalk cost value of each candidate grid node according to the grid coordinates of each candidate grid node and the grid coordinates of obstacles in the two-dimensional grid map of the current layer device.

[0182] The obstacle grid coordinates represent the grid coordinates in the planned signal path in the two-dimensional grid diagram of the current layer device.

[0183] Based on a preset crosstalk cost value determination method, the crosstalk cost value of each candidate grid node is determined according to the grid coordinates of each candidate grid node and the grid coordinates of the planned signal path in the two-dimensional grid diagram of the current layer device.

[0184] S1103: Determine the comprehensive cost value of each candidate mesh node according to each loss cost value and each crosstalk cost value.

[0185] For any candidate mesh node, the sum of the loss cost value and the crosstalk cost value of the candidate mesh node is determined as the comprehensive cost value of the candidate mesh node.

[0186] In the signal path planning method provided in the embodiment of the present application, the loss cost value of each candidate grid node is determined according to the unit cost value of each preset direction, the grid coordinates of each candidate grid node and the pin grid coordinates of the termination pin, and then the crosstalk cost value of each candidate grid node is determined according to the grid coordinates of each candidate grid node and the obstacle grid coordinates in the two-dimensional grid map of the current layer device, and the obstacle grid coordinates represent the grid coordinates of each planned signal path in the two-dimensional grid map of the current layer device, and finally the comprehensive cost value of each candidate grid node is determined according to each loss cost value and each crosstalk cost value. In this method, by determining the loss cost value and crosstalk cost value of each candidate grid node, and then taking the sum of the loss cost value and the crosstalk cost value of each candidate grid node as the comprehensive cost value of each candidate grid node, an optional way is provided for quickly determining the comprehensive cost value of each candidate grid node.

[0187] The crosstalk cost value includes a near-end crosstalk cost value and a far-end crosstalk cost value. Based on this, the following describes a method for determining the crosstalk cost value of a candidate mesh node through an embodiment.

[0188] In an exemplary embodiment, Fig.12 As shown, according to the grid coordinates of each candidate grid node and the grid coordinates of obstacles in the two-dimensional grid map of the current layer device, the crosstalk cost value of each candidate grid node is determined, including:

[0189] S1201 : Determine a near-end crosstalk cost value of each candidate mesh node according to a near-end crosstalk weight, mesh coordinates of each obstacle, and mesh coordinates of each candidate mesh node.

[0190] For any candidate grid node, the Euclidean distance between the candidate grid node and the obstacle can be determined based on the grid coordinates of the candidate grid node and the grid coordinates of each obstacle, and then the ratio of the near-end crosstalk weight to the Euclidean distance between the candidate grid node and the obstacle is used as the near-end crosstalk cost value of the candidate grid node.

[0191] For example, the near-end crosstalk cost value of each candidate mesh node may be determined according to the following formula (2).

[0192]

[0193] Where NEXT is the near-end crosstalk cost value; n is the candidate grid node; w 1 is the near-end crosstalk weight; d 2 is the Euclidean distance between the current candidate grid node and the obstacle.

[0194] like Fig.13As shown in the figure, it is a schematic diagram of the two-dimensional grid diagram of the device. Among them, ① to ④ are the planned paths (obstacle grid nodes), and the signal direction is ④ to ①; ⑤ to ⑥ are the paths being planned, and the signal direction is ⑤ to ⑥; A is one of the candidate grid nodes. Taking candidate grid node A as an example, the near-end crosstalk cost value of the candidate grid node is the ratio of the near-end crosstalk weight to the Euclidean distance between the candidate grid node and obstacle ②.

[0195] S1202: Determine a Far-End Crosstalk cost value of each candidate mesh node according to the Far-End Crosstalk weight, the mesh coordinates of each obstacle, and the mesh coordinates of each candidate mesh node.

[0196] For any candidate grid node, the Euclidean distance between the candidate grid node and the obstacle can be determined based on the grid coordinates of the candidate grid node and the grid coordinates of each obstacle. Then, the ratio of the far-end crosstalk weight to the Euclidean distance between the candidate grid node and the obstacle is calculated. Finally, the far-end crosstalk cost value of the planned grid node in the start-end pin pair and the sum of the above ratios are used as the far-end crosstalk cost value of the candidate grid node.

[0197] For example, the far-end crosstalk cost value of each candidate mesh node may be determined according to the following formula (3).

[0198]

[0199] Where FEXT is the near-end crosstalk cost value; w 2 is the far-end crosstalk weight.

[0200] like Fig.13 As shown in the figure, taking candidate mesh node A as an example, the FEXT cost value of the candidate mesh node is the ratio of the FEXT cost value between mesh node ⑤ and obstacle ① + the FEXT cost value between mesh node ⑥ and obstacle ① + the FEXT cost value to the Euclidean distance between candidate mesh node A and obstacle ②.

[0201] S1203: Determine a crosstalk cost value of each candidate mesh node according to each near-end crosstalk cost value and each far-end crosstalk cost value.

[0202] For any candidate mesh node, the sum of the near-end crosstalk cost value and the far-end crosstalk cost value of the candidate mesh node is used as the crosstalk cost value of the candidate mesh node.

[0203] In the signal path planning method provided in the embodiment of the present application, the near-end crosstalk cost value of each candidate grid node is determined according to the near-end crosstalk weight, the grid coordinates of each obstacle and the grid coordinates of each candidate grid node, and then the far-end crosstalk cost value of each candidate grid node is determined according to the far-end crosstalk weight, the grid coordinates of each obstacle and the grid coordinates of each candidate grid node, and finally the crosstalk cost value of each candidate grid node is determined according to each near-end crosstalk cost value and each far-end crosstalk cost value. In this method, by determining the near-end crosstalk cost value and the far-end crosstalk cost value of each candidate grid node, and then taking the sum of the near-end crosstalk cost value and the far-end crosstalk cost value of each candidate grid node as the crosstalk cost value of each candidate grid node, an optional method is provided for quickly determining the crosstalk cost value of each candidate grid node.

[0204] In addition, in an exemplary embodiment, the present application also provides an optional example of a signal path planning method, such as Fig.14 As shown, the following steps may be included:

[0205] S1301, obtaining a device layout image of a circuit board.

[0206] S1302, gridding the device layout image to obtain a two-dimensional grid map of the device.

[0207] S1303, converting the device two-dimensional grid diagram according to the layer number information of the circuit board to obtain a device layout grid diagram composed of multiple layers of device two-dimensional grid diagrams.

[0208] S1304, determining a device within a preset range on the circuit board as a starting device.

[0209] S1305: determine the pins of each starting device as starting pins.

[0210] S1306, determining the end pin corresponding to each start pin according to the layout relationship between the devices and the pin grid coordinates of the pins of each device in the device layout grid diagram, and obtaining a plurality of start and end pin pairs.

[0211] S1307, obtaining the priority between each start and end pin pair.

[0212] S1308 , based on the signal line loss condition and the signal line crosstalk condition, the optimal signal path between each start and end pin pair is acquired in order of priority.

[0213] Optionally, for the start-end pin pair with the highest priority, the optimal signal path between the start-end pin pair is obtained in the two-dimensional grid diagram of the first-layer device of the circuit board according to the signal line loss condition. For the start-end pin pair with a non-first priority, the optimal signal path between the start-end pin pair is obtained in the two-dimensional grid diagram of all layers of the circuit board according to the signal line loss condition and the signal line crosstalk condition.

[0214] The above-mentioned processes of S1301-S1308 can refer to the description of the above-mentioned method embodiment, and the implementation principles and technical effects thereof are similar and will not be repeated here.

[0215] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0216] Based on the same inventive concept, the embodiment of the present application also provides a signal path planning device for implementing the signal path planning method involved above. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme recorded in the above method, so the specific limitations in one or more signal path planning device embodiments provided below can refer to the limitations of the signal path planning method above, and will not be repeated here.

[0217] In an exemplary embodiment, Fig.15 As shown, a signal path planning device 1 is provided, comprising: a grid map acquisition module 10, a first determination module 20 and a second determination module 30, wherein:

[0218] A grid map acquisition module 10 is used to acquire a device layout grid map of a circuit board; the device layout grid map includes a two-dimensional grid map of multi-layer devices;

[0219] A first determination module 20, configured to determine a plurality of start and end pin pairs according to the pin grid coordinates of each device in the circuit board in the device layout grid diagram;

[0220] The second determination module 30 is used to determine the optimal signal path between each start and end pin pair based on the signal line loss condition and the signal line crosstalk condition.

[0221] In one embodiment, the grid map acquisition module 10 is further used for:

[0222] Acquire a device layout image of a circuit board; grid the device layout image to obtain a two-dimensional device grid map; convert the two-dimensional device grid map according to the number of layers of the circuit board to obtain a device layout grid map composed of a multi-layer device two-dimensional grid map.

[0223] In one embodiment, the first determining module 20 is further configured to:

[0224] Determine the devices within a preset range on the circuit board as the starting devices; determine the pins of each starting device as the starting pins; determine the ending pins corresponding to each starting pin according to the layout relationship between the devices and the pin grid coordinates of the pins of each device in the device layout grid diagram, and obtain multiple starting and ending pin pairs.

[0225] In one embodiment, the second determining module 30 is further configured to:

[0226] Obtaining the priority between each start and end pin pair; and obtaining the optimal signal path between each start and end pin pair in order according to the priority based on the signal line loss condition and the signal line crosstalk condition.

[0227] In one embodiment, the second determining module 30 is further configured to:

[0228] For the start-end pin pair with the highest priority, according to the signal line loss condition, the optimal signal path between the start-end pin pair is obtained in the two-dimensional grid diagram of the first-layer device of the circuit board;

[0229] For the start-end pin pairs that are not the first priority, the optimal signal path between the start-end pin pairs is obtained in the two-dimensional grid diagram of all layer devices of the circuit board according to the signal line loss condition and the signal line crosstalk condition.

[0230] In one embodiment, the second determining module 30 is further configured to:

[0231] In the first-layer device two-dimensional grid diagram, taking the start pin in the start and end pin pair as the starting point, a grid is moved along multiple preset directions to obtain multiple candidate grid nodes;

[0232] Obtain the loss cost value of each candidate grid node, and determine the candidate grid node that meets the signal line loss condition as the first path node of the start and end pin pair;

[0233] Continue to take the first path node as the starting point, and sequentially obtain the remaining path nodes of the start-end pin pair until moving to the end pin in the start-end pin pair, thereby obtaining the optimal signal path of the start-end pin pair.

[0234] In one embodiment, the second determining module 30 is further configured to:

[0235] According to the unit cost value of each preset direction, the actual loss cost value of each candidate grid node is determined; and, according to the grid coordinates of each candidate grid node and the pin grid coordinates of the ending pin in the start and end pin pairs, the estimated loss cost value of each candidate grid node is determined; according to each actual loss cost value and each estimated loss cost value, the loss cost value of each candidate grid node is determined.

[0236] In one embodiment, the second determining module 30 is further configured to:

[0237] A candidate path search operation is performed in the first-layer device two-dimensional grid map to obtain candidate signal paths for the start and end pin pairs; if the candidate signal path intersects with the planned signal path in the first-layer device two-dimensional grid map, then the candidate path search operation is performed in the next-layer device two-dimensional grid map in sequence according to the layer order of the circuit board to obtain a new candidate signal path, until the obtained new candidate signal path does not intersect with the planned signal path in the two-dimensional grid map of the layer device, thereby obtaining the optimal signal path between the start and end pin pairs.

[0238] In one embodiment, the second determining module 30 is further configured to:

[0239] Taking the starting pin in the start-end pin pair as the starting point, move a grid along multiple preset directions to obtain multiple candidate grid nodes; obtain the comprehensive cost value of each candidate grid node, and determine the candidate grid node that satisfies both the signal line loss condition and the signal line crosstalk condition as the first path node of the start-end pin pair; continue to take the first path node as the starting point, and obtain the remaining path nodes of the start-end pin pair in sequence until moving to the end pin in the start-end pin pair, and obtain the candidate signal path of the start-end pin pair.

[0240] In one embodiment, the second determining module 30 is further configured to:

[0241] The loss cost value of each candidate grid node is determined based on the unit cost value of each preset direction, the grid coordinates of each candidate grid node and the pin grid coordinates of the termination pin; the crosstalk cost value of each candidate grid node is determined based on the grid coordinates of each candidate grid node and the obstacle grid coordinates in the two-dimensional grid map of the current layer device; the obstacle grid coordinates represent the grid coordinates in the planned signal path in the two-dimensional grid map of the current layer device; the comprehensive cost value of each candidate grid node is determined based on each loss cost value and each crosstalk cost value.

[0242] In one embodiment, the second determining module 30 is further configured to:

[0243] According to the near-end crosstalk weight, the grid coordinates of each obstacle and the grid coordinates of each candidate grid node, the near-end crosstalk cost value of each candidate grid node is determined; according to the far-end crosstalk weight, the grid coordinates of each obstacle and the grid coordinates of each candidate grid node, the far-end crosstalk cost value of each candidate grid node is determined; according to each near-end crosstalk cost value and each far-end crosstalk cost value, the crosstalk cost value of each candidate grid node is determined.

[0244] Each module in the above-mentioned signal path planning device can be implemented in whole or in part by software, hardware and a combination thereof. Each of the above-mentioned modules can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute the operations corresponding to each of the above modules.

[0245] In one embodiment, a computer device is further provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the steps in the above method embodiments when executing the computer program.

[0246] The implementation principles and technical effects of each step implemented by the processor in the embodiment of the present application are similar to the principles of the above-mentioned signal path planning method, and will not be repeated here.

[0247] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.

[0248] The implementation principles and technical effects of the various steps implemented when the computer program in the embodiment of the present application is executed by the processor are similar to the principles of the above-mentioned signal path planning method, and will not be repeated here.

[0249] In one embodiment, a computer program product is provided, including a computer program, which implements the steps in the above method embodiments when executed by a processor.

[0250] The implementation principles and technical effects of the various steps implemented when the computer program in the embodiment of the present application is executed by the processor are similar to the principles of the above-mentioned signal path planning method, and will not be repeated here.

[0251] It should be noted that the data involved in this application (including but not limited to data used for analysis, stored data, displayed data, etc.) are all information and data that are authorized or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant regulations.

[0252] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but are not limited to this.

[0253] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0254] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A signal path planning method, It is characterized in that The method comprises: Acquire a device layout grid diagram of a circuit board; the device layout grid diagram includes a two-dimensional grid diagram of multi-layer devices; Determining a plurality of start and end pin pairs according to the pin grid coordinates of each device in the circuit board in the device layout grid diagram; Based on the signal line loss condition and the signal line crosstalk condition, an optimal signal path between each of the start-end pin pairs is determined.

2. The method according to claim 1, It is characterized in that The obtaining of a device layout grid diagram of the circuit board includes: Acquire a device layout image of the circuit board; Gridding the device layout image to obtain a two-dimensional device grid map; The device two-dimensional grid diagram is converted according to the layer number information of the circuit board to obtain the device layout grid diagram composed of multiple layers of device two-dimensional grid diagrams.

3. The method according to claim 1 or 2, It is characterized in that Determining a plurality of start and end pin pairs according to the pin grid coordinates of each device in the circuit board in the device layout grid diagram includes: Determine a device within a preset range on the circuit board as a starting device; Determine the pin of each starting device as the starting pin; According to the layout relationship between the devices and the pin grid coordinates of the pins of the devices in the device layout grid diagram, the end pin corresponding to each start pin is determined to obtain the multiple start and end pin pairs.

4. The method according to claim 1 or 2, It is characterized in that The determining the optimal signal path between each of the start and end pin pairs based on the signal line loss condition and the signal line crosstalk condition comprises: Obtaining the priority between each of the start and end pin pairs; Based on the signal line loss condition and the signal line crosstalk condition, the optimal signal path between each of the start and end pin pairs is acquired in sequence according to the priority.

5. The method according to claim 4, It is characterized in that The obtaining the optimal signal path between each of the start and end pin pairs in sequence according to the priority based on the signal line loss condition and the signal line crosstalk condition includes: For the start-end pin pair with the highest priority, according to the signal line loss condition, an optimal signal path between the start-end pin pair is obtained in the first-layer device two-dimensional grid diagram of the circuit board; For the start-end pin pair with a non-first priority, the optimal signal path between the start-end pin pair is obtained in the two-dimensional grid diagram of all layer devices of the circuit board according to the signal line loss condition and the signal line crosstalk condition.

6. The method according to claim 5, It is characterized in that The step of obtaining the optimal signal path between the start and end pin pairs in the first-layer device two-dimensional grid diagram of the circuit board according to the signal line loss condition comprises: In the two-dimensional grid diagram of the first-layer device, taking the start pin in the start-end pin pair as the starting point, moving one grid along multiple preset directions to obtain multiple candidate grid nodes; Acquire the loss cost value of each candidate grid node, and determine the candidate grid node that meets the signal line loss condition as the first path node of the start-end pin pair; Continue to take the first path node as the starting point, and sequentially obtain the remaining path nodes of the start-end pin pair until moving to the end pin in the start-end pin pair, so as to obtain the optimal signal path of the start-end pin pair.

7. The method according to claim 6, It is characterized in that The obtaining of the loss cost value of each candidate grid node includes: Determine the actual loss cost value of each candidate grid node according to the unit cost value of each preset direction; and determine the estimated loss cost value of each candidate grid node according to the grid coordinates of each candidate grid node and the pin grid coordinates of the end pin in the start-end pin pair; The loss cost value of each candidate grid node is determined according to each actual loss cost value and each estimated loss cost value.

8. The method according to claim 5, It is characterized in that The step of obtaining the optimal signal path between the start and end pin pairs in the two-dimensional grid diagram of all layer devices of the circuit board according to the signal line loss condition and the signal line crosstalk condition comprises: Perform a candidate path search operation in the first-layer device two-dimensional grid diagram to obtain a candidate signal path of the start-end pin pair; If the candidate signal path intersects with the planned signal path in the two-dimensional grid diagram of the first-layer device, then according to the layer order of the circuit board, jump to the next-layer device two-dimensional grid diagram in sequence to perform the candidate path search operation to obtain a new candidate signal path, until the obtained new candidate signal path does not intersect with the planned signal path in the two-dimensional grid diagram of the layer device, so as to obtain the optimal signal path between the start and end pin pairs.

9. The method according to claim 8, It is characterized in that The candidate path search operation includes: Taking the starting pin in the start-end pin pair as the starting point, moving a grid along multiple preset directions to obtain multiple candidate grid nodes; Obtaining a comprehensive cost value of each candidate grid node, and determining a candidate grid node that satisfies both the signal line loss condition and the signal line crosstalk condition as a first path node of the start-end pin pair; Continue to take the first path node as the starting point, and sequentially obtain the remaining path nodes of the start-end pin pair until moving to the terminating pin in the start-end pin pair, thereby obtaining the candidate signal path of the start-end pin pair.

10. The method according to claim 9, It is characterized in that The obtaining of the comprehensive cost value of each candidate grid node includes: Determine the loss cost value of each candidate grid node according to the unit cost value of each preset direction, the grid coordinates of each candidate grid node and the pin grid coordinates of the termination pin; Determine the crosstalk cost value of each candidate grid node according to the grid coordinates of each candidate grid node and the grid coordinates of the obstacle in the two-dimensional grid map of the current layer device; the grid coordinates of the obstacle represent the grid coordinates of each planned signal path in the two-dimensional grid map of the current layer device; According to each of the loss cost values ​​and each of the crosstalk cost values, a comprehensive cost value of each of the candidate mesh nodes is determined.

11. The method according to claim 10, It is characterized in that Determining the crosstalk cost value of each candidate grid node according to the grid coordinates of each candidate grid node and the grid coordinates of obstacles in the two-dimensional grid map of the current layer device includes: Determine a near-end crosstalk cost value of each candidate grid node according to a near-end crosstalk weight, grid coordinates of each obstacle, and grid coordinates of each candidate grid node; Determine a Far-End Crosstalk cost value of each candidate grid node according to a Far-End Crosstalk weight, grid coordinates of each obstacle, and grid coordinates of each candidate grid node; The crosstalk cost value of each candidate mesh node is determined according to each near-end crosstalk cost value and each far-end crosstalk cost value.

12. A signal path planning device, It is characterized in that The device comprises: A grid map acquisition module, used to acquire a device layout grid map of a circuit board; the device layout grid map includes a two-dimensional grid map of multi-layer devices; A first determination module is used to determine a plurality of start and end pin pairs according to the pin grid coordinates of each device in the circuit board in the device layout grid diagram; The second determination module is used to determine the optimal signal path between each of the start and end pin pairs based on the signal line loss condition and the signal line crosstalk condition.

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