Process for manufacturing electronic component

Abstract

The invention relates to a process for manufacturing an electronic component. There is provided a process for manufacturing an electronic component having wettable flanks from a substrate having a chip formed therein, the chip being separated by a cavity, the process including a first step of depositing a layer of insulating material, and then a second step of depositing a layer of conductive material on the layer of insulating material to form wettable flanks. An electronic assembly having wettable flanks is also provided.

Description

[0001] This application claims the benefit of priority to French patent application No. 2313867, filed on December 8, 2023, entitled “Procédé de fabrication de composants électroniques,” which is hereby incorporated herein by reference to the maximum extent permitted by law. Technical Field

[0002] The present disclosure relates to the manufacture of electronic components, such as so-called surface mount components or "leadless" components, i.e., they have no visible connections once assembled on a circuit board. These components have one or more connection metallizations on at least one side designed to be soldered to corresponding connection pads on an external device such as a printed circuit board or another component. Background Art

[0003] In some applications, there is a need for surface mount components in which the connection metallization designed to be soldered to external devices extends all the way to the flank of the component. These are called "wettable flank" components. When the component is mounted in its environment (e.g., on a printed circuit board), the connection metallization (also called electrical contacts) is soldered or brazed to the corresponding metal track or component on the PCB side. Some solder material then rises to the side of the component, enabling visual inspection of the connection quality.

[0004] This need exists, for example, in the automotive or medical fields, and more generally in all fields where there is a need to ensure the correct assembly of components whose connections are not visible (connections are located underneath the components) and to guarantee the reliability of electrical connections once the circuit is installed in its environment. Summary of the invention

[0005] There is a need to improve at least some aspects of known processes for making electronic components having wettable flanks.

[0006] This is achieved by a method of manufacturing an electronic component with wettable flanks from a substrate having chips formed therein, the chips being separated by a cavity, the method being summarized as comprising: a first step of depositing a layer of insulating material in the cavity, and a second step of depositing a layer of conductive material on the insulating material layer to form the wettable flanks.

[0007] According to an embodiment, the chip may include at least two connection terminals covered by connection pads and arranged on the first side of the substrate, and wherein in a first step a layer of insulating material is deposited in the cavity, on the connection pads and on the first side of the substrate.

[0008] According to an embodiment, before the second step, the process may include a step of removing a portion of the insulating resin layer present in the cavity to form a groove whose bottom and walls are made of insulating resin, and wherein, in the second step, a conductive material layer is deposited in the groove.

[0009] According to an embodiment, the process further comprises the following steps:

[0010] thinning the layer of insulating material to allow access to the connection pads; and

[0011] The electronic components are separated by cutting the substrate through the layer of conductive material.

[0012] This is achieved by an electronic component with wettable flanks, the electronic component comprising a chip protected by a housing, the flanks of the housing successively comprising layers of insulating material and layers of conductive material.

[0013] According to an embodiment, the electronic component comprises: a first main face comprising at least two connection pads; a second main face; and a wing, the conductive material layer being electrically insulated from the connection pads by the insulating material layer, the conductive material layer extending from the first main face over a portion of the wing.

[0014] According to an embodiment, a layer of insulating material covers the first side of the chip between the connection pads.

[0015] According to an embodiment, the insulating material layer is a layer of epoxy or phenolic resin in which an electrically insulating filler, such as aluminum oxide particles, is dispersed.

[0016] According to an embodiment, the conductive material layer is an epoxy or phenolic resin layer in which conductive fillers such as silver, copper or carbon black particles are dispersed. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The foregoing features and advantages as well as other features and advantages will be described in detail in the following description of specific embodiments given by way of illustration and not limitation with reference to the accompanying drawings.

[0018] Figure 1 A schematic cross section of an electronic component with wettable flanks according to an embodiment is shown.

[0019] Figure 2A-2G is a cross-sectional view illustrating steps in a process for fabricating an electronic component with wettable flanks according to an embodiment.

[0020] Figure 3A-3B is a cross-sectional view illustrating steps in a process for assembling an electronic component having wettable flanks with an external device according to an embodiment. DETAILED DESCRIPTION

[0021] Similar features in the various figures are denoted by similar reference numerals. Common structural and / or functional features among the various embodiments may have the same reference numerals and may be arranged in the same structure, dimensions, and material properties.

[0022] For clarity, only operations and elements useful for understanding the embodiments described herein are illustrated and described in detail.

[0023] Unless otherwise specified, when referring to two elements being connected together, this means a direct connection without any intermediate elements except conductors, and when referring to two elements being coupled together, this means the two elements may be connected or they may be coupled via one or more other elements.

[0024] In the following disclosure, unless otherwise stated, when absolute position qualifiers, such as terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as terms "above", "below", "higher", "lower", etc., or orientation qualifiers, such as "horizontal", "vertical", etc., are mentioned, they all refer to the orientation shown in the figures.

[0025] Unless otherwise indicated, the expressions "about," "approximately," "substantially," and "approximately" mean within 10%, and within 5%.

[0026] Electronic components are used in a wide range of industrial fields, such as in the automotive and medical fields.

[0027] Figure 1 A schematic cross section of an electronic assembly 100 with a non-through connection is shown.

[0028] The electronic component 100 comprises an electronic chip 103 and a housing 109. In one example, the chip 103 is formed of a semiconductor substrate such as silicon. It may also be SiC.

[0029] Chip 103 includes a front side 105 (also referred to as a first side or front side or top side), a back side 104 (also referred to as a second side or back side or bottom side) and sidewalls 106 (also referred to as side faces). Back side 104 is opposite to front side 105.

[0030] One or more connection terminals 107 (also called electrical contacts) are formed on the top surface 105 of the chip 103 , enabling it to be connected to other elements (microchips or electronic devices).

[0031] The electrical connection terminals 107 are, for example, 10 to 30 μm away from the chip 103 sidewalls 106. The electrical connection terminals 107 may be located at the front side 105 of the chip 103 or flush with (ie at the same level as) the top surface 105 of the chip 103.

[0032] The electrical connection terminal 107 is also referred to as "UBM" (Under Bump Metallization) or "bump pad". The electrical connection terminal 107 is made of a conductive material specifically designed to receive the connection pad 117 and adheres well to the connection pad 117. The electrical connection terminal 107 includes at least one of the following elements: gold, titanium, nickel, copper, or tungsten. In some embodiments, the electrical connection terminal 107 includes gold.

[0033] The chip 103 may include one or more discrete components. The one or more discrete components are selected from, for example, transistors, diodes, thyristors, triacs, filters, etc. The chip 103 may include one or more electronic circuits. The chip 103 can be used to implement various electronic functions.

[0034] The component 100 is an integrated component.

[0035] The chip 103 is protected by the housing 109. The housing 109 covers at least the top surface 105 and the side surface 106 of the chip 103. According to a variant not shown, the housing 109 may also cover the back side 104 of the chip 103.

[0036] The housing 109 is made of an electrically insulating material.

[0037] To connect the component 100 to other electronic components and / or circuits, the housing 109 further includes connection pads 117 (also referred to as housing contacts or contact caps). The connection pads 117 are positioned on the top surface 105 of the chip 103. Each pad 117 is connected to a connection terminal 107 on the chip 103.

[0038] The connection pads 117 are made of a conductive and "wettable" material (i.e., solderable), that is, a material that can be soldered.

[0039] The electrical connection terminals 107 of the chip 103 and the contact connection pads 117 are positioned in openings of an insulating material layer 121 that covers the chip 103. In one embodiment, the insulating material layer 121 is an insulating resin layer.

[0040] The component 100 is a wettable flange component, that is, at least part of the flank 119 of the housing 109 is covered by a conductive material layer 122 made of a wettable material, that is, a material on which soldering can be performed.

[0041] The conductive layer 122 covers the side surface 119 of the housing 109 partially from the top.

[0042] In some embodiments, the conductive layer 122 is a conductive resin layer.

[0043] The conductive layer 122 partially covers the insulating material layer 121. It is electrically insulated from the connection pad 117 through the insulating material layer 121.

[0044] The wettable flank device enables easy visual inspection of whether the component 100 has been correctly soldered to another device.

[0045] Now we will describe the manufacturing process of an electronic component with wettable flanks. This process includes the step of depositing an insulating material layer 121 on the sidewall 119 of the electronic component 100, followed by the step of depositing a conductive material layer 122 on the insulating material layer 121.

[0046] The process includes the following steps:

[0047] a) Providing a substrate 301 in which a chip 103 is formed, the chip 103 including at least two connection terminals 107, which are covered by connection pads 117 and arranged on the first major surface 305 of the substrate 301 ( Figure 2A )

[0048] b) Partially cutting the substrate 301 between the chips 103 to form a cavity 307, the walls of the cavity 307 corresponding to the sidewalls of the chips 103 ( Figure 2B )

[0049] c) Applying an insulating material layer 121, wherein the insulating material 121 covers the metal connection pads 117, covers the first side 305 of the substrate 301 between the connection terminals 107 and fills the cavity 307 ( Figure 2C )

[0050] d) Removing some of the insulating material from the cavity 307 to form a trench 311 ( Figure 2D )

[0051] e) Applying a conductive material layer 122 to the insulating material layer 121, the conductive material filling the trench 311 ( Figure 2E )

[0052] f) Thinning the device to enable access to the connection pads 117 ( Figure 2F )

[0053] g) Separating the component 100 by cutting the substrate 301 through the conductive material, thereby obtaining the component 100 with wettable flanks ( Figure 2G )

[0054] In step a), the fabrication of the (one or more) discrete components and / or (one or more) integrated circuits forming component 100 is completed. Component 100 is formed from a single substrate 301 and has not yet been individualized. In the figures, chip 103 is bounded by a dotted line in substrate 301. Substrate 301 has a first face 305 (top or front face) and a second face 303 (back or bottom face).

[0055] Substrate 301 is, for example, a semiconductor substrate such as silicon.

[0056] The thickness of substrate 301 is between 300 and 900 μm, for example, the thickness is approximately 725 μm.

[0057] In addition, with respect to Figure 1 the electrical connection terminals 107 described have been formed on the upper face 305 of substrate 301 ( Figure 2A ).

[0058] The electrical connection terminals 107 are covered by metal connection pads 117, which are in the shape of, for example, "bumps". Alternatively, they can also be conductive elements of another shape, such as columnar or cubic.

[0059] The metal connection pads 117 enable direct contact with the front part 115 of the housing 119.

[0060] Advantageously, the metal connection pads 117 are soldered to the electrical connection terminals 107. For example, the metal pads are made of a solderable tin-based material such as SnAgCu.

[0061] In the figures, the chips 103 are shown as having similar dimensions. Alternatively, they can have different dimensions. For ease of reading, the electrical connection terminals 107 are shown, but each chip 103 includes at least two connection terminals 107. A person skilled in the art will know how to adapt the manufacturing process described here in such a case.

[0062] In step b), the step of partially cutting component 100 is performed, for example, by a mechanical cutting process such as blade sawing. A cavity 307 is formed in substrate 301, and cavity 307 defines the lateral profile of the chips 103 of component 100. Cavity 307 extends from the top face 305 of substrate 301. According to one example, the depth of cavity 307 corresponds to the desired thickness of the chips of component 100. According to one example, the depth of cavity 307 is approximately 100 or 300 μm. The depth can be modified to suit the application.

[0063] The thickness of the cavity 307 formed in step b) is between 50 and 80 μm and the depth is 100 to 150 μm. The thickness can be modified according to the application.

[0064] This step b) is carried out using a cutting device. The cutting device is, for example, a mechanical engraving tool, such as a wafer saw, or a laser engraving tool.

[0065] In step c), the walls of the cavity 307 are covered with an insulating material. To achieve this, a layer of insulating material 121 is deposited in the cavity 307, on the first side 305 of the substrate 301 and on the connection pads 117. In this way, the connection pads 117 are arranged within the insulating material. The insulating material layer 121 forms the first part of the housing 109 of the assembly 100. This first part of the housing protects the top surface of the assembly 100 and at least part of the side surfaces of the assembly 100.

[0066] In step c), the insulating material can be deposited using a press or by vacuum molding.

[0067] The insulating material can include an electrically insulating resin. It can be a thermosetting resin or a thermoplastic resin. The material will be selected to be not easily melted within the operating temperature range of the electronic component. The resin can be selected from the group including epoxy-type resins, phenolic-type resins, and acrylic-type resins.

[0068] The insulating material can also include electrically insulating particles. The particles are, for example, oxide particles, especially alumina or silica particles.

[0069] The polymerization is, for example, a UV polymerization step or a thermally activated polymerization.

[0070] Annealing can be carried out before step d).

[0071] In step d), a cutting step is carried out to form grooves 311 in the insulating material layer 121. The grooves 311 are formed in the cavity 307. A part of the insulating material remains in the cavity. This part covers the bottom and the side walls of the cavity 307. In one example, the thickness of the insulating material remaining on the side walls of the cavity 307 is between 5 and 20 μm, for example between 5 and 10 μm. The bottom of the cavity 307 can be covered with an insulating material having a thickness of 1 to 10 μm.

[0072] The grooves 311 are created using a cutting device. The cutting device is, for example, a mechanical engraving tool, such as a saw, or a laser engraving tool. In one embodiment, the cutting device is a laser.

[0073] In step e), a layer of conductive material 122 is deposited on the insulating material layer 121. The conductive material layer 122 is deposited at least in the grooves 311 to cover the insulating material layer 121. It can be a full-panel deposition.

[0074] The conductive material is a conductive resin. The resin layer 121 includes at least one base material in which metal particles coated with an electrically insulating protective layer are added.

[0075] The substrate ensures the adhesion of layer 122 to material 121, and the particles ensure the final wettability of layer 122.

[0076] The substrate is selected from the group including epoxy resins, phenolic resins, and acrylic resins. The metal particles are, for example, metal particles whose material is selected from the group including copper, copper-containing alloys, titanium, titanium-containing alloys, nickel, nickel-containing alloys, silver, and silver-containing alloys.

[0077] According to an embodiment, the conductive resin layer 122 can be deposited by screen printing or by vacuum molding.

[0078] The polymerization is, for example, a UV polymerization step or by thermal activation.

[0079] Annealing can be performed after step e) and before step f).

[0080] The process includes step f) of thinning the front panel to enable access to the conductive pads 117. Then, the contacts of the housing 109 of the assembly 100 are fully formed. The front panel thinning step can be performed by grinding.

[0081] The process can also include the step of thinning the substrate 301 on the back side 303. For this purpose, the structure is flipped and fixed by its front side (i.e., face 305). The support is, for example, a tape strip. Then, the structure is thinned through its back side 303 such that the substrate 301 has its final thickness. In one example, the structure 301 is thinned to the cavity 307.

[0082] The process can advantageously include a step between step f) and step g), during which an additional insulating layer is deposited on the back side 303 of the structure to form the back side 111 of the housing 109. In this way, all sides of the substrate 301 are protected by layer 121 or the additional insulating layer.

[0083] The additional insulating layer is made of an electrically insulating material, for example, the same resin as the resin type in layer 121. In another example, the layer materials are different.

[0084] In step g), the assembly is individualized by cutting through the conductive resin 122. Thus, the assemblies 100 are separated from each other.

[0085] Then, the metal particles of the conductive material 122 are exposed, thereby ensuring the wetting function of the flanks 119 of the electronic assemblies 100.

[0086] The resulting assemblies 100 are surface mount devices (SMDs) of the "flip chip" type, i.e., they can be fixed to a support, such as a printed circuit board, through their top surface, i.e., the surface on which the contacts 117 of the housing 109 are arranged.

[0087] Components can also be DFN ("dual flat no-lead") or QFN ("quad flat no-lead") components. These components have no lead connections. These components do not protrude beyond the resin body of the package.

[0088] Such components are attractive for ensuring the reliability of electrical connections once the circuit has been installed in its environment.

[0089] Figure 3A and Figure 3B Steps in a process for assembling assembly 100 on an external device such as a printed circuit board or other assembly are shown.

[0090] The external device comprises a substrate 401 covered by a track 402 .

[0091] The brazing material 500 is positioned between the assembly 100 and the rail 402 of the external device 400 ( Figure 3A ). During welding, the welding material 500 rises to the wettable flanks 122 of the component, allowing verification that the welding has been performed correctly.

[0092] Various embodiments and variations have been described. Those skilled in the art will appreciate that certain features of these embodiments may be combined, and those skilled in the art will readily conceive of other variations.

[0093] Finally, actual implementation of the embodiments and variations described herein are within the capabilities of those skilled in the art based on the functional description provided above.

[0094] A method of manufacturing an electronic component (100) having wettable flanks from a substrate (301) having a chip (103) formed therein, the chip (103) being separated by a cavity (307), the method being summarized as comprising a first step of depositing a layer of insulating material (121) in the cavity and a second step of depositing a layer of conductive material (122) on the layer of insulating material (121) to form the wettable flanks.

[0095] The chip (103) comprises at least two connection terminals (107) covered by connection pads (117) and arranged on a first side (305) of a substrate (301), and, in a first step, a layer of insulating material (121) can be deposited in the cavity (307), on the connection pads (117) and on the first side (305) of the substrate (301).

[0096] Prior to the second step, the process includes a step of removing a portion of the insulating resin layer present in the cavity (307) to form a groove (311) whose bottom and walls are made of insulating resin, and, in the second step, a conductive material layer (122) may be deposited in the groove (311).

[0097] The process also includes the steps of thinning the insulating material layer (121) to allow access to the connection pads (117), and separating the electronic components (100) by cutting the substrate (301) through the conductive material layer (122).

[0098] An electronic assembly (100) with wettable flanks is summarized as comprising a chip (103) protected by a housing (109), the flanks of the housing (109) successively comprising a layer of insulating material (121) and a layer of conductive material (122).

[0099] The electronic component comprises: a first main surface (115), the first main surface comprising at least two connecting pads (117); a second main surface (111); and a wing (119), a conductive material layer (122) being electrically insulated from the connecting pads (117) by an insulating material layer (121), and the conductive material layer (122) extending from the first main surface (115) to a portion of the wing (119).

[0100] The insulating material layer (121) covers the first side (105) of the chip (103) between the connection pads (117).

[0101] The insulating material layer (121) is an epoxy resin or phenolic resin layer in which an electrically insulating filler such as alumina particles is dispersed.

[0102] The conductive material layer (122) is an epoxy resin or phenolic resin layer in which conductive fillers such as silver, copper or carbon black particles are dispersed.

[0103] The method of manufacturing a component can be summarized as including: arranging a substrate with a chip formed on the substrate, wherein the chip includes at least two connection terminals covered by a connection pad; partially cutting the substrate between the chips to form a cavity; applying an insulating material layer covering the connection pad and the substrate, wherein the insulating layer fills the cavity; removing a portion of the insulating material layer from the cavity to form a groove; and applying a conductive material layer to the insulating material layer, wherein the conductive material layer fills the groove.

[0104] The chip may include a first side, a second side opposite the first side, and a sidewall transverse to the first side and the second side. At least two connection terminals may be formed on the first side of the chip. The method may include thinning the component to enable access to the connection pads; and separating the components by cutting the substrate through the conductive material layer to obtain a component with wettable flanks.

[0105] The substrate may include a first face and a second face opposite to the first face, the substrate having a thickness between 300 and 900 μm. The substrate may be a semiconductor substrate. Partially cutting the component may be performed by a mechanical cutting process. The cavity may define the lateral profile of the chip of the component formed in the substrate, the cavity extending from the first face of the substrate. The depth of the cavity corresponds to the thickness of the chip of the component. The depth of the cavity may be 100 or 300 μm. The thickness of the cavity may be between 50 and 80 μm and the depth may be 100 to 150 μm. The various embodiments described above may be combined to provide additional embodiments. If necessary, aspects of the embodiments may be modified to provide additional embodiments using the concepts of various patents, applications, and publications.

[0106] These and other changes can be made to the embodiments in light of the above detailed description. In general, in the appended claims, the terms used should not be interpreted as limiting the claims to the specific embodiments disclosed in the specification and claims, but should be interpreted to include all possible embodiments and the full range of equivalents to which these claims are entitled. Therefore, the claims are not limited by the present disclosure.

Claims

1. A method comprising: depositing a layer of insulating material in the cavity; as well as The wettable flanks are formed by depositing a layer of conductive material on the layer of insulating material.

2. The method according to claim 1 further comprises a substrate, wherein the chip comprises at least two connection terminals covered by connection pads and arranged on a first side of the substrate, and wherein the insulating material layer is deposited on the connection pads and on the first side of the substrate.

3. The method according to claim 2, wherein: The process further includes, before forming the wettable wing, removing a portion of the insulating resin layer present in the cavity, thereby forming a trench having a bottom surface and sidewalls made of insulating resin, and wherein the conductive material layer is deposited in the trench.

4. The method according to claim 2, further comprising: thinning the insulating material layer to allow access to the connection pads, and Electronic components are separated by cutting the substrate through the layer of conductive material.

5. A device comprising: a chip protected by a housing, wherein the housing includes side wings; Insulating material layer; as well as Conductive material layer.

6. The device according to claim 5, further comprising: a first main surface having at least two connection pads; a second main surface opposite to the first main surface; as well as The side wing, the conductive material layer is electrically insulated from the connection pad by the insulating material layer, and the conductive material layer extends from the first main surface to a portion of the side wing.

7. The device according to claim 5, wherein: The insulating material layer covers the first side of the chip between the connection pads.

8. The device according to claim 5, wherein: The insulating material layer is an epoxy resin or phenolic resin layer in which an electrically insulating filler is dispersed.

9. The device according to claim 5, wherein: The conductive material layer is an epoxy resin or phenolic resin layer in which silver, copper or carbon black particles are dispersed.

10. A method comprising: Arranging a substrate on which a chip is formed, wherein the chip includes at least two connection terminals covered by connection pads; cutting the substrate between the chips to form a cavity; applying a layer of insulating material covering the connection pads and the substrate, wherein the insulating layer fills the cavity; removing a portion of the insulating material layer from the cavity to form a trench; and A conductive material layer is applied on the insulating material layer, the conductive material layer filling the trench.

11. The method according to claim 10, wherein: The chip includes a first side, a second side opposite to the first side, and sidewalls transverse to the first side and the second side.

12. The method according to claim 11, wherein: The at least two connection terminals are formed on the first side of the chip.

13. The method according to claim 10, further comprising: thinning the component to allow access to the connection pads; as well as Components are separated by cutting the substrate through the layer of conductive material to obtain components with wettable flanks.

14. The method according to claim 10, wherein: The substrate has a first face and a second face opposite to the first face, the substrate having a thickness between 300 and 900 μm.

15. The method according to claim 10, wherein: The substrate is a semiconductor substrate.

16. The method according to claim 10, wherein: Partially cutting the assembly is performed by a mechanical cutting process.

17. The method according to claim 14, wherein: The cavity defines a lateral outline of a chip of a component formed in the substrate, the cavity extending from a first face of the substrate.

18. The method according to claim 10, wherein: The depth of the cavity corresponds to the thickness of the chip of the component.

19. The method according to claim 10, wherein: The depth of the cavity is 100 or 300 μm.

20. The method according to claim 10, wherein: The cavity has a thickness between 50 and 80 μm and a depth of 100 to 150 μm.

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