Image sensor, electronic equipment and image acquisition method

Abstract

The invention discloses an image sensor, electronic equipment and an image acquisition method, and belongs to the technical field of image sensors. The image sensor comprises a pixel array, the pixel array comprises a plurality of columns of pixel assemblies, each column of pixel assemblies comprises a plurality of pixel assemblies, each pixel assembly comprises a capacitive assembly, each capacitive assembly is used for being configured as a fixed gain module or an adjustable gain module of the pixel assembly, the gain value of the fixed gain module is fixed, and the gain value of the adjustable gain module is adjustable. The gain value of the adjustable gain module is not fixed; the switch array comprises multiple columns of first switch groups, the multiple columns of first switch groups and the multiple columns of pixel assemblies are arranged in a one-to-one correspondence mode, and one first switch group is correspondingly arranged between the capacitive assemblies of any two adjacent pixel assemblies in each column of pixel assemblies; the gain programming module is connected with each switch array; and the row driving module is connected with the pixel array.

Description

Technical Field

[0001] This application belongs to the technical field of image sensors, and particularly relates to an image sensor, an electronic device, and an image acquisition method. Background Art

[0002] In a CIS (CMOS Image Sensor, complementary metal oxide semiconductor image sensor), the dynamic range is generally adjusted as a whole by changing the exposure time of all pixels and the pixel signal gain. The modulation effect of HDR (High Dynamic Range) is changed by adjusting the length of the exposure time and the output signal gain.

[0003] Regarding the HDR technology related to CG (Conversion Gain, in-pixel gain), since current pixels are only equipped with DCG (Dual Conversion Gain) technology or TCG (Triple Conversion Gain) technology, the dynamic range of the pixel and the CIS is determined by the number and magnitude of the CG under the condition of a fixed exposure time and aperture, and the number and magnitude of the CG are fixed and cannot be adjusted. Therefore, the parameter of the native ISO (sensitivity) of the CIS is fixed, and the output pixel signal needs to be amplified using backend analog gain and digital gain. Moreover, since the analog gain and digital gain have no noise elimination effect, the noise in the captured image is obvious and the image quality is low. Summary of the Invention

[0004] The purpose of the embodiments of this application is to provide an image sensor, an electronic device, and an image acquisition method, which solve the problems of the fixed parameter of the native ISO of the image sensor caused by the fixed in-pixel gain parameter, and the obvious image noise and low image quality caused by amplifying the output pixel signal using analog gain and digital gain.

[0005] In a first aspect, an embodiment of the present application provides an image sensor, including: a pixel array, the pixel array includes multiple columns of pixel components, each column of pixel components includes multiple pixel components, and each pixel component includes: a capacitive component, each capacitive component is configured to be a fixed gain module or an adjustable gain module of the pixel component, the gain value of the fixed gain module is fixed, and the gain value of the adjustable gain module is not fixed; a switch array, the switch array includes multiple columns of first switch groups, the multiple columns of first switch groups are arranged in one-to-one correspondence with the multiple columns of pixel components, and a first switch group is correspondingly arranged between the capacitive components of any two adjacent pixel components in each column of pixel components; a gain programming module, connected to each switch array, the gain programming module is configured to control the number of first switch groups in the on state in each column of first switch groups to adjust the gain value of the adjustable gain module in the pixel components corresponding to each column of first switch groups; a row driving module, connected to the pixel array, the row driving module is configured to control the pixel array to output pixel signals in sequence through the fixed gain value of the fixed gain module and the adjustable gain value of the adjustable gain module.

[0006] In a second aspect, an embodiment of the present application provides an electronic device, including: a main body; the image sensor in any of the above technical solutions, and the image sensor is disposed on the main body.

[0007] In a third aspect, an embodiment of the present application provides an image acquisition method, which is applied to the electronic device in any of the above technical solutions. The image acquisition method includes: when the reset operation of the previous row of pixel components is completed and the exposure operation starts, performing a reset operation on the current row of pixel components; when the exposure operation of the current row of pixel components is completed, performing a gain setting operation on the current row of pixel components to set a target gain value in a gain value set, the gain value set includes all gain values corresponding to the fixed gain module and the adjustable gain module; performing a read operation on the current row of pixel components according to the target gain value, and returning to perform a gain setting operation on the current row of pixel components through the gain programming module until the read operation is completed according to each gain value in the gain value set.

[0008] In the embodiments of the present application, a plurality of column pixel components are arranged in a pixel array, and each pixel component includes a capacitive component. The capacitive component is configured as a fixed gain module or an adjustable gain module within the pixel component. The capacitive components in adjacent two rows of pixel components are connected through a first switch group. The gain programming module selects the connection number between the capacitive component of the pixel component that outputs the pixel signal and the capacitive components of other pixel components, so as to adjust the adjustable gain value of the adjustable gain module, enabling the adjustable gain module to set the adjustable gain value according to the actual needs of the user, thereby making the native ISO parameter of the image sensor adjustable, and solving the problems of the fixed native ISO parameter of the image sensor caused by the fixed gain parameter within the pixel, obvious image noise and low image quality caused by amplifying the output pixel signal using analog gain and digital gain. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 FIG. 1 shows one of the schematic structural diagrams of an image sensor provided in some embodiments of the present application;

[0010] Figure 2 FIG. 2 shows the block diagram of the structure of a pixel component provided in some embodiments of the present application;

[0011] Figure 3 FIG. 3 shows another schematic structural diagram of an image sensor provided in some embodiments of the present application;

[0012] Figure 4 FIG. 4 shows one of the circuit diagrams of a pixel component provided in some embodiments of the present application;

[0013] Figure 5 FIG. 5 shows yet another schematic structural diagram of an image sensor provided in some embodiments of the present application;

[0014] Figure 6 FIG. 6 shows another circuit diagram of a pixel component provided in some embodiments of the present application;

[0015] Figure 7a FIG. 7 shows one of the schematic diagrams of the relationship between the ratio of gain values and the dynamic range of signal-to-noise ratio provided in some embodiments of the present application;

[0016] Figure 7b FIG. 8 shows another schematic diagram of the relationship between the ratio of gain values and the dynamic range of signal-to-noise ratio provided in some embodiments of the present application;

[0017] Figure 8 FIG. 9 shows another circuit diagram of a pixel component provided in some embodiments of the present application;

[0018] Figure 9 FIG. 10 shows the working timing diagram of an image sensor within one frame time provided in some embodiments of the present application;

[0019] Figure 10 The structural schematic diagram of the electronic device provided in some embodiments of the present application is shown;

[0020] Figure 11 The flowchart of the image acquisition method provided in some embodiments of the present application is shown.

[0021] Figures 1 to 10 The reference numerals are as follows:

[0022] 10 Image sensor, 100 Pixel array, 110 Pixel component, 111 Capacitive component, 1112 Second switch group, 112 Fixed gain module, 1121 First fixed module, 1122 Second fixed module, 113 Adjustable gain module, 1131 First adjustable module, 1132 Second adjustable module, 114 Photosensitive unit, 115 Transmission unit, 116 Reset unit, 117 Reading unit, 120 Switch array, 121 First switch group, 130 Row driving module, 140 Gain programming module, 150 Column scanning component, 160 Image signal processor, PPD Photosensitive diode, M TX Transfer transistor, RST Reset transistor, SF Source follower, M SEL Output transistor, C FD First capacitive unit, C CG Second capacitive unit, M CG1 First switch element, M LCG Second switch element, M SLCG Third switch element, M CG2 Fourth switch element, M CG3 Fifth switch element, V DD Power supply, 200 Electronic device, 202 Body. Detailed implementation manners

[0023] Next, the technical solutions in the embodiments of the present application will be clearly described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art belong to the scope of protection of the present application.

[0024] The terms "first" and "second" in the description and claims of the present application may explicitly or implicitly include one or more of such features. In the description of the present application, unless otherwise specified, the meaning of "a plurality" is two or more. In addition, "and / or" in the description and claims means at least one of the connected objects, and the character " / " generally means an "or" relationship between the associated objects before and after.

[0025] In the description of the present application, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. They are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to the present application.

[0026] In the description of the present application, it should be noted that unless otherwise clearly specified and limited, the terms "mounted", "connected", "coupled" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, and it can be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific situations.

[0027] The following Figures 1 to 11 will, with reference to the accompanying drawings and through specific embodiments and their application scenarios, elaborate in detail on the image sensor, electronic device, and image acquisition method provided by the embodiments of the present application.

[0028] In some embodiments of the present application, an image sensor is provided. Figure 1 FIG. 1 shows one of the schematic diagrams of the architecture of the image sensor provided in some embodiments of the present application. Figure 2 FIG. 2 shows the block diagram of the structure of the pixel component provided in some embodiments of the present application. Figure 3 FIG. 3 shows another schematic diagram of the architecture of the image sensor provided in some embodiments of the present application. Figure 4 FIG. 4 shows one of the circuit diagrams of the pixel component provided in some embodiments of the present application. Figure 5 FIG. 5 shows yet another schematic diagram of the architecture of the image sensor provided in some embodiments of the present application. Figure 6 FIG. 6 shows another circuit diagram of the pixel component provided in some embodiments of the present application, such as Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 and Figure 6As shown in the figure, the image sensor 10 includes: a pixel array 100, the pixel array 100 includes multiple columns of pixel components 110, each column of pixel components 110 includes multiple pixel components 110, and each pixel component 110 includes: a capacitive component 111, each capacitive component 111 is used to be configured as a fixed gain module 112 or an adjustable gain module 113 of the pixel component 110, the gain value of the fixed gain module 112 is fixed, and the gain value of the adjustable gain module 113 is not fixed; a switch array 120, the switch array 120 includes multiple columns of first switch groups 121, the multiple columns of first switch groups 121 are arranged in one-to-one correspondence with the multiple columns of pixel components 110, and a first switch group 121 is correspondingly arranged between the capacitive components 111 of any two adjacent pixel components 110 in each column of pixel components 110; a gain programming module 140, connected to each switch array 120, the gain programming module 140 is used to control the number of first switch groups 121 in the on state in each column of first switch groups 121, so as to adjust the gain value of the adjustable gain module 113 in the pixel components 110 corresponding to each column of first switch groups 121; a row driving module 130, connected to the pixel array 100, the row driving module 130 is used to control the pixel array 100 to output pixel signals in turn through the fixed gain value of the fixed gain module 112 and the adjustable gain value of the adjustable gain module 113.

[0029] Figure 2 In the figure, the HCG module and the MCG module are the fixed gain module 112, and the LCG module and the SLCG module are the adjustable gain module 113.

[0030] In the embodiment of the present application, a pixel array 100 including multiple columns of pixel components 110 is provided in the image sensor 10, each column of pixel components 110 includes multiple pixel components 110, and the pixel components 110 in the pixel array 100 are arranged in a rectangular array form, that is, the pixel array 100 includes at least two rows of pixel components 110, and the number of pixel components 110 in at least two rows of pixel components 110 is equal.

[0031] Specifically, the image sensor 10 architecture adopts an M×N pixel array 100, and the gain programming module 140 and the row driving module 130 are arranged around the pixel array 100. The gain programming module 140 controls each column of first switch groups 121 in the switch array 120 in a parallel (Row Parallel) manner, so as to set the adjustable gain module 113 in each column of pixels, so as to perform gain programming on the adjustable gain module 113 in the pixel component 110. The control signals for the reset operation, exposure operation, and read operation of the pixel component 110 are all provided by the row driving module 130, and the pixel component 110 is controlled to perform actions row by row in a parallel manner.

[0032] Exemplarily, since the first switch group 121 is connected between the capacitive components 111 in two adjacent pixel components 110, when the gain programming module 140 controls the first switch group 121 between two adjacent pixel components 110 to be in the conducting state, the capacitive components 111 between two adjacent pixels are in the connected state, thereby changing the adjustable gain value of the adjustable gain module 113 formed by the capacitive components 111. It should be noted that the row driving module 130 drives the pixel array 100 to output pixel signals row by row. Therefore, the gain programming module 140 can set the adjustable gain value of the adjustable gain module 113 of the pixel components 110 in each row during the independent time period when each row of the pixel array 100 outputs pixel signals according to the order of the output pixel signals.

[0033] In the embodiment of the present application, each pixel component 110 includes a capacitive component 111. The capacitive component 111 can be configured as a fixed gain module 112 or an adjustable gain module 113 within the pixel component 110. Among them, the gain value of the fixed gain module 112 is fixed and non-adjustable, and the gain value of the adjustable gain module 113 is not fixed and can be adjusted according to the user's needs. The fixed gain module 112 is composed of fixed capacitive units in the capacitive component 111, that is, the gain parameter of the fixed gain module 112 is determined by the capacitance value of the capacitive units in the capacitive component 111 and cannot be changed. The adjustable gain module 113 is formed by connecting the capacitive component 111 through the first switch group 121 to the capacitive components 111 in the pixel components 110 of other rows. The gain programming module 140 can control the number of capacitive components 111 in other rows connected to the capacitive component 111 in each row of pixel components 110, change the capacitance value of the capacitive component 111 when each row of pixel components 110 outputs pixel signals, thereby changing the adjustable gain value of the adjustable gain module 113.

[0034] The fixed gain module 112 and the adjustable gain module 113 share the same capacitive component 111 within the pixel component 110. The gain value of the fixed gain module 112 depends on the capacitance of the capacitive component 111 itself, and the gain value of the adjustable gain module 113 depends on the number of capacitive components 111 in other pixel components 110 connected to the capacitive component 111 within the pixel component 110 by the gain programming module 140.

[0035] Specifically, the adjustable gain modules 113 of all pixel components 110 in each column of the pixel array 100 are electrically connected by wires, and the first switch group 121 is arranged on the wires. The control terminals of the controllable switches in the first switch group 121 are connected to the gain programming module 140. The gain programming module 140 controls the on / off state of the first switch group 121 by transmitting control signals to the first switch group 121, so as to adjust the number of connections of the capacitive components 111 in other pixel components 110 connected to the capacitive component 111 in the pixel component 110, and realize the adjustment of the gain value of the adjustable gain module 113.

[0036] In the embodiment of the present application, the row driving module 130 is used to drive the pixel array 100. The row driving module 130 drives at least two rows of pixel components 110 in the pixel array 100 row by row, so that only the pixel signals of one row of pixel components 110 are read at the same time.

[0037] In the embodiment of the present application, when reading the pixel signals of the pixel components 110, the pixel components 110 need to be exposed and output corresponding pixel signals in sequence according to the fixed gain value and the adjustable gain value, that is, the number of pixel signals output by each row of pixel components 110 is related to the number of gain values. Each row of pixel components 110 needs to generate pixel signals according to the gain value of the fixed gain module 112 and the gain value of the adjustable gain module 113, and the gain value of the adjustable gain module 113 needs to reuse the capacitive components 111 in the pixel components 110 of adjacent rows. Therefore, by driving the pixel components 110 row by row by the row driving module 130 to read pixel signals, it can be ensured that when reading the pixel signals of the current row of pixel components 110, the adjacent row of pixel components 110 for reuse does not need to output pixel signals, ensuring the stability of the gain value of the adjustable gain module 113, thereby improving the signal quality of the pixel signals output by the pixel components 110.

[0038] Specifically, the image sensor 10 adopts the operation mode of a rolling shutter. Within one frame time, each row of pixel components 110 has a separate reading period. Within this independent time period, each pixel component 110 in the row is programmed by the pixel programming module to determine the magnitude of the gain value.

[0039] Exemplarily, the reading of the pixel component 110 adopts the QCG (Quad Conversion Gain) reading method, which includes two fixed gain values and two adjustable gain values, and the four gain values are different from each other. That is, it is read four times, and each time one gain is used. After the reading of one row of pixel components 110 is completed, the reading of the next row of pixel components 110 is carried out until the reading of one frame of signals is completed.

[0040] It can be understood that during the process of driving the pixel components 110 row by row by the row driving module 130, at least two rows of pixel components 110 can be driven simultaneously to output pixel signals, and the pixel components 110 outputting pixel signals are arranged at intervals, so that the capacitive components 111 in the adjacent rows of pixel components 110 can be reused by the adjustable gain modules 113 in the pixel components 110 outputting pixel signals.

[0041] Exemplarily, the row driving module 130 can drive two rows of pixel components 110 to output pixel signals simultaneously, and there are four rows of pixel components 110 between the two rows of pixel components 110 driven simultaneously, so that each row of pixel components 110 can call the capacitors in the four rows of pixel components 110 at intervals.

[0042] In the embodiment of the present application, multiple columns of pixel components 110 are arranged in the pixel array 100, and each pixel component 110 includes a capacitive component 111. The capacitive component 111 is configured as a fixed gain module 112 or an adjustable gain module 113 in the pixel component 110. The capacitive components 111 in the adjacent two rows of pixel components 110 are connected through the first switch group 121. The gain programming module 140 selects the connection number of the capacitive component 111 of the pixel component 110 outputting pixel signals and the capacitive components 111 of other pixel components 110, so as to adjust the adjustable gain value of the adjustable gain module 113, so that the adjustable gain module 113 can set the adjustable gain value according to the actual needs of the user, so that the native ISO parameter of the image sensor 10 is adjustable, and solves the problems of fixed native ISO parameters of the image sensor 10 caused by fixed gain parameters in the pixel, obvious image noise and low image quality caused by amplifying the output pixel signals using analog gain and digital gain.

[0043] Such as Figure 3 and Figure 5 As shown, the gain programming module 140 includes a first programmer and a second programmer, and the first programmer and the second programmer are respectively used to control the on-off states of different switches in the switch array 120.

[0044] Such as Figure 2 As shown, in some embodiments of the present application, the number of fixed gain modules 112 in each pixel component 110 is at least one, the number of adjustable gain modules 113 in each pixel component 110 is at least two, and the sum of the number of fixed gain modules 112 and the number of adjustable gain modules 113 in each pixel component 110 is at least four.

[0045] In the embodiment of the present application, the number of gain values adopted by the pixel component 110 when outputting pixel signals is associated with the number of the fixed gain module 112 and the adjustable gain module 113 in the pixel component 110. That is, the number of the fixed gain module 112 is the same as the number of the fixed gain values of the pixel component 110, and the number of the adjustable gain module 113 is the same as the number of the adjustable gain values.

[0046] In the embodiment of the present application, the fixed gain module 112 in the pixel component 110 is configured by the capacitive component 111. By setting the number of capacitive units in the capacitive component 111, the number of the fixed gain module 112 can be adjusted.

[0047] Exemplarily, the number of capacitive units in the capacitive component 111 is 1. Since the capacitance value of the capacitive unit is fixed, the number of the fixed gain module 112 is 1. When the number of capacitive units in the capacitive component 111 is 2, a single capacitive unit is configured as a fixed gain module 112, and the two capacitive units are combined and configured as a fixed gain module 112.

[0048] In the embodiment of the present application, the adjustable gain module 113 in the pixel component 110 is formed by the capacitive component 111 of the pixel component 110 itself and the capacitive components 111 in the pixel components 110 of other rows connected by the first switch group 121. Therefore, the number of the adjustable gain module 113 is the same as the number of connection ports of the capacitive component 111, and each connection port of the capacitive component 111 is connected to a switch element in the first switch group 121. Therefore, the number of switches in the first switch group 121 is also the same as the number of the adjustable gain module 113.

[0049] Exemplarily, each capacitive component 111 includes two connection ports, and the two connection ports are used to connect the capacitive components 111 in different numbers of other pixel components 110. Specifically, for example: the gain programming module 140 controls one connection port in the capacitive component 111 to connect 1 capacitive component 111 of other rows, and controls the other connection port in the capacitive component 111 to connect 2 capacitive components 111 of other rows, then two adjustable gain modules 113 with different adjustable gain values are formed in the pixel component 110.

[0050] In the embodiment of the present application, the value range of the sum of the number of the fixed gain module 112 and the number of the adjustable gain module 113 is greater than or equal to four, so that the number of gain values in the pixel component 110 is greater than or equal to four, enabling the pixel component 110 to achieve single-frame HDR shooting, and greatly expanding the dynamic range while there is no break and sink point in the SNR curve.

[0051] Figure 7aOne of the schematic diagrams showing the relationship between the ratio of gain values and the dynamic range of the signal-to-noise ratio provided in some embodiments of the present application Figure 7b One of the schematic diagrams showing the relationship between the ratio of gain values and the dynamic range of the signal-to-noise ratio provided in some embodiments of the present application, as Figure 7a and Figure 7b shown, the dynamic ranges of the pixel component 110 and the image sensor 10 are determined by the number and magnitude of the gain values under fixed exposure time and aperture. As Figure 7a shown, taking the DCG pixel as an example, if the ratio of HCG (High Gain CG) to LCG (Low Gain CG) is not large, for example, LCG:HCG = 1:4 is taken, then its DCG-HDR SNR (Signal-to-Noise Ratio) curve is continuous without interruption. The continuous SNR curve can maintain consistent image quality without mutation at different brightness levels. The cost is that the total dynamic range of the HDR image is not high, generally not exceeding 90 dB. If the dynamic range is to be extended to, for example, above 100 dB, then the CG ratio needs to be increased, for example, LCG:HCG = 1:32 is taken. The cost is that the SNR curve has a break and sink point (SNR Dip). The break and sink point of the SNR curve results in a sudden change in image quality in the final HDR image and affects the user experience.

[0052] In the embodiments of the present application, setting the total number of gain modules to be greater than or equal to 4 can avoid the problem that the maximum dynamic range cannot be extended above 100 dB due to insufficient gain values when the pixel component 110 outputs pixel signals, or the problem of image quality loss due to excessive increase in the ratio between gain values.

[0053] Exemplarily, the number of fixed gain modules 112 is 2, and the number of adjustable gain modules 113 is also 2. Specifically, for example: the fixed gain module 112 includes a floating diffusion capacitor and an extended capacitor. The floating diffusion capacitor can be used as a fixed gain module 112 alone, and the floating diffusion capacitor connected to the extended capacitor can be used as another fixed gain module 112. The adjustable gain module 113 connects the floating diffusion capacitor and the extended capacitor in the pixel component 110 of this row to the floating diffusion capacitor and the extended capacitor in the adjacent row, and sets the number of the floating diffusion capacitor and the extended capacitor in the adjacent row connected by the two adjustable gain modules 113 through the first switch group 121. One of the adjustable gain modules 113 is adjusted to connect the floating diffusion capacitor and the extended capacitor in the pixel component 110 of other rows, and the other adjustable gain module 113 is to connect the floating diffusion capacitor and the extended capacitor in the pixel component 110 of other rows.

[0054] Exemplarily, the number of fixed gain modules 112 is 1, and the number of adjustable gain modules 113 is 3.

[0055] In the embodiments of the present application, the number of fixed gain modules 112 is at least one, which avoids all the gain modules in the pixel component 110 being adjustable gain modules 113, helps to simplify and miniaturize the circuit design of the pixel component 110, and the number of adjustable gain modules 113 is at least two, which can ensure the range of adjustable gain values of the pixel component 110.

[0056] In some embodiments of the present application, the fixed gain module 112 includes a first fixed module 1121 and a second fixed module 1122, and the gain values of the first fixed module 1121 and the second fixed module 1122 are different; the capacitive component 111 includes: a first capacitive unit C FD , a second capacitive unit C CG and a first switching element M CG1 , and the first switching element M CG1 is used to control the on-off state of the first capacitive unit C FD and the second capacitive unit C CG ; wherein, when the first switching element M CG1 is in the off state, the capacitive component 111 is configured as the first fixed module 1121; when the first switching element M CG1 is in the on state, the capacitive component 111 is configured as the second fixed module 1122.

[0057] In the embodiments of the present application, the number of fixed gain modules 112 is two, namely the first fixed module 1121 and the second fixed module 1122, and the gain values of the first fixed module 1121 and the second fixed module 1122 are different. Among them, the capacitive component 111 includes a first capacitive unit C FD and a second capacitive unit C CG , and a first switching element M FD provided between the first capacitive unit C CG and the second capacitive unit C CG1 . When the first switching element M CG1 is in the off state, the first capacitive unit C FD and the second capacitive unit C CG are in the off state. At this time, only the first capacitive unit C FD serves as the fixed gain module 112. When the first switching element M CG1 is in the on state, the first capacitive unit C FD and the second capacitive unit C CG are in the connected state. At this time, the first capacitive unit C FD and the second capacitive unit C CG are connected together to serve as the fixed gain module 112.

[0058] As Figure 4 and Figure 6As shown, for example: the first capacitive unit C FD is a floating diffusion capacitance, and the second capacitive unit C CG is an extended capacitance corresponding to the floating diffusion capacitance, that is, through the second capacitive unit C CG the first capacitive unit C FD can be extended. A first switch M FD is provided between the first capacitive unit C CG and the second capacitive unit C CG1 , and the first switch M CG1 is used to control the on / off state between the first capacitive unit C FD and the second capacitive unit C CG . The control end of the first switch M CG1 is connected to the row driving module 130, that is, the row driving module 130 can control whether the second capacitive unit C CG extends the first capacitive unit C FD . When the first capacitive unit C FD is not extended, the first capacitive unit C FD is configured as the first fixed module 1121. When the first capacitive unit C FD is extended through the second capacitive unit C CG , the first capacitive unit C FD and the second capacitive unit C CG are configured as the second fixed module 1122.

[0059] In the embodiment of the present application, the fixed gain module 112 includes the first fixed module 1121 and the second fixed module 1122. Then, a first capacitive unit C FD and a second capacitive unit C CG are provided in the capacitive component 111, and the second capacitive unit C CG can be used to extend the first capacitive unit. By controlling the on / off state of the first switch M CG1 , it is selected whether the second capacitive unit C CG extends the first capacitive unit C FD , so that the unextended first capacitive unit is configured as the first fixed module 1121, and the extended first capacitive unit is configured as the second fixed module 1122.

[0060] As Figure 1 and Figure 4 shown, in some embodiments of the present application, the capacitive component 111 further includes a second switch group 1112, and the second switch group 1112 is used to control the first capacitive unit C FDThe on / off state between the capacitive component 111 and the corresponding first switch group 121; wherein, when the second switch group 1112 is in the on state and the corresponding first switch group 121 is in the on state, the capacitive component 111 is configured as the adjustable gain module 113.

[0061] In the embodiment of the present application, the capacitive component 111 includes a second switch group 1112 connected between the first capacitive unit C FD and the first switch group 121. The second switch group 1112 is used to control the on / off state between the first capacitive unit C FD and the first switch group 121. When it is necessary to configure the capacitive component 111 as the adjustable gain module 113, the second switch group 1112 is controlled to be in the on state. At this time, the gain programming module 140 can set the adjustable gain value of the adjustable gain module 113 by controlling the on / off state of a column of the first switch group 121.

[0062] Such as Figure 1 、 Figure 2 and Figure 4 shown, the CG selection module includes the first switching element M in the capacitive component 111 CG1 and the second switch group 1112.

[0063] Specifically, the gain programming module 140 can connect the first capacitive unit C in the pixel component 110 FD with the first capacitive units C in the corresponding number of other pixel components 110 FD by controlling the number of the first switch groups 121 in a column that are in the on state, so as to adjust the adjustable gain value of the formed adjustable gain module 113.

[0064] In the embodiment of the present application, by arranging the corresponding second switch group 1112 between the first capacitive unit C of the capacitive component 111 FD and the first switch group 121, the capacitive component 111 is multiplexed to form the adjustable gain module 113. By controlling the on / off state of the second switch group 1112, it is possible to control whether the capacitive component 111 is configured as the fixed gain module 112 or the adjustable gain module 113. When the pixel component 110 can have both the adjustable gain module 113 and the fixed gain module 112, it is also possible to avoid increasing the hardware structure in the pixel component 110.

[0065] Such as Figure 2 shown, in some embodiments of the present application, the number of the adjustable gain modules 113 includes a first adjustable module 1131 and a second adjustable module 1132, and the gain values of the first adjustable module 1131 and the second adjustable module 1132 are different;

[0066] The first switch group 121 includes a second switching element M LCG and a third switching element M SLCG , the second switch group 1112 includes a fourth switching element M CG2 and a fifth switching element M CG3 , the fourth switching element M CG2 is used to control the on-off state of the first capacitive unit C FD and the second switching element M LCG , the fifth switching element M CG3 is used to control the on-off state of the first capacitive unit C FD and the third switching element M SLCG ;

[0067] When the fourth switching element M CG2 is in the conducting state, and the first quantity of the second switching elements M in a column of the first switch group 121 LCG are in the conducting state, the capacitive component 111 is configured as the first adjustable module 1131;

[0068] When the fifth switching element M CG3 is in the conducting state, and the second quantity of the third switching elements M in a column of the first switch group 121 SLCG are in the conducting state, the capacitive component 111 is configured as the second adjustable module 1132;

[0069] Wherein, the first quantity is different from the second quantity.

[0070] In the embodiment of the present application, the adjustable gain module 113 includes a first adjustable module 1131 and a second adjustable module 1132. Wherein, the gain values of the first adjustable module 1131 and the second adjustable module 1132 are both adjustable, and the gain values of the first adjustable gain module 113 and the second adjustable gain module 113 are different. Since the adjustable gain module 113 includes two different adjustable modules, therefore, two different switching elements are provided in both the first switch group 121 and the second switch group 1112, so that the capacitive component 111 can be configured as the corresponding adjustable gain module 113. The first switch group 121 includes a second switching element M connected between the fourth switching elements M in adjacent rows of the pixel components 110 CG2 , and a third switching element M connected between the fifth switching elements M in adjacent rows of the pixel components 110 LCG . Wherein, the number of the second switching elements M CG3 and the third switching elements M is (N - 1)×M, N is the number of rows of the pixel array 100, and M is the number of columns of the pixel array 100, that is, a second switching element M is connected and arranged between each pixel component 110 in adjacent rows SLCG and a third switching element M LCG , and the third switching element M SLCG . Wherein, the number of the second switching elements M LCG and the third switching elements MSLCG .

[0071] Specifically, the first switch group 121 includes a second switch element M LCG and the third switch element M SLCG The second switch group 1112 includes a fourth switch element M CG2 and the fifth switch element M CG3 , the fourth switch element M CG2 Connected to the first capacitive unit C FD The second switch element M in a first switch group 121 is connected to LCG The fifth switch M CG3 Connected to the first capacitive unit C FD The third switch element M in a first switch group 121 is connected to SLCG The gain programming module 140 controls the second switch element M in the conductive state in a column of the first switch group 121. LCG The first number of the first adjustable module 1131 is set to set the gain value, and the third switch element M in the conductive state in a column of the first switch group 121 is controlled by the gain programming module 140. SLCG The second number is set to set the gain value of the second adjustable module 1132, and the second number is set to be inconsistent with the first number, so as to ensure that the gain values ​​of the first adjustable module 1131 and the second adjustable module 1132 are different.

[0072] like Figure 2 As shown, in some embodiments of the present application, the element component also includes:

[0073] A photosensitive unit 114, wherein a first end of the photosensitive unit 114 is grounded;

[0074] A transmission unit 115, wherein a first end of the transmission unit 115 is connected to a second end of the photosensitive unit 114, and a second end of the transmission unit 115 is connected to the fixed gain module 112 and the adjustable gain module 113, and the transmission unit 115 and the photosensitive unit 114 are used to perform an exposure operation;

[0075] A reset unit 116, connected between the transmission unit 115 and a power source, and the reset unit 116 is used to perform a reset operation;

[0076] The reading unit 117 is connected to the fixed gain module 112 and the adjustable gain module 113 , and is used to perform a reading operation.

[0077] In the embodiments of the present application, the pixel component 110 includes a photosensitive unit 114, a transmission unit 115, a reset unit 116, and a reading unit 117. Among them, the fixed gain module 112 and the adjustable gain module 113 include a floating diffusion capacitor, and the floating diffusion capacitor is used to cache the charges in the photosensitive unit 114. The reading unit 117 can amplify and convert the signal read out from the photosensitive unit 114 into a corresponding voltage and output it outside the pixel component 110. The reset unit 116 is responsible for resetting the floating diffusion capacitor.

[0078] As Figure 4 and Figure 6 shown, exemplarily, the photosensitive unit 114 can be selected as a photosensitive diode PPD, and the transmission unit 115 can be selected as a transmission transistor M TX , the reset unit 116 can be selected as a reset transistor RST, and the reading unit 117 includes a source follower SF (SF, Source Follower) and an output transistor M SEL , where the transmission transistor M TX is an NMOS (N-type MOSFET, N-type semiconductor transistor). Specifically, the photosensitive diode PPD is responsible for photosensing and photoelectric conversion within each frame time, and the generated charges are cached in the floating diffusion capacitors in the fixed gain module 112 and the adjustable gain module 113 after passing through the transmission transistor M TX . During the reading stage, the floating diffusion capacitor outputs the charges to the outside of the pixel component 110 after amplification by the source follower SF and the output transistor M in the reading unit 117 SEL . It should be noted that during the pixel signal output stage, it is necessary to control the fixed gain module 112 and the adjustable gain module 113 to adjust the capacitance value of the floating diffusion capacitor, so that the pixel signal output is output according to different gain values. After the pixel signal is output, the floating diffusion capacitor is reset by the reset transistor RST.

[0079] Figure 8 FIG. shows a third circuit schematic diagram of the pixel component provided in some embodiments of the present application. As Figure 8 shown, exemplarily, the number of photosensitive diodes can be multiple, and the multiple photosensitive diodes are respectively PPD1, PPD2, PPD3, and PPD4, enabling the image sensor 10 to achieve the Binning (synthesis) function. When the number of photosensitive diodes PPD is multiple, the number of transmission transistors M TX is the same as the number of photosensitive diodes PPD, and the multiple transmission transistors are respectively M TX1 , M TX2 , M TX3 , and M TX4 , and the transmission transistor M TX is arranged in one-to-one correspondence with the photosensitive diode.

[0080] Exemplarily, the number of photosensitive diodes PPD is 4, and the charges generated after the 4 photosensitive diodes PPD are exposed to light are respectively output by their respective transfer transistors M TX Output. By controlling the on / off states of the transfer transistors M TX the user can select to transfer the charges generated by different numbers of photosensitive diodes PPD to the floating diffusion capacitance in the fixed gain module 112 and the adjustable gain module 113 according to actual needs, further improving the light-sensing ability of the image sensor 10 in a low-light environment.

[0081] In the embodiment of the present application, by arranging a photosensitive unit, a transfer unit 115, a reset unit 116, and a reading unit 117 in the pixel component 110, the pixel signals are output outside the pixel component 110 by the fixed gain module 112 and the adjustable gain module 113 with different gains, further ensuring the image effect output by the image sensor 10.

[0082] As Figures 3 to 6 shown, the following gives an example of the specific circuit structure. Exemplarily, the photosensitive unit 114 can be selected as a photosensitive diode PPD, the transfer unit 115 can be selected as a transfer transistor M TX , the reset unit 116 can be selected as a reset transistor RST, and the reading unit 117 includes a source follower SF (SF, Source Follower) and an output transistor M SEL . The first end of the first capacitive unit C FD is connected to the second end of the transfer transistor M TX , and the second end of the first capacitive unit C FD is grounded; the first end of the second capacitive unit C CG is connected to the first end of the reset transistor RST, the second end of the second capacitive unit C CG is grounded, and the second end of the reset transistor RST is connected to the power supply V DD ; the first end of the first switch M CG1 is connected to the first end of the reset transistor RST, and the second end of the first switch M CG1 is connected to the second end of the first capacitive unit C FD ; the fourth switch M CG2 and the fifth switch M CG3 are connected between the first end of the first switch M CG1 and the first switch group 121. The first switch group 121 is used to connect the fourth switch M CG2 in adjacent two rows of pixel components 110, and to connect the fifth switch M CG3 in adjacent two rows of pixel components 110. The fixed gain module 112 includes a first capacitive unit C FD and a second capacitive unit C FD and the second capacitive unit CCG , the adjustable gain module 113 multiplexes the first capacitive unit C in the fixed gain module 112 FD and the second capacitive unit C CG . Among them, the first capacitive unit C FD is a floating diffusion capacitor, and the second capacitive unit C CG is an extended capacitor corresponding to the floating diffusion capacitor, that is, the second capacitive unit C CG can be used to expand the first capacitive unit C FD . A first switching element M FD is provided between the first capacitive unit C CG and the second capacitive unit C CG1 . The first switching element M CG1 is used to control the on-off state between the first capacitive unit C FD and the second capacitive unit C CG . The control end of the first switching element M CG1 is connected to the row driving module 130, that is, the row driving module 130 can control whether the second capacitive unit C CG expands the first capacitive unit C FD . The adjustable gain module 113 includes a fourth switching element M CG2 and a fifth switching element M CG3 . The fourth switching element M CG2 is connected between the first switching element M CG1 and the fourth switching element M CG2 in the pixel component 110 of the adjacent row through the first switch group 121. The fifth switching element M CG3 is connected between the first switching element M CG1 and the fifth switching element M CG3 in the pixel component 110 of the adjacent row through the first switch group 121. By controlling the on-off state of the first switch group 121 through the gain programming module 140, the number of the fourth switching elements M CG2 that are interconnected and the number of the fifth switching elements M CG3 that are interconnected in at least two rows of pixel components 110 can be determined. Since the fourth switching element M CG2 and the fifth switching element M CG3 are both connected to the first switching element M CG1 . The first switch group 121 includes a second switching element M LCG and a third switching element M SLCG . The second switching element M LCG is used to connect the fourth switching elements M CG2 in two adjacent rows of pixel components 110. The third switching element M SLCG is used to connect the fifth switching elements M CG3 in two adjacent rows of pixel components 110.

[0083] The fourth switching element M CG2 and the fifth switching element M CG3 are connected in the pixel assembly 110 in the following two ways:

[0084] One of them is the parallel connection method. As Figure 4 shown, the first end of the fourth switching element M CG2 is connected to the first end of the first switching element M CG1 , and the second end of the fourth switching element M CG2 is connected to the second switching element M LCG ; the first end of the fifth switching element M CG3 is connected to the first end of the first switching element M CG1 , and the second end of the fifth switching element M CG3 is connected to the third switching element M SLCG . The fourth switching element M CG2 and the fifth switching element M CG3 are arranged in parallel between the first switching element M CG1 and the first switch group 121.

[0085] The other one is the series connection method. As Figure 6 shown, the first end of the fourth switching element M CG2 is connected to the first end of the first switching element M CG1 , and the second end of the fourth switching element M CG2 is connected to the second switching element M LCG ; the first end of the fifth switching element M CG3 is connected to the second end of the fourth switching element M CG2 , and the second end of the fifth switching element M CG3 is connected to the third switching element M SLCG . The fourth switching element M CG2 and the fifth switching element M CG3 are arranged in series between the first switching element M CG1 and the first switch group 121. The series connection method helps to simplify the routing layout in the pixel assembly 110.

[0086] The control process of outputting the pixel signal through the fixed gain module 112 is as follows: When controlling the first switching element M CG1 to be in the off state, the charge in the transfer transistor M TX is transferred to the first capacitive unit C FD , so that the pixel assembly 110 is set in the HCG (high gain) mode. At this time, the pixel assembly 110 outputs the pixel signal according to the first fixed gain value. When controlling the first switching element M CG to be in the on state, the first capacitive unit C FD and the second capacitive unit CCG Connected, the pixel component 110 is set in the MCG (medium gain) mode. At this time, the pixel component 110 outputs a pixel signal according to the second fixed gain value.

[0087] The control process of outputting the pixel signal through the adjustable gain module 113 is as follows: The gain programming module 140 can set the first adjustable gain value and the second adjustable gain value of the adjustable gain module 113 through the conduction quantity of the second switch M LCG and the third switch M SLCG . After setting the first adjustable gain value and the second adjustable gain value, control the on-off states of the fourth switch M CG2 and the fifth switch M CG3 . The on-off state of the fourth switch M CG2 is used to control whether to expand the first capacitive unit C CG2 and the second capacitive unit C CG in the pixel component 110 of the current row through the second capacitive unit C FD in the pixel components 110 of the adjacent rows connected by the fourth switch M CG . The on-off state of the fifth switch M CG3 is used to control whether to expand the first capacitive unit C CG3 and the second capacitive unit C CG in the pixel component 110 of the current row through the second capacitive unit C FD in the pixel components 110 of the adjacent rows connected by the fifth switch M CG . The control terminals of the fourth switch M CG2 and the fifth switch M CG3 are connected to the row driving module 130, that is, the row driving module 130 can control whether to expand the first capacitive unit C CG2 and / or the second capacitive unit C CG3 in the pixel component 110 of the current row through the second capacitive unit C CG in the pixel components 110 of the adjacent rows connected by the fourth switch M FD and the fifth switch M CG . Among them, when controlling that the first switch M CG1 and the fourth switch M CG2 are both in the conducting state, the first capacitive unit C FD and the second capacitive unit C CG in the pixel component 110 of the current row are connected, and are connected to the second capacitive unit C CG2 of the pixel components 110 of other rows connected by the fourth switch M CG , so that the pixel component 110 is set in the LCG (low gain) mode. When controlling the first switch M CG1 , the fourth switch MCG2 and the fifth switch element M CG3 are all in the on state, and the first capacitive unit C in the pixel element 110 of this row FD With the second capacitive unit C CG Connected and connected to the fourth switch M CG2 The second capacitive unit C of the pixel components 110 of the other pixel rows connected CG , and connected to the fifth switch element M CG3 The second capacitive units C of the pixel components 110 of other rows connected CG , so that the pixel component 110 is set in SLCG (super low gain) mode.

[0088] The row driving module 130 and the first switch element M CG1 The control end of the fourth switch element M CG2 The control end of the fifth switch M CG3 The control terminal of the transmission transistor M TX The row driving module 130 is connected to the control end of the pixel array 100, the control end of the reading unit 117, and the control end of the reset transistor RST. The row driving module 130 can control the pixel array 100, that is, the row driving module 130 can control the pixel component 110 to perform a reset operation, an exposure operation, and a reading operation. Specifically, the row driving module 130 controls the pixel component 110 to perform a reset operation by controlling the reset transistor RST action, and the row driving module 130 controls the transmission transistor M TX To perform an exposure operation, the row driving module 130 controls the first switch element M CG1 , the fourth switch element M CG2 , the fifth switch element M CG3 And the reading unit 117 performs a reading operation.

[0089] like Figure 1 , Figure 3 and Figure 5 As shown, in some embodiments of the present application, the image sensor 10 further includes: a column scanning component 150, the input end of the column scanning component 150 is connected to the reading unit 117 in each column of the pixel component 110; an image signal processor 160, the input end of the image signal processor 160 is connected to the output end of the column scanning component 150, and the image signal processor 160 is used to output image data.

[0090] In the embodiments of the present application, the image sensor 10 further includes a column scanning component 150 and an image signal processor 160. The column scanning component 150 includes a column scanner and a column parallel analog-to-digital converter. The column scanning component 150 is connected between the pixel array 100 and the image signal processor 160. The pixel signals output by the pixel array 100 are transmitted to the image signal processor 160 through the column scanning component 150. The image signal processor 160 can process the received pixel signals, and the pixel signals are processed by the image signal processor 160 to generate a captured image.

[0091] Figure 9 The working timing diagram of the image sensor within one frame time provided in some embodiments of the present application is shown, as Figure 1 、 Figure 3 and Figure 5 shown. In some embodiments of the present application, the pixel array 100 includes multiple rows of pixel components 110. The row driving module 130 is connected to the transmission unit 115, the reset unit 116, and the reading unit 117 in each pixel component 110;

[0092] Among them, the row driving module 130 sequentially performs a reset operation, an exposure operation, a gain setting operation, and a reading operation on the multiple rows of pixel components 110 row by row; when the reset operation on the previous row of pixel components 110 is completed and the exposure operation starts, the reset operation is performed on the current row of pixel components 110; when the exposure operation on the current row of pixel components 110 is completed, the gain setting operation and the reading operation are performed on the current row of pixel components 110. The gain setting operation is performed by the capacitive component 111 and the gain programming module 140.

[0093] In the embodiments of the present application, the row driving module 130 is connected to the pixel array 100. The row driving module 130 is used to drive at least two rows of pixel components 110 to output pixel signals row by row. Specifically, the image sensor 10 architecture adopts an M×N pixel array 100, and the gain programming module 140 and the row driving module 130 are arranged around the pixel array 100. The gain programming module 140 sets the adjustable gain modules 113 within one column of pixels in a parallel (Row Parallel) manner to perform gain programming on the pixel components 110. The control signals for the reset operation, the exposure operation, the gain setting operation, and the reading operation of the pixel components 110 are all provided by the row driving module 130, and the pixel components 110 are controlled to perform actions row by row in a parallel manner. Among them, the reset operation is performed by the reset unit 116 in the pixel component 110, the exposure operation is driven by the transmission unit 115 to drive the photosensitive unit 114 to perform, the reading operation is performed by the reading unit 117, and the gain setting operation is performed by the capacitive component 111 and the gain programming module 140.

[0094] It can be understood that during the process of driving the pixel components 110 row by row by the row driving module 130, at least two rows of pixel components 110 can be driven simultaneously to output pixel signals. The pixel components 110 that output pixel signals simultaneously are arranged at intervals, so that the adjustable gain modules 113 in the pixel components 110 that output pixel signals can reuse the capacitors in the pixel components 110 of adjacent rows.

[0095] In the embodiment of the present application, when reading the pixel signals of the pixel components 110, the pixel components 110 need to perform exposure and output corresponding pixel signals in sequence according to all gain values, that is, the number of pixel signals output by each row of pixel components 110 is related to the number of gain values. Each row of pixel components 110 needs to generate pixel signals according to the fixed gain value of the fixed gain module 112 and the adjustable gain value of the adjustable gain module 113, and the adjustable gain value of the adjustable gain module 113 needs to reuse the capacitors in the pixel components 110 of adjacent rows. Therefore, by driving the pixel components 110 row by row by the row driving module 130 to read pixel signals, it can be ensured that when reading the pixel signals of the current row of pixel components 110, the adjacent row of pixel components 110 whose capacitors are reused does not need to output pixel signals, ensuring the stability of the gain value of the adjustable gain module 113, thereby improving the signal quality of the pixel signals output by the pixel components 110.

[0096] In the embodiment of the present application, at least two pixel components 110 are provided in the pixel array 100, and each pixel component 110 includes a fixed gain module 112 and an adjustable gain module 113. Among them, the adjustable gain module 113 can set the gain value according to the actual needs of the user, making the gain parameter in the pixel component 110 adjustable, so that the native ISO parameter of the image sensor 10 is adjustable, solving the problem that the native ISO parameter of the image sensor 10 is fixed due to the fixed gain parameter in the pixel, and the obvious image noise and low image quality caused by amplifying the output pixel signals using analog gain and digital gain.

[0097] Exemplarily, as Figure 9 shown, within one frame time, each row of pixel components 110 performs a reset operation, an exposure operation, a gain setting operation, and a read operation row by row, and there is a time difference between adjacent rows of pixels. During the read period, the row driving module 130 outputs Φ LCG signal to pull up and close the read transistor in the read unit 117, so that the pixel signal Φ PIX output by the pixel component 110 is sent to the column scanning component 150. Each row of pixel components 110 first performs CDS (Correlated Double Sampling) to sample the pixel-internal noise. Specifically, during the CDS period, the transfer transistor M TX in the pixel component 110 remains disconnected, and the reset transistor RST is in the conducting state, so that the power supply V DDClear the first capacitive unit C in the pixel element 110 FD and the second capacitive unit C CG The read transistor in the read unit 117 is controlled to be turned on, so that the ADC (Analog-to-Digital Convertor) module in the column scanning component 150 samples and stores the initial signal of clearing the pixel. The initial value of the initial signal includes the noise value. The ADC module is a column parallel analog-to-digital converter. Then, the pixel component 110 is set to the HCG mode and the HCG reading is performed. After the HCG reading, MCG, LCG and SLCG are obtained. Among them, the Φ output by the row driving module 130 is CG1 For driving the first switch element M CG1 The row driver module 130 outputs Φ CG2 For driving the first switch element M CG1 The row driver module 130 outputs Φ CG3 For driving the first switch element M CG1 The row driver module 130 outputs Φ CG2 Used to drive the reset transistor RST to turn on. When setting LCG and SLCG, the gain programming module 140 needs to avoid the pixel component 110 being read. For example: when the first row of pixels is being read, the pixel LCG and SLCG programmer will choose to control the first switch group 121 between the first row and the second row, and the first switch group 121 between the second row and the third row, so that the LCG and SLCG of the first row of pixel components 110 can be set. After the SLCG reading is completed, this row of pixels enters the processing time or idle time of the image processor, that is, the ISP (Image Signal Processor, image processing chip) processing time or idle time, and repeats the above steps until each pixel row completes the reading of the pixel signal and waits for the start of the next frame. Among them, after the CDS period is completed, in each gain value reading stage, for example: HCG stage, the transfer transistor M TX and the reset transistor RST are turned on, and the charge is introduced from the photodiode PPD to the first capacitive unit C in the pixel element 110. FD The ADC module in the column scanning component 150 samples and reads out the signal value of the pixel signal again, and the signal value also includes the noise value. Then, the ADC module subtracts the initial value from the signal value to obtain a signal value without noise for output.

[0098] Figure 3 and Figure 5 Φ SEL For controlling the output transistor M SEL Action, Φ TX Used to control the transfer transistor action, Φ LCG and Φ SLCGFor controlling the operation of the adjustable gain module.

[0099] In some embodiments of the present application, during the process of performing the gain setting operation on the pixel component 110, the capacitive component 111 is configured as the fixed gain module 112, or the capacitive component 111 is configured as the adjustable gain module 113 by the gain programming module 140.

[0100] In the embodiments of the present application, the capacitive component 111 includes a second switch group 1112. By controlling the on / off state of the second switch group 1112, the capacitive component 111 can be configured as the fixed gain module 112 or the adjustable gain module 113. That is, when the pixel component 110 outputs the pixel signal, the capacitive component 111 is in the state of being configured as the fixed gain module 112 or in the state of being configured as the adjustable gain module 113, so that the pixel component 110 outputs the pixel signal only through a corresponding gain value in the same time period.

[0101] Specifically, when the second switch group 1112 is in the on state, the capacitive component 111 is configured as the adjustable gain module 113; when the second switch group 1112 is in the off state, the capacitive component 111 is configured as the fixed gain module 112.

[0102] In some embodiments of the present application, an electronic device is provided. Figure 10 The structural schematic diagram of the electronic device provided in some embodiments of the present application is shown. As Figure 10 shown, the electronic device 200 includes: a main body 202 and the image sensor 100 in any of the above embodiments, and thus has all the beneficial technical effects of the image sensor 100 in any of the above embodiments, which will not be elaborated here.

[0103] In the embodiments of the present application, the electronic device can be a portable electronic device such as a mobile phone or a tablet computer.

[0104] In some embodiments of the present application, an image acquisition method is provided, which is applied to the electronic device in any of the above embodiments. Figure 11 The flowchart of the image acquisition method provided in some embodiments of the present application is shown. As Figure 11 shown, the image acquisition method is applied to an image sensor. The image sensor includes: a pixel array, a first switch group, a row driving module, and a gain programming module. The pixel array includes at least two rows of pixel components, and each pixel component includes: a fixed gain module and an adjustable gain module. The image acquisition method includes:

[0105] Step 1102, when the reset operation of the previous row of pixel components is completed and the exposure operation starts, perform the reset operation on the current row of pixel components.

[0106] In an embodiment of the present application, a row driving module is connected to a pixel array. The row driving module is configured to drive at least two rows of pixel components to output pixel signals row by row. When the previous row of pixel components finishes the reset operation and starts the exposure operation, the current row of pixel components starts the reset operation.

[0107] It can be understood that during the process of driving the rows by the row driving module, at least two rows of pixel components can be driven to output pixel signals simultaneously. The pixel components outputting pixel signals simultaneously are spaced apart so that the adjustable gain modules in the pixel components outputting pixel signals can reuse the capacitors in the pixel components of adjacent rows.

[0108] Step 1104: When the current row of pixel components finishes the exposure operation, perform a gain setting operation on the current row of pixel components to set a target gain value in a set of gain values. The set of gain values includes all the gain values corresponding to the fixed gain module and the adjustable gain module.

[0109] In an embodiment of the present application, when the current row of pixel components finishes the exposure operation and before starting the read operation, it is necessary to set the gain value of the current pixel row, that is, start to perform the gain setting operation. The current row of pixel components corresponds to a set of gain values, which includes fixed gain values and adjustable gain values. Among them, the fixed gain value is the gain value matching the capacitance value of the capacitive component in the pixel component, that is, the fixed gain value is fixed. The adjustable gain value is the gain value obtained by the gain programming module by setting the first switch groups in a column that are in the on state, and the adjustable gain value is not fixed. The capacitive component includes a first switch for configuring the fixed gain module and a second switch group for configuring the adjustable gain module. By controlling the on / off states of the first switch and the second switch group, a target gain value can be selected from the set of gain values.

[0110] Exemplarily, the capacitive component includes a first capacitive unit and a second capacitive unit. The second switch group includes a fourth switch element and a fifth switch element. The fourth switch element is connected to a column of second switch elements in a column of first switch groups, and the fifth switch element is connected to a column of third switch elements in a column of first switch groups. The gain value set includes a first fixed gain value, a second fixed gain value, a first adjustable gain value, and a second adjustable gain value. By controlling the first switch element to be in the off state and the second switch group to be in the off state, the target gain value is set to the first fixed gain value. By controlling the first switch element to be in the on state and the second switch group to be in the off state, the target gain value is set to the second fixed gain value. By controlling the first switch element to be in the on state, the fourth switch element to be in the on state, and the fifth switch element to be in the off state, the target gain value is configured as the first adjustable gain value, and the first adjustable gain value is related to the number of on states in a column of second switch elements connected to the fourth switch element. By controlling the first switch element to be in the on state, the fourth switch element to be in the off state, and the fifth switch element to be in the on state, the target gain value is configured as the second adjustable gain value, and the second adjustable gain value is related to the number of on states in a column of third switch elements connected to the fifth switch element.

[0111] Step 1106, perform a reading operation on the current row pixel component according to the target gain value, and return to perform a gain setting operation on the current row pixel component through the gain programming module until the reading operation is completed according to each gain value in the gain value set.

[0112] In the embodiment of the present application, when reading the pixel signal of the pixel component, the pixel component needs to be exposed in sequence according to all gain values and output the corresponding pixel signals, that is, the number of pixel signals output by each row of pixel components is related to the number of gain values. Each row of pixel components needs to generate pixel signals according to the fixed gain value of the fixed gain module and the gain value of the adjustable gain module, and the adjustable gain value of the adjustable gain module needs to reuse the capacitors in the pixel components of adjacent rows. Therefore, by the row driving module reading the pixel signals of the pixel components row by row, it can be ensured that when reading the pixel signals of the current row pixel components, the adjacent row pixel components that are reused do not need to output pixel signals, ensuring the stability of the gain value of the adjustable gain module, thereby improving the signal quality of the pixel signals output by the pixel components.

[0113] In the embodiments of the present application, at least two pixel components are provided in a pixel array, and each pixel component includes a fixed gain module and an adjustable gain module. Among them, the adjustable gain module can set the gain value according to the actual needs of the user, making the gain parameter in the pixel component adjustable, so that the native ISO parameter of the image sensor is adjustable, solving the problem that the native ISO parameter of the image sensor is fixed due to the fixed gain parameter in the pixel, and the obvious image noise and low image quality caused by amplifying the output pixel signal using analog gain and digital gain.

[0114] It should be noted that in this text, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, device, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, device, article or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, device, article or device including that element.

[0115] In addition, it should be pointed out that the devices and the scope of the devices in the embodiments of the present application are not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in a reverse order according to the functions involved. For example, the described devices may be performed in an order different from that described, and various steps may be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0116] Through the description of the above embodiments, those skilled in the art can clearly understand that the above-described embodiment devices can be implemented by means of software plus a necessary general hardware platform. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, can be embodied in the form of a computer software product. The computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes several instructions for causing a terminal (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the devices of the various embodiments of the present application.

[0117] The embodiments of the present application have been described above in conjunction with the accompanying drawings. However, the present application is not limited to the above specific embodiments. The above specific embodiments are merely illustrative and not restrictive. Under the inspiration of the present application, those of ordinary skill in the art can also make many forms without departing from the purpose of the present application and the scope protected by the claims, and all of them belong to the protection scope of the present application.

Claims

1. An image sensor, characterized in that: include: A pixel array, the pixel array comprising a plurality of columns of pixel components, each column of the pixel components comprising a plurality of pixel components, each of the pixel components comprising: a capacitive component, each of the capacitive components being configured as a fixed gain module or an adjustable gain module of the pixel component, the gain value of the fixed gain module being fixed, and the gain value of the adjustable gain module being not fixed; A switch array, the switch array comprising a plurality of columns of first switch groups, the plurality of columns of first switch groups being arranged in one-to-one correspondence with the plurality of columns of pixel components, and a first switch group being correspondingly arranged between the capacitive components of any two adjacent pixel components in each column of the pixel components; A gain programming module connected to each of the switch arrays, the gain programming module being used to control the number of the first switch groups in each column that are in a conducting state, so as to adjust the gain value of the adjustable gain module in the pixel component corresponding to the first switch group in each column; A row driving module is connected to the pixel array, and is used to control the pixel array to output pixel signals in sequence through the fixed gain value of the fixed gain module and the adjustable gain value of the adjustable gain module.

2. The image sensor according to claim 1, characterized in that The number of the fixed gain modules in each of the pixel components is at least one, the number of the adjustable gain modules in each of the pixel components is at least two, and the sum of the number of the fixed gain modules and the number of the adjustable gain modules in each of the pixel components is at least four.

3. The image sensor according to claim 1, characterized in that The fixed gain module includes a first fixed module and a second fixed module, and the gain values ​​of the first fixed module and the second fixed module are different; The capacitive component includes: a first capacitive unit, a second capacitive unit and a first switch, wherein the first switch is used to control the on / off state of the first capacitive unit and the second capacitive unit; Wherein, when the first switch is in an off state, the capacitive component is configured as the first fixing module; when the first switch is in an on state, the capacitive component is configured as the second fixing module.

4. The image sensor according to claim 3, characterized in that: The capacitive component also includes: a second switch group, the second switch group being used to control the on-off state between the first capacitive unit and the corresponding first switch group; Wherein, when the second switch group is in an on state and the corresponding first switch group is in an on state, the capacitive component is configured as the adjustable gain module.

5. The image sensor according to claim 4, characterized in that: The adjustable gain module includes a first adjustable module and a second adjustable module, and the gain values ​​of the first adjustable module and the second adjustable module are different; The first switch group includes a second switch element and a third switch element, the second switch group includes a fourth switch element and a fifth switch element, the fourth switch element is used to control the on-off state of the first capacitive unit and the second switch element, and the fifth switch element is used to control the on-off state of the first capacitive unit and the third switch element; In the case where the fourth switch element is in a conducting state and a first number of second switch elements in a column of the first switch group are in a conducting state, the capacitive component is configured as the first adjustable module; In the case where the fifth switch element is in a conducting state and a second number of third switch elements in a column of the first switch group are in a conducting state, the capacitive component is configured as a second adjustable module; The first number is different from the second number.

6. The image sensor according to any one of claims 1 to 5, characterized in that: The pixel component further includes: A photosensitive unit, wherein a first end of the photosensitive unit is grounded; A transmission unit, wherein a first end of the transmission unit is connected to a second end of the photosensitive unit, and a second end of the transmission unit is connected to the fixed gain module and the adjustable gain module, and the transmission unit and the photosensitive unit are used to perform an exposure operation; A reset unit connected between the transmission unit and the power supply, the reset unit being used to perform a reset operation; A reading unit, the reading unit is connected to the fixed gain module and the adjustable gain module, and the reading unit is used to perform a reading operation.

7. The image sensor according to claim 6, characterized in that: Also includes: A column scanning component, wherein an input end of the column scanning component is connected to a reading unit in each column of the pixel components; An image signal processor, wherein an input end of the image signal processor is connected to an output end of the column scanning component, and the image signal processor is used to output image data.

8. The image sensor according to claim 6, characterized in that: The pixel array includes a plurality of rows of pixel components, and the row driving module is connected to the transmission unit, the reset unit and the reading unit in each of the pixel components; Wherein, the row driving module sequentially performs the reset operation, the exposure operation, the gain setting operation and the reading operation on the multiple rows of pixel components row by row; when the reset operation is completed on the pixel components of the previous row and the exposure operation is started, the reset operation is performed on the pixel components of the current row; when the exposure operation is completed on the pixel components of the current row, the gain setting operation and the reading operation are performed on the pixel components of the current row, and the gain setting operation is performed by the capacitive component and the gain programming module.

9. The image sensor according to claim 8, characterized in that: In the process of performing the gain setting operation on the pixel component, the capacitive component is configured as the fixed gain module, or the capacitive component is configured as the adjustable gain module through the gain programming module.

10. An electronic device, characterized in that: include: ontology; The image sensor according to any one of claims 1 to 9, wherein the image sensor is disposed on the body.

11. An image acquisition method, characterized in that: Applied to the electronic device according to claim 10, the image acquisition method comprises: When the pixel components of the previous row have completed the reset operation and started to perform the exposure operation, the reset operation is performed on the pixel components of the current row; When the pixel components in the current row complete the exposure operation, a gain setting operation is performed on the pixel components in the current row to set a target gain value in a gain value set, wherein the gain value set includes all gain values ​​corresponding to a fixed gain module and an adjustable gain module; A read operation is performed on the pixel components in the current row according to the target gain value, and the gain setting operation is performed on the pixel components in the current row again, until the read operation is completed according to each gain value in the gain value set.

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