Hybrid imaging sensor with shared readout

Abstract

The invention relates to a hybrid imaging sensor with shared readout. The pixel circuit includes a pixel array and a color filter. The pixel array includes a plurality of pixels arranged in rows and columns, each pixel including four photodiodes, a floating diffusion region, and four transfer transistors. The color filter array includes a plurality of color filters each having one of a plurality of colors and disposed over at least one of the pixels. Each of the plurality of pixels is coupled to a first readout circuit, and the plurality of pixels includes (i) a first subset of the pixels not coupled to a second readout circuit and (ii) a second subset of the pixels coupled to the second readout circuit. The floating diffusion regions of two diagonally arranged pixels are coupled together, and the two diagonally arranged pixels coupled together are disposed below a color filter of the same color.

Description

[0001] Cross - Reference to Related Applications

[0002] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 608,150, filed on Dec. 8, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure generally relates to image sensors, and more particularly (but not exclusively) to hybrid image sensors with shared readout. Background Art

[0004] Image sensors have become ubiquitous and are now widely used in digital cameras, mobile phones, cameras, and medical, automotive, and other applications. As image sensors are integrated into a wider range of electronic devices, there is a desire to enhance their functionality, performance metrics, and the like in as many ways as possible (e.g., resolution, power consumption, dynamic range, etc.) through both device architecture design and image acquisition processing. Technologies for manufacturing image sensors have been evolving rapidly and continuously. For example, the requirements for higher resolution and lower power consumption have driven further miniaturization and integration of these devices.

[0005] A typical image sensor operates in response to image light from an external scene incident on the image sensor. The image sensor includes a pixel array having photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and generate image charge after absorbing the image light. The image charge generated by the pixels can be measured as an analog output image signal on a column bit line, which varies according to the incident image light. In other words, the amount of image charge generated is proportional to the intensity of the image light, and the image light is read out as an analog image signal from the column bit line and converted into a digital value to generate a digital image (e.g., image data) representing the external scene. The analog image signal on the bit line is coupled to a readout circuit, which includes an input stage with an analog-to-digital conversion (ADC) circuit to convert these analog image signals from the pixel array into digital image signals. Summary of the Invention

[0006] On the one hand, the present disclosure provides a pixel circuit, which includes: a pixel array including a plurality of pixels arranged in rows and columns, wherein each pixel includes: a plurality of photodiodes configured to generate image charges in response to incident light; a floating diffusion region coupled to receive the image charges from the plurality of photodiodes; and a plurality of transfer transistors coupled between corresponding ones of the photodiodes and the floating diffusion region to transfer the image charges from the respective photodiodes to the floating diffusion region; and a color filter array disposed above the pixel array, wherein the color filter array includes a plurality of color filters each having one of a plurality of colors and disposed above at least one of the pixels, wherein the plurality of pixels include a first subset of the pixels coupled to a first readout circuit but not coupled to a second readout circuit and a second subset of the pixels selectively coupled to the second readout circuit, the floating diffusion regions of two adjacent and diagonally arranged pixels are coupled together, and the two adjacent and diagonally arranged pixels coupled together are disposed below a color filter of the same color.

[0007] On the other hand, the present disclosure further provides an imaging system, which includes: a pixel circuit including: a pixel array having a plurality of pixels arranged in rows and columns, wherein each pixel includes: a plurality of photodiodes configured to generate image charges in response to incident light; a floating diffusion region coupled to receive the image charges from the plurality of photodiodes; and a plurality of transfer transistors coupled between corresponding ones of the photodiodes and the floating diffusion region to transfer the image charges from the respective photodiodes to the floating diffusion region; and a color filter array disposed above the pixel array, wherein the color filter array includes a plurality of color filters each having one of a plurality of colors and disposed above at least one of the pixels; a first readout circuit; a second readout circuit, wherein the plurality of pixels include a first subset of the pixels coupled to the first readout circuit but not coupled to the second readout circuit and a second subset of the pixels selectively coupled to the second readout circuit, wherein the second readout circuit is coupled to each of the pixels included in the second subset to read out a second set of data signals; and a mode selection switch circuit coupled to the pixels included in the second subset of the pixels, wherein the pixels included in the second subset of the pixels are configured to provide a first set of data signals to the first readout circuit or provide the second set of data signals to the second readout circuit in response to the mode selection circuit, wherein the floating diffusion regions of two adjacent and diagonally arranged pixels are coupled together, and wherein the two adjacent and diagonally arranged pixels coupled together are disposed below a color filter of the same color. Description of the Drawings

[0008] Non-limiting and non-exhaustive embodiments of the present disclosure are described with reference to the following figures, wherein like reference numerals refer to like components in the various views unless otherwise specified.

[0009] Figure 1 Illustrate an example of a stacked hybrid complementary metal oxide semiconductor (CMOS) image sensor (CIS) having event-based vision sensor functionality in accordance with the teachings of the present disclosure.

[0010] Figure 2 Illustrate an example of a pixel circuit having a four-RGBC filter array and cross-shared readout in accordance with the teachings of the present disclosure.

[0011] Figure 3 Illustrate an example of a pixel circuit having a four-Bayer filter array and cross-shared readout in accordance with the teachings of the present disclosure.

[0012] Figure 4 Illustrate an example of a pair of pixels coupled to a mode selection switch circuit in accordance with the teachings of the present disclosure.

[0013] Figure 5 Illustrate an example of a pixel array coupled to a mode selection switch circuit in accordance with the teachings of the present disclosure.

[0014] Figure 6 Illustrate an example of a pixel circuit having a four-RGBC filter array and diagonal-shared readout in accordance with the teachings of the present disclosure.

[0015] Figure 7 Illustrate an example of a pixel circuit having a zigzag four-Bayer filter array and diagonal-shared readout in accordance with the teachings of the present disclosure.

[0016] Figure 8 Illustrate another example of a pixel array coupled to a mode selection switch circuit in accordance with the teachings of the present disclosure.

[0017] Corresponding reference characters indicate corresponding components throughout the several views of the drawings. Those skilled in the art will appreciate that the elements in the figures are illustrated for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to assist in improving understanding of the various embodiments of the present disclosure. Additionally, common but well-known elements that are useful or necessary in a commercially viable embodiment are typically not depicted so as to not obscure these various embodiments of the technology. Detailed Description

[0018] The disclosure relates to examples of imaging systems having pixel circuits that provide simultaneous hybrid functionality with shared readout. In the following description, numerous specific details are set forth to provide a thorough understanding of the examples. However, those of ordinary skill in the relevant art will recognize that the techniques described herein may be practiced without one or more of the specific details or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations have not been shown or described in detail to avoid obscuring certain aspects.

[0019] Reference throughout this specification to "one example" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the example is included in at least one example of the present disclosure. Thus, the appearances of the phrases "in one example" or "in an embodiment" throughout this specification are not necessarily all referring to the same example. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more examples.

[0020] For ease of description, spatially relative terms (e.g., "below", "beneath", "above", "below", "over", "on", "top", "bottom", "left", "right", "center", "middle", and the like) may be used herein to describe the relationship of one element or feature to another (additional) element or feature, as illustrated in the figures. It should be understood that, in addition to the orientation depicted in the figures, spatially relative terms are also intended to cover different orientations of the device in use or operation. For example, if the device in the figures is rotated or flipped, an element described as "below" or "beneath" or "under" another element or feature will be oriented "above" the other element or feature. Thus, the exemplary terms "below" or "beneath" can cover both an above and a below orientation. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein are interpreted accordingly. Additionally, it should also be understood that when an element is referred to as being "between" two other elements, the element may be the only element between the two other elements, or there may also be one or more intervening elements.

[0021] It should be further understood that although the terms first, second, third, etc. may be used herein to describe various elements, these elements should not be limited by these terms and are not used to determine the sequence or formation order of the associated elements. Unless otherwise indicated, these terms are only used to distinguish one element from another. Thus, a first element discussed below may be referred to as a second element without departing from the teachings of the disclosed embodiments.

[0022] It should also be understood that a color filter is an optical filter having a specific color light response. The specific color light response may have a high transmission efficiency for certain parts of the electromagnetic spectrum while attenuating or blocking light in other parts of the spectrum. For example, a blue color filter has high selectivity for light portions having wavelengths ranging from 450 nm to 495 nm, a green color filter has high selectivity for light portions having wavelengths ranging from 500 to 570 nm, and a red color filter has high selectivity for light portions having wavelengths ranging from 620 to 750 nm.

[0023] Throughout this specification, several terms from the art are used. These terms have their ordinary meaning in the art, unless specifically defined herein or the context in which they are used otherwise clearly indicates. It should be noted that element names and symbols may be used interchangeably throughout this document (e.g., Si and silicon); however, both have the same meaning.

[0024] As will be discussed, various examples of imaging systems are disclosed that have pixel circuits providing simultaneous hybrid functionality (e.g., simultaneous image / video capture and event-driven sensing capabilities) with shared readout. Although normal image / video sensors provide good image and / or video capture capabilities, one limitation of normal image / video sensors is that normal image sensors do not provide ultra-high frame rate and ultra-high speed capture capabilities, which may be useful in various applications such as machine vision, gaming, and artificial intelligence sensing fields. Attempts to provide such ultra-high frame rate and ultra-high speed capabilities to typical image / video sensors have led to compromise solutions that provide poorer quality image capture compared to their normal image sensor counterparts.

[0025] It should be appreciated that circuit designs in accordance with the teachings of the present disclosure address at least some of the problems discussed above. For example, the image sensors disclosed herein may operate in a hybrid mode, where for various event-driven (or other) applications, the image sensor simultaneously uses a first subset of pixels to provide good image and video capture capabilities and uses a second subset of pixels to sense events (e.g., intensity changes) from the pixels at ultra-high frame rates and at ultra-high speeds. Additionally, pixels belonging to the same subset may be coupled together to efficiently provide low-noise shared or merged readout, which can improve sensitivity and enable faster frame rates.

[0026] Accordingly, as will be shown and described in the various examples below, an example pixel circuit includes a pixel array and a color filter array disposed over the pixel array. The pixel array includes a plurality of pixels arranged in rows and columns, and each pixel includes: (i) four photodiodes configured to photogenerate image charges in response to incident light; (ii) a floating diffusion region coupled to receive the image charges from the four photodiodes; and (iii) four transfer transistors coupled between corresponding ones of the photodiodes and the floating diffusion region to transfer the image charges from the respective photodiodes to the floating diffusion region. The color filter array includes a plurality of color filters each having one of a plurality of colors and disposed over at least one of the pixels. Each individual color filter is configured to be highly sensitive to light having wavelengths within a spectral portion of the corresponding color (e.g., red, blue, green) and to be less sensitive to light having wavelengths outside the spectral region of the corresponding color. Each of the plurality of pixels is coupled to a first readout circuit, and the plurality of pixels includes (i) a first subset of pixels not coupled to a second readout circuit and (ii) a second subset of pixels coupled to the second readout circuit. The floating diffusion regions of two diagonally arranged pixels are coupled together, and the two diagonally arranged pixels coupled together are disposed under a color filter of the same color.

[0027] For illustration, Figure 1 An example of a stacked hybrid complementary metal oxide semiconductor (CMOS) image sensor (CIS) having an event-based vision sensor (EVS) system 100 in accordance with the teachings of the present disclosure is illustrated. As shown in the depicted example, the stacked CIS having the EVS system 100 includes a first die 102, a second die 104, and a third die 106 stacked and coupled together in a stacked chip configuration. In various examples, the first die 102, the second die 104, and the third die 106 are semiconductor dies including a suitable semiconductor material (e.g., silicon). In the example, the first die 102 (also referred to as the top die 102 of the stacked CIS having the EVS system 100) includes a pixel array 108. The third die 106 (also referred to as the bottom die 106 of the stacked CIS having the system 100) includes an image readout circuit 116 (also referred to as an image readout mixed-signal circuitry). The image readout circuit 116 can be coupled to the pixel array 108 of the top die 102 through column-level connections 110 for normal image readout. In various examples, the column-level connections 110 for normal image readout are implemented with through-silicon vias (TSVs) extending between the top die 102 and the bottom die 106 and routed through the second die 104 from the column bit lines of the pixel array 108.

[0028] In various examples, the pixel array 108 is a two-dimensional (2D) array that includes a plurality of pixel units (also referred to as "pixels"), each pixel unit including a photodiode that is exposed to incident light. As illustrated in the depicted example, the pixels are arranged in rows and columns to obtain image data of a person, location, object, etc., which can then be used to reproduce an image and / or video of the person, location, object, etc. As further discussed herein, the pixels of the first resolution are CMOS image sensor (CIS) pixels, and the pixels of the second resolution are hybrid CIS / event-based vision sensor (EVS) pixels. In an example, each CIS pixel can be configured to photogenerate an image charge in response to incident light. After each CIS pixel has acquired its image charge, the corresponding analog image charge data is read out by an image readout circuit 116 in the bottom die 106 via column bitlines. In various examples, the image charge from each row of the pixel array 108 can be read out in parallel by the image readout circuit 116 via the column bitlines.

[0029] In various examples, the image readout circuit 116 in the bottom die 106 includes amplifiers, analog-to-digital converter (ADC) circuitry, associated analog support circuitry, associated digital support circuitry, etc. for normal image readout and processing. In some examples, the image readout circuit 116 may also include event-driven readout circuitry, as will be described in more detail below. In operation, the photogenerated analog image charge signal is read out from the pixel units of the pixel array 108, amplified, and converted to a digital value in the image readout circuit 116. In some examples, the image readout circuit 116 can read out one row of image data at a time. In other examples, the image readout circuit 116 can use various other techniques (not shown), such as serial readout or all pixels simultaneously full parallel readout, to read out the image data. The image data can be stored or even manipulated by applying image post-effects (e.g., cropping, rotation, red-eye removal, brightness adjustment, contrast adjustment, etc.).

[0030] In the depicted example, the second die 104 (which may also be referred to as the intermediate die 104 of the stacked CIS with the EVS system 100) includes an event-driven sensing array 112 that is coupled to the pixel array 108 in the top die 102. In various examples, the event-driven sensing array 112 is coupled to the pixels of the pixel array 108 via a plurality of pairs of hybrid bonds between the top die 102 and the intermediate die 104. In one example, the event-driven sensing array 112 includes an event-driven circuit array. As will be discussed, in one example, in accordance with the teachings of the present disclosure, each of the event-driven circuits in the event-driven sensing array 112 is coupled to a plurality of pixels of the pixel array 108 via a corresponding plurality of pairs of hybrid bonds between the top die 102 and the intermediate die 104 to asynchronously detect events that occur in the light incident on the pixel array 108.

[0031] In some embodiments, pixels of the second fraction (i.e., hybrid CIS / EVS pixels) may be selectively coupled to the event-driven readout circuitry of the event-driven sensor array 112. When operating as an EVS pixel, the photosensor of the hybrid CIS / EVS pixel can be used to track changes in the intensity of light incident on the photosensor from an external scene. Specifically, the photosensor can photogenerate image charge (electrons or holes) or photocurrent in response to incident light from the external scene. The photogenerated image can then be provided to the coupled event-driven circuitry of the event-driven sensor array 112 via an EVS connection (e.g., a hybrid bond). In some embodiments, the event-driven circuitry includes: (i) a photocurrent-to-voltage converter coupled to the photosensor to convert the photocurrent generated by the photosensor into a voltage; and (ii) a filter amplifier coupled to the photocurrent-to-voltage converter to generate a filtered and amplified signal in response to the voltage received from the photocurrent-to-voltage converter. The event-driven circuitry may further include a threshold comparison circuit to determine and generate an event detection signal in response to an event detected asynchronously in the incident light received from the external scene. For example, the threshold comparison circuit can generate an event detection signal when the change in the pixel signal at the output of the filter amplifier relative to a reference pixel signal is greater than a predetermined voltage threshold. It should be understood that the described event-driven readout circuitry is one example implementation for reading out event signals. Various implementations of readout circuitry systems and readout schemes for event vision sensor pixels are well known. Therefore, details regarding the circuitry and readout techniques for the event-driven circuitry are substantially omitted herein for the sake of brevity and to clarify aspects of the present technology.

[0032] In various examples, a corresponding event detection signal is generated by the event-driven circuitry in the event-driven sensor array 112. The event detection signal can be coupled to be received and processed by the event-driven peripheral circuitry 114, which in one example is disposed around the periphery of the event-driven sensor array 112 in the intermediate die 104, as Figure 1 shown. The depicted example also illustrates the column-level connections 110 for normal image readout passing through the intermediate die 104 between the top die 102 and the bottom die 106.

[0033] Figure 2 Illustrating one example of a pixel circuit 207 according to the teachings of the present disclosure, the pixel circuit 207 includes a pixel array 208 and a four-color filter array, such as a four-RGBC filter array 209 that includes a red filter, a green filter, a blue filter, and a clear filter and provides cross-shared readout. It should be understood that Figure 2 the pixel array 208 can be included in Figure 1An example of a pixel array 108 in a stacked CIS with an EVS system 100, as shown, and similarly named and numbered elements above are similarly coupled and operative hereinafter.

[0034] In the illustrated example, the pixel array 208 includes a plurality of pixel units or pixels 219 arranged in Y rows and X columns. Each pixel 219 may include four sub-pixels 218 each including a photodiode. Thus, each of the Y rows of pixels 219 includes two rows of sub-pixels 218, and each of the X columns of pixels 219 includes two columns of sub-pixels 218. The four photodiodes in the four sub-pixels 218 are coupled together to share a floating diffusion region 220 (denoted as "X" across four adjacent sub-pixels 218), such that each pixel 219 includes one floating diffusion region 220. An example circuit system of the pixel 219 is described in more detail hereinafter with reference to Figure 4 More detailed description.

[0035] The four RGBC filter array 209 includes: a plurality of red filters, blue filters, green filters (or RGB color filters) 230, which are disposed over the pixels 219 in (i) odd rows and odd columns and (ii) even rows and even columns; and a plurality of non-RGB or transparent filters 232 (or no filters or clear filters), which are disposed over the pixels 219 in (i) odd rows and even columns and (ii) even rows and odd columns. In addition, RGB color filters 230 of the same color are disposed over several pairs of diagonally arranged pixels 219. For example, the pixels 219 in (i) row 1, column 1 and (ii) row 2, column 2 are disposed under a blue filter 230 (labeled "B"), the pixels 219 in (i) row 1, column 3, (ii) row 2, column 4, (iii) row 3, column 1 and (iv) row 4, column 2 are disposed under a green filter 230 (labeled "G"), the pixels 219 in (i) row 3, column 3 and (ii) row 4, column 4 are disposed under a red filter 230 (labeled "R"), and the remaining pixels 219 in the illustrated 4x4 pixel grouping are disposed under non-RGB or transparent filters 232 (or no filters) in a checkerboard pattern.

[0036] The pixel circuit 207 may also include a plurality of microlenses 240 (illustrated as circles) disposed over the pixel array 208. Specifically, the microlenses 240 are 2x2 microlenses such that each microlens 240 is disposed over a 2x2 grouping of sub-pixels 218 in two adjacent rows and columns or over each pixel 219. The microlenses 240 may help focus incident light onto the corresponding photodiodes included in the pixels 219, thereby improving the sensitivity of the pixel circuit 207 and the overall image quality. The microlenses 240 may also minimize crosstalk between adjacent pixels 219, thereby enhancing the ability of the pixel circuit 207 to accurately capture fine details and colors.

[0037] Each of the pixels 219 may be coupled to a first readout circuit, such as Figure 1 the image readout circuit 116 shown in Figure 2 is not patterned) or a second subset 219b ( Figure 2 is patterned) in. The second subset 219b is a subset of the pixels 219 that contains some but not all of the pixels 219. In various instances, only the pixels 219 included in the second subset 219b are further selectively coupled to a second readout circuit, such as an event-driven circuit included in the Figure 1 event-driven sensing array 112 shown in Figure 1 The pixels of the first subset 219a are thus coupled to the first readout circuit but not to the second readout circuit. In various instances, the pixels 219 included in the second subset 219b are configured to be coupled to the second readout circuit in a particular pixel operating mode (e.g., hybrid mode), such as an event-driven circuit included in the

[0038] In Figure 2 the pixels included in the second subset 219b are arranged in a checkerboard pattern such that the second subset 219b contains (i) pixels 219 in odd rows and even columns and (ii) pixels 219 in even rows and odd columns. Additionally, in the illustrated embodiment, the pixels included in the second subset 219b are disposed beneath a non-RGB or clear filter 232 (or no filter or a colorless filter). Thus, according to the teachings of the present disclosure, 50% of the pixels 219 in the pixel array 208 are included in the second subset 219b. Those of ordinary skill in the art will appreciate that in other instances, the positions of the pixels included in the second subset 219b and the pixels included in the first subset 219a may be reversed (e.g., the second subset 219b contains (i) pixels 219 in odd rows and odd columns and (ii) pixels 219 in even rows and even columns).

[0039] Additionally, several pairs of pixels 219 are coupled together in a cross pattern. More specifically, the two floating diffusion regions 220 of the diagonally arranged pixels 219 in each 2x2 pixel grouping are coupled together, as shown by the diagonal solid or diagonal dashed lines each extending across two pixels 219 (e.g., one or more metal connections in a metal layer), such that the two pixels 219 in each pair effectively share a floating diffusion region. In other words, in each 2x2 pixel grouping, (i) the floating diffusion region of the first pixel in row N and column N is coupled to the floating diffusion region of the second pixel in row N+1 and column N+1, and (ii) the floating diffusion region of the third pixel in row N and column N+1 is coupled to the floating diffusion region of the fourth pixel in row N+1 and column N.

[0040] Obviously, due to the four RGBC filter arrays 209, two pixels that are coupled together to form each pair are disposed under a color filter 230 of the same color (e.g., blue, green, red) or a non-RGB or transparent filter 232 (or no filter or a colorless filter). In other words, in each 2x2 pixel grouping, (i) the RGB color filters 230 of the same color are disposed over a first pair of pixels that are diagonally arranged and included in the first subset 219a, wherein the floating diffusion regions 220 of the pixels of the first pair are coupled together, and (ii) the transparent filter 232 is disposed over a second pair of pixels that are diagonally arranged and included in the second subset 219b, wherein the floating diffusion regions 220 of the pixels of the second pair are coupled together. It should be understood that color filters of the same color refer to filters that are configured to have substantially the same spectral or color light response. As further discussed herein, the coupled pairs of pixels 219 in the illustrated cross pattern can efficiently provide a low-noise shared or combined readout.

[0041] In various examples, the pixel circuit 207 can operate in a first mode and a second mode. In the first mode, all pixels 219 are configured to be coupled to corresponding first readout circuits to provide CIS information corresponding to an external scene, such that the pixel circuit 207 provides an image without loss of image quality as compared to a conventional only-CIS pixel circuit. Additionally, because each pair of pixels 219 has a shared floating diffusion region and is disposed under a color filter of the same color or a non-RGB or transparent filter (or no filter or a colorless filter), the color channels are efficiently combined to provide a low-noise shared CIS information readout. In the second mode, the pixels in the first subset 219a are configured to be coupled to corresponding first readout circuits to continue to provide combined CIS information, and the pixels in the second subset 219b are configured to be coupled to corresponding second readout circuits to provide an event detection signal corresponding to the captured external scene (e.g., providing a photocurrent for event detection functionality) and / or other non-CIS information (e.g., intensity change or path information of a moving object). Disposing the second subset 219b under a non-RGB or transparent filter 232 (or no filter or a colorless filter) can help increase the generated photocurrent and / or reduce the latency associated with the pixels included in the second subset 219b. Thus, the second mode is a hybrid mode in which the pixel circuit 207 simultaneously provides combined CIS information and non-CIS (e.g., event detection) information.

[0042] It should be understood that in accordance with the teachings of the present disclosure, in Figure 2In the example NxN (e.g., 4x4) pixel circuit 207 shown, when the pixels of the second subset 219b are configured to operate in the second mode and provide an event detection signal, there are also one or more pixels of the first subset 219a configured to provide CIS information under the color filter. Thus, it should be understood that, in accordance with the teachings of the present disclosure, for example, at least in the second mode (or hybrid mode), all sampling sites of any particular color in the example 4x4 pixel circuit 207 are not sacrificed for EVS functionality at any time. In other words, in accordance with the teachings of the present disclosure, for each pixel of the second subset 219b that provides an event detection signal, there is a corresponding pixel of the first subset 219a disposed under the color filter in the example 4x4 pixel circuit 207.

[0043] Figure 3 An example of a pixel circuit 307 that includes a pixel array 308 and a four - Bayer filter array 309 and provides cross - shared readout in accordance with the teachings of the present disclosure is illustrated. It should be understood that Figure 3 the pixel array 308 can be an example of the pixel array 108 in the stacked CIS with the EVS system 100 shown in Figure 1 and the similarly named and numbered elements are coupled and function similarly hereinafter.

[0044] In the illustrated example, the pixel array 308 includes a plurality of pixel units or pixels 319 arranged in Y rows and X columns. Each pixel 319 can include four sub - pixels 318 each including a photodiode. The four photodiodes in the four sub - pixels 318 are coupled together to share a floating diffusion region 320 (denoted as "X" across the four adjacent sub - pixels 318), such that each pixel 319 includes one floating diffusion region 320. The example circuitry of the pixel 319 is described in more detail hereinafter with reference to Figure 4 more detail.

[0045] The four - Bayer filter array 309 includes a plurality of color filters 330 disposed over the pixels 319 such that color filters 330 of the same color are disposed over 2x2 groupings of the pixels 319. For example, the pixels 319 in rows 1 to 2 and columns 1 to 2 are disposed under a blue color filter 330 (labeled "B"), (i) the pixels 319 in rows 1 to 2 and columns 3 to 4 and (ii) the pixels 319 in rows 3 to 4 and columns 1 to 2 are disposed under a green color filter 330 (labeled "G"), and the pixels 319 in rows 3 to 4 and columns 3 to 4 are disposed under a red color filter 330 (labeled "R").

[0046] The pixel circuit 307 may also include a plurality of microlenses 340 (illustrated as circles) disposed over the pixel array 308. Specifically, the microlenses 340 are 2x2 microlenses such that each microlens 340 is disposed over a 2x2 grouping of sub-pixels 318 in two adjacent rows and columns or over each pixel 319. The microlenses 340 may help focus incident light onto the photodiodes included in the pixels 319, thereby improving the sensitivity of the pixel circuit 307 and the overall image quality. The microlenses 340 may also minimize crosstalk between adjacent pixels 319, thereby enhancing the ability of the pixel circuit 307 to accurately capture fine details and colors.

[0047] Each of the pixels 319 may be coupled to a first readout circuit, such as Figure 1 the image readout circuit 116 shown in. Thus, all of the pixels 319 may be used to provide CIS information. Additionally, each pixel 319 may be included in a first subset 319a ( Figure 3 not patterned in) or a second subset 319b ( Figure 3 patterned in). The second subset 319b is a subset of the pixels 319 that contains some but not all of the pixels 319. In various instances, only the pixels 319 included in the second subset 319b are coupled to a second readout circuit, such as the event-driven circuit included in the Figure 1 event-driven sensing array 112 shown in. The pixels of the first subset 319a are thus coupled to the first readout circuit but not to the second readout circuit. In various instances, the pixels 319 included in the second subset 319b are configured to be coupled to the second readout circuit in a particular pixel operation mode (e.g., hybrid mode), such as the event-driven circuit included in the Figure 1 event-driven sensing array 112 shown in.

[0048] In Figure 3 the pixels included in the second subset 319b are arranged in a checkerboard pattern such that the second subset 319b includes (i) pixels 319 in odd rows and even columns and (ii) pixels 319 in even rows and odd columns. Thus, according to the teachings of the present disclosure, 50% of the pixels 319 in the pixel array 308 are included in the second subset 319b. Those of ordinary skill in the art will appreciate that in other instances, the positions of the pixels included in the second subset 319b and the pixels included in the first subset 319a may be flipped (e.g., the second subset 319b includes (i) pixels 319 in odd rows and odd columns and (ii) pixels 319 in even rows and even columns).

[0049] In addition, several pairs of pixels 319 are coupled together in a cross pattern. More specifically, two floating diffusion regions 320 of the diagonally arranged pixels 319 in each 2x2 pixel grouping are coupled together, as shown by the diagonal solid or diagonal dashed lines each extending across two pixels 319 (e.g., one or more metal connections), such that the two pixels 319 in each pair effectively share a floating diffusion region. In other words, in each 2x2 pixel grouping, (i) the floating diffusion region of the first pixel in row N and column N is coupled to the floating diffusion region of the second pixel in row N+1 and column N+1, and (ii) the floating diffusion region of the third pixel in row N and column N+1 is coupled to the floating diffusion region of the fourth pixel in row N+1 and column N.

[0050] It is apparent that due to the four-Bayer filter array 309, the two pixels coupled together to form each pair are disposed under color filters 330 of the same color (e.g., blue, green, red). In other words, color filters 330 of the same color are disposed over the 2x2 pixel groupings, and each 2x2 pixel grouping includes (i) a first pair of diagonally arranged pixels whose floating diffusion regions are coupled together and (ii) a second pair of diagonally arranged pixels whose floating diffusion regions are coupled together. As further discussed herein, the coupled pairs of pixels 319 in the illustrated cross pattern can efficiently provide a low-noise shared or merged readout.

[0051] In various examples, the pixel circuit 307 can operate in a first mode and a second mode. In the first mode, all pixels 319 are configured to be coupled to corresponding first readout circuits to provide CIS information corresponding to an external scene, such that the pixel circuit 307 provides an image without loss of image quality compared to a conventional only-CIS pixel circuit. In addition, because each pair of pixels 319 has a shared floating diffusion region and is disposed under color filters of the same color, the color channels are efficiently merged to provide a low-noise shared CIS information readout. In the second mode, the pixels in the first subset 319a are configured to be coupled to corresponding first readout circuits to continue to provide merged CIS information, and the pixels in the second subset 319b are configured to be coupled to corresponding second readout circuits to provide event detection signals (e.g., providing photocurrent for event detection functionality) corresponding to the captured external scene and / or other non-CIS information (e.g., intensity changes or movement of an object). Because the pixels in the second subset 319b are disposed under color filters 330, the non-CIS information can be provided in a combined color information of red (R), green (G), green (G), and blue (B) (e.g., R+G+G+B or gray), which may result in reduced sensitivity for event detection (or other functionality) in the second mode, but can provide improved image quality in the first mode. Thus, the second mode is a hybrid mode in which the pixel circuit 307 simultaneously provides merged CIS information and non-CIS (e.g., event detection) information.

[0052] It should be understood that, in accordance with the teachings of the present disclosure, in the example NxN (e.g., 4x4) pixel circuit 307 shown in Figure 3 , when the pixels of the second subset 319b are configured to operate in the second mode and provide an event detection signal, there are also one or more pixels of the first subset 319a configured to provide CIS information under the color filter. Thus, it should be understood that, in accordance with the teachings of the present disclosure, all sampling sites of any particular color in the example 4x4 pixel circuit 307 are not sacrificed for EVS functionality at any time. In other words, in accordance with the teachings of the present disclosure, for each pixel of the second subset 319b that provides an event detection signal, there is a corresponding pixel of the first subset 319a disposed under the color filter in the example 4x4 pixel circuit 307.

[0053] Figure 4 Describing an example of a pixel pair coupled to the mode selection switch circuit 472 in accordance with the teachings of the present disclosure, the mode selection switch circuit 472 is coupled to the second readout circuit 480. It should be understood that Figure 4 the pixel pair of Figure 2 and 3 may be an example pair of pixels 219 and 319 included in the pixel circuits 207 and 307 shown in

[0054] The pixel pair includes a first pixel 419-1 and a second pixel 419-2 (collectively or individually referred to as "pixel pair 419" or "pixel 419"). Each of the first and second pixels 419-1, 419-2 may include four photodiodes 450, a floating diffusion region (FD) 420, and four transfer transistors 452 coupled between the FD 420 and the corresponding one of the four photodiodes 450. In addition, the first pixel 419-1 (but not the second pixel 419-2) further includes a reset transistor 460, a source follower transistor 462, and a row selection transistor 464. The gate terminal of the source follower transistor 462 may be coupled to the FD 420, and the row selection transistor 464 may be coupled to the source follower transistor 462 and a bit line (not shown). The reset transistor 460 may be coupled to the FD 420. Returning to reference the two pixels 419, each photodiode 450 may be configured to photogenerate image charge in response to incident light. Each FD 420 may be coupled to receive image charge from the four photodiodes 450 of the same pixel 419. Each transfer transistor 452 may be configured to transfer the image charge from the corresponding photodiode to the FD 420 of the same pixel 419.

[0055] In the depicted example, the mode selection switch circuit 472 may include a first transistor 474 coupled between node N and the voltage source vpix. In the depicted example, node N is coupled to a second readout circuit 480, which in the example is part of one of the event-driven circuits included in the event-driven sensing array 112 shown in Figure 1 . In the depicted example, a photocurrent-to-voltage converter is illustrated, such as the logarithmic amplifier stage portion of the second readout circuit 480, which includes a second transistor 482 coupled between node N and another voltage source and an inverter 484 coupled to node N. The gate of the second transistor 482 and the output of the inverter 484 may be coupled to other circuits, such as other stages (e.g., photocurrent change detection and comparator for event detection) of the second readout circuit 480 (e.g., one of the event-driven circuits included in the event-driven sensing array 112) discussed above. It should be understood that Figure 4 the illustrated embodiments of the mode selection switch circuit 472 and the logarithmic amplifier stage portion of the second readout circuit 480 are merely one example, and other circuitry may be implemented. As shown, pixel pair 419 may be located on the top die 102, and the mode selection switch circuit 472 and the second readout circuit 480 may be located on the middle die 104. More specifically, the reset transistor 460 may be coupled to node N via a pair of hybrid bonds 470 or other form of bonding.

[0056] In the illustrated example, the FDs 420 of pixel pair 419 are coupled together, for example, by metal connection 454. To operate pixel pair 419 in the first mode to provide CIS information, the first transistor 474 of the mode selection switch circuit 472 may be turned on. The image charges in the two FDs 420 are merged together via the metal connection 454 and read out through the source follower transistor 462 and the row select transistor 464. Obviously, since the image charges are merged, only the first pixel 419-1 (and not the second pixel 419-2) needs to include the source follower transistor 462 and the row select transistor 464, thereby reducing the number of components and simplifying the circuitry. To operate pixel pair 419 in the second mode to provide non-CIS (e.g., event detection for intensity change or movement) information, the first transistor 474 of the mode selection switch circuit 472 may be turned off. Thus, the signals from pixel pair 419 may be sent to the second readout circuit 480 (e.g., to provide photocurrent for event detection functionality).

[0057] Figure 5 An example of a pixel array 508 coupled to the mode selection switch circuit 472 in accordance with the teachings of the present disclosure is illustrated. It should be understood that Figure 5 the pixel array 508 of Figure 2 and 3Examples of pixel arrays 208 and 308 in pixel circuits 207 and 307 shown in [reference], and similarly named and numbered elements above are similarly coupled and operative hereinafter.

[0058] In the illustrated example, a pixel array 508 located on a top die 102 includes a plurality of pixels arranged in rows and columns. Specifically, for illustrative purposes, a first pixel 519-1, a second pixel 519-2, a third pixel 519-3, and a fourth pixel 519-4 are framed in a dashed line. The first pixel 519-1 and the second pixel 519-2 may be examples of pixels included in Figure 2 and 3 in a second subset 219b or 319b shown in [reference], and the third pixel 519-3 and the fourth pixel 519-4 may be examples of pixels included in Figure 2 and 3 in a first subset 219a or 319a shown in [reference]. As shown, floating diffusion regions of the first pixel 519-1 and the second pixel 519-2 are coupled together, for example, by a metal connection, and a reset transistor of the first pixel 519-1 is coupled to a mode selection switch circuit 472. Thus, the first pixel 519-1 and the second pixel 519-2 may provide combined CIS information readout when operating in a first mode and non-CIS information (e.g., event detection) when operating in a second mode. Also as shown, floating diffusion regions of the third pixel 519-3 and the fourth pixel 519-4 are coupled together, for example, by a metal connection. However, the reset transistor of the third pixel 519-3 is coupled to a voltage source, rather than the mode selection switch circuit 472. Thus, the third pixel 519-3 and the fourth pixel 519-4 may provide combined CIS information, whether operating in the first or second mode.

[0059] In addition, Figure 5 illustrates a 2x2 grouping of the first pixel 519-1, the second pixel 519-2, the third pixel 519-3, and the fourth pixel 519-4 that repeats across the pixel array 508. Thus, the pixel array 508 may efficiently provide low-noise combined or shared CIS information readout when operating in a first mode and provide a mixture of CIS and non-CIS (e.g., event detection) information when operating in a second mode.

[0060] Figure 6 Illustrates an example of a pixel circuit 607 that includes a pixel array 608 and a four-color filter array 609 and provides diagonal shared readout in accordance with the teachings of the present disclosure. It should be understood that Figure 6 the pixel array 608 of [[reference]] may be an example of a pixel array 108 in a stacked CIS having an EVS system 100 shown in Figure 1 and similarly named and numbered elements above are similarly coupled and operative hereinafter.

[0061] In the illustrated example, the pixel array 608 includes a plurality of pixel units or pixels 619 arranged in Y rows and X columns. Each pixel 619 may include four sub-pixels 618 each including a photodiode. The four photodiodes in the four sub-pixels 618 are coupled together to share a floating diffusion region 620 (represented as an "X" across four adjacent sub-pixels 618) such that each pixel 619 includes one floating diffusion region 620. An example circuit system of the pixel 619 is described in more detail above with reference to Figure 4 a more detailed description.

[0062] The four-color filter array 609 includes: a plurality of color filters 630 including red, green, blue, and transparent filters disposed over pixels 619 in (i) odd rows and odd columns and (ii) even rows and even columns; and a plurality of non-RGB or transparent filters 632 (or no filter or colorless filter) disposed over pixels 619 in (i) odd rows and even columns and (ii) even rows and odd columns. In addition, RGB color filters 630 of the same color are disposed over several pairs of pixels 619 arranged diagonally. For example, pixels 619 in (i) row 1, column 1 and (ii) row 2, column 2 are disposed below a blue filter 630 (labeled "B"), pixels 619 in (i) row 1, column 3, (ii) row 2, column 4, (iii) row 3, column 1 and (iv) row 4, column 2 are disposed below a green filter 630 (labeled "G"), pixels 619 in (i) row 3, column 3 and (ii) row 4, column 4 are disposed below a red filter 630 (labeled "R"), and the remaining pixels 619 in the illustrated 4x4 pixel grouping are disposed in a checkerboard pattern below non-RGB or transparent filters 632 (or no filter or colorless filter).

[0063] The pixel circuit 607 may also include a plurality of microlenses 640 (illustrated as circles) disposed over the pixel array 608. Specifically, the microlenses 640 are 2x2 microlenses such that each microlens 640 is disposed over a 2x2 grouping of sub-pixels 618 in two adjacent rows and columns or over each pixel 619. The microlenses 640 may help focus incident light onto the photodiodes included in the pixels 619, thereby improving the sensitivity of the pixel circuit 607 and the overall image quality. The microlenses 640 may also minimize crosstalk between adjacent pixels 619, thereby enhancing the ability of the pixel circuit 607 to accurately capture fine details and colors.

[0064] Each of the pixels 619 may be coupled to a first readout circuit, such as Figure 1 the image readout circuit 116 shown in. Thus, all pixels 619 may be used to provide CIS information corresponding to an external scene. In addition, each pixel 619 may be included in a first subset 619a (Figure 6 in the unpatterned) or the second subset 619b ( Figure 6 in the patterned). The second subset 619b is a subset of the pixels 619 that contains some but not all of the pixels 619. In various instances, only the pixels 619 included in the second subset 619b are coupled to the second readout circuit, such as the event-driven circuit included in the Figure 1 event-driven sensing array 112 shown in. The pixels of the first subset 619a are thus coupled to the first readout circuit but not to the second readout circuit. In various instances, the pixels 619 included in the second subset 619b are configured to be coupled to the second readout circuit in a specific pixel operation mode (e.g., hybrid mode), such as the event-driven circuit included in the Figure 1 event-driven sensing array 112 shown in.

[0065] In Figure 6 the pixels included in the second subset 619b are arranged in a checkerboard pattern such that the second subset 619b includes (i) pixels 619 in odd rows and even columns and (ii) pixels 619 in even rows and odd columns. Additionally, in the illustrated embodiment, the pixels included in the second subset 619b are disposed under a non-RGB or transparent filter 632 (or no filter or a clear filter). Thus, 50% of the pixels 619 in the pixel array 608 are included in the second subset 619b according to the teachings of the present disclosure. Those of ordinary skill in the art will appreciate that in other instances, the positions of the pixels included in the second subset 619b and the pixels included in the first subset 619a may be flipped (e.g., the second subset 619b includes (i) pixels 619 in odd rows and odd columns and (ii) pixels 619 in even rows and even columns).

[0066] Furthermore, several pairs of pixels 619 are coupled together in a diagonal pattern. More specifically, the two floating diffusion regions 620 of the diagonally arranged pixels 619 in two adjacent pixel rows are coupled together, as shown by the diagonal solid lines each extending across two pixels 619 (e.g., metal connections), such that the two pixels 619 in each pair effectively share a floating diffusion region. Some of the diagonal solid lines only extend across one pixel 619, indicating that those pixels 619 may be coupled to pixels outside the illustrated 4x4 grouped pixels 619. In other words, in each pair of adjacent rows, (i) the floating diffusion region of the first pixel in row N and column N is coupled to the floating diffusion region of the second pixel in row N+1 and column N+1, and (ii) the floating diffusion region of the third pixel in row N and column N+1 is coupled to the floating diffusion region of the fourth pixel in row N+1 and column N+2.

[0067] Obviously, due to the four-color filter array 609, two pixels that are coupled together to form each pair are disposed below a color filter 630 of the same color (e.g., blue, green, red) or a non-RGB or transparent filter 632 (or no filter or a colorless filter). In other words, in each pair of adjacent rows, (i) the RGB color filters 630 of the same color are disposed above a first pair of pixels that are diagonally arranged and included in the first subset 619a, where the floating diffusion regions of the pixels of the first pair are coupled together, and (ii) the transparent filter 632 is disposed above a second pair of pixels that are diagonally arranged and included in the second subset 619b, where the floating diffusion regions of the pixels of the second pair are coupled together. Additionally, the first pixel in the first pair of pixels and the first pixel in the second pair of pixels are arranged in the same column, and the second pixel in the first pair of pixels and the second pixel in the second pair of pixels are arranged in different non-adjacent columns. As further discussed herein, the coupled pairs of pixels 619 of the same color in the illustrated diagonal pattern can efficiently provide a low-noise shared or merged readout.

[0068] In various examples, the pixel circuit 607 can operate in a first mode and a second mode. In the first mode, all pixels 619 are configured to be coupled to corresponding first readout circuits to provide CIS information corresponding to an external scene, such that the pixel circuit 607 provides an image without loss of image quality compared to a conventional only-CIS pixel circuit. Additionally, because each pair of pixels 619 has a shared floating diffusion region and is disposed below a color filter of the same color or a non-RGB or transparent filter (or no filter or a colorless filter), the color channels are efficiently merged without mixing colors to provide a low-noise shared CIS information readout. In the second mode, the pixels in the first subset 619a are configured to be coupled to corresponding first readout circuits to continue to provide merged CIS information, and the pixels in the second subset 619b are configured to be coupled to corresponding second readout circuits to provide event detection signals corresponding to the captured external scene (e.g., providing photocurrent for event detection functionality) and / or other non-CIS information (e.g., light intensity changes, object movement). Disposing the second subset 619b below a non-RGB or transparent filter 632 (or no filter or a colorless filter) can help increase the generated photocurrent and / or reduce the delay associated with the pixels included in the second subset 619b. Thus, the second mode is a hybrid mode in which the pixel circuit 607 simultaneously provides merged CIS information and non-CIS (e.g., event detection) information.

[0069] It should be understood that, in accordance with the teachings of the present disclosure, in Figure 6In the example NxN (e.g., 4x4) pixel circuit 607 shown, when the pixels of the second subset 619b are configured to operate in the second mode and provide an event detection signal, there are also one or more pixels of the first subset 619a configured to provide CIS information under the color filter. Thus, it should be understood that in accordance with the teachings of the present disclosure, all sampling sites of any particular color in the example 4x4 pixel circuit 607 are not sacrificed for EVS functionality at any time. In other words, in accordance with the teachings of the present disclosure, for each pixel of the second subset 619b that provides an event detection signal, there is a corresponding pixel of the first subset 619a disposed under the color filter in the example 4x4 pixel circuit 607.

[0070] Figure 7 An example of a pixel circuit 707 that includes a pixel array 708 and a zigzag four-color filter array 709 and provides diagonal sharing readout in accordance with the teachings of the present disclosure is illustrated. It should be understood that Figure 7 the pixel array 708 of Figure 1 may be an example of the pixel array 108 in the stacked CIS having the EVS system 100 shown in

[0071] In the illustrated example, the pixel array 708 includes a plurality of pixel units or pixels 719 arranged in Y rows and X columns. Each pixel 719 may include four sub-pixels 718 each including a photodiode. The four photodiodes in the four sub-pixels 718 are coupled together to share a floating diffusion region 720 (designated as "X" across the four adjacent sub-pixels 718), such that each pixel 719 includes one floating diffusion region 720. An example circuit system of the pixel 719 was described in more detail above with reference to Figure 4 more detailed description.

[0072] The zigzag combined four-color filter array 709 includes a plurality of color filters 730 including a red filter, a green filter, and a transparent filter, and the plurality of color filters 730 are disposed over the pixels 719 such that color filters 730 of the same color are disposed over the zigzag grouping of the pixels 719. For example, the pixels 719 in (i) row 1, column 1, (ii) rows 1 to 2, column 2, and (iii) row 2, column 3 are disposed under a blue filter 730 (labeled "B"), the pixels 719 in (i) row 1, column 3, (ii) rows 1 to 2, column 4, (iii) rows 2 to 3, column 1, (iv) rows 3 to 4, column 2, and (v) row 4, column 3 are disposed under a green filter 730 (labeled "G"), and the pixels 719 in (i) row 3, column 3, (ii) rows 3 to 4 and column 4, and (iii) row 4, column 1 are disposed under a red filter 730 (labeled "R").

[0073] The pixel circuit 707 may further include a plurality of microlenses 740 (illustrated as circles) disposed over the pixel array 708. Specifically, the microlenses 740 are 2x2 microlenses such that each microlens 740 is disposed over a 2x2 grouping of sub-pixels 718 in two adjacent rows and columns or over each pixel 719. The microlenses 740 may help focus incident light onto the corresponding photodiodes included in the pixels 719, thereby improving the sensitivity of the pixel circuit 707 and the overall image quality. The microlenses 740 may also minimize crosstalk between adjacent pixels 719, thereby enhancing the ability of the pixel circuit 707 to accurately capture fine details and colors.

[0074] Each of the pixels 719 may be coupled to a first readout circuit, such as Figure 1 the image readout circuit 116 shown in Figure 7 . Thus, all of the pixels 719 may be used to provide CIS information. Additionally, each pixel 719 may be included in a first subset 719a ( Figure 7 not patterned in Figure 1 ) or a second subset 719b ( Figure 1 patterned in

[0075] ). The second subset 719b is a subset of the pixels 719 that contains some but not all of the pixels 719. In various instances, only the pixels 719 included in the second subset 719b are coupled to a second readout circuit, such as the event-driven circuit included in the event-driven sensing array 112 shown in Figure 7 . The pixels of the first subset 719a are thus coupled to the first readout circuit but not to the second readout circuit. In various instances, the pixels 719 included in the second subset 719b are configured to be coupled to the second readout circuit in a particular pixel operating mode (e.g., hybrid mode), such as the event-driven circuit included in the event-driven sensing array 112 shown in

[0076] ).

[0075] In Figure 7 , the pixels included in the second subset 719b are arranged in a checkerboard pattern such that the second subset 719b includes (i) pixels 719 in odd rows and even columns and (ii) pixels 719 in even rows and odd columns. Thus, according to the teachings of the present disclosure, 50% of the pixels 719 in the pixel array 708 are included in the second subset 719b. Those of ordinary skill in the art will appreciate that in other instances, the positions of the pixels included in the second subset 719b and the pixels included in the first subset 719a may be flipped (e.g., the second subset 719b includes (i) pixels 719 in odd rows and odd columns and (ii) pixels 719 in even rows and even columns).

[0076] In addition, several pairs of pixels 719 are coupled together in a diagonal pattern. More specifically, two floating diffusion regions 720 of diagonally arranged pixels 719 in two adjacent rows are coupled together, as shown by the diagonal solid lines each extending across two pixels 719 (e.g., one or more metal connections), such that the two pixels 719 in each pair effectively share a floating diffusion region. In other words, in each pair of adjacent rows, (i) the floating diffusion region of the first pixel in row N and column N is coupled to the floating diffusion region of the second pixel in row N+1 and column N+1, and (ii) the floating diffusion region of the third pixel in row N and column N+1 is coupled to the floating diffusion region of the fourth pixel in row N+1 and column N+2.

[0077] It is evident that due to the zigzag four-color filter array 709, the two pixels coupled together to form each pair are disposed beneath color filters 730 of the same color (e.g., blue, green, red). In other words, (i) RGB color filters 730 of the same color are disposed over four pixels arranged in two adjacent rows and three adjacent columns, and (ii) the four pixels include a first pair of diagonally arranged pixels whose floating diffusion regions 720 are coupled together and a second pair of diagonally arranged pixels whose floating diffusion regions 720 are coupled together. As further discussed herein, the coupled pairs of pixels 719 in the illustrated diagonal pattern can efficiently provide a low-noise shared or merged readout.

[0078] In various examples, the pixel circuit 707 can operate in a first mode and a second mode. In the first mode, all pixels 719 are configured to be coupled to corresponding first readout circuits to provide CIS information corresponding to an external scene, such that the pixel circuit 707 provides an image without loss of image quality as compared to a conventional only-CIS pixel circuit. In addition, because each pair of pixels 719 has a shared floating diffusion region and is disposed beneath color filters of the same color, color channels are efficiently merged without mixing colors to provide a low-noise shared CIS information readout. In the second mode, pixels in a first subset 719a are configured to be coupled to corresponding first readout circuits to continue to provide merged CIS information, and pixels in a second subset 719b are configured to be coupled to corresponding second readout circuits to provide an event detection signal corresponding to the captured external scene (e.g., providing a photocurrent for event detection functionality) and / or other non-CIS information (e.g., intensity change or path information of a moving object). Because the pixels in the second subset 719b are disposed beneath the RGB color filters 730, the non-CIS information can be provided in R+G+G+B or gray, which may result in reduced sensitivity for event detection (or other functionality) in the second mode, but can provide improved image quality in the first mode. Thus, the second mode is a hybrid mode in which the pixel circuit 707 simultaneously provides merged CIS information and non-CIS (e.g., event detection) information.

[0079] It should be understood that, in accordance with the teachings of the present disclosure, in the example NxN (e.g., 4x4) pixel circuit 707 shown in Figure 7 when the pixels of the second subset 719b are configured to operate in the second mode and provide an event detection signal, there are also one or more pixels of the first subset 719a configured to provide CIS information under the color filter. Thus, it should be understood that, in accordance with the teachings of the present disclosure, all sampling sites of any particular color in the example 4x4 pixel circuit 707 are not sacrificed for EVS functionality at any time. In other words, in accordance with the teachings of the present disclosure, for each pixel of the second subset 719b that provides an event detection signal, there is a corresponding pixel of the first subset 719a disposed under the color filter in the example 4x4 pixel circuit 707.

[0080] Figure 8 An example of a pixel array 808 coupled to a mode selection switch circuit 472 in accordance with the teachings of the present disclosure is illustrated. It should be understood that Figure 8 the pixel array 808 of Figure 6 and 7 may be an example of the pixel arrays 608 and 708 included in the pixel circuits 607 and 707 shown in

[0081] In the illustrated example, the pixel array 808 located on the top die 102 includes a plurality of pixels arranged in rows and columns. Specifically, for illustrative purposes, the first pixel 819-1, the second pixel 819-2, the third pixel 819-3, and the fourth pixel 819-4 are framed in dashed lines. As shown, the floating diffusion regions of the first pixel 819-1 and the second pixel 819-2 are coupled together, and the reset transistor of the first pixel 819-1 is coupled to the mode selection switch circuit 472. Thus, the first pixel 819-1 and the second pixel 819-2 can provide a combined CIS information readout when operating in the first mode and provide non-CIS information (e.g., event detection) when operating in the second mode. Also as shown, the floating diffusion regions of the third pixel 819-3 and the fourth pixel 819-4 are coupled together. However, the reset transistor of the third pixel 819-3 is coupled to a voltage source, rather than the mode selection switch circuit 472. Thus, the third pixel 819-3 and the fourth pixel 819-4 can provide combined CIS information, whether operating in the first or second mode.

[0082] Also as shown, two transfer transistors vertically arranged in each pixel 819 share the same transfer transistor signal, which can reduce the number of required interconnections. In addition, Figure 8Describe the zigzag grouping of the first pixel 819-1, the second pixel 819-2, the third pixel 819-3, and the fourth pixel 819-4 that repeats across the pixel array 808. Thus, the pixel array 808 can efficiently provide low-noise merged or shared CIS information readout when operating in the first mode and provide hybrid CIS and non-CIS (e.g., event detection) information when operating in the second mode.

[0083] It should be understood that the pixel circuits described herein and above are merely examples illustrating certain features of the present disclosure, and other pixel circuits are within the scope of the present disclosure. For example, the pixel circuit may include pixels that are structured and arranged to provide phase detection information (e.g., half-shielded PDAF, microlens phase detection, DPD, QPD), rolling shutter, and global shutter, etc. The pixel circuit may also include microlenses of different sizes (e.g., 1x2) disposed on top of the pixel array. In various examples, the second subset may include different proportions of the pixels in the pixel array, such as 1 / 16, 2 / 16, 3 / 16, 4 / 16, 5 / 16, 6 / 16, 7 / 16, or other proportions. In other examples, all pixels are coupled to the second readout circuit without distinguishing between the second subset and the first subset of pixels.

[0084] In some cases, due to the way most image sensor systems are used, it may be preferable to arrange the pixels included in the second subset in a checkerboard pattern. For example, an image sensor (e.g., a smartphone camera) is typically held horizontally or vertically such that horizontal lines or edges (e.g., of a wall, door, window, etc.) fall on a single row or column. If (i) the imaging system is operating in the second (e.g., hybrid) mode, (ii) the pixels included in the second subset cover an entire row or column, and (iii) the incident light from the horizontal line or edge falls on the row or column that is completely occupied by the pixels included in the second subset, then the imaging system may not be able to clearly capture that horizontal line or edge due to the lack of CIS pixels in that row or column. On the other hand, the checkerboard pattern ensures that each row and column always contains CIS pixels to capture those horizontal lines or edges, regardless of the mode in which the imaging system is operating.

[0085] In the pixel circuit described and / or depicted above, the floating diffusion regions of two diagonally arranged pixels are coupled together, and the two diagonally arranged pixels that are coupled together are disposed beneath color filters of the same color. Also as discussed above, an imaging system configured in accordance with the teachings of the present disclosure can be configured between a first mode that provides only CIS information without image quality loss and a second mode that provides hybrid (e.g., simultaneous CIS and non-CIS) information. This enables the imaging system to selectively provide various types of information without sacrificing conventional imaging quality, which is different from many conventional imaging systems. Additionally, by incorporating eight photodiodes, the imaging system can efficiently provide low-noise shared readout, which can also improve reduction.

[0086] Conclusion

[0087] The foregoing description of the illustrative examples of the present disclosure, including what is described in the Abstract of the Disclosure, is not intended to be exhaustive or to limit the present disclosure to the precise forms disclosed. While specific examples of the present disclosure have been described herein for illustrative purposes, those of ordinary skill in the relevant art will recognize that various modifications are possible within the scope of the present disclosure.

[0088] In view of the foregoing detailed description, these modifications can be made to the present disclosure. The terms used in the appended claims should not be construed as limiting the present disclosure to the specific examples disclosed in the specification. Instead, the scope of the present disclosure will be determined entirely by the appended claims, which are to be construed in accordance with the established principles of claim interpretation.

Claims

1. A pixel circuit, comprising: A pixel array comprising a plurality of pixels arranged in rows and columns, wherein each pixel comprises: a plurality of photodiodes configured to photogenerate image charge in response to incident light; a floating diffusion region coupled to receive the image charge from the plurality of photodiodes; and a plurality of transfer transistors coupled between corresponding ones of the photodiodes and the floating diffusion region to transfer the image charge from the corresponding photodiodes to the floating diffusion region; and a color filter array disposed over the pixel array, wherein the color filter array includes a plurality of color filters each having one of a plurality of colors and disposed over at least one of the pixels, in the plurality of pixels comprising a first subset of the pixels coupled to a first readout circuit but not coupled to a second readout circuit and a second subset of the pixels selectively coupled to the second readout circuit, The floating diffusion regions of two adjacent and diagonally arranged pixels are coupled together, and The two adjacent and diagonally arranged pixels coupled together are disposed under a color filter of the same color.

2. The pixel circuit according to claim 1, wherein: The floating diffusion region of a first pixel in row N and column N is coupled to the floating diffusion region of a second pixel in row N+1 and column N+1, and The floating diffusion region of the third pixel in row N and column N+1 is coupled to the floating diffusion region of the fourth pixel in row N+1 and column N.

3. The pixel circuit of claim 1 , wherein the color filter array comprises a four-color filter array such that in each 2×2 pixel grouping Color filters of the same color are disposed over a first pair of pixels that are diagonally arranged and included in the first subset of pixels, wherein the floating diffusion regions of the pixels of the first pair are coupled together, and A transparent filter is disposed over a second pair of pixels arranged diagonally and included in the second subset, wherein the floating diffusion regions of the pixels of the second pair are coupled together.

4. The pixel circuit of claim 1 , wherein the color filter array comprises a quad-Bayer filter array such that color filters of the same color are disposed over 2×2 pixel groups, and wherein each 2×2 pixel group comprises a first pair of diagonally arranged pixels whose floating diffusion regions are coupled together and a second pair of diagonally arranged pixels whose floating diffusion regions are coupled together.

5. The pixel circuit according to claim 1, wherein in each pair of adjacent rows The floating diffusion region of a first pixel in row N and column N is coupled to the floating diffusion region of a second pixel in row N+1 and column N+1, and The floating diffusion region of the third pixel in row N and column N+1 is coupled to the floating diffusion region of the fourth pixel in row N+1 and column N+2.

6. The pixel circuit of claim 1 , wherein the color filter array comprises a four-color filter array such that in each pair of adjacent rows Color filters of the same color are disposed over a first pair of pixels that are diagonally arranged and included in the first subset of pixels, wherein the floating diffusion regions of the pixels of the first pair are coupled together, and a transparent filter disposed over a second pair of pixels arranged diagonally and included in the second subset, wherein the floating diffusion regions of the pixels of the second pair are coupled together, wherein the first pixel in the first pair of pixels and the first pixel in the second pair of pixels are arranged in the same column, and The second pixel in the first pair of pixels and the second pixel in the second pair of pixels are arranged in different non-adjacent columns.

7. A pixel circuit according to claim 1, wherein the color filter array comprises a zigzag quad-Bayer filter array such that color filters of the same color are placed on four pixels arranged in two adjacent rows and three adjacent columns, and wherein the four pixels include a first pair of diagonally arranged pixels whose floating diffusion regions are coupled together and a second pair of diagonally arranged pixels whose floating diffusion regions are coupled together.

8. The pixel circuit of claim 1, wherein the two diagonally arranged pixels coupled together are included in the same one of the first subset of pixels or the second subset of pixels. 9 . The pixel circuit of claim 1 , wherein the pixels included in the second subset of pixels are arranged in a checkerboard pattern.

10. The pixel circuit of claim 1, wherein the second subset of the pixels comprises 50% of the pixels included in the pixel array.

11. An imaging system comprising: A pixel circuit comprising: A pixel array having a plurality of pixels arranged in rows and columns, wherein each pixel comprises: a plurality of photodiodes configured to photogenerate image charge in response to incident light; a floating diffusion region coupled to receive the image charge from the plurality of photodiodes; and a plurality of transfer transistors coupled between corresponding ones of the photodiodes and the floating diffusion region to transfer the image charge from the corresponding photodiodes to the floating diffusion region; and a color filter array disposed over the pixel array, wherein the color filter array includes a plurality of color filters each having one of a plurality of colors and disposed over at least one of the pixels; a first readout circuit; a second readout circuit, wherein the plurality of pixels includes a first subset of the pixels coupled to the first readout circuit but not coupled to the second readout circuit and a second subset of the pixels selectively coupled to the second readout circuit, wherein the second readout circuit is coupled to each of the pixels included in the second subset to read out a second set of data signals; and a mode selection switch circuit coupled to the pixels included in the second subset of the pixels, wherein the pixels included in the second subset of the pixels are configured to provide a first set of data signals to the first readout circuit or to provide the second set of data signals to the second readout circuit in response to the mode selection circuit, The floating diffusion regions of two adjacent and diagonally arranged pixels are coupled together, and The two adjacent and diagonally arranged pixels coupled together are disposed under a color filter of the same color.

12. The imaging system of claim 11, wherein: The floating diffusion region of a first pixel in row N and column N is coupled to the floating diffusion region of a second pixel in row N+1 and column N+1, and The floating diffusion region of the third pixel in row N and column N+1 is coupled to the floating diffusion region of the fourth pixel in row N+1 and column N.

13. The imaging system of claim 11, wherein the color filter array comprises a four-color filter array including a red filter, a blue filter, a green filter, and a clear filter such that in each 2x2 pixel grouping Color filters of the same color are disposed over a first pair of pixels that are diagonally arranged and included in the first subset of pixels, wherein the floating diffusion regions of the pixels of the first pair are coupled together, and A transparent filter is disposed over a second pair of pixels arranged diagonally and included in the second subset of pixels, wherein the floating diffusion regions of the pixels of the second pair are coupled together.

14. The imaging system of claim 11, wherein the color filter array comprises a quad-Bayer filter array such that color filters of the same color are disposed over 2x2 pixel groups, and wherein each 2x2 pixel group includes a first pair of diagonally arranged pixels whose floating diffusion regions are coupled together and a second pair of diagonally arranged pixels whose floating diffusion regions are coupled together.

15. The imaging system of claim 11, wherein in each pair of adjacent rows The floating diffusion region of a first pixel in row N and column N is coupled to the floating diffusion region of a second pixel in row N+1 and column N+1, and The floating diffusion region of the third pixel in row N and column N+1 is coupled to the floating diffusion region of the fourth pixel in row N+1 and column N+2.

16. The imaging system of claim 11, wherein the color filter array comprises a four-color filter array including a red filter, a blue filter, a green filter, and a clear filter such that in each pair of adjacent rows, red filters, blue filters, and green filters of the same color are disposed over a first pair of pixels arranged diagonally and included in the first subset of pixels, wherein the floating diffusion regions of the pixels of the first pair are coupled together, and a transparent filter disposed over a second pair of pixels arranged diagonally and included in the second subset, wherein the floating diffusion regions of the pixels of the second pair are coupled together, wherein the first pixel in the first pair of pixels and the first pixel in the second pair of pixels are arranged in the same column, and The second pixel in the first pair of pixels and the second pixel in the second pair of pixels are arranged in different non-adjacent columns.

17. The imaging system of claim 11, wherein the color filter array comprises a zigzag quad-Bayer filter array such that color filters of the same color are disposed over four pixels arranged in two adjacent rows and three adjacent columns, and wherein the four pixels comprise a first pair of diagonally arranged pixels whose floating diffusion regions are coupled together and a second pair of diagonally arranged pixels whose floating diffusion regions are coupled together.

18. The imaging system of claim 11, wherein the two diagonally arranged pixels coupled together are included in the same one of the first subset or the second subset.

19. The imaging system of claim 11, wherein the pixels contained in the second subset of pixels are arranged in a checkerboard pattern.

20. The imaging system of claim 11, wherein the second subset of the pixels comprises 50% of the pixels included in the pixel array.

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