Key-value database near storage computing system based on computing storage device

Abstract

The present application relates to the technical field of key-value databases, and discloses a key-value database near-storage computing system based on a computing storage device. The system includes: a host, a memory, and a computing memory. A decoder in the computing memory is used to read files to be merged from the memory, parse all key-value pairs from the files, and place the key-value pairs in a buffer connected to a sorter; the sorter is used to compare the size relationship of key-value pairs, and according to the result of each comparison, take out the key-value pairs from the corresponding decoder buffer, select the key-value pair with the smallest key according to the size of the key in the key-value pair, and transfer the corresponding key-value pair to a buffer connected to an encoder; the encoder is used to take out the key-value pairs from the buffer connected to the sorter, and generate an SS-Table file according to the file encoding rules and store it in the memory. This can achieve deep integration of computing and storage, fully utilize the computing resources in the host, and improve the overall system performance.

Description

Technical Field

[0001] The present application relates to the technical field of key-value databases, for example, to a key-value database near-storage computing system based on a computing storage device. Background Art

[0002] Databases play a critical role in modern computer systems, with widespread applications ranging from enterprise data management to big data analytics. Key-value databases based on the Log-Structured Merge-Tree (LSM-Tree) are gaining widespread adoption in numerous application scenarios due to their low write amplification and high write throughput. Representative databases of this type include LevelDB and RocksDB. LSM-Trees significantly improve write performance by converting random write operations into sequential writes, effectively leveraging the sequential write characteristics of modern solid-state drives (SSDs). Furthermore, LSM-Trees, through frequent merge operations, not only ensure data consistency but also effectively reduce write amplification. To improve read performance, LSM-Trees maintain auxiliary data structures in memory, reducing disk input and output (I / O) accesses. These advantages make LSM-Trees a leading choice for high-performance database design.

[0003] The LSM tree's operational mechanism requires numerous merge operations to maintain its hierarchical structure. These operations merge and reorganize data from different levels to maintain data consistency and reduce write amplification. However, merge operations involve a significant amount of I / O operations and data merging calculations, which consumes significant system resources. When system resources are heavily occupied by background merge operations, foreground write and read operations may be impacted, resulting in frequent pauses in foreground write operations and a decrease in overall throughput.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of this application. Summary of the Invention

[0005] In order to provide a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. The summary is not an extensive review, nor is it intended to identify key / critical elements or delineate the scope of protection of these embodiments, but rather serves as a prelude to the detailed description that follows.

[0006] The embodiments of the present disclosure provide a key-value database near-storage computing system based on a computing storage device, which solves the problem of insufficient overall system performance.

[0007] The system includes: a host CPU, a memory, and a computing memory, wherein a memory and a computing accelerator are deployed in the computing memory, and the computing accelerator includes a decoder, a sequencer, and an encoder;

[0008] The decoder is used to read the SS-Table file to be merged from the memory, parse all the key-value pairs from the file, and place the key-value pairs in the FIFO buffer connected to the sorter;

[0009] The sorter is used to compare the size relationship of key-value pairs, and take out the key-value pairs from the corresponding decoder FIFO buffer according to the result of each comparison, select the key-value pair with the smallest key according to the size of the key in the key-value pair, and transfer the corresponding key-value pair to the FIFO buffer connected to the encoder;

[0010] The encoder is used to take key-value pairs from the FIFO buffer connected to the sorter and generate SS-Table files according to the file encoding rules and store them in the memory.

[0011] In some embodiments, the SS-Table file to be merged is read from the memory, all key-value pairs are parsed from the file, and the key-value pairs are placed in a FIFO buffer connected to the sorter, including:

[0012] Determine whether the current data block reading is completed. If it is completed, read the next data block from the memory into the data block buffer stored in the BRAM;

[0013] Read the current data from the buffer and read the key-value pair metadata based on the current data;

[0014] Read key-value pair information based on key-value pair metadata;

[0015] Transfer the read key-value pairs to the FIFO buffer;

[0016] Updates the read index based on the current key-value pair metadata.

[0017] In some embodiments, comparing the size relationships of key-value pairs, taking out key-value pairs from the corresponding decoder FIFO buffer according to the result of each comparison, selecting the key-value pair with the smallest key according to the size of the key in the key-value pairs, and transmitting the corresponding key-value pair to the FIFO buffer connected to the encoder includes:

[0018] Read a key-value pair from the FIFO buffer connected to the decoder;

[0019] Separate the read key-value pairs and obtain the user key and timestamp in the key-value pairs;

[0020] Compare all obtained user key values;

[0021] Transfer the key-value pair with the minimum user key value to the FIFO buffer connected to the encoder;

[0022] The key-value pair is supplemented by the decoder corresponding to the key-value pair of the minimum user key value.

[0023] In some embodiments, taking key-value pairs from a FIFO buffer connected to a sorter and generating an SS-Table file according to a file encoding rule and storing the file in a memory includes:

[0024] Read key-value pairs from the FIFO buffer connected to the sorter;

[0025] Determine the validity of the current key-value pair;

[0026] Determine the encoding of the key value in the current key-value pair based on the encoding state and the information of the previous key-value pair;

[0027] Store the encoded key code into the buffer in memory;

[0028] Store the encoded value encoding into the buffer in memory;

[0029] Updates the encoder state based on the current key-value pair.

[0030] In some embodiments, the system is further configured to:

[0031] Count the metadata of the SS-Table files involved in the merge;

[0032] Map the SS-Table file space in the dynamic memory portion of the computational memory;

[0033] Use P2P to transfer the SS-Table file from the computing memory storage module to the dynamic memory inside the computing memory;

[0034] Pre-allocate a buffer for merging generated data in the dynamic memory of the computing memory;

[0035] Activate the calculation unit in the calculation memory to perform combined calculation;

[0036] The host CPU receives the return parameter returned by the computing unit of the computing memory;

[0037] The host CPU generates partial metadata of the target SS-Table file based on the parameters returned by the computing unit;

[0038] Use P2P for transmission and write part of the generated SS-Table file data from the dynamic memory of the computing memory back to the storage module of the computing memory.

[0039] In some embodiments, the host CPU further includes an intelligent merge operation trigger for dynamically triggering merge calculations based on the real-time load status of the system.

[0040] In some embodiments, the combined calculation is dynamically triggered according to the real-time load status of the system, including:

[0041] Detect the real-time load status of the host CPU and computing memory in the current system;

[0042] According to the load status of the host CPU and the load status of the computing memory, the device type with the heavier workload and the priority level corresponding to the workload difference between the two types of devices in the current system are determined;

[0043] According to the determined device type and priority level, trigger the merge trigger policy of the corresponding device and priority level;

[0044] Estimate the actual computing equipment for analytical calculations and dynamically adjust the SS-Table files included in a single merge calculation;

[0045] Generate corresponding merge calculations for the key-value database.

[0046] In some embodiments, the system further includes an intelligent dynamic scheduler for computing storage devices, for coordinating merging operations, task allocation, and resource allocation between the host CPU and computing memory.

[0047] In some embodiments, the coordination of merging operations, task allocation, and resource allocation between the host CPU and the computing memory includes:

[0048] After receiving the merge calculation feedback information triggered by the key-value database, the current calculation overhead on the host CPU and computing memory is determined based on the merge level of the generated calculation, the number of SS-Tables included, and the file size characteristics;

[0049] Compare the host CPU and computing memory calculation time and the impact on the overall system resources to determine the computing device;

[0050] Add the corresponding merge calculation to the calculation queue of the corresponding computing device;

[0051] Regularly check the computing queues of all devices and dynamically adjust the assigned computing devices and computing priorities based on the waiting time in the computing queues.

[0052] In some embodiments, the system further includes a key-value database parameter dynamic tuner, the key-value database parameter dynamic tuner being configured to periodically detect the workload of the entire system;

[0053] Analyze the detected workload and analyze the optimal strategy for the current database, including memory buffer and background merge thread parameters, based on the tuning strategy.

[0054] Adjust the parameters in the key-value database based on the analysis results.

[0055] The key-value database near-storage computing system based on a computing storage device provided by the embodiments of the present disclosure can achieve the following technical effects:

[0056] This disclosure significantly reduces data transfer overhead between disk and host memory, improving merge computation throughput and reducing operation latency. Furthermore, the kernel is optimized for merge operations, improving overall performance. The host and compute memory collaborate to accelerate the scheduling strategy for merge operations, ensuring optimal utilization of computing and storage resources and further improving system performance.

[0057] The above general description and the following description are exemplary and explanatory only and are not intended to limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] One or more embodiments are exemplarily described by corresponding drawings. These exemplary descriptions and drawings do not limit the embodiments. Elements with the same reference numerals in the drawings are shown as similar elements. The drawings do not constitute a scale limitation. In addition,

[0059] Figure 1 This is a schematic diagram of the structure of a key-value database near storage computing system based on a computing storage device provided by an embodiment of the present disclosure;

[0060] Figure 2 This is an overall schematic diagram of a key-value database computing framework based on a computing storage device provided by an embodiment of the present disclosure;

[0061] Figure 3 This is a schematic diagram of the overall architecture of a combined computing hardware accelerator core provided by an embodiment of the present disclosure;

[0062] Figure 4 This is a structural diagram of a key-value database near storage computing device based on a computing storage device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0063] In order to be able to understand the features and technical content of the embodiments of the present disclosure in more detail, the implementation of the embodiments of the present disclosure is described in detail below in conjunction with the accompanying drawings. The accompanying drawings are for reference only and are not used to limit the embodiments of the present disclosure. In the following technical description, for the sake of convenience of explanation, a full understanding of the disclosed embodiments is provided through multiple details. However, one or more embodiments can still be implemented without these details. In other cases, to simplify the drawings, well-known structures and devices can be simplified for display.

[0064] The terms "first," "second," and the like in the embodiments of the present disclosure are used to distinguish similar objects and are not necessarily used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate to facilitate the description of the embodiments of the present disclosure herein. Furthermore, the terms "including," "having," and any variations thereof are intended to cover non-exclusive inclusions.

[0065] Unless otherwise stated, the term "plurality" means two or more.

[0066] In the embodiment of the present disclosure, the character " / " indicates that the preceding and following objects are in an "or" relationship. For example, A / B means: A or B.

[0067] The term "and / or" describes an association between objects, indicating that three relationships can exist. For example, A and / or B means: A or B, or A and B.

[0068] The term "correspondence" may refer to an association relationship or a binding relationship. The correspondence between A and B means that there is an association relationship or a binding relationship between A and B.

[0069] In order to solve the above problems, the present disclosure provides a key-value database near-storage computing system based on a computing storage device.

[0070] The following describes a key-value database near-storage computing system based on a computing storage device provided by an embodiment of the present disclosure in conjunction with the accompanying drawings.

[0071] Figure 1 This is a structural diagram of a key-value database near-storage computing system based on a computing storage device provided by an embodiment of the present disclosure.

[0072] like Figure 1As shown, a key-value database near-storage computing system based on a computing storage device may include a host central processing unit (CPU) 101, a memory 102, and a computing memory 103, wherein a memory 1031 and a computing accelerator 1032 are deployed in the computing memory 103, and the computing accelerator 1032 includes a decoder 10321, a sorter 10322, and an encoder 10323;

[0073] Decoder 10321 is used to read the SS-Table file to be merged from the memory, parse all key-value pairs from the file, and place the key-value pairs in the FIFO buffer connected to the sorter;

[0074] Sorter 10322 is used to compare the size of key-value pairs and, based on the result of each comparison, retrieve the key-value pairs from the corresponding decoder's First-In-First-Out (FIFO) buffer, select the key-value pair with the smallest key based on the size of the key in the key-value pairs, and transfer the corresponding key-value pair to the FIFO buffer connected to the encoder;

[0075] The encoder 10323 is used to take out the key-value pairs from the FIFO buffer connected to the sorter, and generate a sorted string table (SS-Table) file according to the file encoding rules and store it in the memory.

[0076] In some embodiments, the SS-Table file to be merged is read from the memory, all key-value pairs are parsed from the file, and the key-value pairs are placed in a FIFO buffer connected to the sorter, including:

[0077] Determine whether the current data block reading is completed. If so, read the next data block from the memory into the data block buffer stored in the random access memory (BRAM);

[0078] Read the current data from the buffer and read the key-value pair metadata based on the current data;

[0079] Read key-value pair information based on key-value pair metadata;

[0080] Transfer the read key-value pairs to the FIFO buffer;

[0081] Updates the read index based on the current key-value pair metadata.

[0082] In some embodiments, comparing the size relationships of key-value pairs, taking out key-value pairs from the corresponding decoder FIFO buffer according to the result of each comparison, selecting the key-value pair with the smallest key according to the size of the key in the key-value pairs, and transmitting the corresponding key-value pair to the FIFO buffer connected to the encoder includes:

[0083] Read a key-value pair from the FIFO buffer connected to the decoder;

[0084] Separate the read key-value pairs and obtain the user key and timestamp in the key-value pairs;

[0085] Compare all obtained user key values;

[0086] Transfer the key-value pair with the minimum user key value to the FIFO buffer connected to the encoder;

[0087] The key-value pair is supplemented by the decoder corresponding to the key-value pair of the minimum user key value.

[0088] In some embodiments, taking key-value pairs from a FIFO buffer connected to a sorter and generating an SS-Table file according to a file encoding rule and storing the file in a memory includes:

[0089] Read key-value pairs from the FIFO buffer connected to the sorter;

[0090] Determine the validity of the current key-value pair;

[0091] Determine the encoding of the key value in the current key-value pair based on the encoding state and the information of the previous key-value pair;

[0092] Store the encoded key code into the buffer in memory;

[0093] Store the encoded value encoding into the buffer in memory;

[0094] Updates the encoder state based on the current key-value pair.

[0095] In some embodiments, Figure 1 The system is also used to:

[0096] Count the metadata of the SS-Table files involved in the merge;

[0097] Map the SS-Table file space in the dynamic memory portion of the computational memory;

[0098] Use peer-to-peer (P2P) transmission to transfer the SS-Table file from the computing memory storage module to the dynamic memory inside the computing memory;

[0099] Pre-allocate a buffer for merging generated data in the dynamic memory of the computing memory;

[0100] Activate the calculation unit in the calculation memory to perform combined calculation;

[0101] The host CPU receives the return parameter returned by the computing unit of the computing memory;

[0102] The host CPU generates partial metadata of the target SS-Table file based on the parameters returned by the computing unit;

[0103] Use P2P for transmission and write part of the generated SS-Table file data from the dynamic memory of the computing memory back to the storage module of the computing memory.

[0104] In some embodiments, the host CPU further includes an intelligent merge operation trigger for dynamically triggering merge calculations based on the real-time load status of the system.

[0105] In some embodiments, the combined calculation is dynamically triggered according to the real-time load status of the system, including:

[0106] Detect the real-time load status of the host CPU and computing memory in the current system;

[0107] According to the load status of the host CPU and the load status of the computing memory, the device type with the heavier workload and the priority level corresponding to the workload difference between the two types of devices in the current system are determined;

[0108] According to the determined device type and priority level, trigger the merge trigger policy of the corresponding device and priority level;

[0109] Estimate the actual computing equipment for analytical calculations and dynamically adjust the SS-Table files included in a single merge calculation;

[0110] Generate corresponding merge calculations for the key-value database.

[0111] In some embodiments, Figure 1 The system also includes an intelligent dynamic scheduler for computing storage devices, which is used to coordinate merging operations, task allocation, and resource allocation between the host CPU and computing memory.

[0112] In some embodiments, coordinating merging operations, task allocation, and resource allocation between the host CPU and computing memory includes:

[0113] After receiving the merge calculation feedback information triggered by the key-value database, the current calculation overhead on the host CPU and computing memory is determined based on the merge level of the generated calculation, the number of SS-Tables included, and the file size characteristics;

[0114] Compare the host CPU and computing memory calculation time and the impact on the overall system resources to determine the computing device;

[0115] Add the corresponding merge calculation to the calculation queue of the corresponding computing device;

[0116] Regularly check the computing queues of all devices and dynamically adjust the assigned computing devices and computing priorities based on the waiting time in the computing queues.

[0117] In some embodiments, Figure 1 The system also includes a key-value database parameter dynamic tuner, which is used to regularly detect the workload of the entire system;

[0118] Analyze the detected workload and analyze the optimal strategy for the current database, including memory buffer and background merge thread parameters, based on the tuning strategy.

[0119] Adjust the parameters in the key-value database based on the analysis results.

[0120] Figure 2 This is an overall schematic diagram of a key-value database computing framework based on a computing storage device provided by an embodiment of the present disclosure. Figure 3 This is a schematic diagram of the overall architecture of a combined computing hardware accelerator core provided by an embodiment of the present disclosure. Figure 2 and Figure 3 ,right Figure 1 The key-value database near storage computing system based on computing storage device is further described in.

[0121] Depend on Figure 2 As can be seen, the hardware architecture of this disclosure consists of three types of devices: the host processor (CPU), memory, and computational storage. While maintaining a similar structure to the original Log-Structured Merge (LSM) tree, this architecture replaces traditional disks with computational storage and deploys specialized computational accelerators on the acceleration devices within the computational storage. Based on this hardware architecture, to better utilize the increased computing power of computational storage devices, the host also deploys efficient and intelligent merge operation triggers, an intelligent dynamic scheduler for computational storage devices, and a dynamic key-value database parameter tuner.

[0122] A hardware acceleration kernel has been designed for compaction calculations. This kernel, implemented in a hardware description language, features high parallelism and a pipelined architecture. In key-value databases, compaction calculations primarily consist of decoding, sorting, and encoding. This disclosure accelerates compaction calculations based on their data dependencies and organization. The hardware acceleration kernel comprises a decoder, a sorter, and an encoder.

[0123] (1) The decoder is responsible for reading the SS-Table to be merged from the memory, then parsing all the key-value pairs from the file and placing the key-value pairs in the FIFO buffer connected to the sorter. The operations include:

[0124] Determine whether the current data block reading is completed. If it is completed, read the next data block from the memory into the data block buffer stored on the BRAM;

[0125] Each time the current data is read from the buffer, the key-value pair metadata is read based on the current data;

[0126] Read key-value pair information based on key-value pair metadata;

[0127] Transfer the read key-value pairs to the FIFO buffer;

[0128] Updates the read index based on the current key-value pair metadata.

[0129] (2) The sorter is mainly responsible for comparing the size relationship of key-value pairs. The sorter will take out the key-value pairs from the corresponding decoder FIFO buffer according to the result of each comparison, and then select the key-value pair with the smallest key according to the size of the key in the key-value pair in the sorter, and transmit the corresponding key-value pair to the FIFO buffer connected to the encoder. The operations included are:

[0130] Read a key-value pair from the FIFO buffer connected to the decoder;

[0131] Separate the read key-value pairs and obtain the user key (user-key) and timestamp in the key-value pairs;

[0132] Compare all obtained user key values;

[0133] Transfer the key-value pair with the minimum user key value to the FIFO buffer connected to the encoder;

[0134] Supplement the key-value pair from the decoder corresponding to the key-value pair of the minimum user key value;

[0135] (3) The encoder is responsible for re-encoding the existing key-value pairs into a file in the standard SS-Table format. Each time, the encoder takes a key-value pair from the FIFO buffer connected to the sorter, and then generates an SS-Table file according to the file encoding rules and stores it in the memory. The operations include:

[0136] Read a key-value pair from the FIFO buffer connected to the sorter;

[0137] Determine the validity of the current key-value pair;

[0138] Determine the encoding of the key value in the current key-value pair based on the encoding state and the information of the previous key-value pair;

[0139] Store the encoded key code into the buffer in memory;

[0140] Store the encoded value encoding into the buffer in memory;

[0141] Updates the encoder state based on the current key-value pair.

[0142] Under this hardware accelerator design architecture, the decoder, sorter, and encoder will start simultaneously after the core is activated. Each computing unit will determine the computing state based on the data status in the buffer connected to it. Once the required data is ready, the corresponding computing unit will be activated for calculation. The data flow relationship organized by the FIFO buffer allows the three computing devices to effectively implement pipeline calculations.

[0143] In a key-value database accelerated by compute memory, the compaction calculation operation will generate a call to the calculation of the compaction in the compute memory. The calculation calling the compute memory includes the following operations:

[0144] Collect metadata of the SS-Table files that will participate in compaction.

[0145] Map the SS-Table file space in the DRAM portion of the computational memory;

[0146] Use P2P to transfer the SS-Table file from the computing memory storage module to the DRAM inside the computing memory;

[0147] Pre-allocate a buffer for compaction-generated data in the DRAM portion of the computational memory;

[0148] Activate the computing unit in the computing memory and perform compaction calculation;

[0149] The host receives the return parameter returned by the computing unit of the computing memory;

[0150] The host generates partial metadata of the target SS-Table file based on the parameters returned by the computing unit;

[0151] Use P2P for transmission and write part of the data of the generated SS-Table file from the DRAM inside the computing memory back to the computing memory storage module.

[0152] To fully utilize the computing potential of computational storage device accelerators, this paper deploys an efficient and intelligent merge operation trigger on the host side. This trigger will dynamically trigger the compaction calculation based on the real-time load status of the system. The trigger includes the following operations:

[0153] Detect the current real-time load status of the system, including the utilization rate and throughput rate of the two types of equipment in the system;

[0154] Based on the CPU computing load and computing memory load status, determine the device type with the heavier workload and the priority level corresponding to the workload difference between the two types of devices in the current system, CPU and computing memory;

[0155] Based on the determined device type and priority level, trigger the compaction triggering policy for the corresponding device and priority level;

[0156] For compaction calculations generated under dynamic policies, the trigger estimates the actual computing device for analysis and calculation. If the computing device is a computing memory, the trigger dynamically adjusts the SS-Table files included in a single compaction calculation.

[0157] Generates the corresponding compaction calculation for the key-value database.

[0158] The present disclosure also includes an intelligent dynamic scheduler for computing storage devices, which is responsible for coordinating the allocation of merged operation tasks and resource allocation between the host CPU and computing storage. The scheduler includes the following operations:

[0159] After receiving the compaction calculation triggered by the key-value database, the scheduler estimates the CPU and memory overhead of the current calculation based on the merge level, number of SS-Tables included, and file size characteristics.

[0160] Scheduling determines the computing device by comparing the CPU and computing memory computing time and the impact on the overall system resources;

[0161] Add the corresponding merge calculation to the calculation queue of the corresponding computing device;

[0162] The scheduler will periodically check the computing queues of all devices and dynamically adjust the assigned computing devices and computing priorities based on the waiting time in the computing queues.

[0163] To further improve system performance, this disclosure also provides a key-value database parameter dynamic tuner. The tuner includes the following operations:

[0164] The dynamic tuner will periodically test the workload of the entire system;

[0165] Analyze the detected workload and determine the optimal strategy for parameters such as the memory buffer and background compaction thread in the current database based on the tuning strategy.

[0166] Adjust the parameters in the key-value database based on the analysis results.

[0167] In a specific embodiment, the specific calculation process of the acceleration kernel design based on the computing storage device, the efficient and intelligent merging operation trigger and the intelligent dynamic scheduler of the computing storage device proposed in the present invention is further described in detail in combination with the algorithm pseudo code.

[0168] 1. Acceleration kernel design for computational storage devices

[0169] The present invention proposes a high-throughput, low-resource consumption accelerator core designed based on a computing storage device, which significantly improves the computing speed of the merge operation, while improving the overall write throughput of the key-value storage system, greatly reducing the write blocking and write compression problems that occur in the process, and ensuring the efficient operation of the key-value storage system.

[0170] Merge operation parallel computing unit algorithm strategy

[0171]

[0172] 2. Smart Merge Operation Trigger

[0173] The intelligent merge operation trigger proposed in this invention intelligently triggers the merge operation based on the current system workload and resource utilization. The intelligent merge operation trigger strategy is as follows:

[0174] Smart Merge Action Trigger

[0175]

[0176] 3. Intelligent dynamic scheduler for computing storage devices

[0177] The intelligent dynamic scheduler for computing storage devices proposed in this invention is based on the current system workload and the number of compactions triggered. The intelligent merge operation trigger strategy is as follows:

[0178] Smart Merge Action Trigger

[0179]

[0180] The core idea of ​​this disclosure is to offload some compaction operations to the computing memory for execution. In preliminary experiments, the process and data flow dependencies of the compaction operation were deeply analyzed. Based on these analysis results, a high-throughput, low-resource consumption accelerator kernel was designed. This kernel can be flexibly deployed in the computing memory to optimize data processing. In addition, a variety of merging and scheduling strategies were tested using physical computing memory, and a computing framework for the collaborative work of computing storage devices and host devices was carefully designed. This framework not only includes efficient triggering merging strategies, but also covers optimized scheduling strategies, aiming to achieve deep integration of computing and storage, fully utilize the computing resources in the host, and improve overall system performance.

[0181] The innovation of this disclosure is reflected in the following aspects:

[0182] (1) Near-storage computing architecture: Leveraging the unique advantages of computing storage devices, a near-storage computing architecture is proposed for the merge process in key-value databases. This architecture significantly reduces the data transfer overhead between disk and host memory, improves the throughput of merge computing, and reduces the time delay of operations.

[0183] (2) High-throughput accelerator kernel: A high-throughput, low-resource-consumption accelerator kernel is designed for merge operations in LSM-tree-based key-value databases. This kernel is specifically optimized for merge operations to improve overall performance.

[0184] (3) Collaborative Work Scheduling Strategy: We designed an efficient scheduling strategy for the host and computing memory to collaborate and accelerate merge operations, as well as a more intelligent merge operation triggering strategy. These strategies ensure optimal utilization of computing and storage resources, further improving system performance.

[0185] (4) Optimized Database Settings: This disclosure also provides a set of database settings for a key-value database system integrated with a computing storage device. These parameters are carefully tuned and optimized to fully utilize the potential of the computing storage device and provide users with more efficient database performance.

[0186] Combine Figure 4As shown, an embodiment of the present disclosure further provides a key-value database near storage computing device 400 based on a computing storage device, including a processor 404 and a memory 401. Optionally, the system may also include a communication interface 402 and a bus 403. The processor 404, the communication interface 402, and the memory 401 may communicate with each other via the bus 403. The communication interface 402 may be used for information transmission. The processor 404 may call the logic instructions in the memory 401 to execute the method corresponding to the key-value database near storage computing based on the computing storage device of the above embodiment.

[0187] In addition, the logic instructions in the memory 401 can be implemented in the form of software functional units and can be stored in a computer-readable storage medium when sold or used as an independent product.

[0188] Memory 401, as a computer-readable storage medium, can be used to store software programs and computer-executable programs, such as program instructions / modules corresponding to the methods in the embodiments of the present disclosure. Processor 404 executes the program instructions / modules stored in memory 401 to perform functional applications and data processing, thereby implementing the methods corresponding to the key-value database near-storage calculation based on the computing storage device in the above-mentioned embodiments.

[0189] The memory 401 may include a program storage area and a data storage area. The program storage area may store an operating system and at least one application required for a function; the data storage area may store data generated based on the use of the terminal device. Furthermore, the memory 401 may include high-speed random access memory and non-volatile memory.

[0190] An embodiment of the present disclosure provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are configured to execute a method corresponding to a key-value database near storage calculation based on a computing storage device.

[0191] The aforementioned computer-readable storage medium may be a transient computer-readable storage medium or a non-transitory computer-readable storage medium.

Claims

1. A key-value database near-storage computing system based on a computing storage device, characterized in that: The system includes a host CPU, a memory, and a computing memory, wherein the computing memory is deployed with a memory and a computing accelerator, and the computing accelerator includes a decoder, a sequencer, and an encoder; The decoder is used to read the SS-Table file to be merged from the memory, parse all key-value pairs from the file, and place the key-value pairs in the FIFO buffer connected to the sorter; The sorter is used to compare the size relationship of the key-value pairs, and take out the key-value pairs from the corresponding decoder FIFO buffer according to the result of each comparison, select the key-value pair with the smallest key according to the size of the key in the key-value pair, and transmit the corresponding key-value pair to the FIFO buffer connected to the encoder; The encoder is used to take key-value pairs from the FIFO buffer connected to the sorter, and generate an SS-Table file according to the file encoding rules and store it in the memory; The system is also used to: count the metadata of the SS-Table files involved in the merge; map the SS-Table file space in the dynamic memory part of the computing memory; use P2P to transmit, and transfer the SS-Table file from the computing memory storage module to the dynamic memory inside the computing memory; pre-allocate the buffer for merging and generating data in the dynamic memory of the computing memory; activate the computing unit in the computing memory to perform the merge calculation; the host CPU receives the return parameters returned by the computing unit of the computing memory; the host CPU generates partial metadata of the target SS-Table file according to the parameters returned by the computing unit; use P2P to transmit, and write the generated SS-Table file partial data from the dynamic memory of the computing memory back to the storage module of the computing memory; The host CPU also includes an intelligent merge operation trigger for dynamically triggering merge calculations based on the real-time load status of the system; The method dynamically triggers merge calculations based on the real-time load status of the system, including: detecting the real-time load status of the host CPU and computing memory in the current system; determining the device type with a heavier workload and the priority level corresponding to the workload difference between the two types of devices, the host CPU and the computing memory, in the current system according to the load status of the host CPU and the load status of the computing memory; triggering the merge triggering strategy under the corresponding device and priority level according to the determined device type and priority level; estimating the actual computing device for analysis and calculation, and dynamically adjusting the SS-Table file included in a single merge calculation; generating a corresponding merge calculation for the key-value database.

2. The system according to claim 1, wherein: The process of reading the SS-Table file to be merged from the memory, parsing all key-value pairs from the file, and placing the key-value pairs in a FIFO buffer connected to the sorter includes: Determine whether the current data block reading is completed. If it is completed, read the next data block from the memory into the data block buffer stored in the BRAM; Read the current data from the buffer and read the key-value pair metadata based on the current data; Read key-value pair information based on key-value pair metadata; Transfer the read key-value pairs to the FIFO buffer; Updates the read index based on the current key-value pair metadata.

3. The system according to claim 1, wherein: The comparing the size relationship of the key-value pairs, taking out the key-value pairs from the corresponding decoder FIFO buffer according to the result of each comparison, selecting the key-value pair with the smallest key according to the size of the key in the key-value pairs, and transmitting the corresponding key-value pairs to the FIFO buffer connected to the encoder, including: Read a key-value pair from the FIFO buffer connected to the decoder; Separate the read key-value pairs and obtain the user key and timestamp in the key-value pairs; Compare all obtained user key values; Transfer the key-value pair with the minimum user key value to the FIFO buffer connected to the encoder; The key-value pair is supplemented by the decoder corresponding to the key-value pair of the minimum user key value.

4. The system according to claim 1, wherein: The process of extracting key-value pairs from the FIFO buffer connected to the sorter and generating an SS-Table file according to the file encoding rules and storing the file in the memory includes: Read key-value pairs from the FIFO buffer connected to the sorter; Determine the validity of the current key-value pair; Determine the encoding of the key value in the current key-value pair based on the encoding state and the information of the previous key-value pair; Store the encoded key code into the buffer in memory; Store the encoded value encoding into the buffer in memory; Updates the encoder state based on the current key-value pair.

5. The system according to claim 1, wherein: The system also includes an intelligent dynamic scheduler for computing storage devices, which is used to coordinate merging operations, task allocation, and resource allocation between the host CPU and computing memory.

6. The system according to claim 5, characterized in that The coordination of merging operations, task allocation, and resource allocation between the host CPU and the computing memory includes: After receiving the merge calculation feedback information triggered by the key-value database, the current calculation overhead on the host CPU and computing memory is determined based on the merge level of the generated calculation, the number of SS-Tables included, and the file size characteristics; Compare the host CPU and computing memory calculation time and the impact on the overall system resources to determine the computing device; Add the corresponding merge calculation to the calculation queue of the corresponding computing device; Regularly check the computing queues of all devices and dynamically adjust the assigned computing devices and computing priorities based on the waiting time in the computing queues.

7. The system according to claim 1, wherein: The system further comprises a key-value database parameter dynamic tuner, wherein the key-value database parameter dynamic tuner is used to regularly detect the workload of the entire system; Analyze the detected workload and analyze the optimal strategy for the current database, including memory buffer and background merge thread parameters, based on the tuning strategy. Adjust the parameters in the key-value database based on the analysis results.

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