Wireless charging receiving end synchronous rectification control circuit and control method

Abstract

The present invention proposes a synchronous rectification control circuit and control method for a wireless charging receiving end, wherein the control circuit includes a current transformer, a half-wave sampler, a hysteresis comparator, a filter, a logic judgment circuit, a NOT gate circuit, and an isolated gate driver; the current transformer performs sinusoidal current sampling; the sinusoidal current is half-wave sampled and de-jittered, and the de-jittered square wave and the current sine wave direction signal are simultaneously sent to the logic judgment circuit; the logic judgment circuit performs abnormality judgment, and the isolated gate driver drives the MOS tube output based on the abnormality judgment result. Through high-precision current sampling, signal conversion, de-jitter processing, and precise logic judgment, not only the high efficiency and stability of synchronous rectification are ensured, but also the energy utilization and safety of the system are improved, and power loss is reduced.

Description

Technical Field

[0001] The present invention belongs to the technical field of wireless charging, and in particular relates to a synchronous rectification control circuit and a control method for a wireless charging receiving end. Background Art

[0002] With the rapid development of wireless charging technology, especially in medium- and high-power wireless charging applications, traditional rectification methods can no longer meet high-efficiency requirements. In traditional wireless chargers, diodes are often used at the receiving end as components for half-wave or full-bridge rectification. However, due to the high forward voltage drop of diodes, especially at high currents, the conduction and switching losses of diodes are significant, which significantly reduces overall conversion efficiency and seriously affects the performance of wireless charging systems.

[0003] In order to improve charging efficiency, there is an improved solution in the existing technology, which is to use MOSFET as a rectifier element. Compared with diodes, MOSFET has lower on-resistance and can therefore effectively reduce conduction losses. In addition, the switching loss of MOSFET is also lower than that of diodes, which makes the synchronous rectification solution using MOSFET significantly improve the efficiency of the entire wireless charging system. However, when using MOSFET for synchronous rectification, how to accurately and stably control the switching state of MOSFET is a key issue. Traditional control methods usually rely on output voltage or reference signal for control, but in high-power wireless charging applications, due to the frequent changes in the current at the receiving end, the output voltage fluctuates greatly, which can easily affect the stability and reliability of traditional control methods. Summary of the Invention

[0004] To address this issue, the present invention proposes a synchronous rectification control circuit and method for wireless charging receivers. This method uses the receiver current as a synchronization signal to directly control the switching state of the MOSFET. By detecting and processing the receiver current in real time, the MOSFET's operating state can be accurately synchronized. Regardless of output voltage fluctuations, the MOSFET's switching is synchronized with the current waveform, thus avoiding control instability caused by voltage variations and improving system stability and efficiency.

[0005] In a first aspect, the present invention provides a synchronous rectification control circuit for a wireless charging receiving end, the control circuit comprising: a current transformer, a half-wave sampler, a hysteresis comparator, a filter, a logic judgment circuit, a NOT gate circuit, and an isolated gate driver;

[0006] One end of the half-wave sampler is connected to a current transformer, and the other end is connected to a hysteresis comparator; the hysteresis comparator is connected to an isolated gate driver through a filter and a logic judgment circuit;

[0007] The current transformer is also connected to another hysteresis comparator and connected to a NOT gate circuit through another filter. The other end of the NOT gate circuit is connected to an isolated gate driver through the logic judgment circuit.

[0008] The MOS tube drive output is performed through the isolated gate driver.

[0009] This invention utilizes synchronous rectification technology using MOS transistors, significantly reducing conduction and switching losses compared to traditional diode rectification, thereby improving the overall energy efficiency of the wireless charging system. This is particularly important in high-power applications, as it effectively reduces energy waste caused by conduction losses.

[0010] Preferably, the half-wave sampler is used for shunt sampling of the sinusoidal current sampled by the current transformer, and comprises a first half-wave sampler and a second half-wave sampler;

[0011] The first half-wave sampler is used for performing positive half-wave sampling;

[0012] The second half-wave sampler is used for performing negative half-wave sampling.

[0013] Preferably, the hysteresis comparator includes a first hysteresis comparator and a second hysteresis comparator;

[0014] Preferably, the filter includes a first filter and a second filter;

[0015] Preferably, the logic judgment circuit includes a first logic judgment circuit and a second logic judgment circuit;

[0016] The first half-wave sampler and the second half-wave sampler convert the current sine wave into a square wave through the first hysteresis comparator and the second hysteresis comparator respectively, and then perform de-jitter processing through the first filter and the second filter respectively;

[0017] The first filter synchronously sends the de-jittered square wave and the corresponding positive half-axis current direction signal to the first logic judgment circuit;

[0018] The second filter synchronously sends the de-jittered square wave and the corresponding negative half-axis current direction signal to the second logic judgment circuit.

[0019] The current signal detected by the current transformer may contain noise and transient fluctuations. Debounce processing effectively eliminates this noise, resulting in a more stable square wave signal. The filter then filters these two signals, synchronizing the debounced square wave signal with the positive-semi-axis current direction signal, thereby eliminating timing errors.

[0020] Preferably, the hysteresis comparator further includes a third hysteresis comparator;

[0021] Preferably, the filter further includes a third filter;

[0022] The third hysteresis comparator is connected to the NOT gate circuit via a third filter;

[0023] The third hysteresis comparator is used to perform zero-crossing judgment on the current sine wave collected by the current transformer to obtain a current sine wave direction signal. After the current sine wave direction signal is de-jittered by the third filter, one path flows to the second logic judgment circuit as a negative half-axis current direction signal, and the other path flows to the first logic judgment circuit as a positive half-axis current direction signal after the current sine wave direction signal is inverted through the NOT gate circuit.

[0024] The first logic judgment circuit and the second logic judgment circuit perform abnormality judgment on the received square wave and current sine wave direction signals. If the square wave frequency or duty cycle exceeds the preset range or if the current reverse is abnormal, the protection logic is triggered; otherwise, the switching timing signal of the MOS tube is generated according to the status of the square wave and current sine wave direction signals.

[0025] The switching timing signal of the MOS tube is output to the gate of the MOS tube by the isolated gate driver.

[0026] In a second aspect, the present invention further proposes a synchronous rectification control method for a wireless charging receiving end, the method comprising:

[0027] S1: Sine wave current sampling by current transformer;

[0028] S2: Perform half-wave sampling and de-jitter processing on the sinusoidal current, and send the de-jittered square wave and the current sinusoidal wave direction signal to the logic judgment circuit at the same time;

[0029] S3: The logic judgment circuit performs abnormality judgment, and the isolated gate driver drives the MOS tube to output according to the abnormality judgment result.

[0030] Wherein, the step S2 is specifically as follows:

[0031] S21: performing half-wave sampling by the first half-wave sampler and the second half-wave sampler;

[0032] S22: The first hysteresis comparator and the second hysteresis comparator convert the sampled current sine wave into a square wave, and then perform de-jittering processing on the first filter and the second filter respectively to obtain a positive half-axis current synchronization signal and a negative half-axis current synchronization signal, and send them to the first logic judgment circuit and the second logic judgment circuit respectively;

[0033] S23: A third hysteresis comparator performs a zero-crossing judgment on the current sine wave collected by the current transformer to obtain a current sine wave direction signal. After the current sine wave direction signal is de-jittered by the third filter, one path of the current sine wave direction signal flows to the second logic judgment circuit as a negative half-axis current direction signal. The other path of the current sine wave direction signal flows to the first logic judgment circuit as a positive half-axis current direction signal after the current sine wave direction signal is inverted by the NOT gate circuit.

[0034] The positive half-axis current synchronization signal and the negative half-axis current synchronization signal are synchronously sent to the first logic judgment circuit and the second logic judgment circuit respectively as well as the negative half-axis current direction signal and the positive half-axis current direction signal.

[0035] The logic judgment circuit in step S3 performs abnormal judgment, specifically:

[0036] If it is determined that the square wave frequency is abnormal, a shutdown signal is output to the isolated gate driver;

[0037] If the duty cycle of the square wave exceeds a preset range, a limiting signal is output to the isolated gate driver;

[0038] If it is determined that the current direction is abnormal, a direction locking signal is output to the isolated gate driver;

[0039] If it is determined to be a composite fault, a shutdown signal and a fault code are output to the isolated gate driver;

[0040] Otherwise, it outputs PWM signal, current sine wave direction signal and enable signal to the isolated gate driver.

[0041] In a third aspect, the present invention further proposes a wireless charging receiving device, which adopts a wireless charging receiving end synchronous rectification control circuit as described in the first aspect; or adopts the control method as described in the second aspect to perform synchronous rectification control.

[0042] Compared with the prior art, the present invention has the following beneficial effects:

[0043] The present invention can better capture the fluctuation characteristics of the current by dividing the current sine wave into positive and negative half-wave sampling, ensuring that the current information in each half cycle can be fully sampled. By converting the sinusoidal current into a square wave through a hysteresis comparator, the processing process of the current signal can be simplified, the interference of noise can be reduced, and the subsequent logical judgment can be more direct and stable. The de-jittered square wave is sent to the logic judgment chip together with the current direction signal, which can more accurately judge the direction and state of the current, thereby deciding whether to turn on or off the MOS tube and realize synchronous rectification control. Therefore, the present invention not only ensures the high efficiency and stability of synchronous rectification, but also improves the energy utilization and safety of the system and reduces power loss through high-precision current sampling, signal conversion, de-jitter processing and precise logical judgment. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 Schematic diagram of a synchronous rectification control circuit of a wireless charging receiving end in this embodiment.

[0045] Figure 2 This is a flow chart of the synchronous rectification control method for the wireless charging receiving end in this embodiment.

[0046] Figure 3 4 is a flow chart of half-wave sampling and de-jittering processing for the sinusoidal current in this embodiment. DETAILED DESCRIPTION

[0047] The following description is intended to disclose the present invention so that those skilled in the art can implement the present invention. The preferred embodiments described below are merely examples, and those skilled in the art may conceive of other obvious variations.

[0048] Example 1, as Figure 1 As shown, the present invention provides a synchronous rectification control circuit for a wireless charging receiving end, the control circuit comprising: a current transformer, a half-wave sampler, a hysteresis comparator, a filter, a logic judgment circuit, a NOT gate circuit and an isolated gate driver;

[0049] One end of the half-wave sampler is connected to a current transformer, and the other end is connected to a hysteresis comparator; the hysteresis comparator is connected to an isolated gate driver through a filter and a logic judgment circuit;

[0050] The current transformer is also connected to another hysteresis comparator and connected to a NOT gate circuit through another filter. The other end of the NOT gate circuit is connected to an isolated gate driver through the logic judgment circuit.

[0051] The MOS tube drive output is performed through the isolated gate driver.

[0052] This invention utilizes synchronous rectification technology using MOS transistors, significantly reducing conduction and switching losses compared to traditional diode rectification, thereby improving the overall energy efficiency of the wireless charging system. This is particularly important in high-power applications, as it effectively reduces energy waste caused by conduction losses.

[0053] Preferably, the half-wave sampler is used to perform shunt sampling on the sinusoidal current sampled by the current transformer, including a first half-wave sampler and a second half-wave sampler, the first half-wave sampler is used for positive half-wave sampling; the second half-wave sampler is used for negative half-wave sampling. By sampling the positive half-wave and negative half-wave currents respectively, the system can independently handle changes in the positive and negative directions of the current, thereby improving the system's response speed and accuracy to changes in the current waveform.

[0054] Preferably, the hysteresis comparator includes a first hysteresis comparator and a second hysteresis comparator;

[0055] Preferably, the filter includes a first filter and a second filter for removing switching noise generated by the hysteresis comparator or high-frequency jitter caused by signal instability. Through the action of the filter, the current signal can be smoothed after being converted into a square wave, eliminating abnormal fluctuations in a short period of time and ensuring the quality of the square wave signal.

[0056] Preferably, the logic judgment circuit includes a first logic judgment circuit and a second logic judgment circuit;

[0057] The first half-wave sampler and the second half-wave sampler convert the current sine wave into a square wave through the first hysteresis comparator and the second hysteresis comparator respectively, and then perform de-jitter processing through the first filter and the second filter respectively.

[0058] The first filter synchronously sends the de-jittered square wave and the corresponding positive half-axis current direction signal to the first logic judgment circuit.

[0059] The second filter synchronously sends the de-jittered square wave and the corresponding negative half-axis current direction signal to the second logic judgment circuit.

[0060] The current signal detected by the current transformer may contain noise and transient fluctuations. Debounce processing effectively eliminates this noise, resulting in a more stable square wave signal. The filter then filters these two signals, synchronizing the debounced square wave signal with the positive-semi-axis current direction signal, thereby eliminating timing errors.

[0061] Preferably, the hysteresis comparator further includes a third hysteresis comparator;

[0062] Preferably, the filter further includes a third filter;

[0063] The third hysteresis comparator is connected to the NOT gate circuit via a third filter;

[0064] The third hysteresis comparator is used to determine whether the current sine wave collected by the current transformer has crossed zero, thereby obtaining a current sine wave direction signal. Specifically, it determines whether the current signal has crossed a zero crossing point. When the current signal crosses zero, the comparator outputs a logic signal indicating a change in current direction.

[0065] After the current sine wave direction signal is de-jittered by the third filter, one path flows to the second logic judgment circuit as the negative half-axis current direction signal, and the other path flows to the first logic judgment circuit as the positive half-axis current direction signal after the current sine wave direction signal is inverted through the NOT gate circuit.

[0066] The first logic judgment circuit and the second logic judgment circuit perform abnormality judgment on the received square wave and current sine wave direction signals. If the square wave frequency or duty cycle exceeds the preset range or if the current reverse is abnormal, the protection logic is triggered; otherwise, the switching timing signal of the MOS tube is generated according to the status of the square wave and current sine wave direction signals.

[0067] The switching timing signal of the MOS tube is output to the gate of the MOS tube by the isolated gate driver.

[0068] Example 2, as Figure 2 As shown, the present invention also proposes a synchronous rectification control method for a wireless charging receiving end, the method comprising:

[0069] S1: Sine wave current sampling by current transformer;

[0070] S2: Perform half-wave sampling and de-jitter processing on the sinusoidal current, and send the de-jittered square wave and the current sinusoidal wave direction signal to the logic judgment circuit at the same time;

[0071] S3: The logic judgment circuit performs abnormality judgment, and the isolated gate driver drives the MOS tube to output according to the abnormality judgment result.

[0072] This invention effectively improves the charging efficiency, system stability, and safety of the wireless charging receiver through precise current sampling, de-jitter processing, anomaly detection, and MOS transistor drive output. In particular, it minimizes power loss during synchronous rectification control, while ensuring electrical safety through an isolated driver and optimizing overall performance.

[0073] Among them, such as Figure 3 As shown, the step S2 is specifically as follows:

[0074] S21: performing half-wave sampling by the first half-wave sampler and the second half-wave sampler;

[0075] S22: The first hysteresis comparator and the second hysteresis comparator convert the sampled current sine wave into a square wave, and then perform de-jittering processing on the first filter and the second filter respectively to obtain a positive half-axis current synchronization signal and a negative half-axis current synchronization signal, and send them to the first logic judgment circuit and the second logic judgment circuit respectively;

[0076] S23: A third hysteresis comparator performs a zero-crossing judgment on the current sine wave collected by the current transformer to obtain a current sine wave direction signal. After the current sine wave direction signal is de-jittered by the third filter, one path of the current sine wave direction signal flows to the second logic judgment circuit as a negative half-axis current direction signal. The other path of the current sine wave direction signal flows to the first logic judgment circuit as a positive half-axis current direction signal after the current sine wave direction signal is inverted by the NOT gate circuit.

[0077] The positive half-axis current synchronization signal and the negative half-axis current synchronization signal are synchronously sent to the first logic judgment circuit and the second logic judgment circuit respectively as well as the negative half-axis current direction signal and the positive half-axis current direction signal.

[0078] The logic judgment circuit in step S3 performs abnormal judgment, specifically:

[0079] If the square wave frequency is abnormal, it may be due to waveform distortion or noise interference of the current signal, or there is a problem with the current transformer sampling. In this case, a shutdown signal is output to the isolated gate driver to quickly cut off the operation of the MOS tube and prevent the system from being unstable or damaged.

[0080] The square wave's duty cycle is a key parameter for controlling MOSFET switching. If the square wave's duty cycle exceeds the preset range, it indicates that the current on-time is not as expected, possibly due to an abnormal current waveform or system malfunction. A limiting signal is then output to the isolated gate driver to limit the MOSFET's on-time and prevent excessive or insufficient current from affecting system stability.

[0081] If the current direction is abnormal, a direction-lock signal is output to the isolated gate driver to ensure that the current flows in the correct direction, thereby preventing reverse current from damaging the battery or other circuits. Abnormal current direction is usually caused by factors such as reverse current or magnetic field interference in the circuit, which makes it impossible to correctly determine the current direction.

[0082] If it is determined to be a composite fault, a shutdown signal and a fault code are output to the isolated gate driver. A composite fault refers to the simultaneous occurrence of multiple fault conditions, such as abnormal frequency, excessive duty cycle, abnormal current direction, etc., which may have a serious impact on the system. In this case, the logic judgment circuit will not only output a shutdown signal to cut off the operation of the MOS tube, but also output a fault code to the isolated gate driver so that the system can perform fault troubleshooting or record it.

[0083] Otherwise, it outputs PWM signal, current sine wave direction signal and enable signal to the isolated gate driver.

[0084] By outputting these signals, the present invention enables the system to continue to operate stably and perform wireless charging efficiently, thereby ensuring the normal operation and high efficiency of the system.

[0085] In a third embodiment, the present invention further proposes a wireless charging receiving device, which adopts a wireless charging receiving end synchronous rectification control circuit as described in the first aspect; or adopts the control method as described in the second aspect to perform synchronous rectification control.

[0086] The above shows and describes the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions merely illustrate the principles of the present invention. Various changes and modifications may be made to the present invention without departing from the spirit and scope of the present invention. Such changes and modifications are intended to fall within the scope of the present invention. The scope of protection claimed by the present invention is defined by the appended claims and their equivalents.

Claims

1. A synchronous rectification control circuit for a wireless charging receiving end, characterized in that: The control circuit includes: a current transformer, a half-wave sampler, a hysteresis comparator, a filter, a logic judgment circuit, a NOT gate circuit and an isolated gate driver; wherein, One end of the half-wave sampler is connected to a current transformer, and the other end is connected to a hysteresis comparator; the hysteresis comparator is connected to an isolated gate driver through a filter and a logic judgment circuit; The current transformer is also connected to another hysteresis comparator and connected to a NOT gate circuit through another filter. The other end of the NOT gate circuit is connected to an isolated gate driver through the logic judgment circuit. MOS tube driving output is performed through the isolated gate driver; The half-wave sampler includes a first half-wave sampler and a second half-wave sampler; The hysteresis comparator includes a first hysteresis comparator and a second hysteresis comparator; The filter includes a first filter and a second filter; The logic judgment circuit includes a first logic judgment circuit and a second logic judgment circuit; The hysteresis comparator further includes a third hysteresis comparator; The filter further includes a third filter, and the third hysteresis comparator is connected to the NOT gate circuit via the third filter; The half-wave sampler is used to perform shunt sampling on the sinusoidal current sampled by the current transformer; The first half-wave sampler is used for performing positive half-wave sampling; The second half-wave sampler is used for performing negative half-wave sampling; The first half-wave sampler and the second half-wave sampler convert the current sine wave into a square wave through the first hysteresis comparator and the second hysteresis comparator respectively, and then perform de-jitter processing through the first filter and the second filter respectively; The first filter synchronously sends the de-jittered square wave and the corresponding positive half-axis current direction signal to the first logic judgment circuit; The second filter synchronously sends the de-jittered square wave and the corresponding negative half-axis current direction signal to the second logic judgment circuit; The third hysteresis comparator is used to perform zero-crossing judgment on the current sine wave collected by the current transformer to obtain a current sine wave direction signal. After the current sine wave direction signal is de-jittered by the third filter, one path flows to the second logic judgment circuit as a negative half-axis current direction signal, and the other path flows to the first logic judgment circuit as a positive half-axis current direction signal after the current sine wave direction signal is inverted through the NOT gate circuit.

2. A wireless charging receiving end synchronous rectification control circuit according to claim 1, characterized in that: The first logic judgment circuit and the second logic judgment circuit perform abnormality judgment on the received square wave and current sine wave direction signals, and trigger the protection logic if the square wave frequency or duty cycle exceeds a preset range or if the current reverse is abnormal; Otherwise, the switching timing signal of the MOS tube is generated according to the direction signal states of the square wave and the current sine wave.

3. A wireless charging receiving end synchronous rectification control circuit according to claim 2, characterized in that: The switching timing signal of the MOS tube is output to the gate of the MOS tube by the isolated gate driver.

4. A control method for a synchronous rectification control circuit at a wireless charging receiving end according to any one of claims 1 to 3, characterized in that: The method comprises: S1: Sine wave current sampling by current transformer; S2: Perform half-wave sampling and de-jitter processing on the sinusoidal current, and send the de-jittered square wave and the current sinusoidal wave direction signal to the logic judgment circuit at the same time; S3: The logic judgment circuit performs abnormality judgment, and the isolated gate driver drives the MOS tube output according to the abnormality judgment result; Wherein, the step S2 is specifically as follows: S21: performing half-wave sampling by the first half-wave sampler and the second half-wave sampler; S22: The first hysteresis comparator and the second hysteresis comparator convert the sampled current sine wave into a square wave, and then perform de-jittering processing on the first filter and the second filter respectively to obtain a positive half-axis current synchronization signal and a negative half-axis current synchronization signal, and send them to the first logic judgment circuit and the second logic judgment circuit respectively; S23: A third hysteresis comparator performs a zero-crossing judgment on the current sine wave collected by the current transformer to obtain a current sine wave direction signal. After the current sine wave direction signal is de-jittered by the third filter, one path of the current sine wave direction signal flows to the second logic judgment circuit as a negative half-axis current direction signal. The other path of the current sine wave direction signal flows to the first logic judgment circuit as a positive half-axis current direction signal after the current sine wave direction signal is inverted by the NOT gate circuit. The positive half-axis current synchronization signal and the positive half-axis current direction signal are synchronously sent to the first logic judgment circuit, and the negative half-axis current synchronization signal and the negative half-axis current direction signal are synchronously sent to the second logic judgment circuit.

5. The control method according to claim 4, characterized in that: The logic judgment circuit in step S3 performs abnormal judgment, specifically: If it is determined that the square wave frequency is abnormal, a shutdown signal is output to the isolated gate driver; If the duty cycle of the square wave exceeds a preset range, a limiting signal is output to the isolated gate driver; If it is determined that the current direction is abnormal, a direction locking signal is output to the isolated gate driver; If it is determined to be a composite fault, a shutdown signal and a fault code are output to the isolated gate driver; Otherwise, it outputs PWM signal, current sine wave direction signal and enable signal to the isolated gate driver.

6. A wireless charging receiving device, characterized in that: The wireless charging receiving device adopts a wireless charging receiving end synchronous rectification control circuit as described in any one of claims 1-3; or adopts the control method as described in any one of claims 4-5 to perform synchronous rectification control.

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